CN110349842A - A kind of production method of chip - Google Patents
A kind of production method of chip Download PDFInfo
- Publication number
- CN110349842A CN110349842A CN201910672886.7A CN201910672886A CN110349842A CN 110349842 A CN110349842 A CN 110349842A CN 201910672886 A CN201910672886 A CN 201910672886A CN 110349842 A CN110349842 A CN 110349842A
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- China
- Prior art keywords
- recessed portion
- graphics chip
- side wall
- substrate
- seed layer
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 52
- 239000000758 substrate Substances 0.000 claims abstract description 54
- 239000010931 gold Substances 0.000 claims description 13
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 12
- 229910052737 gold Inorganic materials 0.000 claims description 12
- 230000008719 thickening Effects 0.000 claims description 10
- 239000012528 membrane Substances 0.000 claims description 6
- 230000007423 decrease Effects 0.000 claims description 3
- 229910052751 metal Inorganic materials 0.000 abstract description 66
- 239000002184 metal Substances 0.000 abstract description 66
- 238000000034 method Methods 0.000 abstract description 13
- 230000008569 process Effects 0.000 abstract description 9
- 230000000694 effects Effects 0.000 abstract description 7
- 238000010586 diagram Methods 0.000 description 10
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 6
- 239000000463 material Substances 0.000 description 4
- 208000012260 Accidental injury Diseases 0.000 description 2
- 229910017083 AlN Inorganic materials 0.000 description 2
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 230000001771 impaired effect Effects 0.000 description 2
- 208000014674 injury Diseases 0.000 description 2
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 description 2
- 239000010453 quartz Substances 0.000 description 2
- 229910052594 sapphire Inorganic materials 0.000 description 2
- 239000010980 sapphire Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910001928 zirconium oxide Inorganic materials 0.000 description 2
- 230000006978 adaptation Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02697—Forming conducting materials on a substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Ceramic Engineering (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
A kind of production method of chip, is related to field of photoelectric technology.It include: to open up recessed portion in substrate surface.Seed layer is covered to substrate, make graphics chip in graphics chip area and makes side figure in the side wall of recessed portion.Graphics chip area is located at the surface of substrate and is located at the edge of the oral area of recessed portion, and each recessed portion is correspondingly arranged at least one graphics chip area.Extra seed layer is removed, cutting obtains chip, so that the side wall of the graphics chip area of each chip and recessed portion corresponds.It enormously simplifies the process and operation difficulty when production side-wall metallic figure and front metal pattern, and side-wall metallic figure and front metal figure can be avoided to misplace as far as possible, the turn-on effect between side-wall metallic figure and front metal figure is optimized, chip quality and reliability are improved.
Description
Technical field
The present invention relates to field of photoelectric technology, in particular to a kind of production method of chip.
Background technique
In the production process of chip, for thin film circuit chip, side-wall metallic figure and front metal pattern it
Between turn-on effect it is very crucial for chip, but at present often occur in process of production side-wall metallic figure and front
There is the problem of dislocation (to not just) in metallic pattern poor flow, these all cause chip quality and seriously affect.
Some the position of side wall metallic pattern and front metal pattern can be modified and be optimized although having at present
Method, but its operating process is excessively complicated, can seriously drag slow manufacturing schedule, and implements also very inconvenient.
In view of this, special propose the application.
Summary of the invention
The purpose of the present invention is to provide a kind of production method of chip, enormously simplify production side-wall metallic figure and
Process and operation difficulty when front metal pattern, and side-wall metallic figure and front metal figure can be avoided to occur as far as possible
Dislocation, optimizes the turn-on effect between side-wall metallic figure and front metal figure, improves chip quality and reliability.
The embodiment of the present invention is achieved in that
A kind of production method of chip comprising: recessed portion is opened up in substrate surface.Seed layer, Yu Xin are covered to substrate
Piece graph area makes graphics chip and makes side figure in the side wall of recessed portion.Graphics chip area is located at the surface of substrate and position
In the edge of the oral area of recessed portion, each recessed portion is correspondingly arranged at least one graphics chip area.Extra seed layer is gone
It removes, cutting obtains chip, so that the side wall of the graphics chip area of each chip and recessed portion corresponds.
It further, include: to the surface of substrate and the side wall of recessed portion while to cover seed to substrate covering seed layer
Layer.
Further, production method further includes carrying out at thickening to the seed layer of the side wall in graphics chip area and recessed portion
Reason.
Further, the thickness of substrate is less than or equal to 0.6mm.Seed layer is layer gold.
Further, the oral area of recessed portion has changeover portion, and the inner wall of changeover portion is connected to surface and the recessed portion of substrate
Side wall between.Its internal direction is directed toward by the oral area of recessed portion, the internal diameter of changeover portion successively decreases.
Further, seed layer isMembrane system layer.Seed is covered to substrate
Layer includes: to cover seed layer to the surface of substrate and the inner wall of changeover portion.
Further, in graphics chip area, production graphics chip includes: production graphics chip and carries out to graphics chip area
Layer gold thickening processing, then by the seed layer in the region except graphics chip area and changeover portion the twoFilm layer removal.
Further, making side figure in the side wall of recessed portion includes: that the substrate edge for making graphics chip is recessed
Portion is cut so that the side wall of recessed portion is exposed, and covering seed layer to the side wall of recessed portion and make side figure is hadThe graphic structure of membrane system, and the side wall of recessed portion is carried out at layer gold thickening
Reason.
It further, include: by the side wall three of graphics chip area, changeover portion and recessed portion by extra seed layer removal
Except region Ti layer removal.
Further, each recessed portion is correspondingly arranged Liang Ge graphics chip area, and Liang Ge graphics chip area is located at recessed portion
Opposite sides edge, the side wall of the opposite sides of recessed portion corresponds with Liang Ge graphics chip area.
The beneficial effect of the embodiment of the present invention is:
The production method of chip provided in an embodiment of the present invention, which is taken, directly opens up recessed portion in substrate surface.By in core
Piece graph area makes front metal pattern, makes side metal figure in the side wall of recessed portion, is equivalent to and recessed portion work is utilized
For reference data, to guarantee that front metal pattern is in accurate corresponding position with side metal figure.
In addition, side wall just completes when opening up recessed portion, it, can be to chip figure according to the position of recessed portion and size
It (can be reference data to front metal pattern and side metal figure using recessed portion that the position in shape area, which is adaptively adjusted,
Position optimize), can ensure that front metal pattern and side metal figure are corresponding accurate in this way, avoid misplacing.
Mode compared to " first make front metal pattern and make side wall again, side metal figure is made on side wall " is compared, right
The requirement of the position precision of side wall substantially reduces, will not because the position of side wall slightly deviates and directly result in side figure can not
Smoothly the problem of production, while surprisingly front metal pattern will not be damaged because of during making side wall, especially
Intersection on the surface where front metal pattern and the side wall where side metal figure, will not be because of their intersection
Wafer body it is impaired and influence the quality of front metal pattern.
By designing above, not only manufacture difficulty and production are required to substantially reduce, while can also effectively avoid making
Accidental injury is caused to front metal pattern and side metal figure during work, while improving efficiency with ease also into
One step has ensured chip quality.In general, the production method of chip provided in an embodiment of the present invention enormously simplifies production side
Process and operation difficulty when wall metallic pattern and front metal pattern, and side-wall metallic figure and just can be avoided as far as possible
Face metal figure misplaces, and optimizes the turn-on effect between side-wall metallic figure and front metal figure, improves chip quality
And reliability.
Detailed description of the invention
In order to illustrate the technical solution of the embodiments of the present invention more clearly, below will be to needed in the embodiment attached
Figure is briefly described, it should be understood that the following drawings illustrates only certain embodiments of the present invention, therefore is not construed as pair
The restriction of range for those of ordinary skill in the art without creative efforts, can also be according to this
A little attached drawings obtain other relevant attached drawings.
Fig. 1 is the pilot process schematic diagram of the production method of chip provided by the embodiment of the present invention 1；
Fig. 2 is the structural schematic diagram of chip made from the production method of the chip as provided by the embodiment of the present invention 1；
Fig. 3 is the pilot process schematic diagram of the production method of chip provided by the embodiment of the present invention 2；
Fig. 4 is that the substrate in Fig. 3 encloses the schematic diagram of the section structure after seed layer；
Fig. 5 is the structural schematic diagram after the layer gold in Fig. 4 thickeies；
Fig. 6 is the structural schematic diagram after the extra Au layer in Fig. 5 is removed with Pt layers；
Fig. 7 is structural schematic diagram of the substrate by cutting after in a strip shape in Fig. 3；
Fig. 8 is the structural schematic diagram of chip made from the production method of the chip as provided by the embodiment of the present invention 2；
Fig. 9 is the structural schematic diagram when the two sides of recessed portion are respectively provided with graphics chip area；
Structural schematic diagram when Figure 10 is the changeover portion using another structure.
Icon: chip 100；Substrate 110；Recessed portion 120；Front metal pattern 130；Side metal figure 140；
Chip 200；Substrate 210；Recessed portion 220；Front metal pattern 230；Side metal figure 240；Changeover portion 250.
Specific embodiment
It in order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below will be in the embodiment of the present invention
Technical solution be clearly and completely described.The person that is not specified actual conditions in embodiment, according to normal conditions or manufacturer builds
The condition of view carries out.
The production method of chip provided in an embodiment of the present invention is specifically described below.
A kind of production method of chip provided in an embodiment of the present invention.A part of step of this method includes:
Recessed portion is opened up in substrate surface.
Seed layer is covered to substrate, make graphics chip in graphics chip area and makes side view in the side wall of recessed portion
Shape.Wherein, graphics chip area is located at the surface of substrate and is located at the edge of the oral area of recessed portion, and each recessed portion is correspondingly arranged
At least one graphics chip area.
Extra seed layer is removed, cutting obtains chip, so that the graphics chip area of each chip and the side of recessed portion
Wall corresponds.
In production method provided in an embodiment of the present invention, takes and directly open up recessed portion in substrate surface.By in core
Piece graph area makes front metal pattern, makes side metal figure in the side wall of recessed portion, is equivalent to and recessed portion work is utilized
For reference data, to guarantee that front metal pattern is in accurate corresponding position with side metal figure.
In addition, side wall just completes when opening up recessed portion, it, can be to chip figure according to the position of recessed portion and size
It (can be reference data to front metal pattern and side metal figure using recessed portion that the position in shape area, which is adaptively adjusted,
Position optimize), can ensure that front metal pattern and side metal figure are corresponding accurate in this way, avoid misplacing.
Mode compared to " first make front metal pattern and make side wall again, side metal figure is made on side wall " is compared, right
The requirement of the position precision of side wall substantially reduces, will not because the position of side wall slightly deviates and directly result in side figure can not
Smoothly the problem of production, while surprisingly front metal pattern will not be damaged because of during making side wall, especially
Intersection on the surface where front metal pattern and the side wall where side metal figure, will not be because of their intersection
Wafer body it is impaired and influence the quality of front metal pattern.
By designing above, not only manufacture difficulty and production are required to substantially reduce, while can also effectively avoid making
Accidental injury is caused to front metal pattern and side metal figure during work, while improving efficiency with ease also into
One step has ensured chip quality.
Wherein, recessed portion can be groove, be also possible to the through-hole through substrate, and without being limited thereto.
Finally, after front metal pattern and side metal figure are made, so that it may along recessed portion to substrate
It is cut, obtains chip product.
It should be noted that each recessed portion can be correspondingly arranged multiple graphics chip areas, it need not in order to avoid increasing
The workload wanted, we control each recessed portion and are correspondingly arranged Liang Ge graphics chip area.Liang Ge graphics chip area is located at recess
The side wall at the opposite sides edge in portion, the opposite sides of recessed portion is corresponded with Liang Ge graphics chip area.At this point, the recessed portion
Corresponding graphics chip area is used to production front metal pattern, and the two of recessed portion corresponding with the two graphics chip areas
A side wall is used to make corresponding side metal figure.Two side walls for making side metal figure are oppositely arranged.?
When having made metallic pattern and having cut to substrate, the side wall being provided with except side metal figure along recessed portion is cut
It cuts.It is designed in this way, can further promote single batch product quantity, help to save preposition process, and improve to raw material
Utilization rate.
In order to clearly describe technical solution provided by the embodiment of the present invention, two specific implementations are presented below
Example.
Embodiment 1
The present embodiment provides a kind of production methods of chip 100, comprising:
(1) recessed portion 120 is opened up on substrate 110 (for square through hole), wherein the material of substrate 110 is aluminium nitride (its
In, the material of substrate 110 can also be aluminium oxide, silicon wafer, quartz, sapphire, zirconium oxide etc., and without being limited thereto).Such as Fig. 1 institute
Show.
(2) substrate 110 is cleaned up, as down payment (seed layer) deposition is carried out in evaporator, makes the surface of substrate 110
(inner wall including recessed portion 120) evaporates upper down payment, i.e. the side wall of the plate face to substrate 110 and recessed portion 120 covers simultaneously
Upper seed layer.
(3) 100 graph area of chip is selected according to the position of recessed portion 120,100 graph area of chip is made to be located at recessed portion 120
The edge of oral area and corresponding with the side wall of recessed portion 120, and make front metal pattern 130 in 100 graph area of chip.
(4) thickening processing is carried out to the seed layer of the side wall of 100 graph area of chip and recessed portion 120.
(5) extra layer gold is removed, substrate 110 is cut along recessed portion 120 (such as along on the way the face A-A and
The face B-B), obtain independent chip 100.The front metal pattern 130 and side metal figure 140 of each chip 100 are accurate
It is corresponding.As shown in Figure 2.
It is done up during carrying out down payment deposition it should be noted that side metal figure 140 can be, it can also be with
It is to be done up during being thickeied to side wall layer gold, naturally it is also possible to it is to be done up after thickening, production side gold
Belong to figure 140 opportunity can according to specific production line flexible choice, in the present embodiment, side metal figure 140 be
It is done up during being thickeied to the side wall layer gold of recessed portion 120.
Provided production method can (general thickness be less than or waits to the lesser substrate of thickness 110 through this embodiment
In 0.6mm) carry out rapid processing processing.The front metal pattern 130 and side metal figure 140 of prepared chip 100
It is corresponding accurate, and the two turn-on effect is good.
Embodiment 2
The present embodiment provides a kind of production methods of chip, comprising:
(1) recessed portion 220 is opened up on substrate 210, the material of substrate 210 is that (material of substrate 210 can be with for aluminium nitride
It is aluminium oxide, silicon wafer, quartz, sapphire, zirconium oxide etc., and without being limited thereto).As shown in Figure 3, wherein recessed portion 220 is vertical
In the square through hole that the surface of substrate 210 opens up, the oral area of recessed portion 220 also has changeover portion 250, the inner wall of changeover portion 250
It is connected between the surface of substrate 210 and the side wall of recessed portion 220.Its internal direction, mistake are directed toward by the oral area of recessed portion 220
The internal diameter for crossing section 250 successively decreases.In the present embodiment, the inner wall of changeover portion 250 is planomural, and the inner wall and base of changeover portion 250
The angle of the plate face of piece 210 is 45 °.According to the actual situation, the angle between the inner wall of changeover portion 250 and the plate face of substrate 210
It can carry out appropriate adjustment.
(2) substrate 210 is cleaned up, as seed layer is formed on evaporator, makes surface and the changeover portion of substrate 210
250 inner wall encloses seed layer.
Wherein, seed layer isMembrane system layer.As shown in Figure 4.
(3) graphics chip area is selected according to the position of recessed portion 220, graphics chip area is made to be located at the oral area of recessed portion 220
The edge of (oral area of changeover portion 250) is simultaneously corresponding with the side wall of recessed portion 220, and makes front metal pattern in graphics chip area
230, and thickening processing is carried out by seed layer of the electroplating technology to graphics chip area.As shown in Figure 5.
(4) by the seed layer in the region except 250 the two of graphics chip area and changeover portionFilm layer removal (can be by the way of etching).As shown in Figure 6.
(5) substrate 210 is cut into strips (as shown in Figure 7) along recessed portion 220 (such as the face C-C), makes recessed portion 220
Side wall is exposed.Covering seed layer to the side wall of recessed portion 220 and make side figure is hadThe graphic structure of membrane system, and layer gold thickening is carried out to the side wall of recessed portion 220
Processing.
(6) the Ti floor in the region except the side wall three in graphics chip area, changeover portion 250 and recessed portion 220 is removed.
(7) strip-shaped product is cut into (such as the face D-D), obtains chip.As shown in Figure 8.
Through this embodiment provided production method can substrate 210 to various thickness carry out rapid processing processing.
The front metal pattern 230 and side metal figure 240 of prepared chip are corresponding accurate, and the turn-on effect of the two due to
The presence of changeover portion 250 becomes more preferably, and this method is wider to the adaptation range of the thickness of substrate 210.
It should be noted that the present embodiment can also be respectively provided with graphics chip area using in the two sides of a recessed portion 220
The mode in domain carries out, as shown in figure 9, in addition, changeover portion 250 can also be by the way of as shown in Figure 10.
In an embodiment of the present invention, when carrying out production seed layer, evaporator can be used, magnetic control also can be used and splash
Penetrate platform, can flexible choice according to the actual situation, and it is without being limited thereto.
In conclusion the production method of chip provided in an embodiment of the present invention enormously simplify production side-wall metallic figure and
Process and operation difficulty when front metal pattern, and side-wall metallic figure and front metal figure can be avoided to occur as far as possible
Dislocation, optimizes the turn-on effect between side-wall metallic figure and front metal figure, improves chip quality and reliability.
The foregoing is only a preferred embodiment of the present invention, is not intended to restrict the invention, for the skill of this field
For art personnel, the invention may be variously modified and varied.All within the spirits and principles of the present invention, made any to repair
Change, equivalent replacement, improvement etc., should all be included in the protection scope of the present invention.
Claims (10)
1. a kind of production method of chip characterized by comprising
Recessed portion is opened up in substrate surface；
Seed layer is covered to the substrate, make graphics chip in graphics chip area and makes side in the side wall of the recessed portion
Figure；The graphics chip area is located at the surface of the substrate and is located at the edge of the oral area of the recessed portion, each described recessed
Concave portion is correspondingly arranged at least one described graphics chip area；
The extra seed layer is removed, cutting obtains the chip, so that the graphics chip area of each chip
It is corresponded with the side wall of the recessed portion.
2. manufacturing method according to claim 1, which is characterized in that covering the seed layer to the substrate includes: pair
The side wall of the surface of the substrate and the recessed portion covers the seed layer simultaneously.
3. production method according to claim 2, which is characterized in that the production method further includes to the graphics chip
The seed layer of the side wall of area and the recessed portion carries out thickening processing.
4. production method according to claim 2 or 3, which is characterized in that the thickness of the substrate is less than or equal to
0.6mm；The seed layer is layer gold.
5. manufacturing method according to claim 1, which is characterized in that the oral area of the recessed portion has changeover portion, described
The inner wall of changeover portion is connected between the surface of the substrate and the side wall of the recessed portion；It is directed toward by the oral area of the recessed portion
Its internal direction, the internal diameter of the changeover portion successively decrease.
6. production method according to claim 5, which is characterized in that the seed layer isMembrane system layer；Covering the seed layer to the substrate includes: to the substrate
Surface and the inner wall of the changeover portion cover the seed layer.
7. production method according to claim 6, which is characterized in that Yu Suoshu graphics chip area makes the graphics chip
Include: the production graphics chip and layer gold thickening processing carried out to the graphics chip area, then by the graphics chip area and
The seed layer in the region except described changeover portion the twoFilm layer removal.
8. production method according to claim 7, which is characterized in that the side wall of Yu Suoshu recessed portion makes the side view
Shape includes: that the substrate for making the graphics chip is cut the side wall exposure so that the recessed portion along the recessed portion
Out, covering the seed layer to the side wall of the recessed portion and make the side figure is hadThe graphic structure of membrane system, and layer gold thickening is carried out to the side wall of the recessed portion
Processing.
9. production method according to claim 8, which is characterized in that removing the extra seed layer includes: by institute
State the Ti floor removal in the region except the side wall three in graphics chip area, the changeover portion and the recessed portion.
10. production method described in any one according to claim 1~9, which is characterized in that each recessed portion is corresponding
Two graphics chip areas are set, and two graphics chip areas are located at the opposite sides edge of the recessed portion, described recessed
The side wall of the opposite sides of concave portion is corresponded with two graphics chip areas.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910672886.7A CN110349842A (en) | 2019-07-24 | 2019-07-24 | A kind of production method of chip |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910672886.7A CN110349842A (en) | 2019-07-24 | 2019-07-24 | A kind of production method of chip |
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| CN110349842A true CN110349842A (en) | 2019-10-18 |
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| CN201910672886.7A Pending CN110349842A (en) | 2019-07-24 | 2019-07-24 | A kind of production method of chip |
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| CN104934368A (en) * | 2011-11-04 | 2015-09-23 | 英特尔公司 | Methods and apparatuses to form self-aligned caps |
| CN106252241A (en) * | 2016-09-08 | 2016-12-21 | 华进半导体封装先导技术研发中心有限公司 | Chip package sidewall pad or the processing technology of salient point |
-
2019
- 2019-07-24 CN CN201910672886.7A patent/CN110349842A/en active Pending
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101904004A (en) * | 2008-01-31 | 2010-12-01 | 万国半导体有限公司 | Wafer level chip size packaging and manufacturing method |
| US20110045678A1 (en) * | 2009-08-21 | 2011-02-24 | Jen-Tsorng Chang | Micro electromechanical system connector and method for manufacturing same |
| CN103155136A (en) * | 2010-09-29 | 2013-06-12 | Nxp股份有限公司 | Singulation of ic packages |
| CN104934368A (en) * | 2011-11-04 | 2015-09-23 | 英特尔公司 | Methods and apparatuses to form self-aligned caps |
| CN104505365A (en) * | 2014-12-25 | 2015-04-08 | 中国电子科技集团公司第二十九研究所 | Method for manufacturing side graph-contained ceramic thin film circuit and high-precision holding device |
| CN106252241A (en) * | 2016-09-08 | 2016-12-21 | 华进半导体封装先导技术研发中心有限公司 | Chip package sidewall pad or the processing technology of salient point |
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Application publication date: 20191018 |