CN110246450B - Display device, display panel and display panel pixel driving method - Google Patents

Abstract

A display panel includes a pixel structure of a plurality of pixels arranged in an array and a receiving antenna structure. The receiving antenna structure includes a plurality of first receiving antennas having a larger size to provide a power supply voltage to the pixels, and a plurality of second receiving antennas having a larger resonant frequency to provide a data signal to the pixels. Each first receiving antenna and one or more second receiving antennas surrounded by it form a receiving antenna group. In the receiving antenna group, each second receiving antenna corresponds to a plurality of pixels. For each pixel, during a reset period, a pixel circuit controls a pixel capacitor to reset. During a data write period, a pixel circuit controls a corresponding second receiving antenna to charge a pixel capacitor. During a light emission period, a charged pixel capacitor controls a corresponding first receiving antenna to provide a power supply voltage.

Description

Display device, display panel and display panel pixel driving method

technical field

The present invention relates to display technology, and more particularly, to a wireless display panel with an antenna design for data and power transmission and a display device using the wireless display panel.

Background technique

The background description provided herein is for the purpose of generalizing the disclosure. The work of the present inventors, the scope described in this Background section, and the descriptions that may not qualify as prior art in any respect at the time of filing the application, are not to be considered, either expressly or by implication, to be considered relative to this Published prior art.

In general, a display panel may include a peripheral non-display area that is reserved for a plurality of integrated circuits (ICs) as data drivers that provide data signals to the pixels of the display panel. In order to reduce or eliminate the surrounding non-display area, wireless transmission technology can be used to transmit data signals, so as to achieve high-speed data transmission. For example, a wireless display device may include a transmit antenna structure and a correspondingly provided receive antenna structure, such as a transmit antenna structure with one or more transmit antennas Tx and a receive antenna structure with one or more receive antennas Rx, thereby forming a or multiple wireless data transmission pairs Tx-Rx. However, the wireless data transmission pair Tx-Rx is generally used to transmit one type of signal, such as a data signal.

Accordingly, there is a need in the art to address the above-mentioned deficiencies and deficiencies that have not yet been addressed.

SUMMARY OF THE INVENTION

Some embodiments of the content of the present invention relate to a wireless display panel with an antenna design, including: a pixel structure corresponding to a display area, including a plurality of pixels arranged in an array with M rows and N columns, wherein M and N are Positive integer; the receiving antenna structure is arranged on the pixel structure, the receiving antenna structure includes a plurality of first receiving antennas, the plurality of first receiving antennas are used to provide a plurality of power supply voltages to a plurality of pixels and a plurality of second receiving antennas, and the second receiving antennas The antenna is used for providing a plurality of data signals to a plurality of pixels, wherein each first receiving antenna of the plurality of first receiving antennas has a first resonance frequency, and each second receiving antenna of the plurality of second receiving antennas has a frequency greater than the first resonance frequency the second resonant frequency of the frequency, the first size of each of the plurality of first receiving antennas is larger than the second size of each of the plurality of second receiving antennas; wherein the plurality of first receiving antennas and a plurality of second antennas to form a plurality of receiving antenna groups, each receiving antenna group of the plurality of receiving antenna groups includes a first receiving antenna of the plurality of first receiving antennas and a second receiving antenna of the plurality of second receiving antennas It surrounds at least one second receiving antenna, and each second receiving antenna in the plurality of second receiving antennas corresponds to at least one row of M rows and at least one column of N columns of the plurality of pixels.

In some embodiments, the first resonant frequency is in the range of 100 kHz to 1 MHz, and the second resonant frequency is 10 MHz.

In some embodiments, the first size of each of the plurality of first receiving antennas is 4 cm by 4 cm, and the second size of each of the plurality of second receiving antennas is 8 mm by 10mm.

In some embodiments, the active display panel further includes: a printed circuit board; and the transmitting antenna structure is disposed on the printed circuit board, and the transmitting antenna structure is spatially separated from the receiving antenna structure for transmitting a plurality of wireless signals to the receiving antenna. The antenna structure enables the receiving antenna structure to generate a plurality of data signals and a plurality of power supply voltages, wherein the transmitting antenna structure includes a plurality of first transmitting antennas and a plurality of second transmitting antennas, and each first transmitting antenna in the plurality of first transmitting antennas is One-to-one corresponding to a first receive antenna among the plurality of first receive antennas, and each first transmit antenna among the plurality of first transmit antennas has a corresponding one of the plurality of first receive antennas. The first resonant frequency is the same resonant frequency, each of the plurality of second transmitting antennas corresponds to a second receiving antenna of the plurality of second receiving antennas on a one-to-one basis, and the plurality of second transmitting antennas Each of the second transmit antennas has the same resonance frequency as the second resonance of a corresponding one of the plurality of second receive antennas.

In some embodiments, each first receive antenna of the plurality of first receive antennas and each second receive antenna of the plurality of second receive antennas have an inner feed point and an outer feed point; the plurality of first receive antennas One of the inner feeding point and the outer feeding point of each first receiving antenna in the receiving antenna is used as a power feeding point, and the inner feeding point of each first receiving antenna in the plurality of first receiving antennas is used as a power feeding point. The other one of the feeding point and the outer feeding point is used as a power supply reference point for providing a power supply reference voltage; and one of the inner feeding point and the outer feeding point of each second receiving antenna of the plurality of second receiving antennas A feeding point is used as a data feeding point, and another feeding point among the inner feeding point and the outer feeding point of each of the plurality of second receiving antennas is used as a data reference point for providing a data reference voltage .

In some embodiments, each pixel of the plurality of pixels includes: a pixel circuit electrically connected to a corresponding first receiving antenna of the plurality of first receiving antennas and a corresponding second receiving antenna of the plurality of second receiving antennas, wherein The pixel circuit has a pixel capacitor; and the light emitting diode is electrically connected to the corresponding first receiving antenna and the pixel circuit, wherein: during the reset period, the pixel circuit is used to control the pixel capacitor to reset; during the data writing immediately after the reset period During the write-in period, the pixel circuit is used to control the corresponding second receiving antenna to provide the corresponding data signal to the pixel capacitor to charge the pixel capacitor to the pixel voltage potential; and in the light-emitting period immediately following the data write-in period, the charged pixel The pixel capacitor of the circuit is used to control the corresponding first receiving antenna to provide a corresponding power supply voltage to the light-emitting diode to drive the light-emitting diode to emit light according to the pixel voltage potential.

In some embodiments, the light emitting diode has a cathode terminal and an anode terminal, the cathode terminal of the light emitting diode is connected to one of the inner feeding point and the outer feeding point of the corresponding first receiving antenna, and the pixel circuit includes: a pixel The capacitor has a first electrode and a second electrode, the first electrode is connected to the anode terminal of the light-emitting diode; the light-emitting switch and the control switch are electrically connected in series with the light-emitting diode and the corresponding first receiving antenna, wherein the control terminal of the control switch is electrically connected to the second electrode of the pixel capacitor; the diode is electrically connected to the second electrode of the pixel capacitor; the plurality of scan switches are electrically connected in series with the corresponding second receiving antenna and the diode; and the reset switch is electrically connected to the second electrode of the pixel capacitor , wherein: during the reset period, the reset switch is turned on, and at least one switch in the light-emitting switch and the plurality of scanning switches is turned off, so that the pixel capacitance is reset by the reset switch; during the data writing period, a plurality of scanning switches are turned off. The switch is turned on, the reset switch and the light-emitting switch are turned off, so that the corresponding second receiving antenna, the plurality of scan switches and the diodes form a first closed loop to provide the corresponding data signal to the pixel capacitor to charge the pixel capacitor to the pixel voltage potential; and during the light-emitting period, the light-emitting switch is turned on, at least one of the reset switch and the plurality of scan switches is turned off, and the pixel capacitor of the charged pixel circuit is turned on to control the switch according to the pixel voltage potential, so that the corresponding The first receiving antenna, the light-emitting switch, the control switch and the light-emitting diode form a second closed loop to provide a corresponding power supply voltage to the light-emitting diode to drive the light-emitting diode to emit light.

In some embodiments, each of the plurality of receive antenna groups includes a plurality of second receive antennas arranged in a matrix with I columns and J rows, where I and J are positive integers; For each receive antenna group in the antenna group, each second receive antenna in the plurality of I by J second receive antennas corresponds to m rows and n columns in the plurality of pixels, where m and n are greater than 1 A positive integer of , m<M, n<N; and every two adjacent columns in the n columns of the plurality of pixels corresponds to each second receiving antenna of the plurality of I by J second receiving antennas, in the adjacent The cathode terminal of the light emitting diode of each pixel of the plurality of pixels in one of the two columns is connected to the outer feeding point of the corresponding first receiving antenna, and each pixel of the plurality of pixels in the other of the adjacent two columns The cathode terminals of the light-emitting diodes are connected to the corresponding inner feeding points of the first receiving antennas.

In some embodiments, each of the plurality of first receiving antennas has an inner bridge structure and an outer bridge structure, the inner bridge structure is electrically connected to its inner feeding point, and the outer bridge structure Electrically connected to its outer feed point, the inner bridge structure and the outer bridge structure are electrically independent from each other; the inner bridge structure has a plurality of inner branch lines along the column direction, and the outer bridge structure has a plurality of inner branch lines along the column direction. external branch lines; and a plurality of internal branch lines and a plurality of external branch lines are alternately arranged between n columns of a plurality of pixels corresponding to each of the second receiving antennas in the plurality of I by J second receiving antennas, so that two adjacent columns are The cathode terminal of the light emitting diode of each pixel of the plurality of pixels in a column is connected to the external feed of the corresponding first receiving antenna through one of the plurality of external branch lines of the external bridge structure of the corresponding first receiving antenna In point, the cathode terminal of the light emitting diode of each pixel of the plurality of pixels in the other of the two adjacent columns is connected to the corresponding first receiving antenna through one of the plurality of inner branches of the inner bridge structure of the corresponding first receiving antenna. The inner feeding point of the first receiving antenna.

In some embodiments, the plurality of scan switches include a first scan switch and a second scan switch, the first scan switch electrically connects the diode to one of the outer feeding point and the inner feeding point of the corresponding second receiving antenna a feeding point, the second scanning switch is electrically connected to the outer feeding point and the inner feeding point of the corresponding plurality of second receiving antennas; and two adjacent rows in the m rows of the plurality of pixels Corresponding to each second receive antenna of the plurality of I by J second receive antennas, the first scan switch of each pixel of the plurality of pixels in one of the adjacent two rows is connected to the corresponding second receive antenna The outer feeding point of each pixel of the plurality of pixels in one of the adjacent two rows is connected to the inner feeding point of the corresponding second receiving antenna, in the other of the adjacent two rows The first scan switch of each pixel of the plurality of pixels is connected to the inner feed point of the corresponding second receiving antenna, and the second scan switch of each pixel of the plurality of pixels in the other of the two adjacent rows Connect to the outer feed point of the corresponding second receive antenna.

In some embodiments, each of the plurality of second receiving antennas has an inner bridge structure and an outer bridge structure, the inner bridge structure is electrically connected to its inner feeding point, and the outer bridge structure is electrically The inner bridge structure and the outer bridge structure are electrically independent of each other; the inner bridge structure has a plurality of inner branches along the row direction, and the outer bridge structure has a plurality of inner branch lines along the row direction. an outer branch line; and a plurality of inner branch lines and a plurality of outer branch lines are interleaved between m rows of a plurality of pixels corresponding to each second receiving antenna of the plurality of I by J second receiving antennas, so that two adjacent rows are The first scan switch of each pixel of the plurality of pixels in a row is connected to the outer feeding point of the corresponding second receiving antenna through an outer branch line of the outer branch line of the outer bridge structure of the corresponding plurality of second receiving antennas , the second scan switch of each pixel of the plurality of pixels in one of the adjacent two rows is connected to the inner branch of the corresponding second receiving antenna through an inner branch of the inner branch of the inner bridge structure of the corresponding second receiving antenna Feeding point, the first scan switch of each pixel of the plurality of pixels in the other row of the two adjacent rows is connected to the corresponding plurality of second receiving antennas through an inner branch line of the inner branch lines of the inner bridge structure of the corresponding plurality of second receiving antennas At the inner feeding point of the second receiving antenna, the second scanning switch of each pixel of the plurality of pixels in the other row of the two adjacent rows passes through an outer branch line of the outer branch line of the corresponding outer bridge structure of the second receiving antenna Connect to the outer feed point of the corresponding second receive antenna.

In some embodiments, the corresponding power supply voltage provided by the corresponding first receiving antenna is a voltage difference between the inner feeding point and the outer feeding point of the corresponding first receiving antenna, and the voltage difference is a sine wave , the sum of the reset period and the data write period is greater than or equal to half the period of the sine wave.

Other embodiments of the present disclosure relate to a tiled display device including a plurality of light emitting diode display panels arranged in a tiled type. Each of the light-emitting diode display panels includes: a pixel structure corresponding to a display area, including a plurality of pixels arranged in an array with M rows and N columns, wherein M and N are positive integers; and a receiving antenna structure is disposed on the pixels Structurally, the receiving antenna structure includes a plurality of first receiving antennas, the plurality of first receiving antennas are used to provide a plurality of power supply voltages to a plurality of pixels and a plurality of second receiving antennas, and the plurality of second receiving antennas are used to provide a plurality of data a signal to a plurality of pixels, wherein each first receive antenna of the plurality of first receive antennas has a first resonant frequency, and each second receive antenna of the plurality of second receive antennas has a second resonance greater than the first resonant frequency frequency, the first size of each of the plurality of first receive antennas is greater than the second size of each of the plurality of second receive antennas; wherein the plurality of first receive antennas and the plurality of The second antenna forms a plurality of receiving antenna groups, and each receiving antenna group of the plurality of receiving antenna groups includes a first receiving antenna of the plurality of first receiving antennas and a plurality of second receiving antennas surrounded by it At least one second receiving antenna, each of the plurality of second receiving antennas corresponds to at least one of the M rows and at least one of the N columns of the plurality of pixels.

Still other partial embodiments of the present disclosure relate to a method for driving a pixel of a display panel. In some embodiments, a display panel pixel driving method includes: providing an active display panel, including: a pixel structure corresponding to a display area, including a plurality of pixels arranged in an array with M rows and N columns, wherein M and N are a positive integer; and a receiving antenna structure disposed on the pixel structure, the receiving antenna structure includes a plurality of first receiving antennas, the plurality of first receiving antennas are used to provide a plurality of power supply voltages to a plurality of pixels and a plurality of second receiving antennas, and A plurality of second receiving antennas are used to provide a plurality of data signals to a plurality of pixels, wherein each of the plurality of first receiving antennas has a first resonant frequency, and each of the plurality of second receiving antennas has a second resonant frequency The receiving antenna has a second resonant frequency greater than the first resonant frequency, and an inner diameter of each first receiving antenna of the plurality of first receiving antennas is greater than an outer diameter of each second receiving antenna of the plurality of second receiving antennas ; wherein a plurality of first receiving antennas and a plurality of second receiving antennas form a plurality of receiving antenna groups, and each receiving antenna group in the plurality of receiving antenna groups comprises a first receiving antenna among the plurality of first receiving antennas the antenna and at least one second receiving antenna of the plurality of second receiving antennas surrounded by one of the plurality of first receiving antennas, each second receiving antenna of the plurality of second receiving antennas corresponding to M rows of the plurality of pixels At least one row and at least one column of N columns; wherein each first receiving antenna of the plurality of first receiving antennas and each second receiving antenna of the plurality of second receiving antennas include an inner feeding point and an outer feeding point ; wherein each pixel in the plurality of pixels includes a pixel circuit electrically connected to a corresponding first receiving antenna in a plurality of first receiving antennas and a corresponding second receiving antenna in a plurality of second receiving antennas, wherein the pixel circuit has a pixel capacitor; and a light emitting diode electrically connected to the corresponding first receiving antenna and the pixel circuit; during a reset period of each pixel in the plurality of pixels, the pixel circuit controls the pixel capacitance to reset; each pixel in the plurality of pixels is reset; In a data writing period immediately after the reset period of a pixel, the pixel circuit controls the corresponding second receiving antenna to provide a corresponding data signal to the pixel capacitor to charge the pixel capacitor to a pixel voltage potential; and a plurality of pixels In each of them, in a light-emitting period immediately following the data writing period, the pixel capacitor charged in the pixel circuit controls the corresponding first receiving antenna to provide a corresponding power supply voltage to the light-emitting diode to drive the light-emitting diode according to the pixel voltage potential to glow.

The present invention is described in detail below with reference to the accompanying drawings and specific embodiments, but is not intended to limit the present invention.

Description of drawings

FIG. 1A is an exploded view of a display panel according to some embodiments of the present disclosure.

FIG. 1B is a portion of a thin film transistor array according to some embodiments of the present disclosure.

FIG. 2A illustrates the connection of a matrix of receive antenna groups and corresponding scan lines in a receive antenna structure according to some embodiments of the present disclosure.

FIG. 2B illustrates connections between a receive antenna, a pixel circuit of a pixel, and a plurality of scan transistor switches corresponding to the pixel, according to some embodiments of the present disclosure.

FIG. 2C is an example of scan signals provided by scan lines X1 , X2 , X3 , Y1 , Y2 and Y3 as shown in FIG. 2A , according to some embodiments of the present disclosure.

FIG. 3 is an antenna according to some embodiments of the present invention.

4A shows a receiving antenna structure and a transmitting antenna structure of an active display panel according to some embodiments of the present disclosure.

4B illustrates a receive antenna group having a first receive antenna and a plurality of second receive antennas according to some embodiments of the present disclosure.

4C illustrates a transmit antenna group having a first transmit antenna and a plurality of second transmit antennas according to some embodiments of the present disclosure.

FIG. 4D illustrates a receive antenna group in a receive antenna structure as shown in FIG. 4B according to some embodiments of the present disclosure.

5A is a pixel circuit connected to a pixel of a corresponding first receive antenna and a corresponding second receive antenna according to some embodiments of the present disclosure.

5B is an example of the signals provided by lines Xm, Yn-1, Yn and EMn as shown in FIG. 5A, according to some embodiments of the present disclosure.

FIG. 5C is a reset period shown in FIG. 5B according to some embodiments of the present disclosure.

FIG. 5D illustrates the data writing period of FIG. 5B according to some embodiments of the present disclosure.

FIG. 5E is a light-emitting period in FIG. 5B according to some embodiments of the present disclosure.

6A is a pixel circuit connected to a pixel of a corresponding first receive antenna and a corresponding second receive antenna according to some embodiments of the present disclosure.

6B is a pixel circuit connected to a pixel of a corresponding first receive antenna and a corresponding second receive antenna according to some embodiments of the present disclosure.

6C is an example of the signals provided by the signals Xm, Yn-1, Yn, EMn and EMn-1 as shown in FIG. 6B in accordance with some embodiments of the present disclosure.

7A is a pixel circuit connected to a pixel of a corresponding first receive antenna and a corresponding second receive antenna according to some embodiments of the present disclosure.

7B is a pixel circuit connected to a pixel of a corresponding first receive antenna and a corresponding second receive antenna according to some embodiments of the present disclosure.

FIG. 8 is a pixel circuit of a pixel according to some embodiments of the present disclosure.

9A shows a bridge structure electrically connected to the inner feed point and the outer feed point of the first receiving antenna according to some embodiments of the present invention.

9B illustrates pixels electrically connected to branches of the bridge structure shown in FIG. 9A in two adjacent columns according to some embodiments of the present disclosure.

9C is a bridge structure electrically connected to the inner feeding point and the outer feeding point of the second receiving antenna according to some embodiments of the present disclosure.

9D illustrates pixels electrically connected to branches of the bridge structure shown in FIGS. 9A and 9C in a 2*2 matrix according to some embodiments of the present disclosure.

FIG. 10 shows the difference between the signals provided by the lines Xm, Yn-1, Yn and Emn and the voltage difference provided by the first receiving antenna and the second receiving antenna according to some embodiments of the present disclosure.

FIG. 11 is a mosaic-type micro-LED display device according to some embodiments of the present disclosure.

Among them, reference numerals:

100: Display panel

110: Display unit

112: Micro-LED wafer layer

114: Glass substrate

120: Thin Film Transistor Array

122: Gate Driver

124: Data Drive

130: Transmitting Antenna Structure

132: Printed circuit boards

134: transmit antenna layer

150: Receive Antenna Structure

Rx, 240: receive antenna

Tx: transmit antenna

D1, D2, D3: data lines

G1, G2, G3: gate lines

200: Pixel structure

210: Receive Antenna Group

220. X-GOA: Gate Drive Array

222: X-scan transistor

230, Y-GOA: gate drive array

232: Y scan transistor

252, 254: circuit modules

X1, X2, X3...Xm: scan lines

Y1, Y2, Y3...Yn-1, Yn: scan line

280, 290: period

300: Antenna

302: Outer feed point

304: Infeed point

310: Vertical Segmentation

320: Horizontal Segmentation

400: Active Display Panel

410: Receive Antenna Structure

430: Receive Antenna Group

432: first receiving antenna

434: Second receiving antenna

450: Transmitting Antenna Structure

470: Transmit Antenna Group

472: First transmit antenna

474: Second transmit antenna

500, 600, 600', 700, 700', 800: Pixel circuit

510, 610, 710: the first receiving antenna

520, 620, 720: the second receiving antenna

530, 630, 730, 830: LEDs

532, 632, 732: pixel capacitance

534, 634, 734: light-emitting control transistors

536, 636, 736: drive transistors

538, 638, 738: Diodes

540, 640, 640', 740, 740': reset transistors

550, 650, 750: the first scan transistor

552, 652, 752: the second scan transistor

554, 654, 754: the third scan transistor

A: External feed-in point

B: Inner feed point

Cij: Inner feed point

Dij: Outer feed-in point

EMn-1, EMn: luminescence control signal

581: Reset Period

583: During data writing

585: Luminous Period

810: Circuit Module

900: Receive Antenna Group

910, 950: External main line

912, 952: External branch line

920, 960: Internal main line

922, 962: Internal branch lines

930: First receiving antenna

940: Second receiving antenna

970, 972, 980, 982: pixels

971, 973: LEDs

976, 986: Second scan transistor

974, 984: first scan transistor

C: Inner feed point

D: External feed-in point

1000: pixel submatrix

T1: half the period of the sine wave

T2: light-emitting pulse width

1100: Splicing Micro LED Display Device

1120: Micro LED Display Panel

Detailed ways

Below in conjunction with accompanying drawing, structure principle and working principle of the present invention are described in detail:

DETAILED DESCRIPTION The present disclosure will now be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown. The present invention, however, may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of this disclosure to those skilled in the art. The same reference numbers refer to the same elements.

Terms used in this specification have their ordinary meanings in the art in the context of this summary and in the specific context in which each term is used. Certain terms used to describe the present disclosure are discussed below or elsewhere in the specification to provide additional guidance regarding the description of the present disclosure. It should be understood that the same thing can be stated in more than one way. Accordingly, alternative languages and synonyms may be used for any one or more of the terms discussed herein, nor do they have any special meaning as to whether a term is elaborated or discussed herein. Synonyms for certain terms are provided. The recitation of one or more synonyms does not preclude the use of other synonyms. The use of examples anywhere in this specification, including examples of any of the terms discussed herein, is illustrative only, and is not intended to limit the scope and meaning of the invention or any exemplified terms. Likewise, the present disclosure is not limited to the various embodiments presented in this specification.

It will be understood that when an element is referred to as being "on" another element, it can be directly on the other element or intervening elements may be present therebetween. When an element is said to be "directly on" another element, there are no intervening elements. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

It will be understood that although the terms first, second, third etc. are used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these Terminology restrictions. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of this summary.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the present case. As used herein, the forms "a," "an," and "the" will include multiple forms as well, unless the context clearly dictates otherwise. It will be further understood that when used in this specification, the terms "comprising", "comprising", "including" and/or "having" designate the presence of said features, express features, regions, integers, steps, operations, elements and The presence of/or components does not preclude the addition of one or more other characteristic regions, integers, steps, operations, elements and/or components.

Furthermore, relative terms such as "bottom" or "bottom", "top" or "top", and "left" and "right" may be used herein to describe one element's relationship to another element shown in the figures. It should be understood that relative terms also include different orientations of the device in addition to the orientation shown in the figures. For example, if the device in one of the figures is turned over, elements described as being on the "lower" side of the other elements would then be oriented on the "upper" side of the other elements. Thus, the exemplary term "lower" may include an orientation of "lower" and "upper", depending on the particular orientation of the figure. Similarly, if the device in one of the figures is turned over, elements described as "below" the other elements would then be oriented "above" the other elements. Thus, the exemplary terms "under" or "under" can encompass both an orientation of above and below.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this case belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be construed as having meanings consistent with their meanings in the relevant art and the context of the present case, and should not be construed as idealized, or overly formal, unless in This is clearly defined.

As used herein, "about" or "approximately" generally means 20%, preferably 10%, and more preferably 5% of a given value or range. Numerical values given herein are approximate, meaning that the meaning of the term "about" or "approximately" can be inferred if not explicitly stated.

Embodiments of the present invention will be described with reference to the accompanying drawings. In accordance with the objectives of this disclosure, as embodied and broadly described herein, in certain aspects this disclosure relates to a wireless display panel with multi-channel data transmission and a display device using the same.

A display panel according to the present disclosure uses light-emitting diodes (LEDs) as active matrixes. For example, FIG. 1A is an exploded view of a display panel according to some embodiments of the present disclosure. As shown in FIG. 1A , the display panel 100 is a color micro light emitting diode (μLED) display panel, which includes a display unit 110 , a transmitting antenna structure 130 and a receiving antenna structure 150 . The display unit 110 includes, in order from the image display side (upper side in FIG. 1A ) to the back side (lower side in FIG. 1A ), a micro-LED wafer layer 112 , a thin film transistor array (TFT array) 120 and a glass substrate 114 . The micro-LED chip layer 112 includes a plurality of micro-LED chips arranged in an array, wherein each micro-LED chip can emit light corresponding to red, green, and blue. Therefore, the display unit 110 does not need a color filter layer, and the display panel 100 does not include a backlight module. The receiving antenna structure 150 is composed of a plurality of receiving antennas Rx, the receiving antenna structure 150 is disposed on the thin film transistor array 120 , and the receiving antenna structure 150 and the thin film transistor array 120 are disposed on the glass substrate 114 .

The transmitting antenna structure 130 is composed of a transmitting antenna layer 134 disposed on a printed circuit board (PCB) 132, wherein the transmitting antenna layer 134 includes a plurality of transmitting antennas Tx, and the printed circuit board 132 is spatially separated from the glass substrate 114, so that the transmitting antennas Structure 130 is spatially separated from receive antenna structure 150 as a whole. In other words, a distance exists between the transmit antenna structure 130 and the receive antenna structure 150 to facilitate high-speed wireless data transmission between the transmit antenna structure 130 and the receive antenna structure 150 . Each transmitting antenna Tx corresponds to one of the receiving antennas Rx in a one-to-one manner, and each transmitting antenna Tx has the same resonance frequency as that of the corresponding receiving antenna Rx.

In the display unit 110 , the thin film transistor array 120 and the micro-LED wafer layer 112 correspondingly define a pixel structure, which corresponds to one display area of the display panel 100 . Specifically, the pixel structure includes a plurality of pixels arranged in an array with M rows and N columns, where M and N are positive integers. For each pixel of the pixel structure, a corresponding one thin film transistor in thin film transistor array 120 and a corresponding set of microLED wafers in microLED wafer layer 112 are provided, wherein one thin film transistor and a set of microLED wafers Corresponds to a red, green, or blue subpixel in a pixel.

In some embodiments, the display panel 100 may include other layers or structures not shown in FIG. 1A . For example, the thin film transistor array 120 may include a plurality of signal lines, such as data lines and gate lines. Further, multiple insulating films or layers may be provided in the pixel structure (ie, the thin film transistor array 120 and the micro-LED wafer layer 112). In addition, because there is no backlight module between the thin film transistor array 120 and the transmit antenna structure 130, other layers or structures may exist between the thin film transistor array 120 and the transmit antenna structure 130 to avoid direct connection between the thin film transistor array 120 and the transmit antenna structure 130 touch each other.

FIG. 1B is a portion of a thin film transistor array according to some embodiments of the present disclosure. As shown in FIG. 1B , the thin film transistor array 120 includes a plurality of thin film transistors arranged in an array, wherein each thin film transistor corresponds to one pixel of the pixel structure. In other words, for a plurality of pixels arranged in an array with M rows and N columns, the thin film transistor array 120 also includes a plurality of thin film transistors arranged in an array with M rows and N columns. Further, a plurality of data lines D1 , D2 , D3 . . . and a plurality of gate lines G1 , G2 , G3 . . . are provided in the pixel structure. The data lines D1, D2, D3 are respectively electrically connected to the source terminals of the thin film transistors in the corresponding rows, and the gate lines G1, G2, G3 are respectively electrically connected to the gate terminals of the thin film transistors in the corresponding columns. The gate driver 122 is connected to the gate lines G1, G2, G3 to provide gate signals to the gate lines, and the data driver 124 is connected to the data lines D1, D2, D3 to provide data signals to the data lines. In some embodiments, the gate driver 122 and the data driver 124 are respectively disposed in the peripheral area of the display panel. In some embodiments, multiple gate drivers 122 may be provided. In some embodiments, multiple data drivers 124 may be provided.

FIG. 2A illustrates the connection of a matrix of receive antenna groups and corresponding scan lines in a receive antenna structure according to some embodiments of the present disclosure. As shown in FIG. 2A, the pixel structure 200 is divided into a plurality of receive antenna groups 210, wherein each receive antenna group 210 includes m*n pixels corresponding to the same receive antenna (not shown in Figure 2A) to transmit data signals to m*n pixels, where m and n are positive integers. Further, in a peripheral area of the pixel structure 200, as shown in FIG. 2A, a plurality of gate drivers on the gate driving arrays (GOAs) 220 and 230 are respectively disposed along the column direction and the row direction. Specifically, each X gate driving array 220 represents the gate driving array located on the upper side in FIG. 2A , and each X gate driving array 220 is electrically connected to m extending in the row direction (ie, the X direction). Xm; and each Y gate driving array 230 represents the gate driving array on the left side in FIG. 2A, and each Y gate driving array 230 is electrically connected to the column direction ( That is, n scanning lines Y1 , Y2 , Y3 . . . Yn extending in the Y direction). In this example, each of the pixels corresponds to a receive antenna group in the receive antenna group 210, and the pixel circuit of the pixel may include a plurality of scan transistors or switches, wherein at least one scan transistor is arranged in the X direction by The light-emitting diodes are controlled by a scan signal transmitted by a corresponding one of the m scan lines X1, X2, X3...Xm, and at least one scan transistor is controlled by passing through the n scan lines Y1, Y2, Y3...Yn in the Y direction The light-emitting diode is controlled by a scan signal transmitted by a corresponding scan line in the pixel, so that the pixel can control the light-emitting diode by the scan signal to receive the data signal transmitted by the corresponding receiving antenna.

FIG. 2B illustrates connections between a receive antenna, a pixel circuit of a pixel, and a plurality of scan transistor switches corresponding to the pixel, according to some embodiments of the present disclosure. As shown in FIG. 2B , the receiving antenna 240 is electrically connected to the pixel circuit of the pixel, which includes an X scan transistor 222 , a Y scan transistor 232 and two circuit modules 252 and 254 connected in series. In general, a pixel circuit may include circuit elements such as transistors, capacitors, diodes, or other circuits, and the connection relationship between these circuit elements may vary. Accordingly, the two circuit blocks 252 and 254 are only represented in blocks without showing the detailed circuit elements of each of the circuit blocks. Specifically, FIG. 2B shows that the X scan transistor 222 is connected to the scan line Xm, and the Y scan transistor 232 is electrically connected to the scan line Yn. In other words, the pixels shown in FIG. 2B are pixels corresponding to the scan lines Xm and Yn shown in FIG. 2A .

It is worth noting that although FIG. 2B shows the X-scan transistor 222, the Y-scan transistor 232 and the two circuit blocks 252 and 254 connected in series, the X-scan transistor 222, the Y-scan transistor 232 and the two circuit blocks 252 and 254 are connected in series. The connection relationship between them can also be changed, so it is not limited to this.

FIG. 2C is an example of scan signals provided by scan lines X1 , X2 , X3 , Y1 , Y2 and Y3 as shown in FIG. 2A , according to some embodiments of the present disclosure. As shown in FIG. 2C , each of the scan signals provided by the scan lines X1, X2, X3, Y1, Y2 and Y3 is represented by a pulse wave signal having a corresponding fixed period and a fixed pulse width, and the pulse wave signal has turn-on and turn-off cycles. Specifically, the on period of each scan signal is represented by a high potential, and the off period of each scan signal is represented by a low potential, but the present invention is not limited thereto. As shown in FIG. 2C , in the period 280 , the scan signals transmitted by the scan lines X1 and Y1 are all in the corresponding conduction period, so that the corresponding scan transistor is turned on, so that the corresponding receiving antenna 240 transmits the data signal to the corresponding scan line. Pixels of X1 and Y1. Similarly, in the period 290, the scan signals transmitted by the scan lines X2 and Y2 are in the corresponding turn-on periods, so that the corresponding scan transistors are turned on, so that the corresponding receiving antennas 240 transmit data signals to the corresponding scan lines X2 and Y2. of pixels.

FIG. 3 is an antenna according to some embodiments of the present invention. Specifically, the antenna 300 shown in FIG. 3 may be used to implement the receive antenna Rx in the receive antenna structure 150 as shown in FIG. 1A . As shown in FIG. 3 , the antenna 300 is wound inward from the outer feed point 302 to the inner feed point 304 in a counterclockwise direction. In some embodiments, the winding direction of the antenna 200 may be clockwise or counterclockwise. Further, the antenna 300 includes a plurality of vertical segments 310 and horizontal segments 320 that form a multi-turn coil. As shown in FIG. 3 , the number of windings of the antenna 300 has a winding value N=3, which means that the antenna 300 has three turns of coils. In some embodiments, the winding value N of the antenna 300 may be determined according to the required transmission characteristics of the antenna 300 .

In some embodiments, the transmission characteristics of an antenna may be described in terms of inductive decibels (dB), which reflect the transmission performance of the antenna. In the field of wireless transmission, the value of the inductive decibel of an antenna represents the ratio of Rx/Tx, which refers to the ratio of the receiving antenna Rx to the transmitting antenna Tx of the antenna. For example, if the power ratio of Rx/Tx is X, the amplitude ratio of Rx/Tx is (X)1/2, and the inductive decibel of the antenna is 10*log10X. In general, an antenna with an inductive decibel greater than -10dB represents acceptable performance for antenna wireless transmission, while an antenna with an inductive decibel close to 0dB represents excellent performance for antenna wireless transmission (ie, minimum transmission loss).

Referring back to FIG. 2B , the receiving antenna 240 is electrically connected to the pixel circuit of the pixel at the outer feeding point of the receiving antenna 240 . In some embodiments, the receiving antenna may be electrically connected to the corresponding data line at one of the outer feeding point and the inner feeding point. In this example, the other data line that is not electrically connected to the corresponding data line among the outer feeding point and the inner feeding point of the receiving antenna may be grounded, or may be electrically connected to a reference voltage potential (such as provided by a common electrode) common voltage VCOM, or signal VSS or VDD).

As mentioned above, in the wireless display panel, the wireless data transmission pair Tx-Rx is generally used to transmit a signal type, such as a data signal. However, when various types of signals need to be wirelessly transmitted, a newly designed transmit and receive antenna structure must be proposed to provide multiple wireless data transmission pairs Tx-Rx with different resonant frequencies, such as in different wireless data transmission Wireless data transmission in Tx-Rx will not affect each other. Further, in a display panel using light-emitting diodes as an active matrix, such as a micro-LED display panel, the power supply voltage transmitted generally requires a correspondingly high current, which may increase the power supply line for transmitting the power supply voltage due to high Risk of burnout due to current. Based on the above requirements, some aspects of the content of the present invention propose a feature of changing the structural arrangement of the receiving antenna Rx and the corresponding transmitting antenna Tx to be able to transmit various signals, such as data signals and power supply voltages.

4A shows a receiving antenna structure and a transmitting antenna structure of an active display panel according to some embodiments of the present invention, and FIG. 4B shows a first receiving antenna and a plurality of antennas according to some embodiments of the present invention. A receive antenna group of the second receive antenna, and FIG. 4C shows a transmit antenna group having a first transmit antenna and a plurality of second transmit antennas according to some embodiments of the present disclosure. As shown in FIG. 4A , the receive antenna structure 410 includes a plurality of receive antenna groups 430 . Accordingly, the transmit antenna structure 450 includes a plurality of transmit antenna groups 470 . As shown in FIG. 4B , each receiving antenna group 430 is composed of a first receiving antenna 432 and a plurality of second receiving antennas 434 , wherein the second receiving antennas 434 are arranged in a matrix and surrounded by the first receiving antennas 432 . In some embodiments, the second receive antennas 434 in the receive antenna group 430 are arranged in a matrix having I columns and J rows. In this example, the first receiving antennas 432 are used to provide power supply voltages to the corresponding pixels, and the second receiving antennas 434 are used to provide data signals to the corresponding pixels. In other words, for the corresponding pixels, the second receive antennas 434 both function as the receive antennas 240 as shown in FIG. 2B . Since the second receiving antenna 434 is surrounded by the first receiving antenna 432 , the size of the first receiving antenna 432 is larger than that of the second receiving antenna 434 . In some embodiments, the size of the first receive antenna 432 may be 4 cm by 4 cm, while the size of each of the second receive antennas 434 may be 8 mm by 10 mm. However, the dimensions of the first receiving antenna 432 and the second receiving antenna 434 are not intended to limit the present case. Further, the first receive antenna 432 has a first resonant frequency F1 and each of the second receive antennas 434 has a second resonant frequency F2. Since the first receiving antenna 432 is used to provide the power supply voltage and the second receiving antenna 434 is used to provide the data signal, the second resonant frequency F2 is greater than the first resonant frequency F1. In some embodiments, the first resonant frequency may be in the range of 100 kHz to 1 MHz, and the second resonant frequency may be approximately 10 MHz.

As shown in FIG. 4C , the transmit antenna groups 470 each have a structure similar to that of the corresponding receive antenna groups 430 , for example, the transmit and receive antennas may form a wireless data transmission pair Tx-Rx correspondingly one-to-one. Specifically, each transmit antenna group 470 is composed of a first transmit antenna 472 and a plurality of second transmit antennas 474 , wherein the second transmit antennas 474 are arranged in a matrix and surrounded by the first transmit antennas 472 . The first transmitting antennas 472 correspond to the first receiving antennas 432 as shown in FIG. 4B in a one-to-one manner, and the first transmitting antennas 472 have the same first resonance frequency F1. Similarly, each of the second transmit antennas 474 corresponds to one of the second receive antennas 434 as shown in FIG. 4B on a one-to-one basis, and the second transmit antennas 474 all have the same second resonant frequency F2.

FIG. 4D illustrates a receive antenna group in the receive antenna structure shown in FIG. 4B according to some embodiments of the present disclosure. As described above, the second receive antennas 434 in the receive antenna group 430 all serve as the receive antennas 240 as shown in FIG. 2B . Therefore, the second receiving antennas 434 as shown in FIG. 4D each correspond to the group X of the scan lines X1 to Xm in the X direction and the group Y of the scan lines Y1 to Yn in the Y direction. Since the receive antenna group 430 includes I*J second receive antennas 434, and each second receive antenna 434 corresponds to m*n pixels, each receive antenna group 430 corresponds to (I*J)*( m*n) pixels. In other words, the first receiving antenna 432, such as the only first receiving antenna in the receiving antenna group 430, is used to provide power to the pixels of (I*J)*(m*n).

As described above, a pixel circuit may include circuit elements such as transistors (as switches), capacitors, diodes, or other circuits, and the connection relationship between these circuit elements may vary. For example, FIG. 5A shows a pixel circuit connected to a pixel of a corresponding first receive antenna and a corresponding second receive antenna according to some embodiments of this disclosure. As shown in FIG. 5A , the pixel circuit 500 is electrically connected to the corresponding first receiving antenna 510 and the corresponding second receiving antenna 520 , and the pixel circuit 500 includes a light-emitting diode 530 , a pixel capacitor 532 , a light-emitting control transistor 534 , and a driving transistor 536 , diode 538 , reset transistor 540 , and three scan transistors 550 , 552 and 554 . Specifically, the first receiving antenna 510 has an outer feeding point A and an inner feeding point B, wherein one of the outer feeding point A and the inner feeding point B is used as a power feeding point, and the outer feeding point is The other one of point A and inner feed point B serves as a power reference point for supplying a power reference voltage such as VCOM, VSS or VDD. Similarly, the second receiving antenna 520 has an inner feeding point Cij and an outer feeding point Dij, wherein one of the inner feeding point Cij and the outer feeding point Dij is used as a data feeding point, and the inner feeding point is The other one of Cij and the external feed point Dij serves as a data reference point for providing a data reference voltage such as VCOM, VSS or VDD. The LED 530 has a cathode terminal (the lower terminal thereof) and an anode terminal (the upper terminal thereof), wherein the cathode terminal of the LED 530 is electrically connected to the inner feeding point B of the first receiving antenna 510 . The pixel capacitor 532 has two electrodes, wherein the first electrode of the pixel capacitor 532 (the right terminal thereof) is electrically connected to the anode terminal of the light emitting diode 530, and the second electrode of the pixel capacitor 532 (the left terminal thereof) is electrically connected to the diode 538. The light-emitting control transistor 534 and the driving transistor 536 are arranged in series to electrically connect the external feeding point A of the first receiving antenna 510 to the anode terminal of the light-emitting diode 530, wherein the control terminal of the light-emitting control transistor 534 is electrically connected to the light-emitting control signal EMn, and the control terminal of the driving transistor 536 is electrically connected to the second electrode of the pixel capacitor 532 . The diode 538 is disposed between the scan transistor 552 and the second electrode of the pixel capacitor 532 . The reset transistor 540 is arranged to connect two ends of the diode 538, wherein the control terminal of the reset transistor 540 is electrically connected to the corresponding Y scan line Yn-1. The first scan transistor 550 and the second scan transistor 552 are arranged in series to electrically connect the external feeding point Dij of the second receiving antenna 520 to the diode 538 . The third scanning transistor 554 is disposed to electrically connect the inner feeding point Cij of the second receiving antenna 520 to the anode terminal of the light emitting diode 530 . The control terminal of the first scan transistor 550 is electrically connected to the corresponding X scan line Xm, and the control terminals of the second scan transistor 552 and the third scan transistor 554 are respectively electrically connected to the corresponding Y scan line Yn.

As shown in FIG. 5A, the signals used to drive the control terminals of the transistors (including the light emission control transistor 534, the reset transistor 540, and the first, second and third transistors 550, 552 and 554) include EMn, Xm, Yn-1 and Yn. 5B is an example of the signals provided by lines Xm, Yn-1, Yn and EMn as shown in FIG. 5A, and FIGS. 5C, 5D and 5E respectively show the repeated signals in FIG. 5B according to some embodiments of the present invention. Set-up period, data writing period and light-emitting period.

As shown in FIG. 5C , the ON period of the scan signal Yn- 1 corresponds to the reset period 581 . In this example, the scan signal Yn-1 is at a high level, while the scan signal Yn and the light emission control signal EMn are at a low level at this time. Therefore, the reset transistor 540 is turned on, at which time the second and third scan transistors 552 and 554 and the light emission control transistor 534 are turned off, so that the pixel voltage potential stored by the pixel capacitance 532 of the pixel of the previous frame is The reset switch 540 discharges, thereby resetting the pixel capacitor 532 .

As shown in FIG. 5D , the ON period of the scan signal Yn corresponds to the data writing period 583 , which is immediately after the reset period 581 . In this example, the scan signals Xm and Yn are at high potentials, while the scan signal Yn-1 and the light emission control signal EMn are at low potentials at this time. Therefore, the first, second and third transistors 550, 552 and 554 are turned on, while the reset transistor 540 and the light emission control transistor 534 are turned off at this time, so that the corresponding second receiving antenna 520, first scanning transistor 550 , the second scan transistor 552 , the diode 538 , the pixel capacitor 532 and the third scan transistor 554 form a first closed loop, enabling the second receiving antenna 520 to provide the corresponding data signal to the pixel capacitor 532 so that the pixels of the current frame will The pixel capacitor 532 is charged to the pixel voltage potential.

As shown in FIG. 5E , the ON period of the light emission control signal EMn corresponds to the light emission period 585 , which is immediately after the data writing period 583 . In this example, the light emission control signal EMn is at a high level, while the scan signals Yn and Yn-1 are at a low level at this time. Therefore, the light emission control transistor 534 is turned on, the reset transistor 540 and the second and third transistors 554 and 556 are turned off, and the pixel voltage potential stored in the pixel capacitor 532 is used to turn on the driving transistor 536 according to the pixel voltage potential . Therefore, the corresponding first receiving antenna 510 , the light-emitting control transistor 534 , the driving transistor 536 and the light-emitting diode 530 can form a second closed loop, enabling the first receiving antenna 510 to provide a corresponding power supply voltage to the light-emitting diode 530 to drive the light-emitting diode 530 to glow.

Other aspects of the present disclosure relate to a pixel driving method of a display panel. In some embodiments, the display panel pixel driving method may be applied to an active display panel having the above-described receiving antenna structure, and each pixel may be provided with a pixel circuit 500 as shown in FIG. 5A . In some embodiments, the display panel pixel driving method includes, for each pixel in the pixel: during the reset period shown in FIG. 5C, the pixel circuit 500 controls the pixel capacitor 532 to reset; as shown in FIG. 5D During the data writing period shown, the corresponding second receiving antenna 520 is controlled by the pixel circuit 500 to provide the corresponding data signal to the pixel capacitor 532 to charge the pixel capacitor 532 to the pixel voltage potential; and during the light-emitting period as shown in FIG. 5E , the corresponding first receiving antenna 510 is controlled by the pixel capacitor 532 of the pixel circuit 500 to provide the corresponding power supply voltage to the light emitting diode 530 to drive the light emitting diode 530 to emit light according to the pixel voltage potential.

In other embodiments, the pixel circuit can be implemented differently to achieve the same data signal and supply voltage transfer as described above. For example, Figures 6A, 6B, 7A and 7B illustrate a plurality of pixel circuits according to some embodiments of this disclosure.

As shown in FIG. 6A, the pixel circuit 600 is electrically connected to the corresponding first receiving antenna 610 and the corresponding second receiving antenna 620, and the pixel circuit 600 includes a light emitting diode 630, a pixel capacitor 632, a light emission control transistor 634, a driving transistor 636, Diode 638 , reset transistor 640 and three scan transistors 650 , 652 and 654 . The difference between the pixel circuit 600 and the pixel circuit 500 shown in FIG. 5A is that the reset transistor 640 shown in FIG. 6A is arranged to connect the second electrode of the pixel capacitor 632 to the emission control signal EMn. In this example, during the reset period, the light emission control signal EMn is at a low level, so that the pixel voltage level stored in the pixel capacitor 632 for providing the pixel of the previous frame can be discharged by the reset switch 640, thereby resetting the pixel Capacitor 632. All other circuit elements of the pixel circuit 600, including the light-emitting diode 630, the pixel capacitor 632, the light-emitting control transistor 634, the driving transistor 636, the diode 638, and the three scanning transistors 650, 652, and 654, are the same as the light-emitting diodes shown in FIG. 5A. The diode 530 , the pixel capacitor 532 , the light emission control transistor 534 , the driving transistor 536 , the diode 538 and the three scan transistors 550 , 552 and 554 will not be described in detail here.

As shown in FIG. 6B , the pixel circuit 600 ′ is electrically connected to the corresponding first receiving antenna 610 and the corresponding second receiving antenna 620 , and the pixel circuit 600 ′ includes a light-emitting diode 630 , a pixel capacitor 632 , a light-emitting control transistor 634 , and a driving transistor 636 , diode 638 , reset transistor 640 ′, and three scan transistors 650 , 652 and 654 . The difference between the pixel circuit 600 ′ and the pixel circuit 600 shown in FIG. 6A is that the reset transistor 640 ′ shown in FIG. 6B is arranged to connect the second electrode of the pixel capacitor 632 to the emission control signal EMn− 1. 6C is an example of the signals provided by the signals Xm, Yn-1, Yn, EMn and EMn-1 as shown in FIG. 6B, wherein the signals Xm, Yn-1, Yn and EMn-1 are shown in accordance with some embodiments of the present disclosure. Same as the corresponding signal in Figure 5B. As shown in FIG. 6C , during the reset period, the emission control signal EMn is at a low level, so that the pixel voltage level stored in the pixel capacitor 632 for providing the pixels of the previous frame can be discharged by the reset switch 640 ′, thereby resetting The pixel capacitor 632 is set. All other circuit elements of the pixel circuit 600, including the light-emitting diode 630, the pixel capacitor 632, the light-emitting control transistor 634, the driving transistor 636, the diode 638, and the three scan transistors 650, 652, and 654, are all the same as those shown in FIG. 6A with the same reference numerals The corresponding elements are not described in detail here.

As shown in FIG. 7A, the pixel circuit 700 is electrically connected to the corresponding first receiving antenna 710 and the corresponding second receiving antenna 720. The pixel circuit 700 includes a light emitting diode 730, a pixel capacitor 732, a light emission control transistor 734, a driving transistor 736, Diode 738, reset transistor 740, and three scan transistors 750, 752, and 754. The difference between the pixel circuit 700 and the pixel circuit 600 shown in FIG. 6A is that the third scan transistor 754 shown in FIG. 7A is arranged to electrically connect the inner feeding point Cij of the second receiving antenna 520 to The second electrode of the pixel capacitor 732 . In this example, during data writing, the corresponding second receive antenna 720, first scan transistor 750, second scan transistor 752, diode 738, pixel capacitor 732 and third scan transistor 754 form a first closed loop, resulting in The second receiving antenna 720 can provide the corresponding data signal to the pixel capacitor 732 to charge the pixel capacitor 732 to the pixel voltage level for the pixel of the current frame. All other circuit elements of pixel circuit 700, including light emitting diode 730, pixel capacitor 732, light emission control transistor 734, drive transistor 736, diode 738, reset transistor 740, and first and second scan transistors 750 and 752, are the same as The light emitting diode 630, the pixel capacitor 632, the light emitting control transistor 634, the driving transistor 636, the diode 638, the reset transistor 640, and the first and second scan transistors 650 and 652 as shown in FIG. 6A are not described in detail here. . In some embodiments, the reset transistor 740 shown in FIG. 7A can also be changed to connect the second electrode of the pixel capacitor 732 to the emission control signal EMn-1, which is similar to the reset transistor 640' shown in FIG. 6B .

As shown in FIG. 7B , the pixel circuit 700 ′ is electrically connected to the corresponding first receiving antenna 710 and the corresponding second receiving antenna 720 , and the pixel circuit 700 ′ includes a light-emitting diode 730 , a pixel capacitor 732 , a light-emitting control transistor 734 , and a driving transistor. 736 , diode 738 , reset transistor 740 ′, and three scan transistors 750 , 752 and 754 . The difference between the pixel circuit 700' and the pixel circuit 500 shown in Figure 5A is that the reset transistor 740' shown in Figure 7B is arranged to connect across the diode 738, which is similar to that shown in Figure 5A Reset transistor 540 is shown. All other circuit elements of the pixel circuit 700, including the light emitting diode 730, the pixel capacitor 732, the light emission control transistor 734, the driving transistor 736, the diode 738, and the three scan transistors 750, 752, and 754, are the same as those shown in FIG. 7A. The corresponding elements of the reference numerals are therefore not described in detail here.

FIG. 8 is a pixel circuit of a pixel according to some embodiments of the present disclosure. As shown in FIG. 8 , the pixel circuit 800 is composed of a circuit module 810 and a light-emitting diode 830 , wherein the circuit module 810 is connected to the external feeding point A of the first receiving antenna (not shown in FIG. 8 ) and the second receiving antenna, respectively. (not shown in FIG. 8 ) two feeding points Cij and Dij, while the light emitting diodes are connected to the inner feeding point B of the first receiving antenna (not shown in FIG. 8 ). Specifically, the detailed circuit of the circuit module 810 can be implemented by the circuit of any of the above-mentioned embodiments of FIGS. 5A , 6A, 6B, 7A and 7B, but is not intended to be limited thereto.

9A shows a bridge structure electrically connected to the inner feed point and the outer feed point of the first receiving antenna according to some embodiments of the present invention, and FIG. 9B shows some embodiments according to the present invention In two adjacent columns, the pixels are electrically connected to the branch lines of the bridge structure as shown in FIG. 9A . As shown in FIG. 9A , the receive antenna group 900 includes a first receive antenna 930 and a plurality of second receive antennas 940 . Specifically, the first receiving antenna 930 is provided with two bridge structures, including an outer bridge structure and an inner bridge structure. The external bridge structure is electrically connected to the external feeding point A of the first receiving antenna 930 . The inner bridge structure is electrically connected to the inner feeding point B of the first receiving antenna 930 . The outer bridge-like structure is a comb-like structure having an outer main line 910 and a plurality of outer branch lines 912 . The outer branch line 912 extends leftward along the column direction. The internal bridge-like structure is a comb-like structure having an internal main line 920 and a plurality of internal branch lines 922 . The inner branch line 922 extends rightward along the column direction. The outer branches 912 and the inner branches 922 are interleaved between the columns of pixels. Notably, the outer bridge structure and the inner bridge structure are not in contact with each other, so that the first receiving antenna 930 and the two bridge structures form a non-closed loop.

As shown in FIG. 9B, for the pixels 970 and 972 in two adjacent columns, the cathode terminal of the light emitting diode 971 of the pixel 970 is connected to the inner feeding point B of the first receiving antenna 930 through the corresponding inner branch line 922, and the pixel The cathode terminal of the light emitting diode 973 of 972 is connected to the external feeding point A of the first receiving antenna 930 through the corresponding external branch line 912 . In this example, the connection relationship of the first receiving antennas 930 having the pixels 970 and 972 in two adjacent columns may be set differently.

Similarly, each of the second receive antennas 940 may also be provided with two corresponding bridge structures. 9C is a bridge structure electrically connected to the inner feeding point and the outer feeding point of the second receiving antenna according to some embodiments of the present disclosure. As shown in FIG. 9C , the second receiving antenna 940 is provided with two bridge structures, including an outer bridge structure and an inner bridge structure. The external bridge structure is electrically connected to the external feeding point D of the second receiving antenna 940 . The inner bridge structure is electrically connected to the inner feeding point C of the second receiving antenna 940 . The outer bridge-like structure is a comb-like structure having an outer main line 950 and a plurality of outer branch lines 952 . The outer branch line 952 extends downward in FIG. 9C along the row direction. The internal bridge-like structure is a comb-like structure with an internal main line 960 and a plurality of internal branch lines 962 . The inner branch line 962 extends upward in FIG. 9C along the row direction. Outer branches 952 and inner branches 962 are interleaved between rows of pixels. Notably, the outer bridge structure and the inner bridge structure are not in contact with each other, so that the second receiving antenna 940 and the two bridge structures form a non-closed loop.

9D illustrates pixels electrically connected to branches of the bridge structure shown in FIGS. 9A and 9C in a 2*2 matrix according to some embodiments of the present disclosure. As shown in FIG. 9B, four pixels 970, 972, 980 and 982 are arranged in a 2*2 matrix. The connection relationship of the first receiving antennas 930 having the pixels 970 and 972 in two adjacent columns may be set differently, as with reference to the above-mentioned FIG. 9B , and thus will not be described in detail here. For pixels 970 and 980 in two adjacent rows, pixel 970 contains two scan transistors 974 and 976 flanking its pixel circuit, while pixel 980 contains two scan transistors flanking its pixel circuit 984 and 986. The first scan transistor 974 of the pixel 970 is electrically connected to the inner feed point C of the corresponding second receiving antenna 940 through the corresponding inner branch line 962 , and the second scan transistor 976 of the pixel 970 is electrically connected through the corresponding external branch line 952 to the outer feeding point D of the corresponding second receiving antenna 940 . On the other hand, the first scan transistor 984 of the pixel 980 is electrically connected to the external feed point D of the corresponding second receiving antenna 940 through the corresponding external branch line 952, and the second scan transistor 986 of the pixel 980 is electrically connected through the corresponding internal branch line 962 is electrically connected to the inner feeding point C of the corresponding second receiving antenna 940 . In this example, the connection relationship of the second receiving antennas 940 having the pixels 970 and 980 in two adjacent rows may be set differently.

As shown in FIGS. 9A and 9B , the connection relationship of the first receiving antennas 930 having pixels 970 and 972 in two adjacent columns may be set differently. The reason behind such a configuration is because actually the corresponding power supply voltage provided by the first receiving antenna 930 is the voltage difference between the outer feeding point A and the inner feeding point B of the first receiving antenna 930, and the voltage The difference is shown in the form of a sine wave. Taking the pixel 970 in FIG. 9B as an example, when VA>VB, the LED 971 will emit light, and when VA<VB, the LED 971 will not emit light. In other words, the light emitting diode 971 emits light when ΔV(A-B)=VA-VB>0. On the other hand, for the pixel 972 as shown in FIG. 9B, which is connected to two feed points different from the first receiving antenna 930 of the pixel 970, when VA>VB, the light emitting diode 973 does not emit light, and when VA>VB When VA<VB, the light emitting diode 973 emits light. In other words, the light emitting diode 973 emits light when ΔV(A-B)=VA-VB<0.

FIG. 10 shows the difference between the signals provided by the lines Xm, Yn-1, Yn and Emn and the voltage difference provided by the first receiving antenna and the second receiving antenna according to some embodiments of the present disclosure. As shown in FIG. 10 , for each pixel, when ΔV(A-B)=VA-VB is greater than 0 or less than 0, the corresponding LED will emit light. Therefore, as long as the light-emitting pulse width T2 (which is the sum of the reset period and the data writing period) is greater than or equal to half T1 of the period of the sine wave, the overall light-emitting time will remain the same for all pixels during the light-emitting period.

Antennas as in the above embodiments can be used in different kinds of wireless active display panels and/or display devices. For example, FIG. 11 illustrates a mosaic-type micro-LED display device according to some embodiments of the present disclosure. As shown in FIG. 11 , the mosaic-type micro-LED display device 1100 is composed of four micro-LED display panels 1120 connected and spliced together in a 2×2 array. Each of the four micro-LED display panels 1120 has substantially the same size, and can adopt the structure of the active display panel in the embodiments described above.

Furthermore, the embodiments described above are provided for the purposes of illustration and description. Although certain features may be described in separate embodiments, these features may be fully combined to form other embodiments without departing from the spirit and scope of this disclosure.

The foregoing description has presented exemplary embodiments of this invention for purposes of illustration and description, and is not intended to limit the invention to the particular form disclosed. Many modifications and variations are possible in light of the above teachings.

The embodiment was chosen and described in order to explain the principles of the invention and its practical application to enable others skilled in the art to utilize the invention and various embodiments and various modifications as are suited to the particular use. Those with ordinary knowledge in the technical field can make various changes and modifications without departing from the spirit and scope of the content of the present invention. Therefore, the protection scope of the content of the present invention should be regarded as the criterion defined by the claims, rather than the previous and the exemplary embodiments described therein.

Claims (20)

1. A display panel, comprising:

a pixel structure corresponding to a display region, comprising a plurality of pixels arranged in an array of M rows and N columns, wherein M and N are positive integers; and

a receiving antenna structure disposed on the pixel structure, the receiving antenna structure including a plurality of first receiving antennas for providing a plurality of power voltages to the pixels and a plurality of second receiving antennas for providing a plurality of data signals to the pixels, wherein the first receiving antennas have a first resonant frequency, the second receiving antennas have a second resonant frequency greater than the first resonant frequency, and a first size of each of the first receiving antennas is greater than a second size of each of the second receiving antennas;

the first receiving antennas and the second receiving antennas form a plurality of receiving antenna groups, each receiving antenna group comprises a first receiving antenna in the first receiving antennas and at least one second receiving antenna in the second receiving antennas, wherein the at least one second receiving antenna is surrounded by the first receiving antenna in the first receiving antennas, and each second receiving antenna corresponds to at least one row in M rows of the pixels and at least one column in N columns of the pixels.

2. The display panel of claim 1, wherein the first resonant frequency is in a range of 100 khz to 1 mhz and the second resonant frequency is 10 mhz.

3. The display panel of claim 1, wherein the first dimension of each of the first receiving antennas is 4 cm by 4 cm, and the second dimension of each of the second receiving antennas is 8 mm by 10 mm.

4. The display panel of claim 1, further comprising:

a printed circuit board; and

a transmitting antenna structure disposed on the printed circuit board and spatially separated from the receiving antenna structure, for sending a plurality of wireless signals to the receiving antenna structure such that the receiving antenna structure generates the data signals and the power voltages, wherein the transmitting antenna structure comprises a plurality of first transmitting antennas and a plurality of second transmitting antennas, each of the first transmitting antennas corresponds to one of the first receiving antennas in a one-to-one manner, each of the first transmitting antennas has a resonant frequency identical to the first resonant frequency of a corresponding one of the first receiving antennas, each of the second transmitting antennas corresponds one-to-one to a second receiving antenna of the second receiving antennas, and each of the second transmitting antennas has a resonant frequency that is the same as the second resonance of a corresponding one of the second receiving antennas.

5. The display panel of claim 1, wherein:

each first receiving antenna and each second receiving antenna are provided with an inner feed point and an outer feed point;

one of the inner feed point and the outer feed point of each of the first receiving antennas is used as a power supply feed point, and the other of the inner feed point and the outer feed point of each of the first receiving antennas is used as a power supply reference point for providing a power supply reference voltage; and

one of the inner feed point and the outer feed point of each of the second receiving antennas is used as a data feed point, and the other of the inner feed point and the outer feed point of each of the second receiving antennas is used as a data reference point for providing a data reference voltage.

6. The display panel of claim 5, wherein each of the pixels comprises:

a pixel circuit electrically connected to a corresponding one of the first receiving antennas and a corresponding one of the second receiving antennas, wherein the pixel circuit has a pixel capacitor; and

a light emitting diode electrically connected to the corresponding first receiving antenna and the pixel circuit, wherein:

the pixel circuit is used for controlling the pixel capacitor to reset in a reset period;

the pixel circuit is used for controlling the corresponding second receiving antenna to provide a corresponding data signal to the pixel capacitor so as to charge the pixel capacitor to a pixel voltage potential in a data writing period which is next to the resetting period; and

the charged pixel capacitor of the pixel circuit is used for controlling the corresponding first receiving antenna to provide a corresponding power voltage to the light emitting diode so as to drive the light emitting diode to emit light according to the pixel voltage potential in a light emitting period next to the data writing period.

7. The display panel of claim 6, wherein the light emitting diode has a cathode terminal and an anode terminal, the cathode terminal of the light emitting diode is connected to a corresponding one of the inner feed point and the outer feed point of the first receiving antenna, and the pixel circuit comprises:

the pixel capacitor is provided with a first electrode and a second electrode, and the first electrode is connected to the anode end of the light-emitting diode;

a light emitting switch and a control switch are electrically connected in series with the light emitting diode and the corresponding first receiving antenna, wherein a control end of the control switch is electrically connected to the second electrode of the pixel capacitor;

a diode electrically connected to the second electrode of the pixel capacitor;

a plurality of scanning switches are electrically connected in series with the corresponding second receiving antenna and the diode; and

a reset switch electrically connected to the second electrode of the pixel capacitor, wherein:

during the reset period, the reset switch is turned on, and at least one of the light-emitting switch and the scan switches is turned off, so that the pixel capacitor is reset by the reset switch;

during the data writing period, the scanning switches are turned on, and the reset switch and the light-emitting switch are turned off, so that the corresponding second receiving antenna, the scanning switches and the diode form a first closed loop to provide the corresponding data signal to the pixel capacitor to charge the pixel capacitor to the pixel voltage potential; and

during the light emitting period, the light emitting switch is turned on, the reset switch and at least one of the scan switches are turned off, and the pixel capacitor of the charged pixel circuit turns on the control switch according to the pixel voltage potential, so that the corresponding first receiving antenna, the light emitting switch, the control switch and the light emitting diode form a second closed loop to provide the corresponding power voltage to the light emitting diode to drive the light emitting diode to emit light.

8. The display panel of claim 7, wherein:

each of the receiving antenna groups comprises a plurality of second receiving antennas arranged in a matrix by I columns and J rows, wherein I and J are positive integers;

in each of the receiving antenna groups, each of the I by J second receiving antennas corresponds to M rows and N columns in the pixels, where M and N are positive integers greater than 1, M < M, N < N; and

each adjacent two columns of the n columns of the pixels correspond to each of the I by J second receiving antennas, the cathode terminal of the light emitting diode of each pixel of the pixels in one of the adjacent two columns is connected to the external feed point of the corresponding first receiving antenna, and the cathode terminal of the light emitting diode of each pixel of the pixels in the other one of the adjacent two columns is connected to the internal feed point of the corresponding first receiving antenna.

9. The display panel of claim 8, wherein:

each of the first receiving antennas has an inner bridge structure and an outer bridge structure, the inner bridge structure is electrically connected to the inner feed point of each of the first receiving antennas, the outer bridge structure is electrically connected to the outer feed point of each of the first receiving antennas, and the inner bridge structure and the outer bridge structure are electrically independent from each other;

the inner bridge structure having a plurality of inner branches along a column direction, the outer bridge structure having a plurality of outer branches along the column direction; and

the internal branch lines and the external branch lines are arranged between the n rows of the pixels corresponding to the second receiving antennas of each I-J in a staggered manner, so that the cathode end of the light emitting diode of each pixel of the pixels of one row of the two adjacent rows is connected to the corresponding external feed point of the first receiving antenna through one external branch line of the external bridge-shaped structures of the corresponding first receiving antenna, and the cathode end of the light emitting diode of each pixel of the pixels of the other row of the two adjacent rows is connected to the corresponding internal feed point of the first receiving antenna through one internal branch line of the internal bridge-shaped structures of the corresponding first receiving antenna.

10. The display panel of claim 8, wherein:

the scanning switches comprise a first scanning switch and a third scanning switch, the first scanning switch electrically connects the diode to one of the external feed point and the internal feed point of the corresponding second receiving antenna, and the third scanning switch is electrically connected to the other of the external feed point and the internal feed point of the corresponding second receiving antenna; and

two adjacent rows of the m rows of the pixels correspond to each of the I by J second receiving antennas, the first scan switch of each pixel of the pixels in one of the two adjacent rows is connected to the external feed point of the corresponding second receiving antenna, the third scan switch of each pixel of the pixels in one of the two adjacent rows is connected to the internal feed point of the corresponding second receiving antenna, the first scan switch of each pixel of the pixels in the other of the two adjacent rows is connected to the internal feed point of the corresponding second receiving antenna, and the third scan switch of each pixel of the pixels in the other of the two adjacent rows is connected to the external feed point of the corresponding second receiving antenna.

11. The display panel of claim 10, wherein:

each of the second receiving antennas has an inner bridge structure and an outer bridge structure, the inner bridge structure is electrically connected to the inner feeding point of each of the second receiving antennas, the outer bridge structure is electrically connected to the outer feeding point of each of the second receiving antennas, and the inner bridge structure and the outer bridge structure are electrically independent from each other;

the inner bridge structure having a plurality of inner branches along a row direction, the outer bridge structure having a plurality of outer branches along the row direction; and

the internal branch lines and the external branch lines are alternately arranged between m rows of the pixels in each of the I-by-J second receiving antennas, so that the first scan switch of each pixel of the pixels in one of the two adjacent rows is connected to the external feed point of the corresponding second receiving antenna through one external branch line of the external bridge structure of the corresponding second receiving antenna, the third scan switch of each pixel of the pixels in one of the two adjacent rows is connected to the internal feed point of the corresponding second receiving antenna through one internal branch line of the internal bridge structure of the corresponding second receiving antenna, the first scan switch of each pixel of the pixels in the other one of the two adjacent rows is connected to the internal feed point of the corresponding second receiving antenna through one internal branch line of the internal bridge structure of the corresponding second receiving antenna, the third scan switch of each of the pixels in the other of the two adjacent rows is connected to the corresponding external feed point of the second receiving antenna through an external branch of the external bridge structure of the corresponding second receiving antenna.

12. The display panel of claim 6, wherein the power voltage provided by the first receiving antenna is a difference between the inner feeding point and the outer feeding point of the first receiving antenna, the difference is a sine wave, and a sum of the reset period and the data writing period is greater than or equal to half of a period of the sine wave.

13. A display device, comprising:

a plurality of led display panels arranged in a tiled arrangement, wherein each of the led display panels comprises:

a pixel structure corresponding to a display region, comprising a plurality of pixels arranged in an array of M rows and N columns, wherein M and N are positive integers; and

a receiving antenna structure disposed on the pixel structure, the receiving antenna structure including a plurality of first receiving antennas for providing a plurality of power voltages to the pixels and a plurality of second receiving antennas for providing a plurality of data signals to the pixels, wherein each of the first receiving antennas has a first resonant frequency, each of the second receiving antennas has a second resonant frequency greater than the first resonant frequency, and a first size of each of the first receiving antennas is greater than a second size of each of the second receiving antennas;

the first receiving antennas and the second receiving antennas form a plurality of receiving antenna groups, each receiving antenna group comprises one of the first receiving antennas and at least one of the second receiving antennas surrounded by one of the first receiving antennas, and each second receiving antenna corresponds to at least one of the M rows and the N columns of the pixels.

14. A method for driving a pixel of a display panel, comprising:

providing an active display panel comprising:

a pixel structure corresponding to a display region, comprising a plurality of pixels arranged in an array of M rows and N columns, wherein M and N are positive integers; and

a receiving antenna structure disposed on the pixel structure, the receiving antenna structure including a plurality of first receiving antennas for providing a plurality of power voltages to the pixels and a plurality of second receiving antennas for providing a plurality of data signals to the pixels, wherein each of the first receiving antennas has a first resonant frequency, each of the second receiving antennas has a second resonant frequency greater than the first resonant frequency, and an inner diameter of each of the first receiving antennas is greater than an outer diameter of each of the second receiving antennas;

wherein the first receiving antennas and the second receiving antennas form a plurality of receiving antenna groups, each receiving antenna group comprises a first receiving antenna of the first receiving antennas and at least one second receiving antenna of the second receiving antennas, which is surrounded by the first receiving antenna of the first receiving antennas, and each second receiving antenna corresponds to at least one row of the M rows and at least one column of the N columns of the pixels;

wherein each of the first receiving antennas and each of the second receiving antennas comprise an inner feed point and an outer feed point;

wherein each of the plurality of pixels includes a pixel circuit electrically connected to a corresponding one of the plurality of first receiving antennas and a corresponding one of the plurality of second receiving antennas, wherein the pixel circuit has a pixel capacitor; and a light emitting diode electrically connected to the corresponding first receiving antenna and the pixel circuit;

each pixel in the pixels is controlled by the pixel circuit to reset the pixel capacitor in a reset period;

during a data writing period immediately after the resetting period, each of the pixels controls the corresponding second receiving antenna to provide a corresponding data signal to the pixel capacitor so as to charge the pixel capacitor to a pixel voltage potential; and

in a light emitting period next to the data writing period, the charged pixel capacitor in the pixel circuit controls the corresponding first receiving antenna to provide a corresponding power voltage to the light emitting diode so as to drive the light emitting diode to emit light according to the pixel voltage potential.

15. The method as claimed in claim 14, wherein the led has a cathode terminal and an anode terminal, the cathode terminal of the led is connected to a corresponding one of the inner feeding point and the outer feeding point of the first receiving antenna, the pixel circuit comprises:

the pixel capacitor is provided with a first electrode and a second electrode, and the first electrode is connected to the anode end of the light-emitting diode;

a light emitting switch and a control switch are electrically connected in series with the light emitting diode and the corresponding first receiving antenna, wherein a control end of the control switch is electrically connected to the second electrode of the pixel capacitor;

a diode electrically connected to the second electrode of the pixel capacitor;

a plurality of scanning switches are electrically connected in series with the corresponding second receiving antenna and the diode; and

a reset switch electrically connected to the second electrode of the pixel capacitor, wherein:

during the reset period, the reset switch is turned on, and at least one of the light-emitting switch and the scan switches is turned off, so that the pixel capacitor is reset by the reset switch;

during the data writing period, the scanning switches are turned on, and the reset switch and the light-emitting switch are turned off, so that the corresponding second receiving antenna, the scanning switches and the diode form a first closed loop to provide the corresponding data signal to the pixel capacitor to charge the pixel capacitor to the pixel voltage potential; and

during the light emitting period, the light emitting switch is turned on, the reset switch and at least one of the scan switches are turned off, and the pixel capacitor of the charged pixel circuit turns on the control switch according to the pixel voltage potential, so that the corresponding first receiving antenna, the light emitting switch, the control switch and the light emitting diode form a second closed loop to provide the corresponding power voltage to the light emitting diode to drive the light emitting diode to emit light.

16. The display panel pixel driving method of claim 15, wherein:

each of the receiving antenna groups comprises a plurality of second receiving antennas arranged in a matrix by I columns and J rows, wherein I and J are positive integers;

in each of the receiving antenna groups, each of the I by J second receiving antennas corresponds to M rows and N columns in the pixels, where M and N are positive integers greater than 1, M < M, N < N; and

each adjacent two columns of the n columns of the pixels correspond to each of the I by J second receiving antennas, the cathode terminal of the light emitting diode of each pixel of the pixels in one of the adjacent two columns is connected to the external feed point of the corresponding first receiving antenna, and the cathode terminal of the light emitting diode of each pixel of the pixels in the other one of the adjacent two columns is connected to the internal feed point of the corresponding first receiving antenna.

17. The display panel pixel driving method of claim 16, wherein:

each of the first receiving antennas has an inner bridge structure and an outer bridge structure, the inner bridge structure is electrically connected to the inner feed point of each of the first receiving antennas, the outer bridge structure is electrically connected to the outer feed point of each of the first receiving antennas, and the inner bridge structure and the outer bridge structure are electrically independent from each other;

the inner bridge structure having a plurality of inner branches along a column direction, the outer bridge structure having a plurality of outer branches along the column direction; and

the internal branch lines and the external branch lines are arranged between the n rows of the pixels corresponding to the second receiving antennas of each I-J in a staggered manner, so that the cathode end of the light emitting diode of each pixel of the pixels of one row of the two adjacent rows is connected to the corresponding external feed point of the first receiving antenna through one external branch line of the external bridge-shaped structures of the corresponding first receiving antenna, and the cathode end of the light emitting diode of each pixel of the pixels of the other row of the two adjacent rows is connected to the corresponding internal feed point of the first receiving antenna through one internal branch line of the internal bridge-shaped structures of the corresponding first receiving antenna.

18. The display panel pixel driving method of claim 16, wherein:

the scanning switches comprise a first scanning switch and a third scanning switch, the first scanning switch electrically connects the diode to one of the external feed point and the internal feed point of the corresponding second receiving antenna, and the third scanning switch is electrically connected to the other of the external feed point and the internal feed point of the corresponding second receiving antenna; and

two adjacent rows of the m rows of the pixels correspond to each of the I by J second receiving antennas, the first scan switch of each pixel of the pixels in one of the two adjacent rows is connected to the external feed point of the corresponding second receiving antenna, the third scan switch of each pixel of the pixels in one of the two adjacent rows is connected to the internal feed point of the corresponding second receiving antenna, the first scan switch of each pixel of the pixels in the other of the two adjacent rows is connected to the internal feed point of the corresponding second receiving antenna, and the third scan switch of each pixel of the pixels in the other of the two adjacent rows is connected to the external feed point of the corresponding second receiving antenna.

19. The display panel pixel driving method of claim 18, wherein:

each of the second receiving antennas has an inner bridge structure and an outer bridge structure, the inner bridge structure is electrically connected to the inner feeding point of each of the second receiving antennas, the outer bridge structure is electrically connected to the outer feeding point of each of the second receiving antennas, and the inner bridge structure and the outer bridge structure are electrically independent from each other;

the inner bridge structure having a plurality of inner branches along a row direction, the outer bridge structure having a plurality of outer branches along the row direction; and

the internal branch lines and the external branch lines are alternately arranged between m rows of the pixels corresponding to each of the I-by-J second receiving antennas, so that the first scan switch of each pixel of the pixels of one of the two adjacent rows is connected to the corresponding external feed point of the second receiving antenna through an external branch line of the external bridge structure of the corresponding second receiving antenna, the third scan switch of each pixel of the pixels of one of the two adjacent rows is connected to the corresponding internal feed point of the second receiving antenna through an internal branch line of the internal bridge structure of the corresponding second receiving antenna, the first scan switch of each pixel of the pixels of the other of the two adjacent rows is connected to the corresponding internal feed point of the second receiving antenna through an internal branch line of the internal bridge structure of the corresponding second receiving antenna, the third scan switch of each of the pixels of the other of the two adjacent rows is connected to the external feed point of the corresponding second receiving antenna through an external branch of the external bridge structure of the corresponding second receiving antenna.

20. The method as claimed in claim 14, wherein the power voltage provided by the first receiving antenna is a voltage difference between the inner feeding point and the outer feeding point of the first receiving antenna, the voltage difference is a sine wave, and a sum of the reset period and the data writing period is greater than or equal to half of a period of the sine wave.

Images