CN115497429B - Pixel driving circuit, module, backlight source, panel, device and driving method - Google Patents
Pixel driving circuit, module, backlight source, panel, device and driving method Download PDFInfo
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- CN115497429B CN115497429B CN202211213395.4A CN202211213395A CN115497429B CN 115497429 B CN115497429 B CN 115497429B CN 202211213395 A CN202211213395 A CN 202211213395A CN 115497429 B CN115497429 B CN 115497429B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3275—Details of drivers for data electrodes
- G09G3/3283—Details of drivers for data electrodes in which the data driver supplies a variable data current for setting the current through, or the voltage across, the light-emitting elements
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention provides a pixel driving circuit, a module, a backlight source, a panel, a device and a driving method, wherein the pixel driving circuit comprises at least two transistors and at least one voltage drop unit; the grid electrode of the transistor is electrically connected with the gray-scale data end, the first electrode of the transistor is electrically connected with the first end of the light-emitting unit, and the second electrode of the transistor is connected with a fixed potential; the voltage drop unit is connected between the grid electrodes of the two transistors, a first end of the voltage drop unit is electrically connected with the gray scale data end, and a voltage of a second end of the voltage drop unit is smaller than that of the first end of the voltage drop unit. The invention provides a pixel driving circuit, a module, a backlight source, a panel, a device and a driving method, which are used for solving the problem of difficult gray scale control and improving the luminous efficiency of a luminous unit.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a pixel driving circuit, a module, a backlight, a panel, a device, and a driving method.
Background
The Light Emitting Diode (LED) backlight market has shown a rapid trend. The backlight module can be divided into a side-in type backlight module and a direct type backlight module, and compared with the side-in type backlight module, the direct type backlight module can be provided with no light guide plate, and is popular with consumers. Mini LEDs (mini LEDs) are of a size from a micron level to a millimeter level, and backlights using mini LEDs are commonly used in direct-down mode, and the mini LEDs can realize finer zone control, thereby realizing very high contrast.
In the prior art, a Printed Circuit Board (PCB) is adopted in the mini LED backlight module, and transistors of independent devices are manufactured on the PCB in a piece-punching mode, so that when the mini LED is driven to emit light, the voltage control current mode is adopted, and the problem of difficulty in gray scale control exists.
Disclosure of Invention
The invention provides a pixel driving circuit, a module, a backlight source, a panel, a device and a driving method, which are used for solving the problem of difficult gray scale control and improving the luminous efficiency of a luminous unit.
In a first aspect, an embodiment of the present invention provides a pixel driving circuit, including at least two transistors and at least one voltage drop unit;
the grid electrode of the transistor is electrically connected with the gray-scale data end, the first electrode of the transistor is electrically connected with the first end of the light-emitting unit, and the second electrode of the transistor is connected with a fixed potential;
the voltage drop unit is connected between the grid electrodes of the two transistors, a first end of the voltage drop unit is electrically connected with the gray scale data end, and a voltage of a second end of the voltage drop unit is smaller than that of the first end of the voltage drop unit.
In a second aspect, an embodiment of the present invention provides a light emitting module, including:
a substrate;
a plurality of light emitting units located at one side of the substrate;
a plurality of pixel driving circuits according to the first aspect, wherein the pixel driving circuits are electrically connected to the first terminal of the light emitting unit, and the second terminal of the light emitting unit is electrically connected to the power signal terminal.
In a third aspect, an embodiment of the present invention provides a backlight, including the light emitting module of the second aspect.
In a fourth aspect, an embodiment of the present invention provides a display panel, including the light emitting module set in the second aspect.
In a fifth aspect, an embodiment of the present invention provides a display device, including the backlight of the third aspect, or the display panel of the fourth aspect.
In a sixth aspect, an embodiment of the present invention provides a driving method based on the pixel driving circuit in the first aspect, including:
in a light-emitting stage, corresponding gray-scale data are determined according to the image, gray-scale voltage signals are provided for a gray-scale data end, at least one transistor in the pixel driving circuit is controlled to be conducted, and the light-emitting unit is driven to emit light;
wherein there is a voltage of the gate of at least one of the transistors being a difference between the voltage of the gray scale voltage signal and a voltage drop across the voltage drop unit.
The embodiment of the invention provides a pixel driving circuit, wherein a voltage drop unit is connected between grid electrodes of two transistors. The voltage of the transistor gate directly electrically connected to the first terminal of the voltage drop unit is greater than the voltage of the transistor gate directly electrically connected to the second terminal of the voltage drop unit. Therefore, the voltage drop unit divides the gray-scale voltage signal of the gray-scale data end into at least two grades so as to drive the light emitting unit to realize at least two different light emitting brightnesses. In the embodiment of the invention, the light-emitting brightness of the light-emitting unit is controlled by controlling the on-state quantity of the transistors, the on-state internal resistance of the transistors and the driving current of the light-emitting unit, the transistors work in the constant current area instead of the variable resistance area, the working current of the transistor 10 in the on-state is stable, and the working current is not changed along with the tiny adjustment and tiny fluctuation of the gray-scale voltage signal, so that the problem of difficult gray-scale control is solved. On the other hand, as the transistor works in the constant current area and is not a variable resistance area, the power consumption of the transistor is reduced, more energy is utilized to the luminous unit capable of emitting light, and the luminous efficiency of the luminous unit is improved.
Drawings
Fig. 1 is a schematic diagram of a pixel driving circuit according to an embodiment of the invention;
FIG. 2 is a schematic diagram of another pixel driving circuit according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of another pixel driving circuit according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of another pixel driving circuit according to an embodiment of the invention;
FIG. 5 is a schematic diagram of another pixel driving circuit according to an embodiment of the invention;
FIG. 6 is a schematic diagram of another pixel driving circuit according to an embodiment of the invention;
FIG. 7 is a schematic diagram of another pixel driving circuit according to an embodiment of the invention;
FIG. 8 is a schematic diagram of another pixel driving circuit according to an embodiment of the invention;
fig. 9 is a schematic top view of a light emitting module according to an embodiment of the present invention;
fig. 10 is a schematic cross-sectional view of a light emitting module according to an embodiment of the present invention;
FIG. 11 is a schematic diagram of a display device according to an embodiment of the present invention;
fig. 12 is a driving timing diagram of a pixel driving circuit according to an embodiment of the present invention.
Detailed Description
The invention is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present invention are shown in the drawings.
In the prior art, a gate of a driving transistor is electrically connected with a gray-scale data terminal, receives a gray-scale voltage signal output by the gray-scale data terminal, and adjusts a driving current according to a voltage value of the gray-scale voltage signal. The driving transistor works in the variable resistance region, and the drain current of the driving transistor is correspondingly changed according to the gate-source voltage difference of the driving transistor, so that different driving currents are realized. However, both the minute adjustment and minute fluctuation of the gray-scale voltage signal cause a large variation in the driving current. This causes difficulty in gray scale control.
The working area of the transistor comprises a variable resistance area, a constant current area and a pinch-off area. The variable resistance region is also referred to as an unsaturated region. In the variable resistance region, the resistance value of the drain-source equivalent resistance can be changed by changing the gate-source voltage difference, and is called a variable resistance region. The constant current region is also referred to as a saturation region. When the gate-source voltage difference increases, the drain current slightly increases. In the pinch-off region, the conduction channel is pinched off and the drain current is equal to a small value.
Fig. 1 is a schematic diagram of a pixel driving circuit according to an embodiment of the invention, and referring to fig. 1, the pixel driving circuit includes at least two transistors 10 and at least one voltage drop unit 20. The gate of the transistor 10 is electrically connected to the gray-scale data terminal 30, the first electrode of the transistor 10 is electrically connected to the first terminal of the light emitting unit 40, and the second electrode of the transistor 10 is connected to a fixed potential. The voltage drop unit 20 is connected between the gates of the two transistors 10. The first terminal of the voltage drop unit 20 is electrically connected to the gray-scale data terminal 30. The voltage of the second terminal of the voltage drop unit 20 is smaller than the voltage of the first terminal of the voltage drop unit 20 for generating a voltage drop, thereby generating a voltage difference between the gates of the two transistors 10 connected to both ends of the voltage drop unit 20.
Illustratively, referring to fig. 1, the plurality of transistors 10 includes a first transistor T1 and a second transistor T2. The pressure drop unit 20 includes a first pressure drop unit D1. The gate of the first transistor T1 is electrically connected to the gray-scale data terminal 30, the first electrode of the first transistor T1 is electrically connected to the first terminal of the light emitting unit 40, and the second electrode of the first transistor T1 is connected to a fixed potential. The fixed potential may have a fixed potential, i.e. a fixed voltage value. The fixed potential may comprise, for example, ground potential, or a negative supply voltage (PVEE). The gate of the second transistor T2 is electrically connected to the gray-scale data terminal 30, the first electrode of the second transistor T2 is electrically connected to the first terminal of the light emitting unit 40, and the second electrode of the second transistor T2 is connected to a fixed potential. The first voltage drop unit D1 is connected between the gate of the first transistor T1 and the gate of the second transistor T2. The first end of the first voltage drop unit D1 is directly electrically connected to the gate of the first transistor T1, and the second end of the first voltage drop unit D1 is directly electrically connected to the gate of the second transistor T2. Where there are no other electrical components between the two of the "direct electrical connection", e.g., no capacitance, switch, etc.
When the gray voltage signal provided at the gray data terminal 30 is determined, the voltage of the gate of the first transistor T1 is greater than the voltage of the gate of the second transistor T2. There are the following cases: in the first case, the first transistor T1 is turned on, the second transistor T2 is turned off, and the first transistor T1 operates in the constant current region. The light emitting unit 40 and the first transistor T1 form a current loop, the light emitting unit 40 emits light, and the light emitting brightness of the light emitting unit 40 is related to the on internal resistance of the first transistor T1. In the second case, the first transistor T1 is turned on, the second transistor T2 is turned on, and the first transistor T1 and the second transistor T2 operate in the constant current region. The light emitting unit 40 and the first transistor T1 form a current loop, the light emitting unit 40 and the second transistor T2 form a current loop, and the light emitting unit 40 emits light. The light emitting luminance of the light emitting unit 40 is related to the on internal resistance of the first transistor T1 and the on internal resistance of the second transistor T2. Since the first transistor T1 and the second transistor T2 are connected in parallel, the parallel resistance of the first transistor T1 and the second transistor T2 is smaller than the on internal resistance of the first transistor T1, and the light emitting brightness of the light emitting unit 40 is larger when the second transistor T2 is turned on than when the first transistor T1 is turned off.
The embodiment of the invention provides a pixel driving circuit, wherein a voltage drop unit 20 is connected between the gates of two transistors 10. The voltage of the gate of the transistor 10 directly electrically connected to the first terminal of the voltage drop unit 20 is greater than the voltage of the gate of the transistor 10 directly electrically connected to the second terminal of the voltage drop unit 20. The voltage drop unit 20 divides the gray voltage signal of the gray data terminal 30 into at least two levels to drive the light emitting unit 40 to achieve at least two different light emitting brightnesses. In the embodiment of the invention, the on-state quantity of the transistor 10 is controlled, the on-state internal resistance of the transistor 10 is controlled, and the driving current of the light-emitting unit 40 is controlled, so that the light-emitting brightness of the light-emitting unit 40 is controlled, the transistor 10 works in a constant current area instead of a variable resistance area, the working current of the transistor 10 in the on-state is stable, and the working current is not changed along with the tiny adjustment and tiny fluctuation of a gray-scale voltage signal, so that the problem of difficult gray-scale control is solved. On the other hand, since the transistor 10 operates in the constant current region, not the variable resistance region, power consumption on the transistor 10 is reduced, more energy is utilized to the light emitting unit 40 that can emit light, and light emitting efficiency of the light emitting unit 40 is improved.
Alternatively, referring to fig. 1, there are at least two transistors 10 having the same channel width to length ratio. The two transistors 10 having the same channel width to length ratio may have the same channel width and the same channel length, thereby facilitating the simplification of the fabrication process. On the other hand, the two transistors 10 having the same channel width-to-length ratio have the same on internal resistance, so that the parallel resistance of the two transistors 10 connected in parallel becomes half of the original resistance, and thus, when the internal resistance of the light emitting cell 40 is ignored, it is advantageous to control the driving current of the light emitting cell 40 by an integer multiple, and thus to control the light emission luminance of the light emitting cell 40 by an integer multiple.
Illustratively, referring to fig. 1, the first transistor T1 and the second transistor T2 have the same channel width to length ratio. In other embodiments, the pixel driving circuit includes at least three transistors 10, wherein the channel width to length ratio of at least two transistors 10 is the same.
Alternatively, referring to fig. 1, there are at least two transistors 10 having different channel width to length ratios. The smaller the connection resistance of the gate of the transistor 10 to the gray-scale data terminal 30, the smaller the channel width-to-length ratio of the transistor 10. The larger the connection resistance between the gate of the transistor 10 and the gray-scale data terminal 30, the larger the channel width-to-length ratio of the transistor 10. The smaller the connection resistance between the gate of the transistor 10 and the gray-scale data terminal 30, the fewer the number of voltage drop units 20 connected in series between the gate of the transistor 10 and the gray-scale data terminal 30. The smaller the internal resistance of the transistor 10 having a larger channel width to length ratio, the larger the internal resistance of the transistor 10 having a smaller channel width to length ratio. Thus, the fewer the number of voltage drop cells 20 connected in series between the gate of the transistor 10 and the gray scale data terminal 30, the greater the internal resistance the transistor 10 has; the greater the number of voltage drop cells 20 connected in series between the gate of the transistor 10 and the gray scale data terminal 30, the less internal resistance the transistor 10 has. It can be understood that when the plurality of transistors 10 are turned on, not only the resistance of the current loop where the light emitting unit 40 is located is reduced by increasing the number of the transistors 10 connected in parallel, but also the resistance of the current loop where the light emitting unit 40 is located is further reduced by increasing the channel width to length ratio of the transistors 10, and the light emitting brightness of the light emitting unit 40 is increased.
Illustratively, referring to fig. 1, the first transistor T1 and the second transistor T2 have different channel width to length ratios. The channel width-to-length ratio of the first transistor T1 is smaller than the channel width-to-length ratio of the second transistor T2. In other embodiments, the pixel driving circuit includes at least three transistors 10, wherein at least two of the transistors 10 have different channel width to length ratios.
Alternatively, referring to fig. 1, the channel width-to-length ratio of the second transistor T2 is twice that of the first transistor T1. When both the first transistor T1 and the second transistor T2 are turned on, the parallel resistance of the first transistor T1 and the second transistor T2 after being connected in parallel is one third of the internal resistance of the first transistor T1, and when the internal resistance of the light emitting unit 40 is ignored, the driving current of the light emitting unit 40 becomes three times that when the first transistor T1 is turned on and the second transistor T2 is turned off, so that the light emitting brightness of the light emitting unit 40 is improved.
Fig. 2 is a schematic diagram of another pixel driving circuit according to an embodiment of the invention, and referring to fig. 2, a plurality of transistors 10 includes a first transistor T1, a second transistor T2, a third transistor T3, and a fourth transistor T4. The pressure drop unit 20 includes a first pressure drop unit D1, a second pressure drop unit D2, and a third pressure drop unit D3. The first voltage drop unit D1 is connected between the gate of the first transistor T1 and the gate of the second transistor T2, and the first voltage drop unit D1 is connected between the gray-scale data terminal 30 and the gate of the second transistor T2. The first end of the first voltage drop unit D1 is directly electrically connected to the gate of the first transistor T1, and the second end of the first voltage drop unit D1 is directly electrically connected to the gate of the second transistor T2. The voltage of the second terminal of the first voltage drop unit D1 is smaller than the voltage of the first terminal of the first voltage drop unit D1. The second voltage drop unit D2 is connected between the gate of the second transistor T2 and the gate of the third transistor T3, and the second voltage drop unit D2 is connected between the gray-scale data terminal 30 and the gate of the third transistor T3. The first end of the second voltage drop unit D2 is directly electrically connected to the gate of the second transistor T2, and the second end of the second voltage drop unit D2 is directly electrically connected to the gate of the third transistor T3. The voltage of the second terminal of the second voltage dropping unit D2 is smaller than the voltage of the first terminal of the second voltage dropping unit D2. The third voltage drop unit D3 is connected between the gate of the third transistor T3 and the gate of the fourth transistor T4, and the third voltage drop unit D3 is connected between the gray-scale data terminal 30 and the gate of the fourth transistor T4. The first end of the third voltage drop unit D3 is directly electrically connected to the gate of the third transistor T3, and the second end of the third voltage drop unit D3 is directly electrically connected to the gate of the fourth transistor T4. The voltage of the second terminal of the third voltage drop unit D3 is smaller than the voltage of the first terminal of the third voltage drop unit D3.
The number of the series voltage drop units 20 between the gate of the first transistor T1 and the gray-scale data terminal 30 is smaller than the number of the series voltage drop units 20 between the gate of the second transistor T2 and the gray-scale data terminal 30, the number of the series voltage drop units 20 between the gate of the second transistor T2 and the gray-scale data terminal 30 is smaller than the number of the series voltage drop units 20 between the gate of the third transistor T3 and the gray-scale data terminal 30, and the number of the series voltage drop units 20 between the gate of the third transistor T3 and the gray-scale data terminal 30 is smaller than the number of the series voltage drop units 20 between the gate of the fourth transistor T4 and the gray-scale data terminal 30. Thus, the on-voltage of the first transistor T1 is smaller than the on-voltage of the second transistor T2, the on-voltage of the second transistor T2 is smaller than the on-voltage of the third transistor T3, and the on-voltage of the third transistor T3 is smaller than the on-voltage of the fourth transistor T4. It is understood that the voltage drop unit 20 (including the first voltage drop unit D1, the second voltage drop unit D2, and the third voltage drop unit D3) forms a threshold value screening circuit network of the gray scale voltage signals, and divides the gray scale voltage signals into several levels. The on voltage of the transistor 10 refers to a voltage value of a gray scale voltage signal corresponding to the time from off to on of the transistor 10.
Illustratively, referring to fig. 2, the second transistor T2 has a channel width to length ratio greater than that of the first transistor T1, the third transistor T3 has a channel width to length ratio greater than that of the second transistor T2, and the fourth transistor T4 has a channel width to length ratio greater than that of the third transistor T3. The parallel resistance of the first transistor T1 and the second transistor T2 is less than half of the internal resistance of the first transistor T1, the parallel resistance of the first transistor T1, the second transistor T2 and the third transistor T3 is less than one third of the internal resistance of the first transistor T1, and the parallel resistance of the first transistor T1, the second transistor T2, the third transistor T3 and the fourth transistor T4 is less than one fourth of the internal resistance of the first transistor T1, so that the resistance of a current loop where the light emitting unit 40 is located is reduced, and the light emitting brightness of the light emitting unit 40 is increased.
Illustratively, referring to fig. 2, the second transistor T2 has a channel width-to-length ratio twice that of the first transistor T1, the third transistor T3 has a channel width-to-length ratio twice that of the second transistor T2, and the fourth transistor T4 has a channel width-to-length ratio twice that of the third transistor T3. The ratios of channel width to length ratios of the first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4 are: 1:2:4:8. when the first transistor T1 is turned on and the second, third and fourth transistors T2, T3 and T4 are turned off, the driving current of the light emitting unit 40 is denoted as I1; when the first transistor T1 and the second transistor T2 are turned on and the third transistor T3 and the fourth transistor T4 are turned off, the driving current of the light emitting unit 40 is denoted as I2; when the first transistor T1, the second transistor T2 and the third transistor T3 are turned on and the fourth transistor T4 is turned off, the driving current of the light emitting unit 40 is denoted as I3; when the first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4 are turned on, the driving current of the light emitting unit 40 is denoted as I4. In the case of neglecting the internal resistance of the light emitting unit 40, the ratio of the currents of the driving current of the light emitting unit 40 in various on-states, I1: i2: and I3: i4 =1: 3:7:15.
fig. 3 is a schematic diagram of another pixel driving circuit according to an embodiment of the invention, and referring to fig. 3, gates of at least two transistors 10 are directly electrically connected. The gates of the two transistors 10 are directly electrically connected, the gates of the two transistors 10 have the same voltage, and the two transistors 10 are simultaneously turned on or simultaneously turned off when the threshold voltages of the two transistors 10 are the same.
Illustratively, referring to fig. 3, the gate of the first transistor T1 is directly electrically connected to the gate of the second transistor T2. The gates of the first transistor T1 and the second transistor T2 are connected to the first end of the first voltage drop unit D1. The gate of the third transistor T3 is directly electrically connected to the gate of the fourth transistor T4. The gates of the third transistor T3 and the fourth transistor T4 are connected to the second end of the first voltage drop unit D1. There are the following cases: in the first case, the first transistor T1 and the second transistor T2 are turned on, the third transistor T3 and the fourth transistor T4 are turned off, the light emitting unit 40 and the first transistor T1 and the second transistor T2 form a current loop, the light emitting unit 40 emits light, and the light emitting brightness of the light emitting unit 40 is related to the parallel resistance after the first transistor T1 and the second transistor T2 are connected in parallel. In the second case, the first transistor T1, the second transistor T2, the third transistor T3 and the fourth transistor T4 are turned on, the light emitting unit 40 and the first transistor T1, the second transistor T2, the third transistor T3 and the fourth transistor T4 all form a current loop, the light emitting unit 40 emits light, and the light emitting brightness of the light emitting unit 40 is related to the parallel resistance of the first transistor T1, the second transistor T2, the third transistor T3 and the fourth transistor T4 after being connected in parallel.
Alternatively, referring to fig. 3, among the transistors 10 whose gates are directly electrically connected, there are at least two transistors 10 having different channel width-to-length ratios. Thus, in the process of controlling the transistor 10 to be turned on, the transistor 10 having a large channel width to length ratio is preferentially turned on and is in the constant current region, and the transistor 10 having a small channel width to length ratio is in the variable resistance region. The transistors 10 having different channel width to length ratios and their gates directly electrically connected are combined to light the light emitting unit 40, so that the light emitting unit 40 has a wider light emitting range.
Illustratively, referring to fig. 3, the gate of the first transistor T1 is directly electrically connected to the gate of the second transistor T2. The channel width-to-length ratio of the first transistor T1 is different from the channel width-to-length ratio of the second transistor T2. Taking the channel width-to-length ratio of the first transistor T1 as an example, it is smaller than that of the second transistor T2. The first transistor T1 and the second transistor T2 are turned on, the first transistor T1 is in the variable resistance region, and the second transistor T2 is in the constant current region. Therefore, on the basis of connecting the first transistor T1 and the second transistor T2 in parallel to adjust the loop resistance of the light emitting unit 40, the voltage of the gate of the first transistor T1 can be adjusted to adjust the magnitude of the driving current, so that the light emitting unit 40 has a wider light emitting range. It should be noted that in the prior art, only one driving transistor is often provided, and the driving transistor is operated in the variable resistance region to perform gray scale control. In the embodiment of the present invention, the adjustment of the driving current by the first transistor T1 is "fine adjustment", which is based on the "coarse adjustment" of the loop resistance of the light emitting unit 40.
Illustratively, referring to fig. 3, the gate of the third transistor T3 is directly electrically connected to the gate of the fourth transistor T4. The channel width-to-length ratio of the third transistor T3 is different from that of the fourth transistor T4.
Alternatively, referring to fig. 1-3, transistor 10 comprises an insulated gate field effect transistor. The grid electrode, the source electrode and the drain electrode of the insulated gate type field effect transistor are isolated by adopting an insulating layer.
Illustratively, the transistor 10 includes an insulated gate field effect transistor including a thin film transistor, which is an insulated gate field effect transistor formed using a thin film deposition, etching, or the like process. By adopting processes such as film deposition, etching and the like, on one hand, a glass substrate with high flatness and good thermal conductivity can be used as a substrate, so that the manufacturing yield and heat dissipation performance of the transistor 10 can be improved conveniently; on the other hand, the method can be applied to an integrated circuit, and the integration of a pixel driving circuit is improved; on the other hand, the impedance of the thin film transistor is in the kiloohm level, and even if the thin film transistor is broken down, the internal resistance of the thin film transistor is kept unchanged, and the thin film transistor is equivalent to a large resistor connected in series in a circuit, so that no additional resistor is required.
Fig. 4 is a schematic diagram of another pixel driving circuit according to an embodiment of the invention, and referring to fig. 4, the transistor 10 includes a junction field effect transistor. The pixel driving circuit further comprises a resistor R, wherein the first end of the resistor R is electrically connected with the second electrode of the junction field effect transistor, and the second end of the resistor R is connected with a fixed potential. The second pole of the transistor 10 is connected to a fixed potential through a resistor R. The impedance of the junction field effect transistor is milliohm, the current is hundreds of milliamperes, the current is relatively large, the current passing through the transistor 10 is limited, and the resistor R for current limiting is increased.
Illustratively, referring to fig. 4, the resistor R includes a first resistor R1 and a second resistor R2. The first end of the first resistor R1 is electrically connected to the second pole of the first transistor T1, and the second end of the first resistor R1 is connected to a fixed potential. The first end of the second resistor R2 is electrically connected to the second pole of the second transistor T2, and the second end of the second resistor R2 is connected to a fixed potential.
In other embodiments, transistor 10 may also include a transistor. Unlike field effect transistors, transistor transistors are bipolar transistors in which two carriers with charges of different polarity participate in conduction.
Referring to fig. 1-4, for example, the voltage drop unit 20 includes a diode. The diode has unidirectional conductivity. Ideally, the forward voltage drop when the diode is on is constant.
Fig. 5 is a schematic diagram of another pixel driving circuit according to an embodiment of the invention, and referring to fig. 5, the voltage drop unit 20 includes a voltage regulator. When the voltage-stabilizing tube breaks down in the reverse direction, the terminal voltage is almost unchanged in a certain current range, and the stability is shown.
Fig. 6 is a schematic diagram of another pixel driving circuit according to an embodiment of the invention, and referring to fig. 6, the voltage drop unit 20 includes additional transistors. Wherein the gate of the additional transistor is electrically connected to the first pole of the additional transistor or the second pole of the additional transistor. After the gate of the additional transistor is electrically connected to the first pole of the additional transistor or the second pole of the additional transistor, the I-V characteristic of the additional transistor is similar to the I-V characteristic of the diode. The additional transistor is configured as an active resistor.
Illustratively, referring to fig. 6, the transistor 10 and the additional transistor are both thin film transistors. This has the advantage that the additional transistor can be formed simultaneously with the transistor 10 in the same process, without requiring a new process to specially form the additional transistor, thereby saving the process.
Fig. 7 is a schematic diagram of another pixel driving circuit according to an embodiment of the invention, and referring to fig. 7, the pixel driving circuit further includes a storage capacitor Cst and a reset transistor T5. The first electrode of the storage capacitor Cst is directly electrically connected to the gray-scale data terminal 30, and the second electrode of the storage capacitor Cst is connected to a fixed potential. The storage capacitor Cst is used for storing a gray voltage signal of the gray data terminal 30. The gate of the reset transistor T5 is directly electrically connected to the reset signal terminal 50, the first pole of the reset transistor T5 is directly electrically connected to the first pole plate of the storage capacitor Cst, and the second pole of the reset transistor T5 is connected to a fixed potential. When the reset transistor T5 is turned on, the first electrode of the storage capacitor Cst is connected to a fixed potential, and since the second electrode of the storage capacitor Cst is connected to the fixed potential, the charge stored in the storage capacitor Cst is released, thereby completing the reset of the storage capacitor Cst. In the embodiment of the present invention, the storage capacitor Cst and the reset transistor T5 are provided, so that after the pixel driving circuit of the current row is scanned, the pixel driving circuit of the current row can be driven by the gray scale voltage signal stored in the storage capacitor Cst, and the light emitting unit 40 is maintained to emit light continuously in a period of time of a plurality of scanning rows.
Fig. 8 is a schematic diagram of another pixel driving circuit according to an embodiment of the invention, and referring to fig. 8, the pixel driving circuit further includes an auxiliary voltage drop unit 60. The auxiliary voltage drop unit 60 is connected between the gray-scale data terminal 30 and the gates of all the transistors 10. That is, the auxiliary voltage drop unit 60 is provided before the gates of all the transistors 10.
Illustratively, referring to fig. 8, a first terminal of the auxiliary voltage drop unit 60 is directly electrically connected to the gray-scale data terminal 30, and a second terminal of the auxiliary voltage drop unit 60 is directly electrically connected to the gate of the first transistor T1. The voltage of the first terminal of the auxiliary voltage drop unit 60 is greater than the voltage of the second terminal of the auxiliary voltage drop unit 60. In the initial start-up phase, the gray-scale voltage signal output from the gray-scale data terminal 30 is weak and has poor stability. The auxiliary voltage drop unit 60 is provided, and only the voltage exceeding the voltage at the two ends of the auxiliary voltage drop unit 60 by a certain value can conduct the first transistor T1, but the voltage not exceeding the voltage at the two ends of the auxiliary voltage drop unit 60 by a certain value cannot conduct the first transistor T1, so that an unstable voltage signal in the initial starting stage is shielded, and the light emitting stability of the light emitting unit 40 is improved.
Illustratively, referring to fig. 8, the auxiliary voltage drop unit 60 includes a fourth voltage drop unit D4, the fourth voltage drop unit D4 being of the same type as the voltage drop unit 20, the fourth voltage drop unit D4 including a diode, a regulator, or an additional transistor.
1-8, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, and the reset transistor T5 are all N-type transistors. In other embodiments, at least one of the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, and the reset transistor T5 is a P-type transistor.
Fig. 9 is a schematic top view of a light emitting module according to an embodiment of the present invention, and referring to fig. 1 to 9, the light emitting module includes a substrate 110, a plurality of light emitting units 40 (not shown in fig. 9), and a plurality of pixel driving circuits 120. Wherein the plurality of light emitting units 40 are located at one side of the substrate 110. The pixel driving circuit 120 is located at the same side of the substrate 110 as the light emitting unit 40. The pixel driving circuit 120 is electrically connected to a first terminal of the light emitting unit 40, and a second terminal of the light emitting unit 40 is electrically connected to the power signal terminal PVDD. The pixel driving circuit 120 drives the light emitting unit 40 to emit light. The light emitting module in the embodiment of the present invention includes the pixel driving circuit 120 in the above embodiment, so that the above pixel driving circuit 120 has the advantages of solving the problem of difficulty in gray scale control and improving the light emitting efficiency of the light emitting unit 40.
Fig. 10 is a schematic cross-sectional structure of a light emitting module according to an embodiment of the present invention, referring to fig. 1 to 10, a plurality of pixel driving circuits 120 are arranged in an array along a first direction and a second direction, and the first direction intersects the second direction. The plurality of gray scale signal lines 130 extend along the first direction and are arranged along the second direction, the gray scale signal lines 130 are directly electrically connected to the gray scale data terminals 30, and the gray scale signal lines 130 provide gray scale voltage signals for the gray scale data terminals 30. The plurality of reset signal lines 140 extend along the second direction and are arranged along the first direction, the reset signal lines 140 are directly electrically connected to the reset signal terminals 50, and the reset signal lines 140 provide reset voltage signals to the reset signal terminals 50. The vertical projection of the pixel driving circuit 120 on the substrate 110 is located within the vertical projection of the power signal layer 150 on the substrate 110. The power signal layer 150 is directly electrically connected to the power signal terminal PVDD, and the power signal layer 150 provides a power voltage signal to the power signal terminal PVDD. In the embodiment of the present invention, the power signal layer 150 is a whole film layer, and the plurality of pixel driving circuits 120 are commonly connected to the same power signal layer 150, so that the connection difficulty between the pixel driving circuits 120 and the power signal layer 150 is reduced.
Illustratively, referring to fig. 10, the power signal layer 150 is located between the substrate 110 and the pixel driving circuit 120. In other embodiments, the power signal layer 150 may also be a side of the pixel driving circuit 120 away from the substrate 110, or the power signal layer 150 may also be located between two film layers of the pixel driving circuit 120.
Illustratively, referring to fig. 10, the pixel driving circuit 120 includes a transistor 10, the transistor 10 including a gate electrode 103, a semiconductor layer 102, a source electrode 101, and a drain electrode 104. The drain electrode 104 is electrically connected to a first end of the light emitting unit 40. Drain 104 is the first pole of transistor 10 and source 101 is the second pole of transistor 10. In other embodiments, the source 101 may be electrically connected to the first terminal of the light emitting unit 40. The source 101 is the first pole of the transistor 10 and the drain 104 is the second pole of the transistor 10.
The embodiment of the invention provides a backlight source, which comprises the light-emitting module in the embodiment. So that the backlight can achieve brightness adjustment, as well as local dimming. Local dimming refers to the brightness of each area of the backlight being individually adjustable.
Exemplary, the embodiment of the invention provides a display panel, which is a liquid crystal display panel, and the liquid crystal display panel comprises a backlight source and a liquid crystal box, wherein the backlight source provides backlight for the liquid crystal box, so that image display is realized.
An embodiment of the invention provides a display panel, which includes the light emitting module in the above embodiment. The display panel in the embodiment of the invention is a light-emitting diode display panel, the light-emitting pixels in the light-emitting diode display panel are light-emitting diodes, and the image display is realized by controlling the light-emitting brightness of the light-emitting diodes.
The embodiment of the invention also provides a display device. Fig. 11 is a schematic diagram of a display device according to an embodiment of the present invention, and referring to fig. 11, the display device includes any one of the backlight sources or any one of the display panels according to the embodiment of the present invention. The display device can be a mobile phone, a tablet personal computer, a notebook computer, a vehicle-mounted display module, a display, intelligent wearable equipment and the like.
The embodiment of the invention also provides a driving method of a pixel driving circuit, fig. 12 is a driving timing diagram of the pixel driving circuit provided by the embodiment of the invention, and referring to fig. 7 and fig. 12, the driving method of the pixel driving circuit includes: in the light emitting stage, corresponding gray-scale data is determined according to the image, and then a gray-scale voltage signal is provided to the gray-scale data terminal 30 to control at least one transistor 10 in the pixel driving circuit to be turned on, so as to drive the light emitting unit 40 to emit light. Wherein, there is a difference between the voltage of the gate of the at least one transistor 10 and the voltage drop across the voltage drop unit 20. In the embodiment of the present invention, in the light emitting stage, the on-state number of the transistors 10 is controlled by controlling the gray-scale voltage signal provided by the gray-scale data terminal 30, so as to control the on-state internal resistance of the transistors 10 (the on-state internal resistance of the single transistor 10, or the parallel resistances of the plurality of transistors 10), and the driving current of the light emitting unit 40 is controlled, so as to control the light emitting brightness of the light emitting unit 40, thereby realizing gray-scale control. In contrast, the voltage value of the gray-scale voltage signal corresponding to the gray-scale can be determined according to the desired gray-scale.
Optionally, referring to fig. 7 and 12, the driving method of the pixel driving circuit further includes: in the reset phase, a reset voltage signal is provided to the reset signal terminal 50 to control the reset transistor T5 to be turned on and reset the storage capacitor Cst.
For example, referring to fig. 7 and 12, in the reset phase, the reset transistor T5 is turned on, the gate of the first transistor T1 is connected to a fixed potential, and the first transistor T1 is turned off. The first, second and third pressure drop units D1, D2 and D3 are all turned off. The second transistor T2, the third transistor T3, and the fourth transistor T4 are all turned off. The light emitting unit 40 does not emit light. In the light emitting stage, the reset transistor T5 is turned off, the first transistor T1 is turned on, and the light emitting unit 40 emits light.
From the standpoint of providing different gray scale voltage signals, as the voltage value of the gray scale voltage signal provided by the gray scale data terminal 30 becomes larger, the second transistor T2 is also turned on, the parallel resistance of the first transistor T1 and the second transistor T2 is smaller than the internal resistance of the first transistor T1, and the light emitting luminance of the light emitting unit 40 increases. As the voltage value of the gray-scale voltage signal provided by the gray-scale data terminal 30 continues to be larger, the third transistor T3 is turned on, and the parallel resistances of the first transistor T1, the second transistor T2 and the third transistor T3 are smaller than the parallel resistances of the first transistor T1 and the second transistor T2, so that the light emitting brightness of the light emitting unit 40 is increased. As the voltage value of the gray-scale voltage signal provided by the gray-scale data terminal 30 continues to be larger, the fourth transistor T4 is turned on, and the parallel resistances of the first transistor T1, the second transistor T2, the third transistor T3 and the fourth transistor T4 are smaller than the parallel resistances of the first transistor T1, the second transistor T2 and the third transistor T3, so that the light emitting brightness of the light emitting unit 40 increases.
Illustratively, referring to fig. 12, the reset phase is located before the light-emitting phase, and thus, the storage capacitor Cst is reset before the gray voltage signal is written, so as to eliminate the influence of the gray voltage signal written in the previous frame.
Note that the above is only a preferred embodiment of the present invention and the technical principle applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, and that various obvious changes, rearrangements, combinations, and substitutions can be made by those skilled in the art without departing from the scope of the invention. Therefore, while the invention has been described in connection with the above embodiments, the invention is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the invention, which is set forth in the following claims.
Claims (16)
1. A pixel driving circuit comprising a plurality of transistors and at least one voltage drop unit;
the grid electrode of the transistor is electrically connected with the gray-scale data end, the first electrode of the transistor is electrically connected with the first end of the light-emitting unit, and the second electrode of the transistor is connected with a fixed potential;
the voltage drop unit is connected between the grid electrodes of the two transistors, the first end of the voltage drop unit is electrically connected with the gray scale data end, and the voltage of the second end of the voltage drop unit is smaller than that of the first end of the voltage drop unit;
the plurality of transistors includes a first transistor, a second transistor, a third transistor, and a fourth transistor; the pressure drop unit comprises a first pressure drop unit, a second pressure drop unit and a third pressure drop unit; the first voltage drop unit is connected between the grid electrode of the first transistor and the grid electrode of the second transistor and between the gray scale data end and the grid electrode of the second transistor; the second voltage drop unit is connected between the grid electrode of the second transistor and the grid electrode of the third transistor, and is connected between the gray scale data end and the grid electrode of the third transistor; the third voltage drop unit is connected between the grid electrode of the third transistor and the grid electrode of the fourth transistor and is connected between the gray scale data end and the grid electrode of the fourth transistor;
alternatively, the number of the plurality of transistors is at least three, and the gates of at least two of the transistors are directly electrically connected.
2. The pixel driving circuit according to claim 1, wherein there are at least two of the transistors having the same channel width to length ratio.
3. The pixel driving circuit according to claim 1, wherein there are at least two of the transistors having different channel width to length ratios;
the smaller the connection resistance between the grid electrode of the transistor and the gray scale data end is, the smaller the channel width-to-length ratio of the transistor is.
4. A pixel driving circuit according to claim 3, wherein the second transistor has a channel width to length ratio of twice that of the first transistor.
5. A pixel driving circuit according to claim 1, wherein at least two of said transistors having gates directly electrically connected are different in channel width to length ratio.
6. The pixel driving circuit according to claim 1, wherein the transistor comprises an insulated gate field effect transistor; or,
the transistor comprises a junction field effect transistor, the pixel driving circuit further comprises a resistor, a first end of the resistor is electrically connected with a second pole of the junction field effect transistor, and a second end of the resistor is connected with a fixed potential.
7. The pixel driving circuit according to claim 1, wherein the voltage drop unit includes a diode, a regulator, or an additional transistor;
wherein the gate of the additional transistor is electrically connected to the first pole of the additional transistor or the second pole of the additional transistor.
8. The pixel driving circuit according to claim 1, further comprising a storage capacitor and a reset transistor;
the first polar plate of the storage capacitor is directly and electrically connected with the gray-scale data end, and the second polar plate of the storage capacitor is connected with a fixed potential;
the grid electrode of the reset transistor is directly and electrically connected with the reset signal end, the first electrode of the reset transistor is directly and electrically connected with the first electrode plate of the storage capacitor, and the second electrode of the reset transistor is connected with a fixed potential.
9. The pixel driving circuit according to claim 1, further comprising an auxiliary voltage drop unit; the auxiliary voltage drop unit is connected between the gray scale data end and the grid electrodes of all the transistors.
10. A light emitting module, comprising:
a substrate;
a plurality of light emitting units located at one side of the substrate;
a plurality of pixel driving circuits according to any one of claims 1 to 9, said pixel driving circuits being electrically connected to a first terminal of said light emitting unit, a second terminal of said light emitting unit being electrically connected to a power signal terminal.
11. The light emitting module of claim 10, wherein a plurality of the pixel driving circuits are arranged in an array along a first direction and a second direction, the first direction intersecting the second direction;
a plurality of gray scale signal lines extending along the first direction and arranged along the second direction, and directly electrically connected with the gray scale data terminals;
a plurality of reset signal lines extending along the second direction and arranged along the first direction, and directly electrically connected with the reset signal terminals;
and the vertical projection of the pixel driving circuit on the substrate is positioned in the vertical projection of the power signal layer on the substrate, and the power signal layer is directly and electrically connected with the power signal end.
12. A backlight comprising the light emitting module of claim 10 or 11.
13. A display panel comprising the light emitting module according to claim 10 or 11.
14. A display device comprising the backlight of claim 12 or the display panel of claim 13.
15. A driving method based on the pixel driving circuit according to claim 1, comprising:
in a light-emitting stage, corresponding gray-scale data are determined according to the image, gray-scale voltage signals are provided for a gray-scale data end, at least one transistor in the pixel driving circuit is controlled to be conducted, and the light-emitting unit is driven to emit light;
wherein there is a voltage of the gate of at least one of the transistors being a difference between the voltage of the gray scale voltage signal and a voltage drop across the voltage drop unit.
16. The driving method according to claim 15, wherein the pixel driving circuit further comprises a storage capacitor and a reset transistor; the first polar plate of the storage capacitor is directly and electrically connected with the gray-scale data end, and the second polar plate of the storage capacitor is connected with a fixed potential; the grid electrode of the reset transistor is directly and electrically connected with the reset signal end, the first electrode of the reset transistor is directly and electrically connected with the first polar plate of the storage capacitor, and the second electrode of the reset transistor is connected with a fixed potential;
the driving method further includes:
in the resetting stage, a resetting voltage signal is provided for a resetting signal end, the resetting transistor is controlled to be conducted, and the storage capacitor is reset.
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