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CN110232251B - Noise simulation analysis method suitable for time sequence switch circuit - Google Patents

Noise simulation analysis method suitable for time sequence switch circuit Download PDF

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CN110232251B
CN110232251B CN201910528445.XA CN201910528445A CN110232251B CN 110232251 B CN110232251 B CN 110232251B CN 201910528445 A CN201910528445 A CN 201910528445A CN 110232251 B CN110232251 B CN 110232251B
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noise
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switch circuit
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李倩敏
郭仲杰
李婷
李海松
吴龙胜
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Xian Microelectronics Technology Institute
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Abstract

The invention discloses a noise simulation analysis method suitable for a time sequence switch circuit, which comprises the following steps: 1) performing transient simulation on the time sequence switch circuit, inputting a fixed frequency signal, and outputting a simulation result by the output end of the circuit; 2) sampling the simulation result at sampling intervals of Tsample to obtain a discrete sampling sequence; 3) carrying out frequency domain transformation on the discrete sampling sequence to obtain frequency spectrum information of the discrete sampling sequence; 4) calculating circuit noise according to the frequency spectrum information; wherein Tsample is the working period of the time sequence switch circuit, Tsig/Tsample >2, and Tsig is the period of the fixed frequency signal; the amplitude of the fixed-frequency signal is within the large-signal input swing range of the time sequence switch circuit; the incomplete noise sampling caused by the fixed working state of the circuit large signal in the alternating current simulation is avoided.

Description

Noise simulation analysis method suitable for time sequence switch circuit
Technical Field
The invention belongs to the field of electronic design automation, and particularly relates to a noise simulation analysis method suitable for a time sequence switch circuit.
Background
For random noise, the average power of the noise is usually used to measure the noise, and is defined as follows:
Figure BDA0002098956490000011
meaning that the noise power is averaged over a sufficiently long time. The signal-to-noise ratio is equal to the signal power/noise power, i.e.:
Figure BDA0002098956490000012
the noise figure is equal to the input/output signal-to-noise ratio, i.e.:
Figure BDA0002098956490000013
or NF 10logf (db), for a noiseless system it is clear that F1. The noise figure reflects the degree of degradation of the system to the signal-to-noise ratio.
Noise in integrated circuits is largely divided into thermal noise, 1/f noise, and shot noise. Wherein, the thermal noise is defined as the fluctuation of the thermal movement of electrons at two ends of a conductor, and is equivalent to a current source which is bridged at two ends of an MOS source drain, and the noise power spectral density is
Figure BDA0002098956490000014
Or equivalently, a voltage source applied to the grid, and the power spectral density is described as
Figure BDA0002098956490000015
The 1/f noise mainly comes from the defects of the contact surface of a gate oxide layer and a silicon substrate of an MOS (metal oxide semiconductor) transistor and other reasons, the power spectral density of the 1/f noise is inversely proportional to the frequency and can be equivalent to a voltage source connected in series at a gate end, and the power spectral density is as follows:
Figure BDA0002098956490000016
(K is a process-related parameter, f represents a frequency value); shot noise is caused by the fact that the number and speed of carriers passing through a PN junction are irregularly changed due to the discrete quantum property of electrons passing through a potential barrier, so that a junction current comprises a large number of discrete events, and the power spectral density is as follows:
Figure BDA0002098956490000017
(ID is the current through the PN junction).
In the existing CMOS circuit simulation, an alternating current simulation method is usually adopted to scan the operating states of the circuit at different frequencies, thereby collecting the noise spectrum of the whole frequency domain; this method is applicable to a common CMOS circuit, however, for the time-varying circuit in fig. 1, different modules work through the switch control circuit at different times (as shown in fig. 2 timing sequence) in actual work, and during ac simulation, the large signal working state of the circuit is fixed, and noise information in different working states cannot be collected at the same time.
Disclosure of Invention
The present invention is directed to overcome the above-mentioned shortcomings in the prior art, and to provide a noise simulation analysis method suitable for a sequential switching circuit.
In order to achieve the purpose, the invention adopts the following technical scheme to realize the purpose:
a noise simulation analysis method suitable for a time sequence switch circuit comprises the following steps:
1) performing transient simulation on the time sequence switch circuit, inputting a fixed frequency signal, and outputting a simulation result by the output end of the circuit;
2) sampling the simulation result at sampling intervals of Tsample to obtain a discrete sampling sequence;
3) carrying out frequency domain transformation on the discrete sampling sequence to obtain frequency spectrum information of the discrete sampling sequence;
4) calculating circuit noise according to the frequency spectrum information;
tsample is the working period of the timing switch circuit, Tsig/Tsample is greater than 2 according to the Nyquist sampling law, and Tsig is the period of the fixed-frequency signal; the amplitude of the fixed frequency signal is within the range of large signal input swing amplitude of the time sequence switch circuit.
Further, the simulation result in step 1) is a periodic signal containing circuit noise.
Further, in step 3), a fast fourier transform is used to perform frequency domain transform on the discrete sample sequence.
Further, in step 4), the specific method for calculating noise according to the spectrum information is as follows:
401) calculating the total power by using the frequency spectrum;
402) calculating signal power, direct current power and harmonic power, and subtracting the three powers from the total power to calculate noise power;
403) and (4) squaring the noise power and calculating the noise amplitude.
Compared with the prior art, the invention has the following beneficial effects:
the invention provides a noise simulation analysis method suitable for a time sequence switch circuit, which can highly simulate the actual working state of the time sequence circuit by carrying out noise analysis through transient simulation and digital signal processing technology, avoid time-varying circuit noise loss caused by alternating current simulation, completely extract noise introduced by switching action in a time sequence and avoid incomplete noise sampling caused by the fixed working state of a circuit large signal in the alternating current simulation; the noise simulation analysis method applicable to the time sequence switch circuit can accurately obtain the noise value of the time sequence switch circuit, simulate the actual working state in simulation and solve the problem that the working state of the time sequence switch circuit cannot be reproduced by frequency domain simulation; the accurate simulation of the noise value ensures that the actual circuit reaches the design index after the tape-out, thereby reducing the risk of redesign and tape-out caused by inaccurate simulation of the noise value.
Drawings
FIG. 1 is a schematic diagram of a time varying circuit;
FIG. 2 is a schematic diagram of a time varying circuit switch timing sequence;
FIG. 3 is a flow chart of a noise simulation analysis method for a sequential switching circuit according to the present invention;
fig. 4 is a standard sinusoidal signal with noise.
Detailed Description
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in other sequences than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
The invention is described in further detail below with reference to the accompanying drawings:
since the noise of the time-varying circuit is difficult to measure in the frequency domain, it is considered to sample a time-domain signal of a certain length and analyze the signal and the noise in the time domain, and it should be noted that this method is only applicable to a circuit in which only the amplitude of the input and output signals varies under ideal conditions and there is no spectrum variation. The circuit inputs an ideal fixed frequency signal, such as a standard sinusoidal signal, carries out transient simulation, samples an output signal, ideally, the sampling point is a periodic discrete signal, practically, the sampling point is the synthesis of the periodic discrete signal and circuit noise, and a noise value can be obtained according to the information of the periodic input signal.
Referring to fig. 3, fig. 3 is a flow chart of a noise simulation analysis method suitable for a sequential switch circuit according to the present invention.
Step 1), performing transient simulation on a circuit, wherein an ideal fixed-frequency signal needs to be input because the analysis on noise is based on the signal-to-noise ratio of the noise and the ideal signal, and a sinusoidal signal is selected in this embodiment, wherein the sinusoidal signal is asin (wx) + B, the amplitude of the sinusoidal signal is (-a + B, a + B), and the normal operation of the circuit needs to be ensured, so that the (-a + B, a + B) should be selected within the large-signal input swing range of the circuit, wherein a is the amplitude of the sinusoidal signal; b is the translation amount on the y axis of the sinusoidal signal; w is the angular frequency of the sinusoidal signal;
for the selection of the period of the sine signal, the number of sampling points needs to be 2 due to the fft transformation requirement K In the invention, Tsig/Tsample is taken as M/N, wherein Tsig is the period of a standard sinusoidal signal, and Tsample is the working period of a switching circuitIn each working period, the invention takes one sampling point. Based on the above considerations, the period of the sinusoidal signal is chosen to be Tsig/Tsample 2 K N, where N is a prime number in order to ensure that as many samples as possible are taken at different phases in a sinusoidal signal cycle.
The design method is based on the Cadence ADE simulation, in the ADE simulation, the tran simulation is selected, the simulation duration is set, in the tran simulation of the ADE, a noise adding switch is required to be opened, the frequency domain range of the added noise is selected, and N x 2 is carried out K Simulation of Tsample duration can obtain a sinusoidal signal containing circuit noise at the output end of the circuit, and FIG. 4 is a schematic diagram.
Step 2), after the simulation is finished, the output signal is sampled at the output end of the circuit, the sampling interval is Tsample, the actual working period of the time sequence switch circuit is determined, and the length is 2 K Of (3) is performed.
Step 3) after obtaining a discrete sequence, the invention carries out fft transformation, namely a DFT fast algorithm, wherein the DFT algorithm is defined as follows:
Figure BDA0002098956490000051
wherein X (k) is a signal frequency domain value, x (n) is a time domain sample point,
Figure BDA0002098956490000052
(e is a natural logarithm, j is an imaginary axis in a plane coordinate), N is a sequence index of time domain sampling points, k is an index of a frequency domain value, and N is the number of sampling points to be converted.
Therefore, a frequency spectrum X, hereinafter referred to as specP, is obtained, because the sampling of the sinusoidal signal is a complete cycle, the fft algorithm is not windowed any more, the frequency spectrum in the invention is the original frequency spectrum of the signal, no amplitude loss occurs, and therefore, no amplitude recovery is needed.
Step 4), after the frequency spectrum of the standard sinusoidal signal containing the noise signal is obtained, an algorithm is provided to calculate the signal-to-noise ratio of the standard sinusoidal signal;
step 401) performs a power calculation for the complete spectrum, i.e.
Figure BDA0002098956490000061
Wherein P is the total power; specP is the spectrum obtained in the step 3); abs is an absolute value calculation.
Step 402) P is total power, including signal power, noise power, direct current power and harmonic power, therefore the invention subtracts the signal power, the direct current power and the harmonic power from P to obtain the noise power;
wherein, the signal power is:
Figure BDA0002098956490000062
according to the fft algorithm, the first point specP (1) of the frequency spectrum is direct current power, and when the harmonic power is calculated, because the sampling is an integral multiple period standard sine wave, the harmonic component is small, and the harmonic within 5 times is selected for calculation. In the invention, the noise power is calculated by the noise power which is total power, signal power, harmonic power and direct current power.
Step 402), the noise power is defined as the total power average value of the noise in the whole period, and in the CMOS integrated circuit, the magnitude of the general noise means the amplitude, so the noise power needs to be squared to obtain the required noise amplitude.
Examples
For the sequential switching circuit shown in fig. 1, one cycle is input as Tsig — Tsample 2 K Sinusoidal signal of/N, go on 2 K Transient simulation of Tsample duration can obtain sinusoidal signals containing circuit noise at the output end of the circuit as shown in FIG. 4;
sampling the simulation result obtained in the figure 4 at intervals of Tsample to obtain 2 K A discrete value;
fft conversion is carried out on the obtained discrete value to obtain frequency spectrum information SpecP;
performing frequency domain calculation on the spectrum information SpecP to obtain signal power, noise power, direct current power and harmonic power;
calculating the noise power which is total power, signal power, harmonic power and direct current power;
averaging the noise power in a frequency domain to obtain a noise amplitude value;
the noise simulation analysis method suitable for the time sequence switch circuit can accurately obtain the noise value of the time sequence switch circuit, simulate the actual working state in simulation and solve the problem that the working state of the time sequence switch circuit cannot be reproduced by frequency domain simulation.
The above-mentioned contents are only for illustrating the technical idea of the present invention, and the protection scope of the present invention is not limited thereby, and any modification made on the basis of the technical idea of the present invention falls within the protection scope of the claims of the present invention.

Claims (4)

1. A noise simulation analysis method suitable for a time sequence switch circuit is characterized by comprising the following steps:
1) performing transient simulation on the time sequence switch circuit, inputting a fixed frequency signal, and outputting a simulation result by the output end of the circuit;
2) sampling the simulation result at sampling interval Tsample to obtain a discrete sampling sequence;
3) carrying out frequency domain transformation on the discrete sampling sequence to obtain frequency spectrum information of the discrete sampling sequence;
4) calculating circuit noise according to the frequency spectrum information;
wherein Tsample is the working period of the time sequence switch circuit, Tsig/Tsample >2 and Tsig is the period of the fixed frequency signal according to the Nyquist sampling law; the amplitude of the fixed frequency signal is within the range of large signal input swing amplitude of the time sequence switch circuit.
2. The method according to claim 1, wherein the simulation result in step 1) is a periodic signal containing circuit noise.
3. The method for noise simulation analysis of a sequential switching circuit according to claim 1, wherein the discrete sampling sequence in step 3) is frequency-domain transformed by fast fourier transform.
4. The noise simulation analysis method suitable for the time sequence switch circuit according to claim 1, wherein in the step 4), the specific method for calculating the noise according to the spectrum information is:
401) calculating the total power by using the frequency spectrum;
402) calculating signal power, direct current power and harmonic power, and subtracting the three powers from the total power to calculate noise power;
403) and (4) squaring the noise power and calculating the noise amplitude.
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CN109033534A (en) * 2018-06-29 2018-12-18 西安电子科技大学 Follower timing jitter estimation method based on pseudo- open-drain termination

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