CN110048681B - Current injection type E-type power amplifier - Google Patents
Current injection type E-type power amplifier Download PDFInfo
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- CN110048681B CN110048681B CN201910348370.7A CN201910348370A CN110048681B CN 110048681 B CN110048681 B CN 110048681B CN 201910348370 A CN201910348370 A CN 201910348370A CN 110048681 B CN110048681 B CN 110048681B
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- 238000002347 injection Methods 0.000 title claims abstract description 112
- 239000007924 injection Substances 0.000 title claims abstract description 112
- 238000007599 discharging Methods 0.000 claims abstract description 29
- 239000003990 capacitor Substances 0.000 claims description 34
- 238000006243 chemical reaction Methods 0.000 claims description 8
- 238000007493 shaping process Methods 0.000 claims description 8
- 230000000903 blocking effect Effects 0.000 claims description 6
- 238000010586 diagram Methods 0.000 description 7
- 238000000034 method Methods 0.000 description 6
- 230000015556 catabolic process Effects 0.000 description 5
- 230000003071 parasitic effect Effects 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000011160 research Methods 0.000 description 2
- 239000010753 BS 2869 Class E Substances 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
- H03F1/0211—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the supply voltage or current
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
- H03F1/301—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in MOSFET amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
- H03F3/193—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only with field-effect devices
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/217—Class D power amplifiers; Switching amplifiers
- H03F3/2176—Class E amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
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Abstract
The invention discloses a current injection type E-type power amplifier, which comprises: the power supply comprises a current source, a radio frequency choke coil, a switching circuit formed by two NMOS tubes which are in common source and common gate, an auxiliary current injection circuit, a passive matching circuit and a load resistor; the switching circuit controls the on and off of one NMOS tube according to the level of an input switching signal, simultaneously, the auxiliary injection current circuit injects the direct current input current and the output current generated by the power amplifier into the load resistor together according to the high level control of an injection control signal when the MOS tube is turned off, simultaneously, closes the discharging passage according to the low level control of a discharging control signal, stops injecting current according to the low level control of the injection control signal when the NMOS tube is turned on, and simultaneously opens the discharging passage according to the high level control signal. The power boosting of the invention adopts an external injection mode, does not break through the traditional E-type structure and working mode, and breaks through the theoretical output power limit value.
Description
Technical Field
The invention relates to a current injection type E-type power amplifier, and belongs to the technical field of radio frequency power amplifiers.
Background
Since Sokal et al proposed class E power amplifiers in 1975, much research has been done on it. As shown in fig. 1, the ideal class E power amplifier circuit is composed of an active device serving as a switch, a radio frequency choke coil, a charge-discharge capacitor connected in parallel with the switch, a resonant network and a load. For any load resistor R, under the ideal 100% drain efficiency, its output power is uniquely determined by the supply voltage, as shown in formula (1):
However, in practical situations, due to non-idealities and parasitics of the transistor switch and the low Q value of the on-chip passive device, the output efficiency is difficult to reach ideal 100%, and the output power after circuit optimization is lower than the theoretical calculation value, so the output power obtained by the formula 1 is a limit power value which can be output by the class E network.
As can be seen from the design formula of class E, in order to enhance the output power of the class E power amplifier, the output power can be raised by raising the power supply voltage, but in the deep submicron CMOS process, the transistor serving as the active switch is easily broken down by raising the power supply voltage, especially the drain output voltage of class E reaches the maximum of 3.562V cc; although the on-resistance loss can be reduced by increasing the aspect ratio of the transistor to approach the maximum output power, at radio frequency, the increase in transistor size can cause serious parasitic capacitance problems, wherein the gate parasitic capacitance can reduce the switching speed of the power amplifier switch, and the increased drain parasitic capacitance can also exceed the charge-discharge capacitance required under ideal operation, resulting in circuit operation deviating from the class E optimal operating state, and power and efficiency reduction; PETER HALDI et al, although adopting on-chip synthesis technology to increase output power and avoid transistor parasitics and high voltage reliability problems, mostly adopt passive structure on chip transformers, doubly increase chip area, increase design cost, and further increase unnecessary power loss due to low Q value of the CMOS process itself material.
In summary, the maximum output power of the class E power amplifier has a limit value, and the supply voltage needs to be increased to increase the output power. However, under nano CMOS processes, the supply voltage is limited, thereby limiting the maximum output power. Therefore, more researches are put on how to reduce the loss to approach the ideal class-E power amplifier under the premise of a given power supply. Although the loss is reduced, the maximum output power can only be approximated but cannot break through in theory, and meanwhile, the technology of increasing the width-to-length ratio of the power amplifier tube and the like can reduce the loss and simultaneously reduce the working speed of the power amplifier tube.
Disclosure of Invention
The invention aims to solve the technical problems of overcoming the defects of the prior art, providing a current injection type E power amplifier, solving the problem that the output power of the traditional E power amplifier is limited by the power supply voltage, and improving the output power by an auxiliary current directional injection technology on the premise of not improving the power supply voltage and changing the optimal load resistance.
The technical scheme adopted by the invention specifically solves the technical problems as follows:
A current injection type class E power amplifier comprising: the device comprises a current source, a radio frequency choke coil, a switching circuit formed by two NMOS tubes which are in common source and common gate, an auxiliary current injection circuit comprising a discharging path, a passive matching circuit and a load resistor; the direct current bias signal is connected to a current source, and the current source is connected to the switching circuit through the radio frequency choke coil; the switch circuit is connected with the auxiliary current injection circuit and the passive matching circuit after being connected with the input switch signal; the auxiliary current injection circuit is respectively connected with direct current input current, injection control signals and discharge control signals, and is connected to the output end of the power amplifier through the passive matching circuit, and the output end of the power amplifier is connected with the load resistor; the switching circuit controls the on and off of one NMOS tube according to the level of an input switching signal, simultaneously, the auxiliary injection current circuit injects direct current input current and output current generated by the power amplifier into the load resistor together according to the high level control of an injection control signal when the NMOS tube is turned off, simultaneously, the discharging passage is closed according to the low level control of a discharging control signal at the moment, and the current injection into the load resistor is stopped according to the low level control of the injection control signal when the NMOS tube is turned on, and simultaneously, the discharging passage is opened according to the high level control of the discharging control signal, wherein the input switching signal, the injection control signal and the discharging control signal are all from a group of differential signals, so that the control of the current injection period is realized.
Further, as a preferable technical scheme of the invention: the switching circuit comprises an NMOS tube M 1, an NMOS tube M 2 and a blocking capacitor C 1, wherein the grid electrode of the NMOS tube M 1 is connected with an input switching SIGNAL PA_SIGNAL through the blocking capacitor C 1, the grid electrode of the NMOS tube M 1 is simultaneously connected with a direct-current BIAS voltage PA_BIAS, the drain electrode of the NMOS tube M 1 is connected with the source electrode of the NMOS tube M 2 and the source electrode of the NMOS tube M 1 is grounded; the drain of the NMOS tube M 2 is connected to a current source through a radio frequency choke coil, and the gate of the NMOS tube M 2 is grounded after being connected to the current source.
Further, as a preferable technical scheme of the invention: the current source comprises a PMOS tube M 3, a filter resistor R 1 and a filter capacitor C 2, wherein the source electrode of the PMOS tube M 3 is connected with a power supply, the grid electrode of the PMOS tube M 3 is connected with a direct current bias signal CSIN, and the drain electrode of the PMOS tube M is respectively connected with one end of a radio frequency choke coil and one end of a filter resistor R 1; the other end of the filter resistor R 1 is connected to the grid of the NMOS tube M 2 and one end of the filter capacitor C 2 respectively, and the other end of the filter capacitor C 2 is grounded.
Further, as a preferable technical scheme of the invention: the auxiliary current injection circuit comprises a first-stage current mirror image formed by an NMOS tube M 31 and an NMOS tube M 32, a second-stage current mirror image formed by a PMOS tube M 33 and a PMOS tube M 34, a current injection and discharge tube formed by an NMOS tube M 35 and an NMOS tube M 36 and a first current limiting resistor R 2; the drain electrode and the grid electrode of the NMOS tube M 31 are connected with direct current input current after being short-circuited, the grid electrode of the NMOS tube M 31 is connected with the grid electrode of the NMOS tube M 32, and both source stages are grounded; the drain electrode of the PMOS tube M 33 is connected with the drain electrode of the NMOS tube M 32, the grid electrode and the drain electrode of the PMOS tube M 33 are connected with the grid electrode of the PMOS tube M 34 after being short-circuited, and the source electrode of the PMOS tube M 33 and the source electrode of the PMOS tube M 34 are both connected with the power supply VDD; the drain electrode of the PMOS tube M 34 is respectively connected with the drain electrode of the NMOS tube M 35 and the drain electrode of the NMOS tube M 36; the grid electrode of the NMOS tube M 35 is connected with an injection control signal, and the source electrode of the NMOS tube M 35 is connected with a switch circuit; the gate of the NMOS tube M 36 is connected with a drain control signal, the source thereof is connected with one end of a first current limiting resistor R 2, and the other end of the first current limiting resistor R 2 is grounded.
Further, as a preferable technical scheme of the invention: the high-low voltage switching and driving circuit is used for generating input switching signals, and the driving circuit is used for generating injection control signals and discharge control signals.
Further, as a preferable technical scheme of the invention: the high-low voltage conversion and driving circuit is formed by connecting a plurality of groups of inverters in series, wherein each group of inverters consists of a PMOS tube and an NMOS tube, the grid electrodes of the PMOS tube and the NMOS tube are connected with shaping signals after being short-circuited, the drain electrodes of the PMOS tube are connected with a power supply and the source electrode of the NMOS tube is grounded, and the drain electrodes of the PMOS tube and the NMOS tube are connected and serve as the connecting ends of the grid electrodes of the PMOS tube and the NMOS tube in the later group of inverters after being short-circuited; and connecting the drains of the PMOS tube and the NMOS tube in the last group of inverters to serve as the output end of the input switch signal.
Further, as a preferable technical scheme of the invention: the passive matching circuit comprises a capacitor C 3, an inductor L 1 and a capacitor C 4, wherein one end of the capacitor C 3 is connected with the auxiliary current injection circuit, and the other end of the capacitor C 3 is connected with one end of the inductor L 1; the other end of the inductor L 1 is connected to one end of the capacitor C 4 and the output end PAOUT of the power amplifier, and the other end of the capacitor C 4 is grounded.
By adopting the technical scheme, the invention can produce the following technical effects:
According to the current injection type E power amplifier, when the NMOS tube M 1 of the switch circuit is turned on, the injection current is turned off, so that the injection current cannot flow into the transistor, and extra power consumption is generated; when the NMOS tube M 1 is turned off, the injection current is started, and a current source consisting of a PMOS tube is added to a power supply branch circuit at the same time, so that the alternating current impedance is increased, and the direct current input current and the output current generated by the power amplifier flow into a load together in a directional way; the input switching signals, injection control signals and discharge control signals of the class E power amplifier are from the same group of differential signals, and output signal differential matching is completed through a driving circuit, so that an ideal injection switching effect is achieved.
The invention can improve the output power of the traditional E-type power amplifier to be limited by breakdown voltage, but can not improve the power supply voltage, and simultaneously, a current source is added in a passage between an injection node and a power supply, so that the injection current is ensured to flow into a load resistor in a directional manner, and the output power of the E-type power amplifier can be effectively improved without influencing the basic structure and the working mode of the E-type power amplifier.
Drawings
Fig. 1 is a schematic diagram of an ideal class E power amplifier in the prior art.
Fig. 2 is a schematic diagram of a current injection type class E power amplifier according to the present invention.
Fig. 3 is a circuit configuration diagram of a current injection type class E power amplifier according to the present invention.
Fig. 4 is a block diagram of an auxiliary current injection circuit according to the present invention.
Fig. 5 is a circuit configuration diagram of a high-low voltage conversion and driving circuit used for inputting a switching signal in the present invention.
Fig. 6 is a circuit configuration diagram of a driving circuit used for injecting a control signal in the present invention.
Fig. 7 is a circuit configuration diagram of a driving circuit used for the drain control signal in the present invention.
Detailed Description
Embodiments of the present invention will be described below with reference to the drawings.
As shown in fig. 2 and 3, the present invention designs a current injection type E power amplifier, which mainly includes: the device comprises a current source, a radio frequency choke coil RF-Choke, a switching circuit formed by two NMOS tubes which are in common source and common gate, an auxiliary current injection circuit comprising a discharging passage, a passive matching circuit and a load resistor; the direct current bias signal is connected to a current source, and the current source is connected to the switching circuit through the radio frequency choke coil; the switch circuit is connected with the auxiliary current injection circuit and the passive matching circuit after being connected with the input switch signal; the auxiliary current injection circuit is respectively connected with the direct current input current, the injection control signal and the release control signal, and is connected to the output end PAOUT of the power amplifier through the passive matching circuit, and the output end PAOUT is connected with an actual load resistor.
Specifically, as shown in fig. 3, the switching circuit includes an NMOS tube M 1, an NMOS tube M 2, and an input switching signal blocking capacitor C 1; the current source comprises a PMOS tube M 3, a filter resistor R 1 and a filter capacitor C 2; the gate of the NMOS transistor M 1 is connected to the input switch SIGNAL pa_signal through the blocking capacitor C 1, and the gate of the NMOS transistor M 1 is simultaneously connected to the dc BIAS voltage pa_bias, the drain of the NMOS transistor M 1 is connected to the source of the NMOS transistor M 2, and the source of the NMOS transistor M 1 is grounded; the drain electrode of the NMOS tube M 2 is connected to the drain electrode of the PMOS tube M 3 in the current source through a radio frequency choke coil RF-Choke; the source electrode of the PMOS tube M 3 is connected with the power supply Vcc, the grid electrode of the PMOS tube M 3 is connected with the direct-current bias signal CSIN, and the drain electrode of the PMOS tube M 3 is also connected to one end of the filter resistor R 1; the other end of the filter resistor R 1 is connected to the grid of the NMOS tube M 2 and one end of the filter capacitor C 2 respectively, and the other end of the filter capacitor C 2 is grounded. The drain output voltage of the PMOS transistor M 3 is filtered by the filter resistor R 1 and the filter capacitor C 2, and then the gate of the common-gate NMOS transistor M 2 is used as a voltage self-bias dc signal.
As shown in fig. 4, the circuit of the auxiliary current injection circuit mainly includes: a first-stage current mirror image formed by an NMOS tube M 31 and an NMOS tube M 32, a second-stage current mirror image formed by a PMOS tube M 33 and a PMOS tube M 34, a current injection and discharge tube formed by an NMOS tube M 35 and an NMOS tube M 36, and a first current limiting resistor R 2; the drain electrode and the grid electrode of the NMOS tube M 31 are connected with a direct current input current IBIAS after being short-circuited, the grid electrode of the NMOS tube M 31 is connected with the grid electrode of the NMOS tube M 32, and source stages of the NMOS tube M 31 and the grid electrode are grounded; the drain electrode of the PMOS tube M 33 is connected with the drain electrode of the NMOS tube M 32, the grid electrode and the drain electrode of the PMOS tube M 33 are connected with the grid electrode of the PMOS tube M 34 after being short-circuited, and the source electrode of the PMOS tube M 33 and the source electrode of the PMOS tube M 34 are both connected with the power supply VDD; the drain electrode of the PMOS tube M 34 is respectively connected with the drain electrode of the NMOS tube M 35 and the drain electrode of the NMOS tube M 36; the gate of the NMOS tube M 35 is connected with an injection control SIGNAL INJECT _SIGNAL, and the source thereof is connected with a switch circuit; the gate of the NMOS transistor M 36 is connected to the drain control SIGNAL DISCHARGR _signal, the source thereof is connected to one end of the first current limiting resistor R 2, and the other end of the first current limiting resistor R 2 is grounded. The injection control SIGNAL INJECT _signal controls the injection end opening and the injection end closing of the injection current, the bleeder control SIGNAL DISCHARGR _signal controls the closing and opening of the bleeder current end, and the input switch SIGNAL, the injection control SIGNAL and the bleeder control SIGNAL are all from a group of differential SIGNALs so as to realize accurate control of the injection period of the injection current.
The circuit of the passive matching circuit, as shown in fig. 3, mainly includes a capacitor C 3, an inductor L 1, and a capacitor C 4, where one end of the capacitor C 3 is connected to the source of the NMOS tube M 35 and the drain of the NMOS tube M 2 in the auxiliary current injection circuit, and the other end is connected to one end of the inductor L 1; the other end of the inductor L 1 is connected to one end of the capacitor C 4 and the output end PAOUT of the power amplifier, the output end PAOUT is connected to the actual load resistor, and the other end of the capacitor C 4 is grounded.
The power amplifier of the invention also comprises a high-low voltage conversion and driving circuit for generating an input switching signal and a driving circuit for generating an injection control signal and a discharge control signal. The high-low voltage conversion and driving circuit is formed by connecting a plurality of groups of inverters in series, and in the embodiment, a structure of seven groups of inverters in series is adopted, wherein each group of inverters consists of a PMOS tube and an NMOS tube, the grid electrodes of the PMOS tube and the NMOS tube are connected in short circuit and then connected with signals needing to be shaped, the drain electrodes of the PMOS tube are connected with the source electrodes of the PMOS tube and the NMOS tube and then grounded, and the drain electrodes of the PMOS tube and the NMOS tube are connected and serve as the connecting ends of the grid electrodes of the PMOS tube and the NMOS tube in the later group of inverters after short circuit; and connecting the drains of the PMOS tube and the NMOS tube in the last group of inverters to serve as the output end of the input switch signal.
As shown in fig. 5, the circuit structure of the high-low voltage converting and driving circuit used for inputting the switching signal in the present invention is formed by serially connecting seven groups of inverters, wherein M0, M01, M5, M7, M9, M11, M13 are PMOS transistors in each inverter, and M4, M41, M6, M8, M10, M12, M14 are NMOS transistors in each inverter. Specifically, the gate of the PMOS transistor M0 and the gate of the NMOS transistor M4 in the first group of inverters are connected to the shaping SIGNAL INJP after being shorted, the source of the PMOS transistor M0 is connected to the power supply OVDD, the source of the NMOS transistor M4 is grounded, the drains of the PMOS transistor M0 and the NMOS transistor M4 are connected and serve as connection ends to connect the gate of the PMOS transistor M01 and the gate of the NMOS transistor M41 in the next group of inverters, and so on, so that a structure in which 7 groups of inverters are connected in series can be obtained, and the drain of the PMOS transistor M13 and the drain of the NMOS transistor M14 in the last group of inverters are connected and serve as output ends of the input switching SIGNAL pa_signal. The high-low voltage conversion circuit formed by the first two-stage inverters in the seven-stage inverters and the drive shaping circuit formed by the last five-stage inverters have the PMOS tube size of 3 to 1 gradually decreasing, the NMOS tube size is 1 to 1 gradually same, and the five groups of drive shaping circuits gradually increase in size by 2 times. Five groups of inverters step by step shape the input signal, the shaped switching signal is close to the square wave signal of an ideal switch, and the driving effect is achieved through five-stage push-pull amplification and signal power enhancement.
As shown in fig. 6, the circuit structure of the driving circuit used for injecting the control signal in the present invention is composed of four groups of inverters connected in series, wherein M15, M17, M19, M21 are PMOS transistors in each inverter, and M16, M18, M20, M22 are NMOS transistors in each inverter. Specifically, the gate of the PMOS transistor M15 and the gate of the NMOS transistor M26 in the first group of inverters are connected to the shaping SIGNAL INJP after being shorted, the source of the PMOS transistor M15 is connected to the power supply VDD, the source of the NMOS transistor M16 is grounded, the drains of the PMOS transistor M15 and the NMOS transistor M16 are connected and serve as connection terminals to connect the gate of the PMOS transistor M17 and the gate of the NMOS transistor M18 in the next group of inverters, and so on, a structure in which 4 groups of inverters are connected in series can be obtained, and the drains of the PMOS transistor M21 and the NMOS transistor M22 in the last group of inverters are connected and serve as output terminals to output the injection control SIGNAL INJECT _signal. The step-by-step size of the driving shaping circuit formed by the four groups of inverters is increased by 2 times.
As shown in fig. 7, the circuit structure of the driving circuit used for the bleeder control signal in the present invention is composed of four groups of inverters connected in series, M23, M25, M27, M29 are PMOS transistors in each inverter, and M24, M26, M28, M30 are NMOS transistors in each inverter. The connection of the circuit is the same as that of a high-low voltage conversion driving circuit adopted by an injection control SIGNAL, and finally a release control SIGNAL DISCHARG _signal is output. The step-by-step size of the driving shaping circuit formed by the four groups of inverters is increased by 2 times.
The working principle of the invention is as follows: the switch circuit controls the on and off of one NMOS tube according to the level of an input switch signal, simultaneously the auxiliary injection current circuit injects direct current input current and output current generated by the power amplifier into the load resistor together according to the high level control of an injection control signal when the NMOS tube is turned off, simultaneously closes the discharging passage according to the low level control of a discharging control signal when the NMOS tube is turned on, and stops injecting current into the load resistor according to the low level control of the injection control signal when the NMOS tube is turned on, and simultaneously opens the discharging passage according to the high level control of the discharging control signal, wherein the input switch signal, the injection control signal and the discharging control signal are all from a group of differential signals so as to realize the control of the injection period of the injection current.
The input switch signal and the injection and discharge control signal of the NMOS tube M 1 are all related and come from the same group of differential input signals, wherein the input switch signal and the injection control signal of the NMOS tube M 1 are both from differential positive terminal signals, and the discharge control signal is from differential negative terminal signals, so as to achieve the purpose that the injection current precisely injects current into the load resistor in the turn-off period of the NMOS tube M 1, and simultaneously, when the NMOS tube M 1 is turned on, the injection current is turned off, and meanwhile, the discharge current path is turned on, so that the redundant current flows smoothly, and the switching instant high-voltage breakdown of the NMOS tube M 35 is prevented, and the specific control process is as follows:
(1) During the switching transistor off period: according to the E-type switch operating mode principle, as shown in fig. 3, when the NMOS transistor M 1 is turned off by the input switch SIGNAL, the charge stored in the RF choke coil RF-Choke charges the load resistor through the matching circuit, the auxiliary current injection circuit turns on the NMOS transistor M 35 according to the high level of the injection control SIGNAL INJECT _signal at this time, outputs the dc input current to the drain terminal of the NMOS transistor M 2, and simultaneously turns off the NMOS transistor M 36 by converting the discharge control SIGNAL DISCHARG _signal to the low level at this time, so that the current discharge path is closed. After the injection current enters the drain electrode of the NMOS tube M 2, the output current of the drain electrode of the class E is combined with the direct current input current and is injected into the load resistor through the matching circuit.
(2) During the on period of the switching transistor: when the input switch SIGNAL makes the NMOS transistor M 1 turned on, the auxiliary current injection circuit stops injecting the injection current into the drain of the NMOS transistor M 2 according to the low level of the injection control SIGNAL INJECT _signal at this time, and the injection is turned off, so that the injection current does not flow into the NMOS transistor M 2, and the class E power amplifier continues to maintain the conventional operating state. Meanwhile, the discharging control SIGNAL DISCHARG _signal is converted into a high level at the moment, a discharging passage is opened, and the NMOS M 36 in the discharging tube is conducted, so that current smoothly flows out, and the high voltage breakdown NMOS tube M 35 generated at the moment of current injection and cut-off is avoided. And, the auxiliary current injection circuit is added with a first current limiting resistor R 2 to further reduce the discharging current value, so that the drain voltages of the PMOS tubes M 34 and M 36 of the discharging path are far away from the breakdown voltage value.
(3) The current injection circuit control process: the NMOS transistors M 31 and M 32 maintain the first-stage mirror image of the dc input current IBIAS during the entire period in which the switching transistors are turned off and on, and the PMOS transistors M 33 and M 34 maintain the second-stage mirror image of the dc input current such that the dc input current is finally mirrored to the drain of the PMOS transistor M 34, and the drains of the injection control NMOS transistor M 35 and the purge control transistor M 36. The grid electrode of the current injection NMOS tube M 35 waits for a control signal which has the same frequency and opposite phase to the input switch signal of the power amplifier, the injection and cut-off of the injection NMOS tube M 35 are controlled by the high and low of the control signal level, meanwhile, the grid electrode of the current discharge NMOS tube M 36 waits for a control signal which has the same frequency and same phase as the input switch signal, and the on and off of the discharge NMOS tube M 36 are controlled by the high and low of the control signal level. The first current limiting resistor R2 reduces the discharging current when the discharging path is turned on, so that the drain voltages of the PMOS transistor M 34 and the NMOS transistor M 36 are in the reliable voltage range when the current is discharged.
Therefore, according to the working characteristics of the class E circuit, when the switch is turned off, the auxiliary current injection circuit and the class E self-conversion current are utilized to charge the load together, the switch is turned on to stop current injection, and the PMOS current source is added during injection, so that the injection current flows into the load in a directional manner. Finally, the invention improves the output power of the class E power amplifier on the premise of not improving the power supply voltage, reducing the optimal load impedance and changing the class E working mode.
In summary, the invention adopts the current directional injection technology to improve the output power on the premise of not increasing the power supply voltage and changing the E-type optimal load; injecting current in a half period of turn-off of the power amplifier switch, and adding a PMOS current source to enable the injected current to flow into a load in a directional manner; and stopping injection in a half period when the power amplifier switch is turned on, so that the transistor is ensured not to consume excessive energy. Therefore, on the premise of ensuring the E-type switch mode operation, the power is improved through an external injection mode. The condition that the output power is limited by the power supply voltage due to the fact that the breakdown voltage of the MOS tube in the CMOS process is too low can be avoided. The power is improved by adopting an external injection mode, the traditional E-type structure and the working mode are not broken, and the theoretical output power limit value is broken through.
The embodiments of the present invention have been described in detail with reference to the drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the spirit of the present invention.
Claims (4)
1. A current injection class E power amplifier comprising: the device comprises a current source, a radio frequency choke coil, a switching circuit formed by two NMOS tubes which are in common source and common gate, an auxiliary current injection circuit comprising a discharging path, a passive matching circuit and a load resistor; the direct current bias signal is connected to a current source, and the current source is connected to the switching circuit through the radio frequency choke coil; the switch circuit is connected with the auxiliary current injection circuit and the passive matching circuit after being connected with the input switch signal; the auxiliary current injection circuit is respectively connected with direct current input current, injection control signals and discharge control signals, and is connected to the output end of the power amplifier through the passive matching circuit, and the output end of the power amplifier is connected with the load resistor; the switching circuit controls the on and off of one NMOS tube according to the level of an input switching signal, simultaneously, the auxiliary injection current circuit injects direct current input current and output current generated by the power amplifier into the load resistor together according to the high level control of an injection control signal when the NMOS tube is turned off, simultaneously, the discharging passage is closed according to the low level control of a discharging control signal at the moment, the current injection into the load resistor is stopped according to the low level control of the injection control signal when the NMOS tube is turned on, and the discharging passage is opened according to the high level control of the discharging control signal, wherein the input switching signal, the injection control signal and the discharging control signal are all from a group of differential signals so as to realize the control of the current injection period; the auxiliary injection function when the switch is turned off and the injection function of closing auxiliary current when the switch is turned on are realized by controlling the injection control signal and the discharging control signal;
The switching circuit comprises an NMOS tube M 1, an NMOS tube M 2 and a blocking capacitor C 1, wherein the grid electrode of the NMOS tube M 1 is connected with an input switching SIGNAL PA_SIGNAL through the blocking capacitor C 1, the grid electrode of the NMOS tube M 1 is simultaneously connected with a direct-current BIAS voltage PA_BIAS, the drain electrode of the NMOS tube M 1 is connected with the source electrode of the NMOS tube M 2 and the source electrode of the NMOS tube M 1 is grounded; the drain of the NMOS tube M 2 is connected to a current source through a radio frequency choke coil, and the grid of the NMOS tube M 2 is grounded after being connected with the current source;
The auxiliary current injection circuit comprises a first-stage current mirror image formed by an NMOS tube M 31 and an NMOS tube M 32, a second-stage current mirror image formed by a PMOS tube M 33 and a PMOS tube M 34, a current injection and discharge tube formed by an NMOS tube M 35 and an NMOS tube M 36 and a first current limiting resistor R 2; the drain electrode and the grid electrode of the NMOS tube M 31 are connected with direct current input current after being short-circuited, the grid electrode of the NMOS tube M 31 is connected with the grid electrode of the NMOS tube M 32, and both source stages are grounded; the drain electrode of the PMOS tube M 33 is connected with the drain electrode of the NMOS tube M 32, the grid electrode and the drain electrode of the PMOS tube M 33 are connected with the grid electrode of the PMOS tube M 34 after being short-circuited, and the source electrode of the PMOS tube M 33 and the source electrode of the PMOS tube M 34 are both connected with the power supply VDD; the drain electrode of the PMOS tube M 34 is respectively connected with the drain electrode of the NMOS tube M 35 and the drain electrode of the NMOS tube M 36; the grid electrode of the NMOS tube M 35 is connected with an injection control signal, and the source electrode of the NMOS tube M 2 in the switch circuit is connected with the drain electrode of the NMOS tube; the grid electrode of the NMOS tube M 36 is connected with a release control signal, the source stage of the NMOS tube M 36 is connected with one end of a first current limiting resistor R 2, and the other end of the first current limiting resistor R 2 is grounded;
the high-low voltage switching and driving circuit is used for generating input switching signals, and the driving circuit is used for generating injection control signals and discharge control signals.
2. The current injection class E power amplifier of claim 1, wherein: the current source comprises a PMOS tube M 3, a filter resistor R 1 and a filter capacitor C 2, wherein the source electrode of the PMOS tube M 3 is connected with a power supply, the grid electrode of the PMOS tube M 3 is connected with a direct current bias signal CSIN, and the drain electrode of the PMOS tube M is respectively connected with one end of a radio frequency choke coil and one end of a filter resistor R 1; the other end of the filter resistor R 1 is connected to the grid of the NMOS tube M 2 and one end of the filter capacitor C 2 respectively, and the other end of the filter capacitor C 2 is grounded.
3. The current injection class E power amplifier of claim 1, wherein: the high-low voltage conversion and driving circuit is formed by connecting a plurality of groups of inverters in series, wherein each group of inverters consists of a PMOS tube and an NMOS tube, the grid electrodes of the PMOS tube and the NMOS tube are connected with shaping signals after being short-circuited, the drain electrodes of the PMOS tube are connected with a power supply and the source electrode of the NMOS tube is grounded, and the drain electrodes of the PMOS tube and the NMOS tube are connected and serve as the connecting ends of the grid electrodes of the PMOS tube and the NMOS tube in the later group of inverters after being short-circuited; and connecting the drains of the PMOS tube and the NMOS tube in the last group of inverters to serve as the output end of the input switch signal.
4. The current injection class E power amplifier of claim 1, wherein: the passive matching circuit comprises a capacitor C 3, an inductor L 1 and a capacitor C 4, wherein one end of the capacitor C 3 is connected with the auxiliary current injection circuit, and the other end of the capacitor C 3 is connected with one end of the inductor L 1; the other end of the inductor L 1 is connected to one end of the capacitor C 4 and the output end PAOUT of the power amplifier, and the other end of the capacitor C 4 is grounded.
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| CN201910348370.7A CN110048681B (en) | 2019-04-28 | 2019-04-28 | Current injection type E-type power amplifier |
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