CN110011536A - A kind of power circuit - Google Patents
A kind of power circuit Download PDFInfo
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- CN110011536A CN110011536A CN201910372980.0A CN201910372980A CN110011536A CN 110011536 A CN110011536 A CN 110011536A CN 201910372980 A CN201910372980 A CN 201910372980A CN 110011536 A CN110011536 A CN 110011536A
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- ldo
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- 239000003990 capacitor Substances 0.000 claims description 26
- 230000007850 degeneration Effects 0.000 claims description 14
- 230000005611 electricity Effects 0.000 claims description 11
- 239000013078 crystal Substances 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 3
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- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 238000010276 construction Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
- H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
- H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
- H02M3/1584—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
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Abstract
The embodiment of the invention discloses a kind of power circuits, the circuit includes: band-gap reference module and configurable low pressure difference linear voltage regulator LDO, configurable LDO is electrically connected with the foundation of the register of band-gap reference module and outside respectively, and can configure LDO includes a work loop；Band-gap reference module provides reference voltage for configurable LDO；Configurable LDO is used for, and receives the control signal that external register issues, and is adjusted according to control signal to work loop, is executed operating mode switching.The circuit only includes a work loop, for two work loops in traditional power circuit, area occupied is greatly reduced, reduces the occupied space of integrated chip, can also substantially reduce job costs.By power circuit described herein, even if need to be switched to high performance operation mode from low performance operating mode, do not need to re-establish high performance operation mode loops as conventional power source circuit, it is possible thereby to be preferably minimized voltage dithering yet.
Description
Technical field
The present embodiments relate to field of circuit technology, and in particular to a kind of power circuit.
Background technique
Currently, in order to improve the stand-by time of integral embedded type system, and stand-by power consumption is reduced, super low-power consumption microcontroller
(Microcontroller Unit, abbreviation MCU) is widely used.This requires the power supply unit (Power in MCU
Management Unit, abbreviation PMU) there are two types of operating modes: first, in MCU high-performance full speed operation, power consumption is very big, leads to
Chang Keda 20mA or more, sets high performance operation mode for PMU at this time, and feature is high voltage, high driving ability, high band
Wide, quick response and high PSRR, but to its quiescent dissipation, this index can relax.Second, in MCU stand-by operation
When mode, MCU enters deep-sleep, and nearly all module is all switched off, it is therefore an objective to be reduced total stand-by power consumption, usually less than
10uA.At this point, setting ultra low power mode of operation for PMU, feature is low speed paper tape reader static power disspation, low-voltage.
As shown in Figure 1, providing a kind of 0.13um technique traditional structure in Fig. 1, and has the chip of two kinds of operating modes
Power circuit consists of three parts: band-gap reference module (bandgap), high-performance 1.5V low pressure difference linear voltage regulator (Low
Dropout Regulator, abbreviation LDO) and super low-power consumption 0.9V LDO.High-performance 1.5V LDO feature is output voltage height
(output 1.5V), quiescent current is big, driving capability is strong, with it is roomy, can close.Super low-power consumption 0.9V LDO feature is output voltage
Low (output 0.9V), quiescent current is small, driving capability is weak, bandwidth is small, can not close.When chip is in high performance operation mode,
1.5V and 0.9V LDO is worked at the same time.Since 1.5V LDO driving capability is stronger, VDD_OUT exports 1.5V.Chip enters standby
When operating mode, system will turn off high-performance 1.5V LDO, 1.5V LDO quiescent dissipation and be reduced to nA grades.And VDD_ at this time
OUT is reduced to 0.9V from 1.5V, digital circuit device Leakage Current is reduced, to further decrease standy operation mode total work
Consumption.
The drawbacks of this chip power circuit is, first, area occupied is excessive, to the design and use of integrated chip
Many inconvenience are all brought, moreover, it is excessively high to also result in chip cost.Second, as shown in Figure 1, there are two works for conventional power source circuit
Make loop composition, in the switching of each operating mode, since the work loop of high-performance 1.5VLDO is in closing before handover
State is restarted if necessary, it is necessary to completely be re-established, limited settling time causes to can be appreciated that one on VDD_OUT
A very big voltage dithering, this is difficult to receive for many SoC systems.
Summary of the invention
For this purpose, the embodiment of the present invention provides a kind of power circuit, face is occupied to solve power circuit in the prior art
Product is big, cause integrated chip is at high cost, when being switched using limited and operating mode, the technologies such as output voltage shake is larger are asked
Topic.
To achieve the goals above, the embodiment of the present invention provides the following technical solutions:
According to a first aspect of the embodiments of the present invention, a kind of power circuit is provided, which includes:
Band-gap reference module and configurable low pressure difference linear voltage regulator LDO, can configure LDO respectively with band-gap reference module with
And external register establishes electrical connection, can configure LDO includes a work loop；
Band-gap reference module provides reference voltage for configurable LDO；
Configurable LDO is used for, and receives the control signal that external register issues, according to control signal to work loop into
Row adjustment executes operating mode switching.
Further, work loop includes degeneration factor and first resistor；
Configurable LDO is used for, and when determining execution high performance operation mode according to control signal, is carried out to degeneration factor
It adjusts, so that the output voltage of configurable LDO is the first preset voltage value, and controls first resistor and be in effective status；
Alternatively, degeneration factor is adjusted when determining execution low performance operating mode according to control signal, so that
The output voltage of configurable LDO is the second preset voltage value, and controls first resistor and be in invalid state, wherein the second default electricity
Pressure value is less than the first preset voltage value.
Further, degeneration factor includes: operational amplifier, first capacitor, the second capacitor, the first transistor, second
Resistance and 3rd resistor, second resistance are adjustable resistance；
The first input end of operational amplifier is electrically connected band-gap reference module, the second input terminal electrical connection of operational amplifier
One end of second resistance and one end of 3rd resistor；The output of the third input terminal electrical connection external register of operational amplifier
End；The output end of operational amplifier is electrically connected one end of first capacitor and the base stage of the first transistor；First capacitor it is another
One end ground connection；The emitter of the first transistor is electrically connected with one end of the second capacitor respectively with the other end of 3rd resistor, and second
The other end of capacitor is grounded；The collector and band-gap reference module of the first transistor are separately connected voltage source；Second resistance it is another
One end ground connection；Output end behind one end of second capacitor and one end connection of first resistor as configurable LDO；First resistor
Other end ground connection.
Further, configurable LDO is specifically used for, and the resistance value ratio between second resistance and 3rd resistor is adjusted, so that can
The output voltage of configuration LDO is the first preset voltage value or is the second preset voltage value.
Further, when the resistance value ratio between second resistance and 3rd resistor is the first numerical value, it can configure the output of LDO
Voltage is the first preset voltage value；
Alternatively, can configure the output voltage of LDO when the resistance value ratio between second resistance and 3rd resistor is second value
For the second preset voltage value.
Further, operational amplifier includes: second transistor to the 5th transistor, the first ammeter and the second electric current
Table, wherein the first ammeter is that can close ammeter；
The base stage of second transistor is electrically connected band-gap reference module；Emitter is grounded after being electrically connected the first ammeter, and second
The collector of the emitter electrical connection third transistor of transistor, third transistor base stage by it is non-behind the door and the 4th transistor
Base stage by it is non-behind the door, then be electrically connected；The connection terminal of the two is electrically connected the collector of second transistor again；Third is brilliant
The emitter of the emitter of body pipe and the 4th transistor is electrically connected voltage source；The collector of 4th transistor and the 5th crystalline substance
Output end after the collector electrical connection of body pipe as operational amplifier；The emitter of 5th transistor is electrically connected the second ammeter
After be grounded；First ammeter and the second ammeter are in parallel.
Further, the second ammeter is in effective status always；
When determining execution high performance operation mode according to control signal, the first ammeter is in the open state；
Alternatively, when determining that the first ammeter is in close state when executing low performance operating mode according to control signal.
Further, circuit further includes control switch, when determining execution high performance operation mode according to control signal, control
System switch is opened, and control first resistor is in effective status；
Alternatively, controlling first resistor when determining that control switch is closed when executing low performance operating mode according to control signal
In invalid state.
Further, first resistor resistance value is 15K.
The embodiment of the present invention, which has the advantages that, provides a kind of power circuit, which only includes a job
Area occupied is greatly reduced for two work loops in traditional power circuit in loop, reduces integrated chip
Occupied space, but also job costs can be substantially reduced.In addition, in present specification, due to only including a job
Loop, so in the loop in addition under low performance operating mode, except some devices needs are closed, most of component begins
It is in effective status eventually.So, even if need to be switched to high performance operation mode from low performance operating mode, picture is not needed yet
Conventional power source circuit is such, re-establishes high performance operation mode loops, it is possible thereby to be preferably minimized voltage dithering, and then quilt
Operating system as similar SOC system is received.
Detailed description of the invention
It, below will be to embodiment party in order to illustrate more clearly of embodiments of the present invention or technical solution in the prior art
Formula or attached drawing needed to be used in the description of the prior art are briefly described.It should be evident that the accompanying drawings in the following description is only
It is merely exemplary, it for those of ordinary skill in the art, without creative efforts, can also basis
The attached drawing of offer, which is extended, obtains other implementation attached drawings.
Structure depicted in this specification, ratio, size etc., only to cooperate the revealed content of specification, for
Those skilled in the art understands and reads, and is not intended to limit the invention enforceable qualifications, therefore does not have technical
Essential meaning, the modification of any structure, the change of proportionate relationship or the adjustment of size are not influencing the function of the invention that can be generated
Under effect and the purpose that can reach, should all still it fall in the range of disclosed technology contents obtain and can cover.
Fig. 1 is a kind of circuit construction of electric power schematic diagram of chip in the prior art；
Fig. 2 is a kind of power circuit structural schematic diagram that the embodiment of the present invention 1 provides；
Fig. 3 is a kind of structural schematic diagram of operational amplifier provided by the invention.
Specific embodiment
Embodiments of the present invention are illustrated by particular specific embodiment below, those skilled in the art can be by this explanation
Content disclosed by book is understood other advantages and efficacy of the present invention easily, it is clear that described embodiment is the present invention one
Section Example, instead of all the embodiments.Based on the embodiments of the present invention, those of ordinary skill in the art are not doing
Every other embodiment obtained under the premise of creative work out, shall fall within the protection scope of the present invention.
The embodiment of the present invention 1 provides a kind of power circuit structural schematic diagram, and specific as Figure 2-3, this is novel
Circuit construction of electric power includes:
Band-gap reference module Bandgap and configurable low pressure difference linear voltage regulator LDO, can configure LDO respectively with band gap base
A register (only output end pin LP_EN of display register in figure, following for quasi-mode block Bandgap and outside
In specific example, defines as LP_EN=0, determine that power circuit is in high performance operation mode, as LP_EN=1,
Determine that power circuit is in low performance operating mode) electrical connection is established, can configure LDO includes a work loop；
Band-gap reference module Bandgap provides reference voltage for configurable LDO；
Configurable LDO is used for, and receives the control signal that external register issues, according to control signal to work loop into
Row adjustment executes operating mode switching.
Optionally, work loop includes degeneration factor 10 and first resistor R1；
Configurable LDO is used for, when according to control signal determine execute high performance operation mode when, to degeneration factor 10 into
Row is adjusted, so that the output voltage VDD_OUT of configurable LDO is the first preset voltage value, and is controlled first resistor R1 and is in and have
Effect state；
Alternatively, degeneration factor 10 is adjusted when determining execution low performance operating mode according to control signal, with
Make the second preset voltage value of output voltage VDD_OUT of configurable LDO, and control first resistor R1 and be in invalid state,
In the second preset voltage value less than the first preset voltage value.
Optionally, degeneration factor 10 includes: operational amplifier A0, first capacitor C1, the second capacitor C2, the first transistor
M0, second resistance R2 and 3rd resistor R3, second resistance R2 are adjustable resistance；
The first input end (positive input terminal) of operational amplifier A0 is electrically connected band-gap reference module Bandgap, operation amplifier
One end of the second input terminal (negative input end) electrical connection second resistance R2 of device A0 and one end of 3rd resistor R3；Operation amplifier
The output end of the third input terminal electrical connection external register of device A0；The output end of operational amplifier A0 is electrically connected the first electricity
Hold one end of C1 and the base stage of the first transistor M0；The other end of first capacitor C1 is grounded；The emitter of the first transistor M0 with
The other end of 3rd resistor R3 is electrically connected with one end of the second capacitor C2 respectively, the other end ground connection of the second capacitor C2；First is brilliant
The collector and band-gap reference module Bandgap of body pipe M0 is separately connected voltage source (example is 3.3V voltage source in figure)；Second
The other end of resistance R2 is grounded；One end of second capacitor C2 connect with one end of first resistor R1 after as the defeated of configurable LDO
Outlet VDD_OUT；The other end of first resistor R1 is grounded.
Optionally, configurable LDO is specifically used for, and adjusts the resistance value ratio between second resistance R2 and 3rd resistor R3, so that
The output voltage VDD_OUT of configurable LDO is the first preset voltage value or is the second preset voltage value.
Optionally, when the resistance value ratio between second resistance R2 and 3rd resistor R3 is the first numerical value, it can configure the defeated of LDO
Voltage VDD_OUT is the first preset voltage value out；
Alternatively, can configure the output of LDO when the resistance value ratio between second resistance R2 and 3rd resistor R3 is second value
Voltage VDD_OUT is the second preset voltage value.
Optionally, operational amplifier A0 includes: second transistor M2 to the 5th transistor M5, the first ammeter I1 and
Two ammeter I0, wherein the first ammeter I1 is that can close ammeter；
The base stage of second transistor M2 is electrically connected band-gap reference module Bandgap；Emitter is electrically connected the first ammeter I1
After be grounded, the collector of the emitter of second transistor M2 electrical connection third transistor M3, third transistor M3 base stage is by non-
Then it is electrically connected behind the door with the base stage of the 4th transistor M4 by non-behind the door, the connection terminal of the two is electrically connected the second crystalline substance again
The collector of body pipe M2；The emitter of the emitter of third transistor M3 and the 4th transistor M4 are electrically connected voltage source；
Output end as operational amplifier A0 after the collector of 4th transistor M4 is electrically connected with the collector of the 5th transistor M5；The
The emitter of five transistor M5 is grounded after being electrically connected the second ammeter I0；First ammeter I1 and the second ammeter I0 are in parallel.
Optionally, the second ammeter I0 is in effective status always；
When determining execution high performance operation mode according to control signal, the first ammeter I1 is in the open state；
Alternatively, when determining that the first ammeter I1 is in close state when executing low performance operating mode according to control signal.
Optionally, circuit further includes control switch, when determining execution high performance operation mode according to control signal, control
Switch is opened, and control first resistor R1 is in effective status；
Alternatively, controlling first resistor when determining that control switch is closed when executing low performance operating mode according to control signal
R1 is in invalid state.
Optionally, first resistor R1 resistance value is 15K.
On the basis of above content, the working principle of the power circuit hereinafter will be described in detail.Referring specifically to such as
Under:
In the present embodiment, it is electrically connected using a kind of configurable LDO improved and band-gap reference module Bandgap
It connects, band-gap reference module Bandgap, which is still, executes traditional function, is exactly outputting reference voltage, is input to configurable LDO
In.In the present embodiment, can configure LDO only includes a work loop, then, in specific execute, it is only necessary to according to control
Signal is adjusted this work loop, realizes operating mode switching.For conventional loop, reduce by a ring
Road greatly reduces area occupied, reduces the occupied space of chip, reduces job costs.It also eliminates and is worked by low performance simultaneously
When pattern switching to high performance mode of operation, output voltage VDD_OUT shakes larger problem caused by loop needs to rebuild.
Operating mode switching is implemented, see below:
This work loop includes a degeneration factor 10 and first resistor R1, and first resistor R1 is regulatable electricity
Resistance.An e.g. adjustable resistance, adjustable resistance value is preset resistive value, or is directly adjusted to 0.And the work of configurable LDO
Operation mode is mainly switched over by the control instruction that MCU is issued, and specific control instruction will be exported by register and be obtained, because
This, an input terminal of configurable LDO is also electrically connected with external register foundation, for receiving the control of external register sending
Signal, and operating mode switching is executed according to control signal.
For example, configurable LDO is in high performance operation mode when control signal is 0, when controlling signal is 1, can configure
LDO is in low performance operating mode.
Specific handoff procedure may include: when determining execution high performance operation mode according to control signal, to negative anti-
Feedback system 10 is adjusted, so that the output voltage VDD_OUT of configurable LDO is the first preset voltage value, and controls the first electricity
Resistance R1 is in effective status；
Alternatively, degeneration factor 10 is adjusted when determining execution low performance operating mode according to control signal, with
Make the second preset voltage value of output voltage VDD_OUT of configurable LDO, and control first resistor R1 and be in invalid state,
In the second preset voltage value less than the first preset voltage value.
Shown in Figure 2, degeneration factor 10 includes: operational amplifier A0, first capacitor C1, the second capacitor C2, first
Transistor M0, second resistance R2 and 3rd resistor R3, second resistance R2 are adjustable resistance；
The first input end of operational amplifier A0 is electrically connected band-gap reference module Bandgap, and the second of operational amplifier A0
Input terminal is electrically connected one end of second resistance R2 and one end of 3rd resistor R3；The third input terminal of operational amplifier A0 is electrically connected
Connect the output end of external register；The output end of operational amplifier A0 is electrically connected one end and the first crystal of first capacitor C1
The base stage of pipe M0；The other end of first capacitor C1 is grounded；The emitter of the first transistor M0 and the other end point of 3rd resistor R3
It is not electrically connected with one end of the second capacitor C2, the other end ground connection of the second capacitor C2；The collector and band gap of the first transistor M0
Base modules Bandgap is separately connected voltage source；The other end of second resistance R2 is grounded；One end of second capacitor C2 and the first electricity
Output end after one end connection of resistance R1 as configurable LDO；The other end of first resistor R1 is grounded.
It, can be by adjusting second resistance R2 and 3rd resistor when needing configurable LDO to be in high performance operation mode
Resistance value ratio between R3 is realized.In general, when the resistance value ratio between second resistance R2 and 3rd resistor R3 is the first numerical value
When, the output voltage VDD_OUT that can configure LDO is the first preset voltage value；
Alternatively, can configure the output of LDO when the resistance value ratio between second resistance R2 and 3rd resistor R3 is second value
Voltage VDD_OUT is the second preset voltage value.
For example, when power circuit is in high performance operation mode, the output voltage VDD_OUT of configurable LDO is
1.5V, band-gap reference output voltage VDD_OUTVBG=0.6V.According to close loop negative feedback principle, R2/R3=0.6/ (1.5-0.6)
=2/3.
When power circuit is in low performance operating mode, the output voltage VDD_OUT that can configure LDO is 0.9V,
Band-gap reference output voltage VDD_OUTVBG=0.6V.According to close loop negative feedback principle, R2/R3=0.6/ (0.9-0.6)=3/
2.At this time, it is assumed that 3rd resistor R3 is that the resistance of fixed resistance value passes through it is possible to set second resistance R2 as adjustable resistance
The resistance value of second resistance R2 is adjusted, to regulate and control the resistance value between second resistance R2 and 3rd resistor R3.
By the above-mentioned means, the output voltage VDD_OUT of adjustable configurable LDO, to meet different working modes
Output voltage VDD_OUT value.
In addition, quiescent current, bandwidth of LDO etc. are also required to be adjusted under different operating modes.In present specification
In, mainly realized by adjusting the bias current of operational amplifier A0.Referring specifically to shown in Fig. 3, Fig. 3 provides a kind of fortune
Calculate the structural schematic diagram of amplifier A0.Wherein, operational amplifier A0 includes: second transistor M2 to the 5th transistor M5, first
Ammeter I1 and the second ammeter I0, wherein the first ammeter I1 is that can close ammeter；
(input terminal shown in figure is shown as the base stage electrical connection band-gap reference module Bandgap of second transistor M2
VP)；Emitter is grounded after being electrically connected the first ammeter I1, the collection of the emitter electrical connection third transistor M3 of second transistor M2
Electrode, third transistor M3 base stage then are electrically connected with the base stage of the 4th transistor M4 by non-behind the door behind the door by non-,
The connection terminal of the two is electrically connected the collector of second transistor M2 again；The emitter of third transistor M3 and the 4th transistor M4
Emitter be electrically connected voltage source；After the collector of 4th transistor M4 is electrically connected with the collector of the 5th transistor M5
Output end (VN is shown as in figure) as operational amplifier A0；The emitter of 5th transistor M5 is electrically connected the second ammeter I0
After be grounded；First ammeter I1 and the second ammeter I0 are in parallel.
Wherein, the second ammeter I0 is in effective status always；High performance operation mould is executed when determining according to control signal
When formula, the first ammeter I1 is in the open state；Alternatively, when determining execution low performance operating mode according to control signal, the
One ammeter I1 is in close state.Referring specifically to shown in Fig. 3, the ammeter I0 in Fig. 3 is opened always, and ammeter I1 only exists
When high performance mode, just it is opened.When being in high performance operation mode, bias current summation is 20.1uA, operational amplifier
A0 is configured as high bandwidth.When being in low performance operating mode, bias current 0.1uA, operational amplifier A0 is configured as
Low bandwidth, to reduce quiescent dissipation.
Optionally, it when power circuit is in high performance operation mode, needs to guarantee loop stability, it is also necessary to increase
The driving capability of strong LDO.At this point, can then be realized by controlling the on-off of first resistor R1, that is, control first resistor R1
Whether effective status is in.
Optionally, circuit further includes control switch (not shown), whether is in effective shape in control first resistor R1
The mode of state may include: to control first when determining that control switch is opened when executing high performance operation mode according to control signal
Resistance R1 is in effective status；
Alternatively, controlling first resistor when determining that control switch is closed when executing low performance operating mode according to control signal
R1 is in invalid state.
In a specific example, can be set first resistor R1 be 15K, when determine operating mode be high performance operation
When mode, then 15K ohm are set by R3, is equivalent to the increase load current 1.5V/15K=on output voltage VDD_OUT
100uA.Purpose is two o'clock, and first guarantees to can configure the stability of LDO loop in the very low situation of external loading electric current.Second
It is load regulation rate (Load Regulation) performance for improving configurable LDO.When determine operating mode be low performance Working mould
When formula, at this time by control switch, control R3 is invalid, that is to say and disconnects from VDD_OUT, reduces the load electricity on VDD_OUT
Stream, so that quiescent dissipation can be greatly reduced.
It should also be noted that, be above only to be described to the function of part of devices in each circuit diagram, without
Description has the function of executing in the prior art identical, does not do excessive explanation here.
A kind of power circuit provided in an embodiment of the present invention, the circuit only include a work loop, compared to
For two work loop in traditional power circuit, area occupied is greatly reduced, reduces the occupied space of integrated chip,
But also job costs can be substantially reduced.In addition, in present specification, due to only including a work loop, so
In addition under low performance operating mode, except some devices needs are closed, most of component is in effective always in loop
State.So, it even if need to be switched to high performance operation mode from low performance operating mode, does not need as conventional power source electricity yet
Road is such, re-establishes high performance operation mode loops, it is possible thereby to be preferably minimized voltage dithering, and then by similar SOC system
Such operating system of uniting is received.
Although above having used general explanation and specific embodiment, the present invention is described in detail, at this
On the basis of invention, it can be made some modifications or improvements, this will be apparent to those skilled in the art.Therefore,
These modifications or improvements without departing from theon the basis of the spirit of the present invention are fallen within the scope of the claimed invention.
Claims (9)
1. a kind of power circuit, which is characterized in that the circuit includes: band-gap reference module and configurable low pressure difference linearity
Voltage-stablizer LDO, the configurable LDO are electrically connected with the foundation of the register of the band-gap reference module and outside respectively, described
Configurable LDO includes a work loop；
The band-gap reference module provides reference voltage for the configurable LDO；
The configurable LDO is used for, and the control signal that the register of the outside issues is received, according to the control signal to institute
It states work loop to be adjusted, executes operating mode switching.
2. circuit according to claim 1, which is characterized in that the work loop includes degeneration factor and the first electricity
Resistance；
The configurable LDO is used for, when determining execution high performance operation mode according to the control signal, to the negative-feedback
System is adjusted, so that the output voltage of the configurable LDO is the first preset voltage value, and controls at the first resistor
In effective status；
Alternatively, the degeneration factor is adjusted when determining execution low performance operating mode according to the control signal,
So that the output voltage of the configurable LDO is the second preset voltage value, and controls the first resistor and is in invalid state,
Described in the second preset voltage value be less than first preset voltage value.
3. circuit according to claim 2, which is characterized in that the degeneration factor includes: operational amplifier, the first electricity
Appearance, the second capacitor, the first transistor, second resistance and 3rd resistor, the second resistance are adjustable resistance；
The first input end of the operational amplifier is electrically connected the band-gap reference module, the second input of the operational amplifier
End is electrically connected one end of the second resistance and one end of the 3rd resistor；The third input terminal electricity of the operational amplifier
Connect the output end of the external register；The output end of the operational amplifier is electrically connected one end of the first capacitor
With the base stage of the first transistor；The other end of the first capacitor is grounded；The emitter of the first transistor with it is described
The other end of 3rd resistor is electrically connected with one end of second capacitor respectively, the other end ground connection of second capacitor；It is described
The collector of the first transistor and the band-gap reference module are separately connected voltage source；The other end of the second resistance is grounded；
Output end as the configurable LDO after one end of second capacitor is connect with one end of the first resistor；Described
The other end of one resistance is grounded.
4. circuit according to claim 3, which is characterized in that the configurable LDO is specifically used for, and adjusts second electricity
Hinder the resistance value ratio between 3rd resistor so that the output voltage of the configurable LDO is the first preset voltage value or is the
Two preset voltage values.
5. circuit according to claim 4, which is characterized in that the resistance value ratio between the second resistance and 3rd resistor
When for the first numerical value, the output voltage of the configurable LDO is the first preset voltage value；
Alternatively, when the resistance value ratio between the second resistance and 3rd resistor is second value, the output of the configurable LDO
Voltage is the second preset voltage value.
6. according to the described in any item circuits of claim 3-5, which is characterized in that the operational amplifier includes: the second crystal
Five transistor of Guan Zhi, the first ammeter and the second ammeter, wherein first ammeter is that can close ammeter；
The base stage of second transistor is electrically connected the band-gap reference module；Emitter is grounded after being electrically connected the first ammeter, described
The collector of the emitter electrical connection third transistor of second transistor, the third transistor base stage by it is non-behind the door and the
The base stage of four transistors by it is non-behind the door, then be electrically connected；The connection terminal of the two is electrically connected the second transistor again
Collector；The emitter of the emitter of the third transistor and the 4th transistor is electrically connected the voltage source；
Output end as operational amplifier after the collector of 4th transistor is electrically connected with the collector of the 5th transistor；It is described
The emitter of 5th transistor is grounded after being electrically connected the second ammeter；First ammeter and second ammeter are in parallel.
7. circuit according to claim 6, which is characterized in that second ammeter is in effective status always；Work as root
Determine that first ammeter is in the open state when executing high performance operation mode according to the control signal；
Alternatively, when determining that when executing low performance operating mode, first ammeter, which is in, closes shape according to the control signal
State.
8. according to the described in any item circuits of claim 2-5 or 7, which is characterized in that the circuit further includes control switch, when
It determines that the control switch is opened when executing high performance operation mode according to the control signal, controls at the first resistor
In effective status；
Alternatively, when determining that the control switch is closed when executing low performance operating mode according to the control signal, described in control
First resistor is in invalid state.
9. according to the described in any item circuits of claim 2-5 or 7, which is characterized in that the first resistor resistance value is 15K.
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| CN201910372980.0A CN110011536A (en) | 2019-05-06 | 2019-05-06 | A kind of power circuit |
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| CN201910372980.0A CN110011536A (en) | 2019-05-06 | 2019-05-06 | A kind of power circuit |
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ID=67175876
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| US11036247B1 (en) | 2019-11-28 | 2021-06-15 | Shenzhen GOODIX Technology Co., Ltd. | Voltage regulator circuit with high power supply rejection ratio |
| CN113067466A (en) * | 2021-05-19 | 2021-07-02 | 上海鸿晔电子科技股份有限公司 | Voltage source circuit and power management chip |
| CN114167933A (en) * | 2021-12-06 | 2022-03-11 | 上海瓴瑞微电子有限公司 | Low-dropout linear regulator circuit with low power consumption and fast transient response |
| CN114822431A (en) * | 2022-03-23 | 2022-07-29 | 重庆惠科金渝光电科技有限公司 | Display panel driving method, device and computer readable storage medium |
| CN115173673A (en) * | 2022-08-15 | 2022-10-11 | 芯洲科技（北京）有限公司 | Power supply device and power supply system |
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