CN109741771A - A kind of system and method reducing static random access memory power consumption - Google Patents
A kind of system and method reducing static random access memory power consumption Download PDFInfo
- Publication number
- CN109741771A CN109741771A CN201910274520.4A CN201910274520A CN109741771A CN 109741771 A CN109741771 A CN 109741771A CN 201910274520 A CN201910274520 A CN 201910274520A CN 109741771 A CN109741771 A CN 109741771A
- Authority
- CN
- China
- Prior art keywords
- access memory
- static random
- random access
- module
- supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Static Random-Access Memory (AREA)
Abstract
The invention discloses the systems for reducing static random access memory power consumption, including control module, system power supply module, low-tension supply module, the first supply network module, the second supply network module and SRAM;Wherein: when Static Random Access Memory (SRAM) is in running order, control module controls low-tension supply module and disconnects;System power supply module, the peripheral power pin by the first supply network module to SRAM are powered, and the core power pin by the second supply network module to SRAM is powered, and provide the operating voltage of SRAM;When SRAM in a dormant state when, control module control low-tension supply module conducting, and control system power module disconnect;Core power pin of the low-tension supply module by the second supply network module to static random-access memory access is powered, and the suspend mode voltage of SRAM is provided.Through the invention, reduce system electric leakage, greatly reduce SRAM for electrical power consumed.
Description
Technical field
The present invention relates to data access unit field more particularly to a kind of systems for reducing static random access memory power consumption
And method.
Background technique
Normally, SRAM(static random access memory) have the input of peripheral power pin VDDPE and core for fulgurite
The VDDCE duplex feeding of foot input and VSSE(ground connection).When SRAM is worked normally, VDDPE and VDDCE require normally to supply
Electricity, and in sleep(suspend mode) under mode, in order to save power consumption, it is only necessary to which keeping VDDCE, this powers all the way, at this point, SRAM
Internal data will not lose.
Generally, the VDDPE and VDDCE of SRAM for electric connection mode as shown in Figure 1, duplex feeding is each by one
After switch, it being merged into system power supply VDD(SOC) supply network gets on.
For the product high to power consumption requirements, this connection type is had several drawbacks in that:
1, under sleep mode, when only needing to keep SRAM data, i.e. when SRAM is in retention state, in order to guarantee
VDDCE power supply, VDD(SOC) and its supply network cannot all be in close state, at this time system leak electricity bigger, power consumption
It greatly increases;
2, when SRAM is in retention state, i.e., when VDDCE individually powers, in order to be optimal effect, VDDCE voltage value
Can be set it is relatively low, then, it is desirable to VDD(SOC) design can satisfy minimum VDDCE demand, difficulty is larger.
Summary of the invention
In order to solve above-mentioned technological deficiency, the present invention provide a kind of system for reducing static random access memory power consumption and
Method, to reduce mobile phone, the internet-of-things terminal power consumption under sleep mode.It can be widely used for NB-IoT, eMTC etc. to want power consumption
Ask extra high field.Specific technical solution is as follows:
On the one hand, the invention discloses a kind of systems for reducing static random access memory power consumption, including control module, system
Power module, low-tension supply module, the first supply network module, the second supply network module and static random access memory;
The control module is connected with the system power supply module, low-tension supply module and static random access memory respectively;It is described
Static random access memory is connected with the first supply network module and the second supply network module respectively, described
System power supply module is connected with the first supply network module, the second supply network module respectively, and the low tension
Source module is connected with the second supply network module, in which:
When the static random access memory is in running order, it is disconnected that the control module controls the low-tension supply module
It opens, periphery of the system power supply module by the first supply network module to the static random access memory powers
Pin power supply, and the system power supply module also gives the static random access memory by the second supply network module
The power supply of core power pin, required operating voltage when static random access memory work is provided;
When the static random access memory in a dormant state when, the control module controls the low-tension supply module and leads
Lead to and control the system power supply module and disconnects;The low-tension supply module is by the second supply network module to described
The core power pin of static random-access memory access is powered, and required when the static random access memory suspend mode stop is provided
Dormancy voltage.
Further, the low-tension supply module includes a low pressure difference linear voltage regulator.
Further, the low pressure difference linear voltage regulator include: an operational amplifier, three metal-oxide-semiconductors, two switch,
Two resistance and a capacitor;Wherein: the output end of the operational amplifier is electrically connected with the grid of three metal-oxide-semiconductors respectively,
In, the source electrode of first metal-oxide-semiconductor is grounded after being sequentially connected in series two resistance, and its drain electrode connects external power supply, grid and the electricity
It is grounded after holding electrical connection;The non-inverting input terminal input reference voltage of the operational amplifier;The reverse phase of the operational amplifier is defeated
Enter the common end that end is electrically connected to concatenated two resistance;The drain electrode of second metal-oxide-semiconductor by one switch after with it is external
Power electric connection, the drain electrode of third metal-oxide-semiconductor after another switch with the external power supply by being electrically connected, and described second
Output end of the source terminal of metal-oxide-semiconductor and third metal-oxide-semiconductor collectively as the low pressure difference linear voltage regulator.
Further, the system power supply module include: power submodule and with the switch that is connected of power supply submodule
Submodule, the switch submodule are also connected with the first supply network module, the second supply network module.
Further, the switch submodule includes: first switch unit and second switch unit;The first switch list
First to be connected with the first supply network module, the second switch unit is connected with the second supply network module.
Further, the control module includes: state acquisition submodule, and be connected with the state acquisition submodule
Handover operation submodule, in which: the state acquisition submodule obtains the working condition of the static random access memory;Institute
The working condition for the static random access memory that handover operation submodule is got according to the state acquisition submodule is stated,
Control the switch of the system power supply module and the low-tension supply module.
On the other hand, the invention also discloses a kind of method for reducing static random access memory power consumption, it is applied to this
The system of the invention reduction static random access memory power consumption, which comprises read the static random-access
The working condition of memory;According to the working condition of the static random access memory, by different power modules to institute
It states static random access memory and different supply voltages is provided, specifically include: when the static random access memory is in
When working condition, disconnect low-tension supply module, control system power module by the first supply network module to it is described it is static with
Machine accesses the peripheral power pin power supply of memory, and controls the system power supply module and pass through the second supply network module
To the core power pin power supply of the static random access memory, static random access memory work when institute is provided
The operating voltage needed;When the static random access memory in a dormant state when, the low-tension supply module is connected, disconnect
The system power supply module;It controls the low-tension supply module and is deposited by the second supply network module to the static random
It takes the core power pin of memory access to power, suspend mode voltage required when the static random access memory suspend mode is provided.
Further, before the working condition for reading the static random access memory further include: set up a low pressure
Power module, the second supply network module, the low-tension supply module give the static state by the second supply network module
Suspend mode voltage is provided when random access memory suspend mode.
Further, it controls the low-tension supply module and is deposited by the second supply network module to the static random
It takes the core power pin of memory access to power, suspend mode voltage packet required when the static random access memory suspend mode is provided
It includes: when controlling the low-tension supply module outer power voltage of input being converted into the static random access memory suspend mode
Required suspend mode voltage;And the suspend mode voltage after conversion is supplied to the second supply network module, convenient for it is described it is static with
Suspend mode voltage required when suspend mode is obtained from the second supply network module when machine access storage suspend mode.
Further, the low-tension supply module includes a low pressure difference linear voltage regulator, when the static random-access is deposited
When the slave working condition of reservoir is switched to dormant state, the low pressure difference linear voltage regulator is the static random access memory
Stable suspend mode voltage is provided.
The present invention at least has with the next item down technical effect:
(1) static random access memory in a dormant state when, it is only necessary to core power supply, periphery without power supply, the present invention design
Low-tension supply module suspend mode voltage then can be just provided for static random access memory, at static random access memory
When dormant state, system power supply module is closed, allows low-tension supply module to export suspend mode voltage, then pass through the second supply network mould
Block is powered to the core power pin of static random access memory.In this way, system electric leakage can be greatly reduced.
(2) through the invention, static random access memory in a dormant state when, only core power pin power, and
Peripheral power pin unpowered input, system power supply module are in close state, and greatly reduce static random access memory
For electrical power consumed.
(3) in the prior art, the operating voltage of static random access memory and suspend mode voltage are by system power supply module
There is provided, and its requirement of suspend mode voltage to voltage value is relatively low, and to allow system power supply module design and meanwhile to meet
The minimum core power demands of static random access memory, considerably increase the design difficulty of system power supply module.And this hair
It is bright, the suspend mode voltage of static random access memory is provided separately through low-tension supply module, it is only necessary to be directed to static random
The dormant state of memory is accessed to consider, greatly reduces design difficulty.
(4) mesolow power module of the present invention includes a low pressure difference linear voltage regulator, and the low voltage difference line that the present invention designs
Property voltage-stablizer static random access memory mode state switching when, do not need high-current consumption can realize output electricity
The stabilization of pressure, while also having taken into account the demand of low-power consumption.
Detailed description of the invention
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment
Attached drawing is briefly introduced, it should be apparent that, drawings in the following description are only some embodiments of the invention, for this
For the those of ordinary skill in field, without any creative labor, it can also be obtained according to these attached drawings
His attached drawing.
Fig. 1 is existing static random access memory power supply connection schematic diagram;
Fig. 2 is a kind of system embodiment block diagram for reducing static random access memory power consumption of the present invention;
Fig. 3 is a kind of another embodiment block diagram of system for reducing static random access memory power consumption of the present invention;
Fig. 4 is a kind of another embodiment schematic diagram of system for reducing static random access memory power consumption of the present invention;
Fig. 5 is the circuit connection diagram of mesolow difference linear constant voltage regulator of the present invention;
Fig. 6 is a kind of embodiment of the method flow chart for reducing static random access memory power consumption of the present invention;
Fig. 7 is a kind of another embodiment flow chart of method for reducing static random access memory power consumption of the present invention.
Appended drawing reference:
100-- system power supply module;200-- low-tension supply module;300-- the first supply network module;The second power supply network of 400--
Network module;500-- static random access memory;600-- control module;110-- power supply submodule;120-- switchs submodule;
121-- first switch unit;122-- second switch unit;210-- low pressure difference linear voltage regulator;610-- state obtains submodule
Block;620-- handover operation submodule.
Specific embodiment
To make the objectives, technical solutions, and advantages of the present invention clearer, below in conjunction with attached drawing to the present invention make into
It is described in detail to one step, it is clear that the described embodiments are only some of the embodiments of the present invention, rather than whole implementation
Example.Based on the embodiments of the present invention, obtained by those of ordinary skill in the art without making creative efforts
All other embodiment, shall fall within the protection scope of the present invention.
The embodiment of the present invention 1 discloses a kind of system for reducing static random access memory power consumption, as shown in Fig. 2,
Including control module 600, system power supply module 100, low-tension supply module 200, the power supply of the first supply network module 300, second
Network module 400 and static random access memory 500;The control module 600 respectively with the system power supply module 100,
Low-tension supply module 200 and static random access memory 500 are connected;The static random access memory 500 respectively with institute
The first supply network module 300 and the second supply network module 400 is stated to be connected, the system power supply module 100 respectively with
The first supply network module 300, the second supply network module 400 are connected, and the low-tension supply module 200 and institute
The second supply network module 400 is stated to be connected, in which:
When the static random access memory 500 is in running order, the control module 600 controls the low-tension supply
Module 200 disconnects, and the system power supply module 100 gives the static random-access by the first supply network module 300
The peripheral power pin of memory 500 is powered, and the system power supply module 100 also passes through the second supply network module
400 give the core power pin of the static random access memory 500 to power, and provide the static random access memory
Required operating voltage when 500 work;
When the static random access memory 500 in a dormant state when, the control module 600 controls the low-tension supply
Module 200 is connected and controls the system power supply module 100 and disconnects;The low-tension supply module 200 is powered by described second
Network module 400 is powered to the core power pin of the static random access memory 500, provides the static random-access
Required suspend mode voltage when 500 suspend mode of memory.
In the present embodiment, according to two sets of power supply systems of the Design of State of static random access memory 500, a set of is logical
System power supply module 100 is crossed to power, system power supply module 100 provides power to the first supply network module 300 and second
The periphery power supply of supply network module 400, static random access memory 500 takes electricity from the first supply network module 300, quiet
The core power supply of state random access memory 500 takes electricity from the second supply network module 400.And at random access memory
When dormant state, in order to save power consumption, it is only necessary to keep its VDDCE this all the way core power pin have electricity input, this
The internal data of sample static random access memory 500 would not lose.And stop if static random access memory 500 is in
When dormancy state, or if being powered by system power supply, then whole system electric leakage is larger, power consumption is also greatly enhanced, in addition, by
In static random access memory 500 in a dormant state when, to be optimal effect, VDDCE voltage value requires to be arranged to obtain ratio
It is lower, that is to say, that the requirement of suspend mode voltage is relatively low, then the design of system power supply module 100 is required to can satisfy suspend mode electricity
The needs of pressure, difficulty are also bigger.In consideration of it, the present embodiment, in a dormant state for static random access memory 500
When, devise another set of power supply system to power, specifically, static random access memory 500 in a dormant state when, system
Power module 100 disconnects, and no longer offer power supply, low-tension supply module 200 supplies electricity to the second supply network module 400, it is static with
The core power supply of machine access memory 500 then can take electricity from the second supply network module 400.Due to low-tension supply module 200
Therefore the suspend mode voltage for being primarily used to provide static random access memory 500 can be individually for static random access memory
The suspend mode voltage of device 500 designs, and without considering the other supply voltages of system, design difficulty substantially reduces.Further, since system
Power module 100 is in an off state, and only by low-tension supply module 200 and the second supply network module 400 come to static state
Random access memory 500 provides suspend mode voltage, greatly reduces the electric leakage of system, reduces static random access memory
500 for electrical power consumed.
Another embodiment of present system, as shown in figure 3, on the basis of the above system embodiment, the system electricity
Source module 100 include: power submodule 110 and with the switch submodule 120 that is connected of power supply submodule 110, the switch
Submodule 120 is also connected with the first supply network module 300, the second supply network module 400.
Power supply submodule 110 is contained in system power supply module 100, for providing system operating voltage, and and supplied for electronic
The connected switch submodule 120 of module 110 can then be used to control whether to be supplied to the first supply network module 300 and second
400 supply voltage of supply network module.Specifically, control module 600, which gets static random access memory 500, is in work
When state, switch submodule 120 is then in the conductive state, supplies so that power supply submodule 110 provides supply voltage to first
Electric network module 300 and the second supply network module 400, static random access memory 500 is then from the first supply network module
Periphery power supply is obtained in 300, and core power supply is obtained from the second supply network module 400.And when control module 600 get it is quiet
State random access memory 500 in a dormant state when, then control switch submodule 120 is in an off state, system power supply mould
Block 100 then can no longer provide supply voltage to the first supply network module 300 and the second supply network module 400, thus without
Cause the electric leakage of power-supply system and the first supply network module 300.At this point, low-tension supply module 200 is then turned on, low-tension supply
Suspend mode electricity needed for module 200 provides suspend mode by the second supply network module 400 for static random access memory 500
Pressure.
Preferably, the switch submodule 120 includes: first switch unit 121 on the basis of the above system embodiment
And second switch unit 122;The first switch unit 121 is connected with the first supply network module 300, and described second opens
Unit 122 is closed to be connected with the second supply network module 400.That is, first switch unit 121 is used to control system electricity
On-off between source module 100 and the first supply network module 300, and second switch unit 122 is then used to control system power supply
On-off between module 100 and the second supply network module 400.
In the present embodiment, when the static random access memory 500 is in running order, the control module 600
Control the first switch unit 121, second switch unit 122 is both turned on, and the control low-tension supply module 200 disconnects;
The system power supply module 100 gives the static state by the first switch unit 121, the first supply network module 300
The peripheral power pin of random access memory 500 is powered;The system power supply module 100 also passes through the second switch unit
122, the second supply network module 400 is powered to the core power pin of the static random access memory 500;Work as institute
When stating static random access memory 500 in a dormant state, the control module 600 control the first switch unit 121,
Second switch unit 122 disconnects, and controls the low-tension supply module 200 and be connected, and the low-tension supply module 200 passes through institute
The core power pin that the second supply network module 400 is stated to the static random-access memory access is powered.
Another embodiment of the present invention, based on any of the above embodiments, the control module 600 includes: state
Acquisition submodule 610, and the handover operation submodule 620 being connected with the state acquisition submodule 610, in which: the state
Acquisition submodule 610 obtains the working condition of the static random access memory 500;The handover operation submodule 620
According to the working condition for the static random access memory that the state acquisition submodule 610 is got, the system electricity is controlled
The switch of source module 100 and the low-tension supply module 200.
In the present embodiment, the state acquisition submodule 610 of control module 600 is used to obtain static random access memory
500 working condition, when get static random access memory 500 it is in running order when, handover operation submodule 620 is then
Control system power module 100 is powered to the first supply network module 300 and the second supply network module 400, convenient for it is static with
The core power pin of machine access memory 500 takes electricity from the second supply network module 400, and peripheral power pin is from first
Electricity is taken in supply network module 300, low-tension supply module 200 is in close state at this time.And when state acquisition submodule 610 obtains
When getting static random access memory 500 in a dormant state, then 620 control system power module of handover operation submodule
100 disconnect, and halt system power supply is powered to the first supply network module 300 and the second supply network module 400, and opens low pressure
Power module 200 supplies electricity to the second supply network module 400 by low-tension supply module 200, so that static random-access is deposited
The core power pin of reservoir 500 can obtain suspend mode voltage required when suspend mode from the second supply network module 400.
Another embodiment of present system in order to reduce system electric leakage and design difficulty, while deposits static random
Access to memory (SRAM) is least in power-consuming under sleep state, the present embodiment devise it is a kind of reduction SRAM for electrical power consumed system,
Schematic diagram is as shown in Figure 4.
Be compared to Fig. 1, increase a LDO in design, the LDO be designed for SRAM dormant state, that is,
SRAM is in retention mode and sets, and in this embodiment the LDO is illustrated as LDO RET(in Fig. 4 and is in for SRAM
Retention mode and the LDO, abbreviation LDO RET designed), while the second supply network connecting with the LDO RET is also independent
In system power supply VDD(SOC).The working principle of Fig. 4 signal is as follows:
Under normal mode of operation, control LDO RET is disconnected, and two switches of system power supply (VDD SOC) are all closed in Fig. 4, is schemed
Middle control module do not illustrate, only provide SRAM for electrical schematic, under normal operating conditions, the VDDPE and VDDCE of SRAM makes
It is powered with VDD(SOC);
Under sleep state, control LDO RET conducting, and system power supply VDD(SOC) two switches all disconnect, then SRAM
VDDCE individually uses LDO RET to power, at this point, SRAM be under retention mode, system electric leakage only LDO RET and
Its a small amount of supply network connected.Also, because LDO RET is individually designed, it is only necessary to consider the low-voltage requirement of VDDCE,
Reduce VDD(SOC) design difficulty.
The present embodiment newly increases a dedicated LDO RET compared with the existing technology;And the VDDPE and VDDCE of SRAM
Duplex feeding is connected respectively in two supply networks;In addition, the supply network of the VDDCE of SRAM both may come from VDD
(SOC), and it may come from individual LDO RET;Specifically, when SRAM is in running order, the power supply of VDDCE from
VDD(SOC), and when SRAM in a dormant state when, the power supply of VDDCE is separately from LDO RET.As a result, in sleep mode
Under, only VDDCE power, greatly reduce SRAM for electrical power consumed.
Another embodiment of the present invention, on the basis of any of the above-described system embodiment, as shown in figure 3, the low tension
Source module 200 includes a low pressure difference linear voltage regulator 210.
Low pressure difference linear voltage regulator, abbreviation LDO, that is, low dropout regulator, LDO are a kind of linear voltage regulators,
Using the transistor or field-effect tube (FET) run in its linear region, the electricity of excess is subtracted from the input voltage of application
Pressure generates the output voltage through overregulating.
Required voltage value is generally lower when 500 suspend mode of static random access memory, therefore, can design a low voltage difference line
Property voltage-stablizer 210, required suspend mode voltage when providing suspend mode for static random access memory.Due to low-tension supply module 200
It is to be powered and design when aiming at 500 suspend mode of static random access memory, thus only need to consider that static random-access is deposited
Required suspend mode voltage value when 500 suspend mode of reservoir, without considering other states, therefore, design difficulty is substantially reduced.And low tension
The suspend mode voltage transmission that the low pressure difference linear voltage regulator 210 of source module 200 has been converted is supplied to the second supply network module 400
The core power pin of static random access memory 500 therefrom takes electricity, the second supply network module 400 be also aim at it is static with
Machine access memory 500 takes electricity and sets, and much smaller for the first supply network module 300, static random-access is deposited
The core power supply of reservoir 500 is obtained from the second supply network module 400, when suspend mode, 300 He of the first supply network module
System power supply module 100 is turned off, and greatly reduces system electric leakage.
Specifically, low pressure difference linear voltage regulator is as shown in figure 5, the low pressure difference linear voltage regulator includes: that an operation is put
Big device, three metal-oxide-semiconductors (respectively Q1, Q2, Q3), two switches (respectively K1, K2), two resistance (respectively R1, R2) and
One capacitor C;Wherein: the output end of the operational amplifier is electrically connected with the gate terminal of three metal-oxide-semiconductors (Q1, Q2, Q3) respectively,
Wherein, the source terminal of first metal-oxide-semiconductor Q1 is sequentially connected in series two resistance (R1, R2) and is grounded afterwards, and its drain electrode termination external power supply
Vbat, gate terminal are grounded after being electrically connected with the capacitor C;The non-inverting input terminal input reference voltage of the operational amplifier
Vref;The inverting input terminal of the operational amplifier is electrically connected to the common end of concatenated two resistance (R1, R2);Second
The drain electrode end of a metal-oxide-semiconductor Q2 is electrically connected after passing through a switch K1 with external power supply, and the drain electrode end of third metal-oxide-semiconductor Q3 passes through another
It is electrically connected after one switch K2 with the external power supply Vbat, the source terminal of second metal-oxide-semiconductor Q2 and third metal-oxide-semiconductor Q3
Collectively as the output end of the low pressure difference linear voltage regulator.
In the LDO circuit structure of the present embodiment, the non-inverting input terminal input reference voltage Vref of operational amplifier, the operation
The inverting input terminal of amplifier then inputs the feedback voltage from concatenated feedback resistance R1, R2 intermediate value, and operational amplifier will
Output end (op-amp output voltage VG) after equivalent amplification converts again after reference voltage Vref and feedback voltage are compared
It is electrically connected with the gate terminal of first metal-oxide-semiconductor Q1, second metal-oxide-semiconductor Q2 and third metal-oxide-semiconductor Q3, the source of first metal-oxide-semiconductor Q1
It is grounded, is grounded after the output end connection capacitor C of operational amplifier, first metal-oxide-semiconductor after being extremely sequentially connected in series feedback resistance R1, R2
The drain electrode end of Q1 and external power supply Vbat(such as battery) it is electrically connected, the drain electrode end of second metal-oxide-semiconductor Q2 passes through after switch K1
It being electrically connected with external power supply Vbat, the drain electrode end of third metal-oxide-semiconductor Q3 is electrically connected after passing through switch K2 with external power supply Vbat, the
Output end (output voltage of the source terminal of two metal-oxide-semiconductor Q2 and third metal-oxide-semiconductor Q3 collectively as low pressure difference linear voltage regulator
Vout).
In the LDO circuit structure, due to the presence of bulky capacitor C, so that in low voltage difference linear stabilizer output voltage Vout
Load Switching power when, VG can be held, so that output voltage Vout does not have big voltage change.Switch K1,
K2 is switched according to the demand of size of current, for example switch K1 and K2 are closed, if the source terminal of the second metal-oxide-semiconductor Q2 is defeated
Electric current out is 1mA, and the electric current of the source terminal output of third metal-oxide-semiconductor Q3 is 4mA, then the electric current of LDO output is 5mA.Such as
Fruit only wants to the electric current of 1mA, then can disconnect switch K2, equally, will switch K1 if only wanting to the electric current of output 4mA
It disconnects, K1 closure.Specifically, switching on-off the control really by control module (control chip).The LDO can be as needed
Different size of electric current is provided, for example the LDO can export the low current of 1uA, can also export the electric current of 5mA.Static random
Access memory it is in running order when, due to by system power supply come core to static random access memory and outer
Power pin power supply is enclosed, is powered without the low pressure difference linear voltage regulator (LDO) of low-tension supply module, therefore, control module control
The switch K1 and K2 made in the LDO is disconnected, at this point, the LDO only consumes 1-2 microamperes of electric current (circuit in dotted line frame in Fig. 5),
The output end voltage VG of operational amplifier is held by feedback control loop.At this point, the power consumption of LDO consumption is also very small.
And when the working condition of static random access memory switches, it is supplied to static random access memory
The power supply of core power supply is changed, that is, the load Switching power of VOUT, at this time since capacitor C is bigger, so
The output voltage VG of operational amplifier can also be held, so that the VOUT of output does not have big voltage change, not yet
It needs to consume very big electric current.
For the LDO(low pressure difference linear voltage regulator of other structures) for, capless-LDO can be using based on operation amplifier
The feedback control loop mode of device designs, and in order to guarantee that loop can be stablized under different loads electric current, often to consume very big
Electric current, in addition because operating mode switching, generally require consumption very high current be just unlikely to switch when generate it is bigger
Voltage-drop, and the present embodiment propose LDO it is then different, which can be in the feelings of not high-current consumption
Voltage-drop when meeting switching under condition only has 30mV.Specifically, static random access memory is just in the present embodiment
Under normal working condition, dotted line irises out the electric current that part only consumes 1 ~ 2 microampere in Fig. 5, and by LOOP, VG, this voltage put is held.
So this LDO can both export the low current of 1uA or provide the high current of 5mA, and consumption extracurrent is not needed just
The stabilization of LDO may be implemented.Moreover, when the load Switching power of VOUT, because capacitor C is bigger, it is possible to
VG is held, so VOUT does not have big voltage change.Therefore, the entire framework of the present embodiment is realizing small voltage-
While drop, does not need to consume big electric current, taken into account the demand of low-power consumption yet.
Based on the same technical idea, the invention also discloses a kind of sides for reducing static random access memory power consumption
Method, this method can be applied to the system of the present invention for reducing static random access memory power consumption, specifically, side of the present invention
Method embodiment is as shown in Figure 6, which comprises
S100 reads the working condition of the static random access memory;
S200 gives the static random by different power modules according to the working condition of the static random access memory
Access memory provides different supply voltages.
Specifically, above-mentioned steps S200 includes:
S210 disconnects low-tension supply module, control system power supply when the static random access memory is in running order
Peripheral power pin of the module by the first supply network module to the static random access memory is powered, and described in control
Core power pin of the system power supply module by the second supply network module to the static random access memory supplies
Electricity provides operating voltage required when static random access memory work;
S220 when the static random access memory in a dormant state when, the low-tension supply module is connected, described in disconnection
System power supply module;It controls the low-tension supply module and is deposited by the second supply network module to the static random-access
It takes the core power pin of device to power, suspend mode voltage required when the static random access memory suspend mode is provided.
In this method embodiment, after reading the working condition of static random access memory, according to its working condition
Difference, using different powering modes, thus substantially reduce static random access memory for electrical power consumed.Specifically, when quiet
When state random access memory is in running order, similarly to the prior art, pass through system power supply module and the first supply network
Module is powered to the peripheral power pin of static random access memory, in addition, system power supply module also supplies electricity to the second power supply
Network module takes electricity convenient for the core power pin of static random access memory from the second supply network module, guarantees quiet
The power demands of state random access memory normal operating conditions.And in a dormant state for static random access memory
When, then passing through another power module --- low-tension supply module is powered, specifically, at this point, system power supply module is closed, and
Low-tension supply module can be turned on, and low-tension supply module is by the second supply network module to the core of static random access memory
The power supply of heart power pin, guarantees the power demands of its dormant state.Method through this embodiment, greatly reduces static random
Access storage for electrical power consumed, also greatly reduce system electric leakage.
Another embodiment of the method for the present invention, as shown in fig. 7, comprises:
S010 sets up a low-tension supply module, the second supply network module, and the low-tension supply module is powered by described second
Network module provides suspend mode voltage when giving the static random access memory suspend mode;
S100 reads the working condition of the static random access memory;
S210 disconnects low-tension supply module, control system power supply when the static random access memory is in running order
Peripheral power pin of the module by the first supply network module to the static random access memory is powered, and described in control
Core power pin of the system power supply module by the second supply network module to the static random access memory supplies
Electricity provides operating voltage required when static random access memory work;
S220 when the static random access memory in a dormant state when, the low-tension supply module is connected, described in disconnection
System power supply module;It controls the low-tension supply module and is deposited by the second supply network module to the static random-access
It takes the core power pin of device to power, suspend mode voltage required when the static random access memory suspend mode is provided.
The present embodiment on the basis of the above embodiments, increases setting for low-tension supply module and the second supply network module
Vertical step, it is contemplated that only need core power pin to power when static random access memory suspend mode, therefore, can specially set
A set of low-tension supply feed system is found, specifically, a low-tension supply module can be designed, it is possible to provide static random access memory is stopped
Required suspend mode voltage when dormancy state, is then supplied to the second supply network module for the suspend mode voltage, and static random-access is deposited
The core power pin of reservoir then can take electricity from the second supply network module, keep its dormant state, internal data will not
It loses.And when dormant state, system power supply module and the first supply network module can't be to static random access memories
Peripheral power pin is powered, and therefore, is greatly reduced system electric leakage, is also reduced the function of static random access memory
Consumption.
In above-described embodiment, the control low-tension supply module in step S220 passes through the second supply network module
To the core power pin power supply of the static random-access memory access, the static random access memory suspend mode when institute is provided
Need suspend mode voltage include:
S221 controls the low-tension supply module and exports suspend mode voltage required when the static random access memory suspend mode;And
Suspend mode voltage after conversion is supplied to the second supply network module, be convenient for the static random access memory suspend mode when from
Suspend mode voltage required when suspend mode is obtained in the second supply network module.
When static random access memory in a dormant state when, system power supply module is in close state, thus system
Power module can not also give the first supply network module and the second supply network module for power supply;At this point, low-tension supply module then by
It opens, powers to provide core for static random access memory, specifically, low-tension supply module is by externally input power supply
Voltage carries out voltage conversion, so that output meets lower voltage required when static random access memory suspend mode, that is, stops
Then dormancy voltage is supplied to the core power pin of static random access memory by the second supply network module again, thus
It is set to guarantee core power supply, then in a dormant state, internal data will not lose static random access memory.
Preferably, the low-tension supply module is a low pressure difference linear voltage regulator, when the static random access memory
Slave working condition when being switched to dormant state, the low pressure difference linear voltage regulator provides for the static random access memory
Stable suspend mode voltage.
Specifically, as shown in figure 5, the low pressure difference linear voltage regulator include: an operational amplifier, three metal-oxide-semiconductors (point
Wei Q1, Q2, Q3), two switches (respectively K1, K2), two resistance (respectively R1, R2) and a capacitor C;Wherein: institute
The output end for stating operational amplifier is electrically connected with the grid of three metal-oxide-semiconductors (Q1, Q2, Q3) respectively, wherein first metal-oxide-semiconductor Q1
Source electrode be sequentially connected in series two resistance (R1, R2) and be grounded afterwards, and its drain electrode meets external power supply Vbat, grid and the capacitor C
It is grounded after electrical connection;The non-inverting input terminal input reference voltage Vref of the operational amplifier;The reverse phase of the operational amplifier
Input terminal is electrically connected to the common end of concatenated two resistance (R1, R2);The drain electrode of second metal-oxide-semiconductor Q2 is opened by one
Be electrically connected after closing K1 with external power supply, the drain electrode of third metal-oxide-semiconductor Q3 by after another switch K2 with the external power supply
The source terminal of Vbat electrical connection, second metal-oxide-semiconductor Q2 and third metal-oxide-semiconductor Q3 are collectively as the low pressure difference linearity pressure stabilizing
The output end of device.
For the LDO(low pressure difference linear voltage regulator of other structures) for, capless-LDO can be using based on operation amplifier
The feedback control loop mode of device designs, and in order to guarantee that loop can be stablized under different loads electric current, often to consume very big
Electric current, in addition because operating mode switching, generally require consumption very high current be just unlikely to switch when generate it is bigger
Voltage-drop, and the present embodiment propose LDO it is then different, which can be in the feelings of not high-current consumption
Voltage-drop when meeting switching under condition only has 30mV.Specifically, static random access memory is just in the present embodiment
Under normal working condition, dotted line irises out the electric current that part only consumes 1 ~ 2 microampere in Fig. 5, and by LOOP, VG, this voltage put is held.
So this LDO can both export the low current of 1uA or provide the high current of 5mA, and consumption extracurrent is not needed just
The stabilization of LDO may be implemented.Moreover, when the load Switching power of VOUT, because capacitor C is bigger, it is possible to
VG is held, so VOUT does not have big voltage change.Therefore, the entire framework of the present embodiment is realizing small voltage-
While drop, does not need to consume big electric current, taken into account the demand of low-power consumption yet.
Carry out core power supply in the present embodiment, when low pressure difference linear voltage regulator aims at static random access memory suspend mode and
If mainly considering lower voltage value required when static random access memory suspend mode, design difficulty is greatly reduced.And it is same
Sample, in the present embodiment, static random access memory in a dormant state when, system power supply module is no longer deposited for static random
Access to memory power supply, greatly reduce system electric leakage, also reduce static random access memory for electrical power consumed.
Although preferred embodiments of the present invention have been described, it is created once a person skilled in the art knows basic
Property concept, then additional changes and modifications may be made to these embodiments.So it includes excellent that the following claims are intended to be interpreted as
It selects embodiment and falls into all change and modification of the scope of the invention.
Obviously, various changes and modifications can be made to the invention without departing from essence of the invention by those skilled in the art
Mind and range.In this way, if these modifications and changes of the present invention belongs to the range of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to include these modifications and variations.
Claims (10)
1. a kind of system for reducing static random access memory power consumption, which is characterized in that including control module, system power supply mould
Block, low-tension supply module, the first supply network module, the second supply network module and static random access memory;The control
Molding block is connected with the system power supply module, low-tension supply module and static random access memory respectively;It is described it is static with
Machine access memory is connected with the first supply network module and the second supply network module respectively, the system electricity
Source module is connected with the first supply network module, the second supply network module respectively, and the low-tension supply module
It is connected with the second supply network module, in which:
When the static random access memory is in running order, it is disconnected that the control module controls the low-tension supply module
It opens, periphery of the system power supply module by the first supply network module to the static random access memory powers
Pin power supply, and the system power supply module also gives the static random access memory by the second supply network module
The power supply of core power pin, required operating voltage when static random access memory work is provided;
When the static random access memory in a dormant state when, the control module controls the low-tension supply module and leads
Lead to and control the system power supply module and disconnects;The low-tension supply module is by the second supply network module to described
The core power pin of static random-access memory access is powered, and required when the static random access memory suspend mode stop is provided
Dormancy voltage.
2. a kind of system for reducing static random access memory power consumption according to claim 1, which is characterized in that described
Low-tension supply module includes a low pressure difference linear voltage regulator.
3. a kind of system for reducing static random access memory power consumption according to claim 2, which is characterized in that described
Low pressure difference linear voltage regulator includes: an operational amplifier, three metal-oxide-semiconductors, two switches, two resistance and a capacitor;Its
In:
The output end of the operational amplifier is electrically connected with the grid of three metal-oxide-semiconductors respectively, wherein the source electrode of first metal-oxide-semiconductor
It is grounded after being sequentially connected in series two resistance, and its drain electrode connects external power supply, grid is grounded after being electrically connected with the capacitor;The fortune
Calculate the non-inverting input terminal input reference voltage of amplifier;The inverting input terminal of the operational amplifier is electrically connected to described concatenated
The common end of two resistance;The drain electrode of second metal-oxide-semiconductor after a switch with external power supply by being electrically connected, third metal-oxide-semiconductor
Drain electrode by another switch after be electrically connected with the external power supply, the source electrode of second metal-oxide-semiconductor and third metal-oxide-semiconductor
Hold the output end collectively as the low pressure difference linear voltage regulator.
4. a kind of system for reducing static random access memory power consumption according to claim 1, which is characterized in that described
System power supply module include: power submodule and with the switch submodule that is connected of power supply submodule, the switch submodule
Also it is connected with the first supply network module, the second supply network module.
5. a kind of system for reducing static random access memory power consumption according to claim 4, which is characterized in that described
Switching submodule includes: first switch unit and second switch unit;The first switch unit and first supply network
Module is connected, and the second switch unit is connected with the second supply network module.
6. a kind of system for reducing static random access memory power consumption according to claim 1-5, feature
It is, the control module includes: state acquisition submodule, and the handover operation submodule being connected with the state acquisition submodule
Block, in which:
The state acquisition submodule obtains the working condition of the static random access memory;
The work for the static random access memory that the handover operation submodule is got according to the state acquisition submodule
Make state, controls the switch of the system power supply module and the low-tension supply module.
7. a kind of method for reducing static random access memory power consumption, which is characterized in that be applied to any one of claim 1-6
The system of the reduction static random access memory power consumption, which comprises
Read the working condition of the static random access memory;
According to the working condition of the static random access memory, the static random-access is given by different power modules
Memory provides different supply voltages, specifically includes:
When the static random access memory is in running order, low-tension supply module, control system power module are disconnected
Peripheral power pin by the first supply network module to the static random access memory is powered, and controls the system
Core power pin of the power module by the second supply network module to the static random access memory is powered, and is mentioned
Required operating voltage when for static random access memory work;
When the static random access memory in a dormant state when, the low-tension supply module is connected, disconnects the system
Power module;The low-tension supply module is controlled by the second supply network module to the static random-access memory access
Core power pin power supply, suspend mode voltage required when the static random access memory suspend mode is provided.
8. a kind of method for reducing static random access memory power consumption according to claim 7, which is characterized in that reading
Before the working condition for taking the static random access memory further include:
A low-tension supply module, the second supply network module are set up, the low-tension supply module passes through second supply network
Module provides suspend mode voltage when giving the static random access memory suspend mode.
9. according to a kind of described in any item methods for reducing static random access memory power consumption of claim 7 or 8, feature
It is, controls core of the low-tension supply module by the second supply network module to the static random-access memory access
The power supply of heart power pin, required suspend mode voltage includes: when providing the static random access memory suspend mode
It controls the low-tension supply module and the outer power voltage of input is converted into the static random access memory suspend mode
The suspend mode voltage of Shi Suoxu;And the suspend mode voltage after conversion is supplied to the second supply network module, it is convenient for the static state
Suspend mode voltage required when suspend mode is obtained when random access memory suspend mode from the second supply network module.
10. a kind of method for reducing static random access memory power consumption according to claim 9, which is characterized in that institute
Stating low-tension supply module includes a low pressure difference linear voltage regulator, when the slave working condition of the static random access memory switches
When for dormant state, the low pressure difference linear voltage regulator provides stable suspend mode voltage for the static random access memory.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910274520.4A CN109741771A (en) | 2019-04-08 | 2019-04-08 | A kind of system and method reducing static random access memory power consumption |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910274520.4A CN109741771A (en) | 2019-04-08 | 2019-04-08 | A kind of system and method reducing static random access memory power consumption |
Publications (1)
Publication Number | Publication Date |
---|---|
CN109741771A true CN109741771A (en) | 2019-05-10 |
Family
ID=66371419
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201910274520.4A Pending CN109741771A (en) | 2019-04-08 | 2019-04-08 | A kind of system and method reducing static random access memory power consumption |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN109741771A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111328131A (en) * | 2020-02-24 | 2020-06-23 | 重庆物奇科技有限公司 | NB-IoT paging processing method and system |
CN112885390A (en) * | 2021-02-24 | 2021-06-01 | 上海华力微电子有限公司 | Low-power-consumption static random access memory circuit with data holding function |
CN114035854A (en) * | 2020-07-21 | 2022-02-11 | 珠海全志科技股份有限公司 | SoC-based image processing system starting control method and device |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101383179A (en) * | 2008-09-22 | 2009-03-11 | 成都市华为赛门铁克科技有限公司 | Storage system and power supplying method for the storage system |
CN203739810U (en) * | 2013-12-25 | 2014-07-30 | 一汽海马汽车有限公司 | Power supply device of vehicle controller and vehicle control system with same |
US20150063007A1 (en) * | 2013-08-30 | 2015-03-05 | Jong-Sang Choi | Static random access memory device including dual power line and bit line precharge method thereof |
CN104793672A (en) * | 2014-01-16 | 2015-07-22 | 北京大学 | Low-dropout linear voltage regulator with high power supply rejection ratio |
CN107274920A (en) * | 2016-04-08 | 2017-10-20 | 中芯国际集成电路制造(上海)有限公司 | Voltage holding circuit, memory and electronic equipment for memory |
-
2019
- 2019-04-08 CN CN201910274520.4A patent/CN109741771A/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101383179A (en) * | 2008-09-22 | 2009-03-11 | 成都市华为赛门铁克科技有限公司 | Storage system and power supplying method for the storage system |
US20150063007A1 (en) * | 2013-08-30 | 2015-03-05 | Jong-Sang Choi | Static random access memory device including dual power line and bit line precharge method thereof |
CN203739810U (en) * | 2013-12-25 | 2014-07-30 | 一汽海马汽车有限公司 | Power supply device of vehicle controller and vehicle control system with same |
CN104793672A (en) * | 2014-01-16 | 2015-07-22 | 北京大学 | Low-dropout linear voltage regulator with high power supply rejection ratio |
CN107274920A (en) * | 2016-04-08 | 2017-10-20 | 中芯国际集成电路制造(上海)有限公司 | Voltage holding circuit, memory and electronic equipment for memory |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111328131A (en) * | 2020-02-24 | 2020-06-23 | 重庆物奇科技有限公司 | NB-IoT paging processing method and system |
CN111328131B (en) * | 2020-02-24 | 2023-02-07 | 重庆物奇科技有限公司 | NB-IoT paging processing method and system |
CN114035854A (en) * | 2020-07-21 | 2022-02-11 | 珠海全志科技股份有限公司 | SoC-based image processing system starting control method and device |
CN112885390A (en) * | 2021-02-24 | 2021-06-01 | 上海华力微电子有限公司 | Low-power-consumption static random access memory circuit with data holding function |
CN112885390B (en) * | 2021-02-24 | 2024-08-09 | 上海华力微电子有限公司 | Low-power-consumption static random access memory circuit with data retention function |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US9690366B2 (en) | Saving power when in or transitioning to a static mode of a processor by using feedback-configured voltage regulator | |
EP1361664B1 (en) | LDO regulator with sleep mode | |
US11543843B2 (en) | Providing low power charge pump for integrated circuit | |
US11283345B2 (en) | Multi-switch voltage regulator | |
US7812582B2 (en) | System and method of power distribution control of an integrated circuit | |
CN108241396A (en) | A kind of low pressure difference linear voltage regulator for improving transient response speed | |
US10707753B2 (en) | Power regulation with charge pumps | |
CN109741771A (en) | A kind of system and method reducing static random access memory power consumption | |
US8026703B1 (en) | Voltage regulator and method having reduced wakeup-time and increased power efficiency | |
WO2008083328A2 (en) | Mcu with on-chip boost converter controller | |
CN114397957A (en) | Low-power-consumption power management circuit for MCU chip, and MCU chip | |
US20040257151A1 (en) | Method and apparatus for dual output voltage regulation | |
CN105843318A (en) | Low dropout regulator circuit | |
US20210318708A1 (en) | Shutdown mode for bandgap reference to reduce turn-on time | |
CN208384454U (en) | Power supply power consumption control circuit and wearable electronic | |
EP3694092B1 (en) | System and method of power distribution control of an integrated circuit | |
CN118466658A (en) | Ultralow-power-consumption LDO circuit for solving overshoot of output voltage during power-up and electronic terminal applied by ultralow-power-consumption LDO circuit | |
CN112511144B (en) | A circuit for dynamically adjusting power consumption | |
CN101825909A (en) | voltage regulator circuit | |
CN105159385B (en) | Low-power-dissipation low-dropout voltage regulator | |
CN211701852U (en) | Voltage reduction module and mobile terminal | |
CN213634412U (en) | Power supply control circuit, communication module and electronic equipment | |
CN110289758A (en) | A kind of low-power consumption power supply circuit and electronic equipment | |
CN215954316U (en) | Power management framework and chip | |
CN209805473U (en) | Control circuit and charger of power supply |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20190510 |