CN110010719B - Doping method - Google Patents
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- CN110010719B CN110010719B CN201810011757.9A CN201810011757A CN110010719B CN 110010719 B CN110010719 B CN 110010719B CN 201810011757 A CN201810011757 A CN 201810011757A CN 110010719 B CN110010719 B CN 110010719B
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- 238000000034 method Methods 0.000 title claims abstract description 27
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract description 23
- 229920005591 polysilicon Polymers 0.000 claims abstract description 22
- 238000005468 ion implantation Methods 0.000 claims abstract description 21
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 20
- 238000002513 implantation Methods 0.000 claims abstract description 18
- 230000007935 neutral effect Effects 0.000 claims abstract description 15
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 8
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 6
- 239000011574 phosphorus Substances 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical group [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 5
- 229910002804 graphite Inorganic materials 0.000 claims description 5
- 239000010439 graphite Substances 0.000 claims description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 4
- 239000000919 ceramic Substances 0.000 claims description 4
- 238000009792 diffusion process Methods 0.000 claims description 4
- 239000002019 doping agent Substances 0.000 claims description 4
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 4
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 4
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 4
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 3
- 229910052796 boron Inorganic materials 0.000 claims description 3
- 238000011065 in-situ storage Methods 0.000 claims description 3
- 238000002347 injection Methods 0.000 claims 1
- 239000007924 injection Substances 0.000 claims 1
- 238000002955 isolation Methods 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 7
- 238000000137 annealing Methods 0.000 description 4
- 239000007943 implant Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 238000005215 recombination Methods 0.000 description 2
- 230000006798 recombination Effects 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000003153 chemical reaction reagent Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000007858 starting material Substances 0.000 description 1
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
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- H—ELECTRICITY
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- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
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Abstract
本发明公开了一种掺杂方法，包括：在一第一导电类型衬底上形成一第二导电类型预掺杂层；在该第二导电类型预掺杂层上设置一第一掩膜；对该第一开放区域进行第一导电类型离子注入以中和该第一开放区域的第二导电类型掺杂；在该第二导电类型预掺杂层上设置一第二掩膜；对该第二开放区域进行第一导电类型离子注入以形成第一导电类型掺杂区，去除该第二掩膜，其中未经注入的第二导电类型预掺杂层为第二导电类型掺杂区，该第一导电类型掺杂区和第二导电类型掺杂区被中性区隔离开。在对IBC电池的背面进行掺杂时，引入了非晶硅或多晶硅，通过在非晶硅或多晶硅中的反型注入，来形成P区和N区之间的隔离。
The invention discloses a doping method, comprising: forming a second conductive type pre-doped layer on a first conductive type substrate; setting a first mask on the second conductive type pre-doped layer; performing first conductivity type ion implantation on the first open area to neutralize the second conductivity type doping of the first open area; setting a second mask on the second conductivity type pre-doped layer; The first conductive type ion implantation is performed on the two open regions to form the first conductive type doped region, the second mask is removed, wherein the unimplanted second conductive type pre-doped layer is the second conductive type doped region, the The doped region of the first conductivity type and the doped region of the second conductivity type are separated by the neutral region. When doping the backside of the IBC cell, amorphous or polysilicon is introduced, and isolation between the P and N regions is formed by inversion implantation in the amorphous or polysilicon.
Description
Technical Field
The present invention relates to a doping method, and more particularly, to a doping method for a back contact cell.
Background
The IBC (indirect back contact) solar cell is the back junction cell which is the earliest research, and is mainly used in a light condensing system at first, the highest conversion efficiency of the IBC solar cell manufactured by sun ware company can reach 24%, and then since the IBC solar cell adopts a photolithography process, the cost is difficult to reduce due to the complicated operation caused by photolithography, which causes difficulty in commercial application in civil or common occasions. In order to reduce the cost, a P area and an N area which are arranged in a crossed mode are formed by using mask plates, but a plurality of mask plates are needed in the manufacturing process, so that the manufacturing cost is increased, the problem that different mask plates need to be calibrated due to the fact that the photoetching technology needs to be calibrated accurately is also caused, and difficulty is brought to the manufacturing process. Furthermore, if a photoresist is used as a mask, the steps of forming the mask and removing the mask are also relatively numerous. In addition, in the existing production line, the P region and the N region are formed by two thermal diffusions. To isolate the P and N regions, a mask etch step is typically required, increasing process complexity and also reducing cell production yield. The newly developed polysilicon passivation electrode technology avoids minority carrier recombination at the contact part of a metal semiconductor, and greatly improves the open-circuit voltage of a crystalline silicon battery. This new technique is also used in IBC cell structures, but the same regions where P-doped polysilicon and N-doped polysilicon are in contact can cause severe recombination of carriers, which in turn reduces cell efficiency. In order to isolate the P-type polysilicon from the N-type polysilicon, an etching step is also required, which complicates the IBC cell production process.
Disclosure of Invention
The technical problem to be solved by the invention is to overcome the defects that the traditional mask is needed by adopting a thermal diffusion process when doping is carried out on the back surface of the IBC battery in the prior art, the process is complex, and the P area and the N area are difficult to isolate, and provide a doping method capable of ensuring the complete isolation of the P area and the N area.
The invention solves the technical problems through the following technical scheme:
a method of doping, comprising the steps of:
s1: forming a second conductive type pre-doped layer on a first conductive type substrate;
s2: arranging a first mask on the second conductive type pre-doped layer, wherein the area on the second conductive type pre-doped layer, which is not shielded by the first mask, is a first open area;
s3: performing a first conductive type ion implantation on the first open region to neutralize the second conductive type doping of the first open region, so that the first open region is in a neutral state, and then enabling the first conductive type substrate to leave the active region of the first mask;
s4: a second mask is arranged on the second conductive type pre-doped layer, and the area, which is not shielded by the second mask, on the second conductive type pre-doped layer is a second open area, wherein the second open area is overlapped with the first open area, and the second open area is smaller than the first open area;
s5: and performing first-conductivity-type ion implantation on the second open region to enable the second open region to form a first-conductivity-type doped region, and then enabling the first-conductivity-type substrate to leave the action region of the second mask, wherein the second-conductivity-type pre-doped layer which is not implanted is the second-conductivity-type doped region, the first open region which is subjected to the first-conductivity-type ion implantation only once is a neutral region, and the first-conductivity-type doped region and the second-conductivity-type doped region are separated by the neutral region, wherein the substrate can be moved to be not blocked by the mask any more, or the mask can be removed to enable the substrate to be not blocked by the mask any more.
Preferably, the second conductive type pre-doped layer is amorphous silicon or polysilicon doped with a second conductive type doping element.
Preferably, the second conductive-type pre-doped layer is formed by: and growing amorphous silicon or polycrystalline silicon on the first conductive type substrate, and doping a second conductive type doping element in situ.
Preferably, the second conductive-type pre-doped layer is formed by: growing amorphous silicon or polysilicon on the first conductivity type substrate, forming second conductivity type dopants in the amorphous silicon or polysilicon by ion implantation of second conductivity type dopant elements, or,
amorphous silicon or polycrystalline silicon is grown on the first conductivity type substrate, and second conductivity type doping is formed through thermal diffusion.
Preferably, the width of the neutral region is 0.1 μm to 500 μm, the width of the first conductive-type doped region is 10 μm to 3000 μm, and the width of the second conductive-type doped region is 10 μm to 3000 μm.
Preferably, the thickness of the second conductive-type pre-doped layer is 5nm to 500 nm.
Preferably, the second conductive type pre-doped layer is amorphous silicon and polysilicon implanted with boron at an implant dose of 5e14-5e15/cm2The implantation energy is 0.1keV to 10keV,
or the neutral region phosphorus implantation dosage (the implantation dosage of phosphorus in the second conductive type pre-doped layer by the first implantation) is 5e14-5e15/cm2The implantation energy is 0.1keV to 10keV,
or the first conductive type doped region is amorphous silicon or polysilicon implanted by phosphorus, and the implantation dosage (dosage of the second ion implantation) is 1e15-1e16/cm2The implantation energy is 0.1keV to 10 keV.
Preferably, the first mask is a graphite, ceramic, silicon oxide, aluminum oxide, silicon carbide or silicon wafer having a plurality of first slits,
the second mask is made of graphite, ceramics, silicon oxide, aluminum oxide, silicon carbide or silicon wafer with a plurality of second slits,
the first slits and the second slits are in one-to-one correspondence, and the directions of the slits are consistent.
Preferably, the width of the first slits is 50 μm to 1000 μm, the interval between the adjacent first slits is 1mm to 5mm,
or the width of the second slit is 50-1000 μm, and the distance between the adjacent second slits is 1-5 mm.
Preferably, the distance from the first mask to the first conductive type substrate is 1mm-20mm,
alternatively, the second mask is spaced from the first conductive type substrate by a distance of 1mm to 20 mm.
Preferably, the first mask and the second mask are located in the same ion implantation apparatus, an alignment error between the first mask and the second mask is 1 μm to 50 μm, and the alignment error is a perpendicular distance between a center line of the first slit and a center line of the corresponding second slit.
Preferably, the first mask and the second mask are different regions of the same mask plate, wherein the perpendicular distance between the central line of the first slit and the central line of the corresponding second slit is less than or equal to 50 μm.
After the first conductive type doped region, the second conductive type doped region and the neutral region are formed, annealing treatment is carried out on the structure, wherein the annealing temperature is 600-1000 ℃, and the annealing time is 1-90 minutes.
On the basis of the common knowledge in the field, the above preferred conditions can be combined randomly to obtain the preferred embodiments of the invention.
The reagents and starting materials used in the present invention are commercially available.
The positive progress effects of the invention are as follows:
when the back of the IBC cell is doped, amorphous silicon or polycrystalline silicon is introduced, and a mask with a proper size is placed between a beam current and a substrate to block partial region ion implantation. And, isolation between the P region and the N region is formed by inversion implantation in amorphous silicon or polysilicon. The process is simple and easy to implement, the process for isolating the P region from the N region greatly simplifies the production flow of the IBC battery, reduces the cost and improves the yield.
Drawings
Fig. 1 is a schematic view of forming a second conductive type pre-doped layer in embodiment 1 of the present invention.
Fig. 2 is a schematic diagram of forming a first mask in embodiment 1 of the present invention.
Fig. 3 is a schematic diagram of the first ion implantation in embodiment 1 of the present invention.
Fig. 4 is a schematic view of a structure obtained by removing the first mask after the first ion implantation is completed in embodiment 1 of the present invention.
Fig. 5 is a schematic diagram of forming a second mask in embodiment 1 of the present invention.
Fig. 6 is a schematic diagram of a second ion implantation in embodiment 1 of the present invention.
Fig. 7 is a schematic diagram of a doping structure obtained by removing the second mask after the second ion implantation is completed in embodiment 1 of the present invention.
Fig. 8 is a schematic diagram showing the arrangement of the first mask and the second mask in embodiment 3 of the present invention.
Fig. 9 is a schematic diagram illustrating the arrangement of the first mask and the second mask in embodiment 4 of the present invention.
Detailed Description
The invention is further illustrated by the following examples, which are not intended to limit the scope of the invention. The experimental methods without specifying specific conditions in the following examples were selected according to the conventional methods and conditions, or according to the commercial instructions.
Example 1
The doping method comprises the following steps:
referring to fig. 1, a second conductive-type pre-doped layer 101 is formed on a first conductive-type substrate 100 by: and growing polysilicon with the thickness of 300nm on the first conductive type substrate, and doping a second conductive type doping element in situ.
Referring to fig. 2, a first mask 2 is disposed on the second conductive type pre-doped layer 101, and a region of the second conductive type pre-doped layer not covered by the first mask is a first open region a1 (200 μm in width).
Referring to fig. 3 and 4, the first open region a1 is subjected to a first conductive type ion implantation to neutralize the second conductive type doping of the first open region at an implant dose of 1e15/cm2And implanting energy of 5keV to make the first open region in a neutral state, marking the polysilicon corresponding to the first open region with 102, and the portion blocked by the first mask 2 with 101, removing the first mask 2 or removing the silicon wafer from the region blocked by the first mask 2 to obtain the structure shown in fig. 4.
Referring to fig. 5, a second mask 3 is disposed on the second conductive type pre-doped layer 101, and a region of the second conductive type pre-doped layer not covered by the second mask is a second open region a2 (width 150 μm), wherein the second open region overlaps with the first open region, and the second open region is smaller than the first open region.
Referring to fig. 6 and 7, the second open region is subjected to a first conductive type ion implantation to form a first conductive type doped region 103 in the second open region at an implantation dose of 5e15/cm2And the implantation energy is 5keV, the second mask 3 is removed or the silicon wafer is moved out of the region shielded by the second mask, wherein the non-implanted second conductivity type pre-doped layer is a second conductivity type doped region, still denoted by 101, the first conductivity type doped region and the second conductivity type doped region are separated by a neutral region, i.e. polysilicon which has undergone only one implantation, still denoted by 102.
The second conductive type doping element is boron, the first conductive type doping element is phosphorus, the first mask and the second mask are both manufactured by graphite, and the distance between the first mask and the first conductive type substrate is 10mm when ions are implanted.
Example 2
The basic principle of embodiment 2 is the same as that of embodiment 1, except that: the second conductive type pre-doped layer is formed by implanting second conductive type doping elements into amorphous silicon. After the structure shown in fig. 7 is obtained by completing the two implantations, an annealing treatment is carried out at 800 ℃ for 30 minutes to convert the amorphous silicon into polysilicon.
The remainder of the examples are not mentioned with reference to example 1.
Example 3
Referring to fig. 8, the basic principle of embodiment 3 is consistent with embodiment 1, specifically, the first mask 2 and the second mask 3 are located in the same ion implantation apparatus, the first mask 2 is provided with a plurality of first slits 21, the second mask 3 is provided with a plurality of second slits 31 (only 3 slits are shown in the figure for simplicity), each first slit 21 and each second slit 31 correspond to each other one by one, and the alignment error between the first mask and the second mask is 10 μm. That is, the perpendicular distance (distance in the arrow Ar direction) of the center line 211 of the first slit 21 from the center line 311 of the second slit 31 is 10 μm.
Example 4
Referring to fig. 9, the basic principle of embodiment 4 is the same as that of embodiment 3, except that the first mask and the second mask are different regions of the same mask plate, i.e., the same mask plate is used for blocking in this embodiment, but the different regions of the mask plate are provided with first slits and second slits, which are respectively used as the first mask and the second mask (outlined by dotted lines, and still indicated by reference numerals 2 and 3). By adopting the arrangement mode, the calibration difficulty of the first mask 2 and the second mask 3 is reduced, and the calibration steps of the two masks can be omitted as long as the processing precision is ensured in the process of processing the slit. Therefore, the first conductive type doping area, the second conductive type doping area and the neutral area can be manufactured only by moving the substrate through the mask plate at one time, and the problem of position calibration of the first mask and the second mask is solved.
While specific embodiments of the invention have been described above, it will be appreciated by those skilled in the art that these are by way of example only, and that the scope of the invention is defined by the appended claims. Various changes and modifications to these embodiments may be made by those skilled in the art without departing from the spirit and scope of the invention, and these changes and modifications are within the scope of the invention.
Claims (12)
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| CN117637892B (en) * | 2024-01-26 | 2024-04-30 | 隆基绿能科技股份有限公司 | Back contact solar cell and photovoltaic module |
| CN118198155B (en) * | 2024-05-14 | 2024-10-29 | 金阳(泉州)新能源科技有限公司 | Combined passivation back contact battery with polycrystalline silicon high-resistance region and preparation and application thereof |
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| CN103975450A (en) * | 2011-10-11 | 2014-08-06 | 瓦里安半导体设备公司 | Method of creating two dimensional doping patterns in solar cells |
| CN105659395A (en) * | 2013-12-09 | 2016-06-08 | 太阳能公司 | Solar cell emitter region fabrication using ion implantation |
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| US20080295882A1 (en) * | 2007-05-31 | 2008-12-04 | Thinsilicon Corporation | Photovoltaic device and method of manufacturing photovoltaic devices |
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| CN103975450A (en) * | 2011-10-11 | 2014-08-06 | 瓦里安半导体设备公司 | Method of creating two dimensional doping patterns in solar cells |
| CN105659395A (en) * | 2013-12-09 | 2016-06-08 | 太阳能公司 | Solar cell emitter region fabrication using ion implantation |
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