CN109859681B - LED display driving circuit, display, driving method and driving chip - Google Patents
LED display driving circuit, display, driving method and driving chip Download PDFInfo
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- CN109859681B CN109859681B CN201910243509.1A CN201910243509A CN109859681B CN 109859681 B CN109859681 B CN 109859681B CN 201910243509 A CN201910243509 A CN 201910243509A CN 109859681 B CN109859681 B CN 109859681B
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Abstract
The invention provides an LED display driving circuit, a display, a driving method and a driving chip, comprising the following steps: a reference current source for generating a reference current; the current mirror comprises an input branch and an output branch, and is connected with the reference current source and used for amplifying the reference current; and the switch module is connected with the input branch and the output branch and is used for collecting state signals of the reference current and controlling the input branch and the output branch according to the state signals. The LED display driving circuit, the display, the driving method and the driving chip can effectively prevent large current from flowing into the LED, thereby ensuring the service life of the LED.
Description
Technical Field
The invention relates to the technical field of LED display driving, in particular to an LED display driving circuit, a display, a driving method and a driving chip.
Background
An LED (LIGHT EMITTING Diode) is a semiconductor device sensitive to voltage characteristics and has a negative temperature characteristic, so that it needs to be stably operated and protected during application. The LED device has certain requirements on the driving power supply, and the supply voltage is usually between 3-24V.
Typically, the operating current of the LED is between 5 and 20 mA. When a large current of more than 20mA flows through the LED, the LED display area may be highlighted. The prolonged highlighting can lead to burning out of the LED beads.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide an LED display driving circuit, a display, a driving method and a driving chip, which can effectively prevent a large current from flowing into an LED, thereby ensuring the service life of the LED.
To achieve the above and other related objects, the present invention provides an LED display driving circuit comprising: a reference current source for generating a reference current; the current mirror comprises an input branch and an output branch, and is connected with the reference current source and used for amplifying the reference current; and the switch module is connected with the input branch and the output branch and is used for collecting state signals of the reference current and controlling the input branch and the output branch according to the state signals.
In an embodiment of the present invention, the reference current source includes a first amplifier, a first NMOS tube, and a load resistor, where two input ends of the first amplifier are connected to a first reference voltage and one end of the load resistor, the other end of the load resistor is grounded, a gate of the first NMOS tube is connected to an output end of the first amplifier, a source of the first NMOS tube is connected to one end of the load resistor, and a drain of the first NMOS tube is connected to the input branch.
In an embodiment of the present invention, the input branch includes a first PMOS transistor, the output branch includes a second PMOS transistor, a gate of the first PMOS transistor is connected to a gate of the second PMOS transistor, both a gate and a drain of the first PMOS transistor are connected to the reference current source, and a drain of the second PMOS transistor is connected to an output end of the LED display driving circuit.
In an embodiment of the invention, the output branch further includes a third PMOS transistor, a source of the third PMOS transistor is connected to a drain of the second PMOS transistor, a gate is connected to a bias voltage, and a drain is connected to an output end of the LED display driving circuit.
In an embodiment of the invention, the switch module includes a signal generating circuit and a bidirectional switch; the signal generating circuit is connected with the reference current source and is used for generating the state signal; the bidirectional switch is arranged between the input branch and the output branch and is used for realizing on-off control of the input branch and the output branch according to the state signal.
In an embodiment of the present invention, the signal generating circuit includes a comparator, a schmitt trigger, a first D trigger and a second D trigger that are sequentially connected, where a positive input terminal of the comparator inputs the voltage on the load resistor, a negative input terminal inputs the first reference voltage, and the second trigger is connected to the bidirectional switch.
In an embodiment of the invention, the reference voltage source further includes a low-pass filter connected in series with the switch module and disposed between the input branch and the output branch.
In an embodiment of the present invention, the circuit further includes an amplifying module, configured to secondarily amplify the current of the output branch.
In an embodiment of the present invention, the amplifying module includes a second amplifier, a second NMOS tube, a third amplifier, a third NMOS tube, and a fourth NMOS tube, where two input ends of the second amplifier are respectively connected to a second reference voltage and the output branch, and an output end of the second amplifier is connected to a gate of the second NMOS tube; the source electrode of the second NMOS tube is grounded, and the drain electrode of the second NMOS tube is connected with the output branch circuit; the source electrode of the third NMOS tube is grounded, the grid electrode of the third NMOS tube is connected with the grid electrode of the second NMOS tube, and the drain electrode of the third NMOS tube is connected with the source electrode of the fourth NMOS tube; the drain electrode and the grid electrode of the fourth NMOS tube are connected with the output end of the third amplifier; and two input ends of the third amplifier are connected with the output branch and the drain electrode of the third NMOS tube.
In one embodiment of the invention, the LEDs include, but are not limited to, conventional LEDs, small pitch LEDs, mini LEDs, and micro LEDs.
The invention provides an LED display driving chip, which comprises the LED display driving circuit.
The invention provides an LED display, which comprises the LED display driving chip.
The invention also provides an LED display driving method, which comprises the following steps:
Generating a reference current;
Amplifying the reference current;
and collecting a state signal of the reference current, and realizing on-off control of the amplification according to the state signal.
In an embodiment of the present invention, when the status signal is a normal signal, amplification of the reference current is connected; and when the state signal is an abnormal signal, the amplification of the reference current is disconnected.
In an embodiment of the present invention, the method further includes performing a secondary amplification on the amplified current.
In one embodiment of the invention, the LEDs include, but are not limited to, conventional LEDs, small pitch LEDs, mini LEDs, and micro LEDs.
As described above, the LED display driving circuit, the display, the driving method and the driving chip of the present invention have the following beneficial effects:
(1) The reference current source can be monitored in real time, so that large current is effectively prevented from flowing into the LED;
(2) The power consumption of the driving circuit can be reduced, the service life of the LED is guaranteed, and the LED driving circuit has high practicability.
Drawings
FIG. 1 is a schematic diagram of an LED display driving circuit according to an embodiment of the invention;
FIG. 2 is a circuit diagram of an LED display driving circuit according to an embodiment of the invention;
FIG. 3 is a schematic diagram of a signal generating circuit according to an embodiment of the invention;
FIG. 4 is a signal timing diagram of the LED display driving circuit of FIG. 2 in one embodiment;
FIG. 5 is a schematic diagram of an LED display chip according to an embodiment of the invention;
FIG. 6 is a schematic diagram of an LED display according to an embodiment of the invention;
fig. 7 is a flowchart of an LED display driving method according to an embodiment of the invention.
Description of element reference numerals
1. Reference current source
2. Current mirror
21. Input branch
22. Output branch
3. Switch module
4. Amplifying module
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention. It should be noted that the following embodiments and features in the embodiments may be combined with each other without conflict.
It should be noted that the illustrations provided in the following embodiments merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complicated.
According to the LED display driving circuit, the display, the driving method and the driving chip, the reference current source is monitored in real time, so that large current can be effectively prevented from flowing into the LED, and the service life of the LED is guaranteed.
As shown in fig. 1, in an embodiment, the LED display driving circuit of the present invention includes a reference current source 1, a current mirror 2, and a switch module 3.
The reference current source 1 is used for generating a reference current. As shown in fig. 2, in an embodiment, the reference current source 1 includes a first amplifier AMP1, a first NMOS tube NCH1, and a load resistor REXT, two input ends of the first amplifier AMP1 are respectively connected to a first reference voltage VREF1 and one end of the load resistor REXT, the other end of the load resistor REXT is grounded, a gate of the first NMOS tube NCH1 is connected to an output end of the first amplifier AMP1, a source of the first NMOS tube NCH1 is connected to one end of the load resistor REXT, and a drain of the first NMOS tube is connected to the input branch. In the figure, the first reference voltage VREF1 is a preset internal reference voltage, and the first amplifier AMP1 and the first NMOS NCH1 form a negative feedback loop, so that the voltage VREXT on the load resistor is equal to the first reference voltage VREF1.
The current mirror 2 comprises an input branch and an output branch, and is connected with the reference current source 1 and used for amplifying the reference current. As shown in fig. 2, in an embodiment, the input branch 21 includes a first PMOS tube PCH1, the output branch 22 includes a second PMOS tube PCH2, a gate of the first PMOS tube PCH1 is connected to a gate of the second PMOS tube PCH2, a gate and a drain of the first PMOS tube PCH1 are both connected to a drain of a first NMOS tube NCH1 in the reference current source 1, and a drain of the second PMOS tube PCH2 is connected to an output end of the LED display driving circuit. The sources of the first PMOS tube PCH1 and the second PMOS tube PCH2 are connected with corresponding driving voltages. Wherein, the size (size) ratio of the second PMOS tube PCH2 to the first PMOS tube PCH1 is K1. That is, when the load resistor is operating normally, the input current of the input branch is VREXT/REXT, and the output current of the output branch is K1 (VREXT/REXT).
In an embodiment of the present invention, the output branch 22 further includes a third PMOS PCH3, a source of the third PMOS PCH3 is connected to a drain of the second PMOS PCH2, a gate is connected to a bias voltage Vbias, and a drain is connected to an output end of the LED display driving circuit. By setting the third PMOS PCH3, drain voltages of the first PMOS PCH1 and the second PMOS PCH2 are equal, so that mismatch current between the first PMOS PCH1 and the second PMOS PCH2 is reduced.
The switch module 3 is connected to the input branch 21 and the output branch 22, and is configured to collect a state signal of the reference current, and implement control of the input branch and the output branch according to the state signal. As shown in fig. 2, in an embodiment of the present invention, the switch module 3 includes a signal generating circuit (not shown) and a bi-directional switch K1. As shown in fig. 3, the signal generating circuit is connected to the reference current source 1 for generating a status signal (Short signal); the bidirectional switch K1 is disposed between the input branch 21 and the output branch 22, and is configured to connect and disconnect the input branch 21 and the output branch 22 according to the status signal. When the load resistor REXT works normally, the reference current is in a normal interval, the signal generating circuit generates a first level signal, such as a low level signal, as a normal signal, and the bidirectional switch K1 communicates the input branch 21 and the output branch 22 to ensure that the LED display driving circuit works normally; when the load resistor REXT is disconnected, the signal generating circuit generates a second level signal, such as a high level signal, as an abnormal signal, the bidirectional switch K1 is connected with the signal generating circuit, and the input branch circuit and the output branch circuit are disconnected to cut off the LED display driving circuit, so that the phenomenon of high brightness of the LED lamp beads is avoided.
As shown in fig. 3, in an embodiment of the present invention, the signal generating circuit includes a comparator C1, a Schmitt trigger, a first D trigger DFF1, and a second D trigger DFF2, which are sequentially connected, where a positive input terminal of the comparator C1 inputs the voltage VREXT on the load resistor REXT, a negative input terminal inputs the first reference voltage VREF1, an output terminal is connected to an input terminal of the Schmitt trigger Schmitt, an output terminal of the Schmitt trigger Schmitt is connected to an input terminal of the first D trigger DFF1, an output terminal of the first trigger DFF1 is connected to an output terminal of the second D trigger DFF2, and an output terminal of the second trigger DFF2 is connected to the bidirectional switch K1. Meanwhile, a Clock signal Clock is input to Clock signal terminals of the first D flip-flop DFF1 and the second D flip-flop DFF 2. When the load resistor REXT works normally, the voltage VREXT on the load resistor is equal to the first reference voltage VREF1 due to the action of the first amplifier AMP1, the comparator C1 outputs a high level, the RN outputs a low level after passing through the Schmitt trigger, the first D trigger DFF1 and the second D trigger DFF2 are reset by the RN, and the output Short signal is a low level. When the load resistor REXT is shorted, the voltage VREXT across the load resistor is lower than the first reference voltage VREF1, the comparator C1 outputs a low level, the RN outputs a high level after passing through the Schmitt trigger, the first D flip-flop DFF1 and the second D flip-flop DFF2 end the reset state, when the Clock signal Clock arrives at a rising edge, the output of the first D flip-flop DFF1 is high, when the Clock signal Clock arrives at a second rising edge, the output of the second D flip-flop DFF2 is high, and the output of the Short signal is high.
As shown in fig. 4, when the load resistor REXT works normally, the Short signal is at a low level, the bidirectional switch K1 turns on the gate of the first PMOS transistor PCH1, and the current of the second PMOS transistor PCH2 is determined by the current on the first PMOS transistor PCH 1. When the load resistor REXT is Short-circuited, the Short signal becomes high level, the grid electrode of the PMOS tube PCH2 is pulled to the power supply potential, the current on the grid electrode becomes 0, and the output channel is also closed.
Since the Short signal needs at least one clock cycle to trigger, when the load resistor REXT is shorted, the gate voltage of the first PMOS transistor PCH1 will be low, so as to avoid the large current of the first PMOS transistor PCH1 from mirroring the second PMOS transistor PCH 2. Specifically, the low-pass filter comprises a resistor R1 and a capacitor C1, one end of the resistor R1 is connected with the switch module, the other end of the resistor R1 is connected with the output branch, one end of the capacitor C1 is connected with a capacitor driving voltage, and the other end of the capacitor C1 is connected with the other end of the resistor R1. Before the switch state of the switch module 4 is switched, the low-pass filter can filter out the voltage variation on the gate of the first PMOS transistor PCH1, so as to avoid the occurrence of high brightness of the LED lamp bead.
In an embodiment of the invention, as shown in fig. 2, the LED display driving circuit of the invention further includes an amplifying module 4. The amplifying module 4 is connected with the output branch and is used for carrying out secondary amplification on the current of the output branch. Specifically, the amplifying module 4 includes a second amplifier AMP2, a second NMOS tube NCH2, a third amplifier AMP3, a third NMOS tube NCH3, and a fourth NMOS tube NCH4, where two input ends of the second amplifier AMP2 are respectively connected to a second reference voltage VREF2 and the output branch 22, and an output end is connected to a gate of the second NMOS tube NCH 2; the source electrode of the second NMOS tube NCH2 is grounded, and the drain electrode is connected with the output branch circuit; the source electrode of the third NMOS tube NCH3 is grounded, the grid electrode is connected with the grid electrode of the second NMOS tube NCH2, and the drain electrode is connected with the source electrode of the fourth NMOS tube NCH 4; the drain electrode of the fourth NMOS tube NCH4 is connected with the output end of the LED display driving circuit, and the grid electrode of the fourth NMOS tube NCH is connected with the output end of the third amplifier AMP 3; the two input ends of the third amplifier are connected with the output branch 22 and the drain electrode of the third NMOS tube NCH 3. Because the gate voltages of the second NMOS tube NCH2 and the third NMOS tube NCH3 are equal, the second amplifier AMP2 and the third amplifier AMP3 form a closed-loop negative feedback loop, so that the drain voltages of the second NMOS tube NCH2 and the third NMOS tube NCH3 are equal. Setting the size (size) ratio of the third NMOS tube NCH3 to the second NMOS tube NCH2 as K2, and setting the driving current as (VREXT/REXT) K1K 2, thereby meeting the driving requirement of the LED lamp beads.
In one embodiment of the invention, the LEDs include, but are not limited to, conventional LEDs, small pitch LEDs, mini LEDs, and micro LEDs. Wherein, traditional LED refers to the LED that lamp pearl central point interval is greater than 2.5 mm. The small-spacing LEDs refer to LEDs with the center point spacing of the LED lamp beads of 2.5mm or less. The Micro LEDs are the same as the Mini LEDs and are based on tiny LED crystal particles as pixel luminous points. The difference is that the Micro LED is an adopted LED crystal with the size of 1-10 microns, so that a display screen with the center point spacing (namely smaller-sized pixel particles) of the LED crystal of 0.05mm or less is realized; the MiniLED is a display screen which adopts tens of micron-sized LED crystals to realize the center point spacing (pixel particles) of the LED crystals of 0.5 mm-1.2 mm.
As shown in fig. 5, in an embodiment, the LED display driving chip of the present invention includes the LED display driving circuit described above. Through above-mentioned LED display drive circuit, can effectively avoid the damage that LED lamp pearl LED to the fact because of long-time highlight, guarantee the life-span of LED, reduce the consumption of whole LED display drive chip.
As shown in fig. 6, in an embodiment, the LED display of the present invention includes the LED display driving chip, so as to ensure the normal use of the LED display and prolong the service life thereof.
As shown in fig. 7, in an embodiment, the LED display driving method of the present invention includes the following steps:
Step S1, generating a reference current.
Specifically, a reference current is generated based on a reference current source. As shown in fig. 2, in an embodiment, the reference current source includes a first amplifier AMP1, a first NMOS tube NCH1, and a load resistor REXT, where two input ends of the first amplifier AMP1 are respectively connected to a first reference voltage VREF1 and one end of the load resistor REXT, the other end of the load resistor REXT is grounded, a gate of the first NMOS tube NCH1 is connected to an output end of the first amplifier AMP1, a source of the first NMOS tube NCH1 is connected to one end of the load resistor REXT, and a drain of the first NMOS tube NCH is connected to the input branch. In the figure, the first reference voltage VREF1 is a preset internal reference voltage, and the first amplifier AMP1 and the first NMOS NCH1 form a negative feedback loop, so that the voltage VREXT on the load resistor is equal to the first reference voltage VREF1.
And S2, amplifying the reference current.
Specifically, the reference current is amplified based on a current mirror. The current mirror includes an input branch and an output branch. As shown in fig. 2, in an embodiment, the input branch includes a first PMOS PCH1, the output branch includes a second PMOS PCH2, a gate of the first PMOS PCH1 is connected to a gate of the second PMOS PCH2, a gate and a drain of the first PMOS PCH1 are both connected to a drain of a first NMOS NCH1 in the reference current source 1, and a drain of the second PMOS PCH2 is connected to the amplifying module 4. The sources of the first PMOS tube PCH1 and the second PMOS tube PCH2 are connected with corresponding driving voltages. Wherein, the current amplification factor of the current mirror is K1. That is, when the load resistor is operating normally, the input current of the input branch is VREXT/REXT, and the output current of the output branch is K1 (VREXT/REXT).
In an embodiment of the present invention, the output branch further includes a third PMOS PCH3, a source of the third PMOS PCH3 is connected to a drain of the second PMOS PCH2, a gate is connected to a bias voltage Vbias, and a drain is connected to the amplifying module 4. By setting the third PMOS PCH3, drain voltages of the first PMOS PCH1 and the second PMOS PCH2 are equal, so that mismatch current between the first PMOS PCH1 and the second PMOS PCH2 is reduced.
And S3, collecting a state signal of the reference current, and realizing on-off control of the amplification according to the state signal.
Specifically, a state signal of the reference current is collected based on a switch module, and the on-off control of the amplification is realized according to the state signal. As shown in fig. 2, in an embodiment of the present invention, the switch module includes a signal generating circuit and a bidirectional switch K1; the signal generating circuit is connected with the reference current source and is used for generating a state signal (Short signal); the bidirectional switch K1 is arranged between the input branch and the output branch and is used for realizing connection and disconnection of the input branch and the output branch according to the state signal. When the load resistor REXT works normally, the reference current is in a normal interval, the signal generating circuit generates a first level signal, such as a low level signal, as a normal signal, and the bidirectional switch K1 is communicated with the input branch and the output branch so as to ensure that the LED display driving circuit works normally; when the load resistor REXT is disconnected, the signal generating circuit generates a second level signal, such as a high level signal, as an abnormal signal, the bidirectional switch K1 is connected with the signal generating circuit, and the input branch circuit and the output branch circuit are disconnected to cut off the LED display driving circuit, so that the phenomenon of high brightness of the LED lamp beads is avoided.
As shown in fig. 3, in an embodiment of the present invention, the signal generating circuit includes a comparator C1, a Schmitt trigger, a first D trigger DFF1, and a second D trigger DFF2, which are sequentially connected, where a positive input terminal of the comparator C1 inputs the voltage VREXT on the load resistor REXT, a negative input terminal inputs the first reference voltage VREF1, an output terminal is connected to an input terminal of the Schmitt trigger Schmitt, an output terminal of the Schmitt trigger Schmitt is connected to an input terminal of the first D trigger DFF1, an output terminal of the first trigger DFF1 is connected to an output terminal of the second D trigger DFF2, and an output terminal of the second trigger DFF2 is connected to the bidirectional switch K1. Meanwhile, a Clock signal Clock is input to Clock signal terminals of the first D flip-flop DFF1 and the second D flip-flop DFF 2. When the load resistor REXT works normally, the voltage VREXT on the load resistor is equal to the first reference voltage VREF1 due to the action of the first amplifier AMP1, the comparator C1 outputs a high level, the RN outputs a low level after passing through the Schmitt trigger, the first D trigger DFF1 and the second D trigger DFF2 are reset by the RN, and the output Short signal is a low level. When the load resistor REXT is shorted, the voltage VREXT across the load resistor is lower than the first reference voltage VREF1, the comparator C1 outputs a low level, the RN outputs a high level after passing through the Schmitt trigger, the first D flip-flop DFF1 and the second D flip-flop DFF2 end the reset state, when the Clock signal Clock arrives at a rising edge, the output of the first D flip-flop DFF1 is high, when the Clock signal Clock arrives at a second rising edge, the output of the second D flip-flop DFF2 is high, and the output of the Short signal is high.
As shown in fig. 4, when the load resistor REXT works normally, the Short signal is at a low level, the bidirectional switch K1 turns on the gate of the first PMOS transistor PCH1, and the current of the second PMOS transistor PCH2 is determined by the current on the first PMOS transistor PCH 1. When the load resistor REXT is Short-circuited, the Short signal becomes high level, the grid electrode of the PMOS tube PCH2 is pulled to the power supply potential, the current on the grid electrode becomes 0, and the output channel is also closed.
In an embodiment of the invention, the method for driving an LED display further includes performing a second amplification on the amplified current.
Specifically, the current of the output branch is secondarily amplified based on an amplifying module. As shown in fig. 2, in an embodiment of the present invention, the amplifying module includes a second amplifier AMP2, a second NMOS tube NCH2, a third amplifier AMP3, a third NMOS tube NCH3, and a fourth NMOS tube NCH4, two input ends of the second amplifier AMP2 are respectively connected to a second reference voltage VREF2 and the output branch, and an output end is connected to a gate of the second NMOS tube NCH 2; the source electrode of the second NMOS tube NCH2 is grounded, and the drain electrode is connected with the output branch circuit; the source electrode of the third NMOS tube NCH3 is grounded, the grid electrode is connected with the grid electrode of the second NMOS tube NCH2, and the drain electrode is connected with the source electrode of the fourth NMOS tube NCH 4; the drain electrode of the fourth NMOS tube NCH4 outputs driving current, and the grid electrode of the fourth NMOS tube NCH is connected with the output end of the third amplifier AMP 3; and two input ends of the third amplifier are connected with the output branch and the drain electrode of the third NMOS tube NCH 3. Because the gate voltages of the second NMOS tube NCH2 and the third NMOS tube NCH3 are equal, the second amplifier AMP2 and the third amplifier AMP3 form a closed-loop negative feedback loop, so that the drain voltages of the second NMOS tube NCH2 and the third NMOS tube NCH3 are equal. Setting the amplification ratio corresponding to the second NMOS tube NCH2 and the third NMOS tube NCH3 as K2, and setting the driving current as (VREXT/REXT) K1K 2, thereby meeting the driving requirement of the LED lamp beads.
In one embodiment of the invention, the LEDs include, but are not limited to, conventional LEDs, small pitch LEDs, mini LEDs, and micro LEDs. Wherein, traditional LED refers to the LED that lamp pearl central point interval is greater than 2.5 mm. The small-spacing LEDs refer to LEDs with the center point spacing of the LED lamp beads of 2.5mm or less. The Micro LEDs are the same as the Mini LEDs and are based on tiny LED crystal particles as pixel luminous points. The difference is that the Micro LED is an adopted LED crystal with the size of 1-10 microns, so that a display screen with the center point spacing (namely smaller-sized pixel particles) of the LED crystal of 0.05mm or less is realized; the MiniLED is a display screen which adopts tens of micron-sized LED crystals to realize the center point spacing (pixel particles) of the LED crystals of 0.5 mm-1.2 mm.
In summary, the LED display driving circuit, the display, the driving method and the driving chip can monitor the reference current source in real time, and effectively prevent large current from flowing into the LED; the power consumption of the driving circuit can be reduced, and the service life of the LED is ensured. Therefore, the invention effectively overcomes the defects in the prior art and has good application prospect.
The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.
Claims (11)
1. An LED display driving circuit, characterized in that: comprising the following steps:
a reference current source for generating a reference current;
the current mirror comprises an input branch and an output branch, and is connected with the reference current source and used for amplifying the reference current;
The switch module is connected with the input branch and the output branch and is used for collecting state signals of the reference current and controlling the input branch and the output branch according to the state signals;
The reference current source comprises a first amplifier, a first NMOS tube and a load resistor, wherein two input ends of the first amplifier are respectively connected with a first reference voltage and one end of the load resistor, the other end of the load resistor is grounded, the grid electrode of the first NMOS tube is connected with the output end of the first amplifier, the source electrode of the first NMOS tube is connected with one end of the load resistor, and the drain electrode of the first NMOS tube is connected with the input branch;
The switch module comprises a signal generating circuit and a bidirectional switch; the signal generating circuit is connected with the reference current source and is used for generating the state signal; the bidirectional switch is arranged between the input branch and the output branch and is used for realizing on-off control of the input branch and the output branch according to the state signal;
The signal generating circuit comprises a comparator, a Schmitt trigger, a first D trigger and a second D trigger which are sequentially connected, wherein the positive input end of the comparator inputs the voltage on the load resistor, the negative input end inputs the first reference voltage, and the second D trigger is connected with the bidirectional switch; the first D trigger and the second D trigger end a reset state when the load resistor is in a short circuit state, the first D trigger outputs a high level when the clock signal arrives at a rising edge, and the second D trigger outputs a high level when the clock signal arrives at a second rising edge;
the LEDs include conventional LEDs, small-pitch LEDs, mini LEDs, and micro LEDs.
2. The LED display driver circuit of claim 1, wherein: the input branch comprises a first PMOS tube, the output branch comprises a second PMOS tube, the grid electrode of the first PMOS tube is connected with the grid electrode of the second PMOS tube, the grid electrode and the drain electrode of the first PMOS tube are connected with the reference current source, and the drain electrode of the second PMOS tube is connected with the output end of the LED display driving circuit.
3. The LED display driver circuit of claim 2, wherein: the output branch circuit further comprises a third PMOS tube, a source electrode of the third PMOS tube is connected with a drain electrode of the second PMOS tube, a grid electrode is connected with bias voltage, and the drain electrode is connected with an output end of the LED display driving circuit.
4. The LED display driver circuit of claim 1, wherein: the reference current source further comprises a low-pass filter connected in series with the switch module and arranged between the input branch and the output branch.
5. The LED display driver circuit of claim 1, wherein: the circuit also comprises an amplifying module for secondarily amplifying the current of the output branch.
6. The LED display driver circuit of claim 5, wherein: the amplifying module comprises a second amplifier, a second NMOS tube, a third amplifier, a third NMOS tube and a fourth NMOS tube, wherein two input ends of the second amplifier are respectively connected with a second reference voltage and the output branch, and the output end of the second amplifier is connected with the grid electrode of the second NMOS tube; the source electrode of the second NMOS tube is grounded, and the drain electrode of the second NMOS tube is connected with the output branch circuit; the source electrode of the third NMOS tube is grounded, the grid electrode of the third NMOS tube is connected with the grid electrode of the second NMOS tube, and the drain electrode of the third NMOS tube is connected with the source electrode of the fourth NMOS tube; the drain electrode of the fourth NMOS tube is connected with the output end of the LED display driving circuit, and the grid electrode of the fourth NMOS tube is connected with the output end of the third amplifier; and two input ends of the third amplifier are connected with the output branch and the drain electrode of the third NMOS tube.
7. An LED display driver chip, characterized in that: an LED display driver circuit comprising the LED of one of claims 1-6.
8. An LED display, characterized in that: comprising the LED display driver chip of claim 7.
9. An LED display driving method is characterized in that: the method comprises the following steps:
generating a reference current based on the reference current source;
Amplifying the reference current based on a current mirror, the current mirror comprising an input branch and an output branch;
collecting a state signal of the reference current based on a switch module, and realizing on-off control of the amplification according to the state signal; the switch module is connected with the input branch and the output branch;
The reference current source comprises a first amplifier, a first NMOS tube and a load resistor, wherein two input ends of the first amplifier are respectively connected with a first reference voltage and one end of the load resistor, the other end of the load resistor is grounded, the grid electrode of the first NMOS tube is connected with the output end of the first amplifier, the source electrode of the first NMOS tube is connected with one end of the load resistor, and the drain electrode of the first NMOS tube is connected with the input branch;
The switch module comprises a signal generating circuit and a bidirectional switch; the signal generating circuit is connected with the reference current source and is used for generating the state signal; the bidirectional switch is arranged between the input branch and the output branch and is used for realizing on-off control of the input branch and the output branch according to the state signal;
The signal generating circuit comprises a comparator, a Schmitt trigger, a first D trigger and a second D trigger which are sequentially connected, wherein the positive input end of the comparator inputs the voltage on the load resistor, the negative input end inputs the first reference voltage, and the second D trigger is connected with the bidirectional switch; the first D trigger and the second D trigger end a reset state when the load resistor is in a short circuit state, the first D trigger outputs a high level when the clock signal arrives at a rising edge, and the second D trigger outputs a high level when the clock signal arrives at a second rising edge;
the LEDs include conventional LEDs, small-pitch LEDs, mini LEDs, and micro LEDs.
10. The LED display driving method according to claim 9, wherein: when the state signal is a normal signal, amplifying the reference current; and when the state signal is an abnormal signal, the amplification of the reference current is disconnected.
11. The LED display driving method according to claim 9, wherein: and further comprises the step of secondarily amplifying the amplified current.
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| JP2024525257A (en) | 2021-06-21 | 2024-07-12 | 京東方科技集團股▲ふん▼有限公司 | DRIVER CIRCUIT AND ITS DRIVING METHOD, ARRAY SUBSTRATE, AND DISPLAY DEVICE |
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