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CN109841597A - 分区电磁屏蔽封装结构及制造方法 - Google Patents

分区电磁屏蔽封装结构及制造方法 Download PDF

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CN109841597A
CN109841597A CN201711194388.3A CN201711194388A CN109841597A CN 109841597 A CN109841597 A CN 109841597A CN 201711194388 A CN201711194388 A CN 201711194388A CN 109841597 A CN109841597 A CN 109841597A
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electro
chip
encapsulating structure
magnetic screen
screen layer
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肖俊义
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Shunsin Technology Zhongshan Ltd
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Priority to TW106146669A priority patent/TWI668816B/zh
Priority to US15/860,679 priority patent/US20190164902A1/en
Publication of CN109841597A publication Critical patent/CN109841597A/zh
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Abstract

一种分区电磁屏蔽封装结构，包括基板、多个焊垫组、多个芯片、封胶体、电磁屏蔽层以及注胶体。多个焊垫组电性连接于基板的表面，且每个焊垫组间隔设置并与芯片对应。芯片焊接于述焊垫组。封胶体将每个芯片单独封胶。在所有封胶体外层溅渡金属，以形成电磁屏蔽层。在电磁屏蔽层的外层注入注胶体，覆盖电磁屏蔽层以形成封装体。根据需要，将包括多个芯片的封装体进行切割。本发明还揭示了一种分区电磁屏蔽封装结构制造方法。本发明提供的封装结构及制造方法，电磁屏蔽层在封装体内部，无需外层不绣钢溅镀金属，同时取代了现有技术中对封装产品进行半切割所导致的翘曲现象，提高了产品良率，改善了产品外观。

Description

分区电磁屏蔽封装结构及制造方法
技术领域
本发明涉及一种封装结构及制造方法，尤其涉及一种分区电磁屏蔽封装结构及制造方法。
背景技术
现有的分区电磁屏蔽封装结构在制造时，主要分为以下两种方案：
一种是，先对封装结构进行半切割，再做电磁屏蔽处理。
另一种是，先对封装结构进行半切割，再做点胶，最后进行电磁屏蔽处理。
针对上述方案，由于半切割操作增加了生产制造周期以及切割成本，且基板在半切割过程中容易发生翘曲的现象，导致产品良率较低以及产品外观不佳。另外，在点胶过程中产生气洞，致使产品良率不容易管控，且银胶成本过高。
发明内容
有鉴于此，需提供一种分区电磁屏蔽封装结构及制造方法，旨在解决产品良率低、外观不佳的问题。
为实现上述目的，本发明提供的一种分区电磁屏蔽封装结构，包括基板、多个焊垫组、多个芯片、封胶体、电磁屏蔽层以及注胶体，所述多个焊垫组电性连接于所述基板的表面，且每个焊垫组间隔设置并与芯片对应，所述芯片焊接于所述焊垫组，所述封胶体将每个芯片单独封胶，在所有封胶体外层溅渡金属，以形成所述电磁屏蔽层，在所述电磁屏蔽层的外层注入所述注胶体，覆盖所述电磁屏蔽层以形成封装体，并根据需要，将包括所述多个芯片的封装体进行切割。
优选地，所述基板包括顶面和与所述顶面相对设置的底面，所述顶面设有多个接地线，所述底面设有多个接地层，所述接地线和所述接地层电性连接。
优选地，所述焊垫组设置在所述顶面，并位于两个或者多个接地线之间。
优选地，所述电磁屏蔽层覆盖所述接地线，并与所述接地线连接。
此外，为实现上述目的，本发明还提供一种分区电磁屏蔽封装结构制造方法，所述分区电磁屏蔽封装结构制造方法包括：
在基板设置多个焊垫组；
在每个所述焊垫组上焊接芯片；
封胶体将每个所述芯片进行单独封胶；
在所述封胶体外层溅渡金属，以形成电磁屏蔽层；
在所述电磁屏蔽层外层注入注胶体，以覆盖所述电磁屏蔽层覆盖所述电磁屏蔽层以形成封装体；
根据需要，将包括所述多个芯片的封装体进行切割。
优选地，在之前，所述方法还包括：
在所述基板的顶面设置多个接地线，在所述基板的底面设置多个接地层，且所述接地线与所述接地层电性连接。
优选地，所述焊垫组设置在所述顶面，并位于两个或者多个接地线之间。
优选地，所述电磁屏蔽层覆盖所述接地线，并与所述接地线连接。
相较于现有技术，本发明提供的分区电磁屏蔽封装结构及制造方法，通过封胶体对多个芯片进行分区隔离，再对注入封胶体后的多个芯片进行整片的溅渡电磁屏蔽层，且溅渡的电磁屏蔽层在封装体内部，无需外层不绣钢溅镀金属，同时取代了现有技术中对封装产品进行半切割所导致的翘曲现象，采用本发明的分区电磁屏蔽封装结构能够有效的提高产品良率，改善产品外观。
附图说明
图1所示为本发明实施方式中分区电磁屏蔽封装结构截面示意图。
图2所示为本发明提供的分区电磁屏蔽封装结构制造方法的流程图。
图3所示为制造基板外层线路的示意图。
图4所示为在基板上设置焊垫组的示意图。
图5所示为基板表面焊接芯片的示意图。
图6所示为第一次注入封胶体的示意图。
图7所示为整体溅渡金属的示意图。
图8所示为注入注胶体的示意图。
图9所示为切割成单独产品的示意图。
主要元件符号说明
分区电磁屏蔽封装结构 100
基板 10
顶面 11
底面 12
焊垫组 20
芯片 30
封胶体 40
电磁屏蔽层 50
注胶体 60
如下具体实施方式将结合上述附图进一步说明本发明。
具体实施方式
请参照图1，本发明提供的分区电磁屏蔽封装结构100，包括基板10、设于基板10上的多个焊垫组20、多个芯片30、封胶体40、电磁屏蔽层50以及注胶体60。在图1中，基板10包括顶面11和与顶面11相对设置的底面12。基板10的顶面11设有多个接地线13，底面12设有接地层14，且接地线13与接地层14电性连接。焊垫组20设置在基板10的顶面11，位于相邻两个或者多个接地线13之间，且接地线13将多个焊垫组20间隔开，每个焊垫组20对应焊接一个芯片30，从而多个芯片30间隔设置，通过封胶体40将每个芯片30进行单独封胶。也就是说，在基板10上封装有多个芯片30，且每个芯片30之间相互独立。在封胶体40及接地线13的外层溅渡金属，以形成电磁屏蔽层50，由于电磁屏蔽层50与接地线13连接，以起到电磁屏蔽的效果。在电磁屏蔽层50外层注入注胶体60，覆盖溅镀金属以形成封装体，并根据需要，将包括所述多个芯片的封装体切割成单独的产品。
可选的，本发明采用系统级封装(System In a Package，SIP)封装，随着智能手机和物联网的普及，预期的SIP模块复杂度逐渐增加，对分区电子屏蔽未来需求潜力很大。
本发明的分区电磁屏蔽封装结构100，通过封胶体40对多个芯片30进行分区隔离，再对注入封胶体40后的多个芯片30进行整片的溅渡电磁屏蔽层50，且溅渡的电磁屏蔽层50在封装体内部30，无需外层不绣钢溅镀金属，同时取代了现有技术中对封装产品进行半切割所导致的翘曲现象，采用本发明的分区电磁屏蔽封装结构100能够有效的提高产品良率，改善产品外观。
本发明另一实施例提供一种分区电磁屏蔽封装结构制造方法，用于将芯片30分区电磁屏蔽封装在基板10上。所述分区电磁屏蔽封装方法包括如下步骤：
请同时参照图2和图3，步骤S100，在基板10的顶面11设置多个接地线13，在底面12设置多个接地层14，且接地线13与接地层14电性连接。
请同时参照图2和图4，步骤S200，在基板10的顶面11，且在相邻两个或者多个接地线13之间设置焊垫组20。
请同时参照图2和图5，步骤S300，在每个焊垫组20上焊接芯片30。
请同时参照图2和图6，步骤S400，通过封胶体40将每个芯片30进行单独封胶。也就是说，在基板10上封装有多个芯片30，且每个芯片30之间相互独立。
请同时参照图2和图7，步骤S500，在封胶体40及接地线13的外层溅渡金属，以形成电磁屏蔽层50。由于电磁屏蔽层50与接地线13连接，以起到电磁屏蔽的效果。
请同时参照图2和图8，步骤S600，在电磁屏蔽层50外层注入注胶体60，覆盖溅镀金属及将产品封装成整体。
请同时参照图2和图9，步骤S700，根据使用需要，将封装整体切割成多个产品。
可选的，本发明采用系统级封装(System In a Package，SIP)封装，随着智能手机和物联网的普及，预期的SIP模块复杂度逐渐增加，对分区电子屏蔽未来需求潜力很大。
本发明的分区电磁屏蔽封装结构制造方法，通过封胶体40对多个芯片30进行分区隔离，再对注入封胶体40后的多个芯片30进行整片的溅渡电磁屏蔽层50，且溅渡的电磁屏蔽层50在封装体内部30，无需外层不绣钢溅镀金属，同时取代了现有技术中对封装产品进行半切割所导致的翘曲现象，采用本发明的分区电磁屏蔽封装结构100能够有效的提高产品良率，改善产品外观。
对本领域的普通技术人员来说，可以根据本发明的发明方案和发明构思结合生成的实际需要做出其他相应的改变或调整，而这些改变和调整都应属于本发明权利要求的保护范围。

Claims (8)

1.一种分区电磁屏蔽封装结构，其特征在于，包括基板、多个焊垫组、多个芯片、封胶体、电磁屏蔽层以及注胶体，所述多个焊垫组电性连接于所述基板的表面，且每个焊垫组间隔设置并与芯片对应，所述芯片焊接于所述焊垫组，所述封胶体将每个芯片单独封胶，在所有封胶体外层溅渡金属，以形成所述电磁屏蔽层，在所述电磁屏蔽层的外层注入所述注胶体，覆盖所述电磁屏蔽层以形成封装体，并根据需要，将包括所述多个芯片的封装体进行切割。
2.根据权利要求1所述的分区电磁屏蔽封装结构，其特征在于，所述基板包括顶面和与所述顶面相对设置的底面，所述顶面设有多个接地线，所述底面设有多个接地层，所述接地线和所述接地层电性连接。
3.根据权利要求2所述的分区电磁屏蔽封装结构，其特征在于，所述焊垫组设置在所述顶面，并位于两个或者多个接地线之间。
4.根据权利要求3所述的分区电磁屏蔽封装结构，其特征在于，所述电磁屏蔽层覆盖所述接地线，并与所述接地线连接。
5.一种分区电磁屏蔽封装结构制造方法，其特征在于，所述分区电磁屏蔽封装结构制造方法包括：
在基板设置多个焊垫组；
在每个所述焊垫组上焊接芯片；
封胶体将每个所述芯片进行单独封胶；
在所述封胶体外层溅渡金属，以形成电磁屏蔽层；
在所述电磁屏蔽层外层注入注胶体，以覆盖所述电磁屏蔽层覆盖所述电磁屏蔽层以形成封装体；
根据需要，将包括所述多个芯片的封装体进行切割。
6.根据权利要求5所述的分区电磁屏蔽封装结构制造方法，其特征在于，在之前，所述方法还包括：
在所述基板的顶面设置多个接地线，在所述基板的底面设置多个接地层，且所述接地线与所述接地层电性连接。
7.根据权利要求6所述的分区电磁屏蔽封装结构制造方法，其特征在于，所述焊垫组设置在所述顶面，并位于两个或者多个接地线之间。
8.根据权利要求7所述的分区电磁屏蔽封装结构制造方法，其特征在于，所述电磁屏蔽层覆盖所述接地线，并与所述接地线连接。
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