CN109786373A - Display panel - Google Patents
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- CN109786373A CN109786373A CN201811599243.6A CN201811599243A CN109786373A CN 109786373 A CN109786373 A CN 109786373A CN 201811599243 A CN201811599243 A CN 201811599243A CN 109786373 A CN109786373 A CN 109786373A
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- metal layer
- display panel
- insulating layer
- layer
- protection circuit
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- 230000002093 peripheral effect Effects 0.000 claims abstract description 20
- 239000000758 substrate Substances 0.000 claims abstract description 18
- 229910052751 metal Inorganic materials 0.000 claims description 57
- 239000002184 metal Substances 0.000 claims description 57
- 238000003466 welding Methods 0.000 claims description 54
- 238000001514 detection method Methods 0.000 claims description 41
- 239000004065 semiconductor Substances 0.000 claims description 10
- 230000005611 electricity Effects 0.000 claims description 3
- 239000000463 material Substances 0.000 claims description 3
- RQIPKMUHKBASFK-UHFFFAOYSA-N [O-2].[Zn+2].[Ge+2].[In+3] Chemical compound [O-2].[Zn+2].[Ge+2].[In+3] RQIPKMUHKBASFK-UHFFFAOYSA-N 0.000 claims description 2
- -1 aluminium tin-oxide Chemical compound 0.000 claims description 2
- JYMITAMFTJDTAE-UHFFFAOYSA-N aluminum zinc oxygen(2-) Chemical compound [O-2].[Al+3].[Zn+2] JYMITAMFTJDTAE-UHFFFAOYSA-N 0.000 claims description 2
- 229910044991 metal oxide Inorganic materials 0.000 claims description 2
- 150000004706 metal oxides Chemical group 0.000 claims description 2
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 claims description 2
- 239000002305 electric material Substances 0.000 claims 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims 1
- 238000012360 testing method Methods 0.000 abstract description 22
- 238000010586 diagram Methods 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000003491 array Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000011990 functional testing Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- RHZWSUVWRRXEJF-UHFFFAOYSA-N indium tin Chemical compound [In].[Sn] RHZWSUVWRRXEJF-UHFFFAOYSA-N 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000011056 performance test Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Liquid Crystal (AREA)
Abstract
本发明提供一种显示面板，包括一第一基板，包含相邻的一显示区与一周边区；多个像素单元，设置于所述第一基板，且位于所述显示区；一测试焊垫，设置于所述第一基板，且位于所述周边区；至少一第一静电放电保护电路，设置于所述第一基板，且位于所述周边区，所述第一静电放电保护电路与所述测试焊垫电性连接；其中，所述测试焊垫至少部分覆盖所述第一静电放电保护电路。本发明的显示面板，可以有效提高显示面板在测试时的防静电能力，提高产品的成品率。
The present invention provides a display panel, comprising a first substrate including a display area and a peripheral area adjacent to each other; a plurality of pixel units disposed on the first substrate and located in the display area; a test pad , disposed on the first substrate and located in the peripheral area; at least one first electrostatic discharge protection circuit, disposed on the first substrate and located in the peripheral area, the first electrostatic discharge protection circuit and the The test pads are electrically connected; wherein, the test pads at least partially cover the first electrostatic discharge protection circuit. The display panel of the present invention can effectively improve the antistatic capability of the display panel during testing, and improve the yield of products.
Description
Technical field
The invention relates to a kind of display panels, and in particular to one kind have ESD protection circuit and
Test the display panel of circuit.
Background technique
With the rapid development of mobile communication technology, internet and display technology, existing common display panel includes
Liquid crystal display panel, organic electric-excitation luminescent displaying panel etc..
In general, display panel has viewing area, the peripheral region except viewing area.Match in viewing area with array
The multiple dot structures set often are formed with flip chip weld pad (COF Pad), multiplexer (Mux), detection welding pad in peripheral region
(CT Pad), test circuit, ESD protection circuit (ESD) and other driving circuits that may be present and relevant tracks.
Display panel now develops towards narrow frame direction, and the area (width) of peripheral region becomes smaller and smaller, is located at
The circuit and cabling of peripheral region can become closer and closer.In order to adapt to the demand of narrow frame, existing detection welding pad does not connect
ESD protection circuit is connect, above-mentioned ESD protection circuit is the electrostatic protection for viewing area dot structure.Right
When display panel is tested, a large amount of electrostatic can be generated, and display panel is also highly prone to the interference of electrostatic and causes to show
Panel be wound, and serious person can damage display panel.How to increase in the display panel of narrow frame and is used for detection welding pad
ESD protection circuit to improve anti-static ability of the display panel in test, actually one of problem to be solved.
Summary of the invention
The present invention provides a kind of display panel, can increase ESD protection circuit on detection welding pad, effectively improve
Anti-static ability of the display panel in test, prevents display panel from wound in test, promotes the display matter of display panel
Amount, and then improve the yield rate of product.
A kind of display panel of the embodiment of the present invention, including a first substrate include adjacent a viewing area and a periphery
Area；Multiple pixel units are set to the first substrate, and are located at the viewing area；One detection welding pad is set to described first
Substrate, and it is located at the peripheral region；At least one first ESD protection circuit is set to the first substrate, and is located at institute
Peripheral region is stated, first ESD protection circuit and the detection welding pad are electrically connected；Wherein, the detection welding pad is at least
Part covers first ESD protection circuit.
Below in conjunction with the drawings and specific embodiments, the present invention will be described in detail, but not as a limitation of the invention.
Detailed description of the invention
Fig. 1 is the schematic diagram of the structure of one embodiment of the invention display panel.
Fig. 2 is the electrical block diagram of the first ESD protection circuit of one embodiment of the invention.
Fig. 3 A is the vertical view signal of one embodiment of the invention detection welding pad and the first ESD protection circuit stepped construction
Figure.
Fig. 3 B is diagrammatic cross-section of Fig. 3 A along A-A '.
Wherein, appended drawing reference:
100: display panel 110: viewing area
120: peripheral region 130: detection welding pad
140: the first ESD protection circuit, 150: the second ESD protection circuit
SUB: 141: the first semiconductor layer of substrate
142: gate insulating layer 143: the first metal layer
144: the first insulating layers 145: second metal layer
146: second insulating layer 147: third metal layer
147-1: cabling area 148: third insulating layer
149: welding backing metal layer
S/D: the first the D/S: the second doped region of doped region
CH: channel region
VIA1: the first the VIA2: the second contact hole of contact hole
VDD: power supply VSS: ground
CTS: test signal
Specific embodiment
Structural principle and working principle of the invention are described in detail with reference to the accompanying drawing:
Fig. 1 is the schematic diagram of the structure of one embodiment of the invention display panel.As shown in Figure 1, the display surface of the present embodiment
Plate 100 includes viewing area 110 and peripheral region 120.Specifically, multiple pixel unit (not shown) arrays be set to it is aobvious
Show area 110, detection welding pad 130, the first ESD protection circuit 140 and the second ESD protection circuit 150 are then arranged
In peripheral region 120.In embodiment shown in FIG. 1, display panel 100 or viewing area 110 are rectangular shape, but the present invention is not
As limit, can because of different design and demand, display panel 100 or viewing area 110 may be alternatively provided as round, ellipse, its
His irregular arc, triangle, pentagon or other polygons.In addition, multiple pixel units can be the side such as alignment or dislocation
Formula is arranged in array.Detection welding pad 130, the first ESD protection circuit 140 and the second ESD protection circuit 150 can
Think one or more, for example, as shown in Figure 1, detection welding pad 130 is single number, but the present invention is not limited thereto,
Detection welding pad 130 can also be multiple.In this present embodiment, the first ESD protection circuit 140 realizes electricity with detection welding pad 130
Connection, for carrying out electrostatic protection to detection welding pad 130；Second ESD protection circuit 150 is connected to the phase of driving circuit
OFF signal route, for example, driving circuit can be multiplexer (Multiplexer, MUX), gate driving circuit (Gate
Driver), shift register (Shift Register, SR) etc..Signal line then may include each signal of gate driving circuit
Route (Bus line), initial signal route (STV), clock pulse signal route (CK/XCK), high/low electric potential signal route
(VEND/VGH/VGL) etc., it is also possible to each signal line of other peripheral circuits, such as tests the control signal lines of circuit
(CT_Ctrl), high/low electric potential signal route (CT_odd/CT_even) etc..Detection welding pad 130, the first electrostatic discharge (ESD) protection electricity
The quantity of road 140 and the second ESD protection circuit 150 set according to test.In the present embodiment
In, the first ESD protection circuit 140 is overlapped with detection welding pad 130, and the first ESD protection circuit 140 both can be with
Tested 130 part of weld pad covering can also be tested all coverings of weld pad 130, can be according to the region area of peripheral region 120
Size is configured.In addition, peripheral region 120 is also formed with flip chip weld pad (COF Pad), multiplexer (Mux), test circuit
And other driving circuits that may be present and relevant tracks, for purposes of illustration only, not showed that in figure.
Fig. 2 is the electrical block diagram of the first ESD protection circuit of one embodiment of the invention.As shown in Fig. 2, the
One ESD protection circuit 140 includes first switching element T1 and second switch element T2, first switching element T1, second
Switch element T2 includes first end, second end and control terminal.Wherein, the first end of first switching element T1 is connected to power supply
VDD, second end and control terminal are connected in parallel, and are electrically connected to detection welding pad 130；The of second switch element T2
One end is connected to the second end and control terminal of first switching element T1, and is electrically connected to detection welding pad 130, second switch jointly
The second end and control terminal of element T2 is connected in parallel, and is electrically connected to ground VSS.In this present embodiment, work as progress
When showing performance/functional test of equipment, a test signal CTS is provided, and provide test to viewing area through detection welding pad 130
Signal CTS.
Fig. 3 A is the vertical view signal of one embodiment of the invention detection welding pad and the first ESD protection circuit stepped construction
Figure.Fig. 3 B is diagrammatic cross-section of Fig. 3 A along A-A '.As shown in Figure 3A, detection welding pad 130 and the first ESD protection circuit
140 overlap, and detection welding pad 130 covers the first ESD protection circuit 140, and detection welding pad 130 is realized at the Q of region
With the electric connection of the first ESD protection circuit.It is only needed if detection welding pad 130 does not need electrostatic discharge (ESD) protection
Transmission test signal CTS, then without connection at the Q of region.
Specifically, it is exhausted to have sequentially formed the first semiconductor layer 141, grid on substrate SUB in conjunction with shown in Fig. 3 A, Fig. 3 B
Edge layer 142, the first metal layer 143, the first insulating layer 144, second metal layer 145, second insulating layer 146, third metal layer
147, third insulating layer 148 and welding backing metal layer 149.
As shown in Figure 3B, the first semiconductor layer 141 is formed on substrate SUB first, the first semiconductor layer 141 is mixed
It is miscellaneous, the first doped region S/D and the second doped region D/S is formed in 141 two sides of semiconductor layer, in the first doped region S/D and the
Channel region CH is formed between two doped region D/S.Then, gate insulating layer 142 is formed on substrate SUB, gate insulating layer 142 covers
The first semiconductor layer of lid 141；It is formed after gate insulating layer 142, forms the first metal layer 143 on gate insulating layer 142, and
Patterned first metal layer 143, make patterning after the first metal layer 143 with channel region CH below the phase on upright position
It is mutually corresponding.Form the first insulating layer 144 on the first metal layer 143 and gate insulating layer 142, the first insulating layer 144 covering the
One metal layer 143 and gate insulating layer 142；Second metal layer 145 is formed on the first insulating layer 144 and patterns the second gold medal
Belong to layer 145, second metal layer 145 and the first doped region S/D, the second doped region D/S and the first metal layer 143 can realize electrical property
Connection.First semiconductor layer 141, gate insulating layer 142, the first metal layer 143, the first insulating layer 144, second metal layer 145
Switch element T1, T2 in the first ESD protection circuit of the present embodiment 140 can be constituted, certainly, forms switch element
There are also a lot of other layers, the present invention is merely exemplary to be described, and is not limited thereto.It should be noted that exhausted in grid
Be also formed with multiple perforations in edge layer 142, the first insulating layer 144, for realizing second metal layer 145, the first metal layer 143 with
And the first electric connection between doped region S/D or the second doped region D/S, not showed that in Fig. 3 A convenient for clear explanation.
Again as shown in Figure 3B, second insulating layer 146 is formed above second metal layer 145 and the first insulating layer 144, the
Two insulating layers 146 cover second metal layer 145 and the first insulating layer 144, and third metal layer is formed in second insulating layer 146
It 147 and is patterned, forms third insulating layer 148 above second insulating layer 146 and third metal layer 147, the
Three insulating layers 148 cover second insulating layer 146 and third metal layer 147, form welding backing metal above third insulating layer 148
Layer 149 is simultaneously patterned.Welding backing metal layer 149 can be transparent conductive metal oxide material, for example, indium tin aoxidizes
Object, indium-zinc oxide, aluminium tin-oxide, aluminium zinc oxide, indium germanium zinc oxide etc..
As shown in Figure 3B, wherein form opening also in second insulating layer 146 and third insulating layer 148, and exist respectively
The first contact hole VIA1 and the second contact hole VIA2 is formed in opening；First contact hole VIA1 realize second metal layer 145 with
Electric connection between third metal layer, the second contact hole VIA2 are realized between third metal layer 147 and welding backing metal layer 149
It is electrically connected.Detection welding pad 130 and first can be thus achieved by the first contact hole VIA1 and the second contact hole VIA2 as a result,
Electric connection between ESD protection circuit 140.First contact hole VIA1 can be by third metal layer 147 or other conductions
Material fills openings are formed；Second contact hole VIA2 can be formed by welding backing metal layer 149 or other conductive materials filling opening.
Third metal layer 147, third insulating layer 148 and welding backing metal layer 149 are the detection welding pad for foring the present embodiment as a result,
130, certainly, there are also other constituted modes, the present embodiment to be not limited thereto for detection welding pad 130.It should be pointed out that for convenient for
Illustrate, the detection welding pad 130 in Fig. 3 A does not show that third insulating layer 148, it is merely exemplary show third metal layer 147 and
Welding backing metal layer 149.
In addition, for another example Fig. 2, Fig. 3 A, shown in Fig. 3 B, if necessary to which the test signal CTS on detection welding pad 130 is transferred to
When viewing area 110, the third metal layer 147 in detection welding pad 130 further includes a cabling area 147-1, as a result, third metal layer
147 are made of two parts, and a part is located at the lower section of 130 welding backing metal layer 149 of detection welding pad, are belonged to pad zone, are used to form
Detection welding pad 130；Another part is cabling area 147-1, is used for transmission test signal CTS, the test signal on detection welding pad 130
The pixel unit that CTS is transferred to viewing area 110 and is electrically connected in viewing area 110 by cabling area 147-1 is realized to display
The test in area 110.Wherein, the width of cabling area 147-1 third metal layer is smaller than the width of pad zone third metal layer 147,
Different width can be selected according to specific layout.
In conclusion the first ESD protection circuit 140 is formed in detection welding pad by the display panel 100 of the present embodiment
130 lower sections, and realize the electric connection of detection welding pad 130 and the first ESD protection circuit 140.Dduring test,
The electrostatic discharge (ESD) protection to detection welding pad 130 may be implemented in one ESD protection circuit 140, normally shows after the completion of test
When, the first ESD protection circuit 140 can be also used for the electrostatic discharge (ESD) protection to viewing area 110.
Certainly, the present invention can also have other various embodiments, without deviating from the spirit and substance of the present invention, ripe
It knows those skilled in the art and makes various corresponding changes and modifications, but these corresponding changes and change in accordance with the present invention
Shape all should fall within the scope of protection of the appended claims of the present invention.
Claims (10)
1. a kind of display panel characterized by comprising
One first substrate includes adjacent a viewing area and a peripheral region；
Multiple pixel units are set to the first substrate, and are located at the viewing area；
One detection welding pad is set to the first substrate, and is located at the peripheral region；
At least one first ESD protection circuit is set to the first substrate, and is located at the peripheral region, and described first is quiet
Discharge of electricity protects circuit and the detection welding pad to be electrically connected；
Wherein, the detection welding pad at least partly covers first ESD protection circuit.
2. display panel according to claim 1, which is characterized in that further include:
At least one second ESD protection circuit, is set to the first substrate, and is located at the peripheral region, wherein described the
Two ESD protection circuits and an ambient signal route are electrically connected, and the ambient signal route is located at the peripheral region.
3. display panel according to claim 1, which is characterized in that first ESD protection circuit further includes:
One first semiconductor layer, is set to the first substrate, and first semiconductor layer has one first doped region, one the
Two doped regions and a channel region, and the channel region is between first doped region and second doped region；
One gate insulating layer is covered in first semiconductor layer；
One the first metal layer is set to the gate insulating layer, and position corresponds to the channel region；
One first insulating layer, is covered in the first metal layer；And
One second metal layer is set to first insulating layer, and is connected to first doped region or second doped region.
4. display panel according to claim 3, which is characterized in that further include:
One second insulating layer is covered in the second metal layer；
One first contact hole, is formed in the second insulating layer；
One third metal layer, is set in the second insulating layer, and is located in first contact hole, so that the third is golden
Belong to layer and is connected to the second metal layer；
One third insulating layer is covered in the third metal layer and the second insulating layer；
One second contact hole is formed in the third insulating layer.
5. display panel according to claim 4, which is characterized in that the detection welding pad includes at least a welding backing metal
Layer, is set to the third insulating layer, and is located in second contact hole, so that the welding backing metal layer is connected to described the
Two metal layers.
6. display panel according to claim 5, which is characterized in that the third metal layer includes a connected pad zone
With a cabling area, and the position of the pad zone corresponds to the welding backing metal layer, and cabling area is from the pad zone and to institute
Viewing area extension is stated, wherein the width of pad zone is greater than the width in cabling area.
7. display panel according to claim 5, which is characterized in that the third metal layer includes a connected pad zone
With a cabling area, and the pad zone can by first contact hole and be connected to first ESD protection circuit,
The cabling area is then electrically connected the multiple pixel unit.
8. display panel according to claim 5, which is characterized in that the welding backing metal layer can be transparency conducting layer.
9. display panel according to claim 8, which is characterized in that the transparency conducting layer can be metal oxide and lead
Electric material.
10. display panel according to claim 9, which is characterized in that the metal conductive oxide material can be indium
Tin-oxide, indium-zinc oxide, aluminium tin-oxide, aluminium zinc oxide, indium germanium zinc oxide.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811599243.6A CN109786373A (en) | 2018-12-26 | 2018-12-26 | Display panel |
| TW108112015A TWI706191B (en) | 2018-12-26 | 2019-04-03 | Display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811599243.6A CN109786373A (en) | 2018-12-26 | 2018-12-26 | Display panel |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109786373A true CN109786373A (en) | 2019-05-21 |
Family
ID=66498403
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811599243.6A Pending CN109786373A (en) | 2018-12-26 | 2018-12-26 | Display panel |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN109786373A (en) |
| TW (1) | TWI706191B (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110504292A (en) * | 2019-08-28 | 2019-11-26 | 昆山国显光电有限公司 | Array substrate, display panel and display device |
| CN110854113A (en) * | 2019-10-29 | 2020-02-28 | 武汉华星光电技术有限公司 | Electrostatic protection structure, manufacturing method and array substrate mother board |
| CN110910758A (en) * | 2019-12-17 | 2020-03-24 | 厦门天马微电子有限公司 | Display substrate, display module and control method thereof |
| CN111679521A (en) * | 2020-06-04 | 2020-09-18 | Tcl华星光电技术有限公司 | Display module and electronic equipment |
| CN112466238A (en) * | 2020-12-03 | 2021-03-09 | 友达光电（昆山）有限公司 | Display device |
| CN114256082A (en) * | 2021-12-21 | 2022-03-29 | 武汉天马微电子有限公司 | Display panel motherboard and testing method thereof, display panel and display device |
| WO2025001578A1 (en) * | 2023-06-30 | 2025-01-02 | 京东方科技集团股份有限公司 | Display substrate, display mother-template, display panel, and display apparatus |
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| CN112466238A (en) * | 2020-12-03 | 2021-03-09 | 友达光电（昆山）有限公司 | Display device |
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| WO2025001578A1 (en) * | 2023-06-30 | 2025-01-02 | 京东方科技集团股份有限公司 | Display substrate, display mother-template, display panel, and display apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI706191B (en) | 2020-10-01 |
| TW202024737A (en) | 2020-07-01 |
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Application publication date: 20190521 |
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| WD01 | Invention patent application deemed withdrawn after publication |