CN109584786B - Driving circuit and driving method of display panel and display device - Google Patents
Driving circuit and driving method of display panel and display device Download PDFInfo
- Publication number
- CN109584786B CN109584786B CN201910055157.7A CN201910055157A CN109584786B CN 109584786 B CN109584786 B CN 109584786B CN 201910055157 A CN201910055157 A CN 201910055157A CN 109584786 B CN109584786 B CN 109584786B
- Authority
- CN
- China
- Prior art keywords
- unit
- signal
- thin film
- film transistor
- light emitting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Electroluminescent Light Sources (AREA)
- Control Of El Displays (AREA)
Abstract
The application belongs to the technical field of display, and provides a driving circuit, a driving method and a display device of a display panel, wherein a first switch unit receives a first scanning signal provided by a first scanning line, a second switch unit receives a second scanning signal provided by a second scanning line, a third switch unit receives a third scanning signal provided by a third scanning line and a power supply signal provided by a power line, and the first capacitor unit and the second capacitor unit are charged by controlling the connection or disconnection of a data voltage signal provided by a data line, so that the current flowing through a light-emitting unit is not influenced by the threshold voltage of the driving unit, and the problem of uneven display of the light-emitting unit is avoided.
Description
Technical Field
The embodiment of the application belongs to the technical field of display, and particularly relates to a driving circuit, a driving method and a display device of a display panel.
Background
With the continuous development of display technology, display devices such as liquid crystal panels and displays are continuously developing towards high resolution, large screen, low power consumption and low cost. The liquid crystal panel comprises pixel units which are arranged in rows and columns, when the liquid crystal panel works, a grid driving signal controls the on and off of a Thin Film Transistor (TFT) in the pixel unit, so that the line scanning of the liquid crystal panel is completed, the function of displaying images by the liquid crystal panel is realized, and in order to improve the display effect, an active array LED driving circuit is usually adopted for driving the display panel.
However, the current of the thin film transistor drifts due to the drift of the threshold voltage under the gate stress (gate stress) of the thin film transistor for a long time, so that the micro light emitting diode has the problem of uneven display.
Content of application
The embodiment of the application provides a driving circuit, a driving method and a display device of a display panel, and aims to solve the problem that the current of a thin film transistor drifts due to the drift of threshold voltage of the thin film transistor under long-time gate stress, so that a micro light-emitting diode displays unevenly.
The embodiment of the application provides a drive circuit of a display panel, including:
the input end of the first switch unit is connected with the data line, and the control end of the first switch unit is connected with the first scanning line and is arranged to control the on and off of a data voltage signal provided by the data line according to a first scanning signal input by the first scanning line;
the first end of the first capacitor unit is connected with the output end of the first switch unit;
a first end of the second capacitor unit is connected with a power line, and the power line is used for providing a power signal;
the input end of the second switch unit is connected with the second end of the second capacitor unit, the output end of the second switch unit is connected with the second end of the first capacitor unit, the control end of the second switch unit is connected with a second scanning line, and the second scanning line is used for providing a second scanning signal;
a control end of the third switching unit is connected with the second end of the second capacitor unit, an input end of the third switching unit is connected with the power line, and an output end of the third switching unit is connected with the second end of the first capacitor unit;
and a first end of the light emitting unit is connected with the output end of the third switching unit, and a second end of the light emitting unit is connected with the common electrode.
Optionally, the first switch unit, the second switch unit and the third switch unit are electronic switch tubes.
Optionally, the electronic switching tube is an N-type thin film transistor field effect transistor;
the drain electrode of the N-type thin film transistor is the input end of the electronic switch tube, the source electrode of the N-type thin film transistor is the output end of the electronic switch tube, and the grid electrode of the N-type thin film transistor is the control end of the electronic switch tube.
Optionally, the first capacitor unit includes a first capacitor, a first end of the first capacitor is used as a first end of the first capacitor unit, and a second end of the first capacitor is used as a second end of the first capacitor unit.
Optionally, the second capacitor unit includes a second capacitor, a first end of the second capacitor is used as a first end of the second capacitor unit, and a second end of the second capacitor is used as a second end of the second capacitor unit.
Optionally, the light emitting unit includes a micro light emitting diode, an anode of the micro light emitting diode is a first end of the light emitting unit, and a cathode of the micro light emitting diode is a second end of the light emitting unit.
Optionally, the electronic switching tube is any one of a polycrystalline silicon thin film transistor, an amorphous silicon thin film transistor, a zinc oxide-based thin film transistor, or an organic thin film transistor.
An embodiment of the present application further provides a driving method of any one of the driving circuits, where the driving method includes:
in an initialization stage, setting the first scanning signal to a high level, setting the second scanning signal to a low level, setting the power supply signal to a high level, and setting the data voltage signal to a first data voltage;
in a threshold voltage compensation stage, setting the first scanning signal and the second scanning signal to a high level, setting the power supply signal to a high level, and setting the data voltage signal to a second data voltage;
in a charging phase, setting the first scanning signal and the second scanning signal to be high level, setting the power supply signal to be high level, and setting the data voltage signal to be a third data voltage;
in a light emitting stage, the first scan signal and the second scan signal are set to a low level, the power signal is set to a low level, and the data voltage signal is set to a first data voltage.
Optionally, in the initialization stage, the voltage of the power supply signal is smaller than the voltage of the common electrode.
Another embodiment of the present application also provides a display device including:
a display panel; and
a control unit, wherein the control unit comprises a drive circuit as described in any of the above embodiments.
The embodiment of the application provides a driving circuit, a driving method and a display device of a display panel, wherein a first switch unit receives a first scanning signal provided by a first scanning line, a second switch unit receives a second scanning signal provided by a second scanning line, a third switch unit receives a third scanning signal provided by a third scanning line and a power supply signal provided by a power supply line, and the first capacitor unit and the second capacitor unit are charged by controlling the on or off of a data voltage signal provided by a data line, so that the current flowing through a light-emitting unit is not influenced by the threshold voltage of the driving unit, and the problem of uneven display of the light-emitting unit is avoided.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a driving circuit of a display panel according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of a driving circuit of a display panel according to another embodiment of the present application;
fig. 3 is a schematic flow chart of a driving method according to an embodiment of the present application;
fig. 4 is a schematic driving timing diagram of a driving method according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of a display device according to an embodiment of the present application.
Detailed Description
In order to make the technical solutions better understood by those skilled in the art, the technical solutions in the embodiments of the present application will be clearly described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The terms "comprises" and "comprising," and any variations thereof, in the description and claims of this application and the drawings described above, are intended to cover non-exclusive inclusions. For example, a process, method, or system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus. Further, the terms "first", "second", and "third", etc. are provided to distinguish different objects, and are not provided to describe a specific order.
Fig. 1 is a schematic structural diagram of a driving circuit of a display panel according to an embodiment of the present disclosure. As shown in fig. 1, the drive circuit in the present embodiment includes:
the input end of the first switch unit 10 is connected with a data line, and the control end of the first switch unit 10 is connected with a first scan line and is configured to control the on and off of a data voltage signal provided by the data line according to a first scan signal input by the first scan line;
a first capacitor unit 101, wherein a first end of the first capacitor unit 101 is connected to an output end of the first switch unit 10;
a second capacitor unit 102, a first end of the second capacitor unit 102 being connected to a power line, the power line being configured to provide a power signal;
a second switch unit 20, an input end of the second switch unit 20 is connected to a second end of the second capacitor unit 102, an output end of the second switch unit 20 is connected to a second end of the first capacitor unit 101, a control end of the second switch unit 20 is connected to a second scan line, and the second scan line is configured to provide a second scan signal;
a third switching unit 30, a control terminal of the third switching unit 30 being connected to the second terminal of the second capacitor unit 20, an input terminal of the third switching unit 30 being connected to the power line, and an output terminal of the third switching unit 30 being connected to the second terminal of the first capacitor unit 101;
and a light emitting unit 103, wherein a first end of the light emitting unit 103 is connected to the output end of the third switching unit 30, and a second end of the light emitting unit 103 is connected to the common electrode.
In one embodiment, the first switch unit, the second switch unit and the third switch unit are electronic switch tubes.
In one embodiment, the electronic switching tube is an N-type thin film transistor field effect transistor;
the drain electrode of the N-type thin film transistor is the input end of the electronic switch tube, the source electrode of the N-type thin film transistor is the output end of the electronic switch tube, and the grid electrode of the N-type thin film transistor is the control end of the electronic switch tube.
Fig. 2 is a schematic structural diagram of a driving circuit of a display panel according to another embodiment of the present disclosure.
Referring to fig. 2, in one embodiment, the first capacitor unit 101 includes a first capacitor C1, a first terminal of the first capacitor C1 is used as a first terminal of the first capacitor unit 101, and a second terminal of the first capacitor C1 is used as a second terminal of the first capacitor unit 101.
In one embodiment, the first capacitance unit 101 may also be a series connection or a parallel connection of a plurality of capacitances, for example, a first end of the plurality of series-connected capacitances serves as a first end of the first capacitance unit 101, and a second end of the plurality of series-connected capacitances serves as a second end of the first capacitance unit 101.
Referring to fig. 2, in one embodiment, the second capacitor unit 102 includes a second capacitor, a first terminal of the second capacitor C2 is used as a first terminal of the second capacitor unit 102, and a second terminal of the second capacitor C2 is used as a second terminal of the second capacitor unit 102.
In one embodiment, the second capacitance unit 102 may also be a series connection or a parallel connection of a plurality of capacitances, for example, a first end of the plurality of series-connected capacitances serves as a first end of the second capacitance unit 102, and a second end of the plurality of series-connected capacitances serves as a second end of the second capacitance unit 102.
Referring to fig. 2, in one embodiment, the light emitting unit 103 includes a micro light emitting diode uued, an anode of the micro light emitting diode uued is a first end of the light emitting unit 103, and a cathode of the micro light emitting diode uued is a second end of the light emitting unit 103.
Referring to fig. 2, in one embodiment, the first switching unit 10 includes a first thin film transistor M1, a drain of the first thin film transistor M1 is an input terminal of the first switching unit 10, a source of the first thin film transistor M1 is an output terminal of the first switching unit 10, and a gate of the first thin film transistor M1 is a control terminal of the first switching unit 10.
Referring to fig. 2, in one embodiment, the second switching unit 20 includes a second thin film transistor M2, a drain of the second thin film transistor M2 is an input terminal of the second switching unit 20, a source of the second thin film transistor M2 is an output terminal of the second switching unit 20, and a gate of the second thin film transistor M2 is a control terminal of the second switching unit 20.
Referring to fig. 2, in one embodiment, the third switching unit 30 includes a third thin film transistor M3, a drain of the third thin film transistor M3 is an input terminal of the third switching unit 30, a source of the third thin film transistor M3 is an output terminal of the third switching unit 30, and a gate of the third thin film transistor M3 is a control terminal of the third switching unit 30.
In one embodiment, the second terminal of the first capacitance unit 101 is set as a node n, and the control terminal of the third switching unit 30 is set as a node m.
Referring to fig. 2, another embodiment of the present application provides a driving circuit of a display panel, including:
a first thin film transistor M1, a drain of the first thin film transistor M1 is connected to a data line, a gate of the first thin film transistor M1 is connected to a first scan line, and configured to control on and off of a data voltage signal provided by the data line according to a first scan signal input by the first scan line;
a first capacitor C1, wherein a first end of the first capacitor C1 is connected with the source electrode of the first thin film transistor M1;
a second capacitor C2, a first terminal of the second capacitor C2 being connected to a power line, the power line being configured to provide a power signal;
a second thin film transistor M2, a drain of the second thin film transistor M2 is connected to the second end of the second capacitor C2, a source of the second thin film transistor M2 is connected to the second end of the first capacitor C1, a gate of the second thin film transistor M2 is connected to a second scan line, and the second scan line is configured to provide a second scan signal;
a third thin film transistor M3, a gate of the third thin film transistor M3 is connected to the second terminal of the second capacitor C2, a drain of the third thin film transistor M3 is connected to the power line, and a source of the third thin film transistor M3 is connected to the second terminal of the first capacitor C1;
and the anode of the micro light-emitting diode uLED is connected with the source electrode of the third thin film transistor M3, and the cathode of the micro light-emitting diode uLED is connected with the common electrode VSS.
In one embodiment, the second terminal of the first capacitor C1 is set to the node n, and the gate of the third thin film transistor M3 is set to M.
Fig. 3 is a flowchart illustrating a driving method of a driving circuit of a display panel according to any one of the above embodiments according to an embodiment of the present application.
As shown in fig. 3, the driving method in the present embodiment includes:
in an initialization stage, setting the first scanning signal to a high level, setting the second scanning signal to a low level, setting the power supply signal to a high level, and setting the data voltage signal to a first data voltage;
in a threshold voltage compensation stage, setting the first scanning signal and the second scanning signal to a high level, setting the power supply signal to a high level, and setting the data voltage signal to a second data voltage;
in a charging phase, setting the first scanning signal and the second scanning signal to be high level, setting the power supply signal to be high level, and setting the data voltage signal to be a third data voltage;
in a light emitting stage, the first scan signal and the second scan signal are set to a low level, the power signal is set to a low level, and the data voltage signal is set to a first data voltage.
In one embodiment, during the initialization phase, the voltage of the power supply signal is less than the voltage of the common electrode.
Fig. 4 is a schematic driving timing diagram of a driving method according to an embodiment of the present application.
As shown in fig. 4, in the driving process of the driving circuit, the whole driving process is divided into four phases including an initialization phase T1, a threshold voltage compensation phase T2, a charging phase T3, and a light emitting phase T4.
Specifically, the frame time T is (T1+ T2+ T3+ T4) · T, where T is the number of scan lines, that is, the number of times of scanning of one frame, and if the scan frequency is 60HZ, the frame time T is 1/60 ═ 16.7ms, and if the scan frequency is 120HZ, the frame time T is 1/120 ═ 8.33ms, for example, for a High resolution (High Definition, HD)1366 ═ 768 gate lines, T ═ 768, and for a Full High resolution (Full Definition, FHD) (in the case of 60HZ, 120HZ may correspond to 10.85 μ s), and for a Full High resolution (Full Definition, FHD), T is 1080, T is T1+ T9634 ═ 12, T967 × T6 ═ 2166 ═ 7, T2167 ═ 12 μ s, T is 367 ═ 27 μ s, T × 367 ═ 7 μ s, T9 ═ 12 μ s, T11 ═ 6 ═ 7 μ s, T ═ 7 μ s, T11 ═ 7.
In one embodiment, the common electrode VSS is provided with a predetermined voltage signal configured to improve the stability of the driving circuit.
In one embodiment, the common electrode VSS may be directly grounded.
In the initialization period T1, initialization setting is performed with the first scan signal Gate1 set to the high level VGH, the second scan signal Gate2 set to the low level VGL, the power signal VDD set to the high level VDD _ H, the data voltage signal Vdata set to the first data voltage V0, and at this time, the first thin film transistor M1 is turned on, the second thin film transistor M2 is turned off, the voltage Vm at the node M is coupled and boosted by the second capacitor C2, and the third tft M3 may be turned on, and the third tft M3 may be turned on, at which time the voltage at the node n is discharged through the third tft M3, and thus, at the end of the initialization phase T1, the voltage Vn at node n is VDD _ H, at which point VDD _ H < VSS + VTH _ uLED, the micro light emitting diode uLED is turned off, VSS is the voltage of the common electrode, set to improve the stability of the driving circuit, and VTH _ uLED is the threshold voltage of the micro light emitting diode uLED.
In the threshold voltage compensation period T2, the first scan signal Gate1 is set to the high level VGH, the power signal VDD is set to the high level VDD _ H, the second scan signal Gate2 is set to the high level VGH, and the second thin film transistor M2 is turned on, at which time, the data voltage signal Vdata is set to the second data voltage Vc, wherein the second data voltage Vc is greater than the first data voltage V0. The voltage of the node M is pulled high by the second capacitor C2 due to the effect of capacitive coupling, in this stage, the third thin film transistor M3 operates in a saturation region, and the power supply signal VDD charges the node M and the node n before the third thin film transistor M3 is turned off, at this time, the voltages of the node M and the node n are both VDD _ H-Vth3, that is, Vm ═ Vn ═ VDD _ H-Vth3, where Vth3 is the threshold voltage of the third thin film transistor, and at this time, the voltage Vn at the node n is not enough to turn on the micro light emitting diode uLED.
In the charging period T3, the first scan signal Gate1 and the second scan signal Gate2 are set to a high level VGH, the first thin film transistor M1 and the second thin film transistor M2 are both in an on state, the power signal VDD is set to a high level VDD _ H, at this time, the data voltage signal Vdata provided by the data line is set to a third data voltage Vdata for data writing, the third data voltage Vdata is greater than the second data voltage Vc, and according to the charge coupling effect, the voltage of the node M is:
before the charging phase T3 is finished, the voltage of the node M is higher than that of the node M in the threshold voltage compensation phase T2, the third thin film transistor M3 is in a saturation region, and the power supply signal VDD charges the node M to make the voltage Vm at the node M have a voltage increment, and the voltage of the node M is:
where VDD _ H is a high-level voltage of the power signal VDD, Vth3 is a threshold voltage of the third tft, Vdata is a third data voltage, and Δ V is a voltage increment at the node m, which is a parameter related to mobility of the third tft.
In the light emitting period T4, the data voltage signal Vdata provided by the data line has been written, and the micro light emitting diode uuled conducts light emitting operation, and the current flowing through the micro light emitting diode uuled is:
wherein Vdata is a third data voltage, Vc is a second data voltage, and k is a constant related to mobility of the semiconductor layer. k is u · Cox · W/L, u is the electron mobility of the semiconductor layer, Cox is the capacitance per unit area of a metal-insulator-semiconductor (MIS) structure of a thin film transistor device, and W/L is the width-to-length ratio of the TFT channel.
As can be seen from the above formula, the third thin film transistor M3 is used as a driving switch tube, and the current IuLED flowing through the micro light emitting diode uuled is data independent of the threshold voltage of the third thin film transistor, and at this time, the threshold voltage drift of the driving switch tube has no great influence on the driving current IuLED of the micro light emitting diode uuled, so that a high-quality display image can be obtained.
Fig. 5 is a schematic structural diagram of a display device according to an embodiment of the present application.
As shown in fig. 5, the display device 60 in the present embodiment includes:
a display panel 60; and
a control unit 61, wherein the control unit 61 comprises a drive circuit 610 as defined in any of the above.
In one embodiment, the Display device 60 can be any type of Display device provided with the driving circuit 610, such as a Liquid Crystal Display (LCD), an Organic electroluminescent Display (OLED) Display device, a Quantum Dot Light Emitting diode (QLED) Display device, a curved Display device, or the like.
In one embodiment, the display panel 62 includes a pixel array composed of rows of pixels and columns of pixels.
In one embodiment, the control Unit 61 may be implemented by a general-purpose Integrated Circuit, such as a Central Processing Unit (CPU), or an Application Specific Integrated Circuit (ASIC).
The embodiment of the application provides a driving circuit, a driving method and a display device of a display panel, wherein a first switch unit receives a first scanning signal provided by a first scanning line, a second switch unit receives a second scanning signal provided by a second scanning line, a third switch unit receives a third scanning signal provided by a third scanning line and a power supply signal provided by a power supply line, and the first capacitor unit and the second capacitor unit are charged by controlling the on or off of a data voltage signal provided by a data line, so that the current flowing through a light-emitting unit is not influenced by the threshold voltage of the driving unit, and the problem of uneven display of the light-emitting unit is avoided.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by a computer program, which can be stored in a computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. The storage medium may be a magnetic disk, an optical disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), or the like.
The above description is only exemplary of the present application and should not be taken as limiting the present application, and any modifications, equivalents, improvements, etc. made within the spirit and principle of the present application should be included in the scope of the present application.
Claims (9)
1. A driving method of a driving circuit, the driving circuit comprising:
the input end of the first switch unit is connected with the data line, and the control end of the first switch unit is connected with the first scanning line and is arranged to control the on and off of a data voltage signal provided by the data line according to a first scanning signal input by the first scanning line;
the first end of the first capacitor unit is connected with the output end of the first switch unit;
a first end of the second capacitor unit is connected with a power line, and the power line is used for providing a power signal;
the input end of the second switch unit is connected with the second end of the second capacitor unit, the output end of the second switch unit is connected with the second end of the first capacitor unit, the control end of the second switch unit is connected with a second scanning line, and the second scanning line is used for providing a second scanning signal;
a control end of the third switching unit is connected with the second end of the second capacitor unit, an input end of the third switching unit is connected with the power line, and an output end of the third switching unit is connected with the second end of the first capacitor unit;
a first end of the light emitting unit is connected with the output end of the third switching unit, and a second end of the light emitting unit is connected with the common electrode;
the public electrode is connected with a preset voltage signal;
the driving method includes:
in an initialization stage, setting the first scanning signal to a high level, setting the second scanning signal to a low level, setting the power supply signal to a high level, and setting the data voltage signal to a first data voltage;
in a threshold voltage compensation stage, setting the first scanning signal and the second scanning signal to a high level, setting the power supply signal to a high level, and setting the data voltage signal to a second data voltage;
in a charging phase, setting the first scanning signal and the second scanning signal to be high level, setting the power supply signal to be high level, and setting the data voltage signal to be a third data voltage;
in a light emitting stage, the first scan signal and the second scan signal are set to a low level, the power signal is set to a low level, and the data voltage signal is set to a first data voltage.
2. The driving method according to claim 1, wherein in the initialization phase, a voltage of the power supply signal is smaller than a voltage of the common electrode.
3. The driving method according to claim 1, wherein the first switching unit, the second switching unit, and the third switching unit are electronic switching tubes.
4. The driving method according to claim 3, wherein the electronic switching tube is an N-type thin film transistor field effect transistor;
the drain electrode of the N-type thin film transistor is the input end of the electronic switch tube, the source electrode of the N-type thin film transistor is the output end of the electronic switch tube, and the grid electrode of the N-type thin film transistor is the control end of the electronic switch tube.
5. The driving method according to claim 1, wherein the first capacitance unit includes a first capacitance, a first terminal of the first capacitance serves as a first terminal of the first capacitance unit, and a second terminal of the first capacitance serves as a second terminal of the first capacitance unit.
6. The driving method according to claim 1, wherein the second capacitance unit includes a second capacitance, a first terminal of the second capacitance is used as the first terminal of the second capacitance unit, and a second terminal of the second capacitance is used as the second terminal of the second capacitance unit.
7. The driving method according to claim 1, wherein the light emitting unit includes a micro light emitting diode, an anode of the micro light emitting diode is a first end of the light emitting unit, and a cathode of the micro light emitting diode is a second end of the light emitting unit.
8. The driving method according to claim 3, wherein the electronic switching tube is any one of a polycrystalline silicon thin film transistor, an amorphous silicon thin film transistor, a zinc oxide-based thin film transistor, or an organic thin film transistor.
9. A display device, comprising:
a display panel; and
a control unit for performing the driving method according to any one of claims 1 to 8.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910055157.7A CN109584786B (en) | 2019-01-21 | 2019-01-21 | Driving circuit and driving method of display panel and display device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910055157.7A CN109584786B (en) | 2019-01-21 | 2019-01-21 | Driving circuit and driving method of display panel and display device |
Publications (2)
Publication Number | Publication Date |
---|---|
CN109584786A CN109584786A (en) | 2019-04-05 |
CN109584786B true CN109584786B (en) | 2020-12-04 |
Family
ID=65917328
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201910055157.7A Active CN109584786B (en) | 2019-01-21 | 2019-01-21 | Driving circuit and driving method of display panel and display device |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN109584786B (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110706641B (en) * | 2019-09-16 | 2021-07-06 | 深圳市华星光电半导体显示技术有限公司 | Pixel driving circuit and display device |
CN111446283B (en) * | 2020-04-30 | 2023-08-04 | Tcl华星光电技术有限公司 | Display panel, display screen and electronic equipment |
CN114639341B (en) * | 2022-02-28 | 2023-04-21 | 长沙惠科光电有限公司 | Pixel driving circuit, display panel and driving method |
CN115311998B (en) * | 2022-10-11 | 2023-01-10 | 惠科股份有限公司 | Pixel driving circuit and display panel |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4752331B2 (en) * | 2005-05-25 | 2011-08-17 | セイコーエプソン株式会社 | Light emitting device, driving method and driving circuit thereof, and electronic apparatus |
KR101213837B1 (en) * | 2005-09-12 | 2012-12-18 | 엘지디스플레이 주식회사 | Organic Electro Luminescence Device And Driving Method Thereof |
CN101976545A (en) * | 2010-10-26 | 2011-02-16 | 华南理工大学 | Pixel drive circuit of OLED (Organic Light Emitting Diode) display and drive method thereof |
KR101964768B1 (en) * | 2012-09-10 | 2019-04-03 | 삼성디스플레이 주식회사 | Pixel, display device comprising the same and driving method thereof |
CN104409042B (en) * | 2014-12-04 | 2017-06-06 | 上海天马有机发光显示技术有限公司 | Image element circuit and its driving method, display panel, display device |
CN104821150B (en) * | 2015-04-24 | 2018-01-16 | 北京大学深圳研究生院 | Image element circuit and its driving method and display device |
-
2019
- 2019-01-21 CN CN201910055157.7A patent/CN109584786B/en active Active
Also Published As
Publication number | Publication date |
---|---|
CN109584786A (en) | 2019-04-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN110176213B (en) | Pixel circuit, driving method thereof and display panel | |
CN109545145B (en) | Pixel circuit, driving method thereof and display device | |
CN105957473B (en) | A kind of organic light emitting display panel and its driving method | |
CN109493794B (en) | Pixel circuit, pixel driving method and display device | |
CN107564478B (en) | A display panel, a display method and a display device | |
CN104134426B (en) | Pixel structure and driving method thereof, and display device | |
CN105702206B (en) | A kind of offset peripheral system and method, the display system of picture element matrix | |
US20210201806A1 (en) | Shift register unit and driving method thereof, gate driving circuit, and display device | |
CN107908310B (en) | pixel circuit, driving method thereof and display device | |
US20180190194A1 (en) | Pixel circuit, method for driving the same, display panel, and display device | |
CN110021273B (en) | Pixel circuit, driving method thereof and display panel | |
CN109584786B (en) | Driving circuit and driving method of display panel and display device | |
CN104715724B (en) | Pixel circuit, drive method thereof and display device | |
CN108376534B (en) | Pixel circuit, driving method thereof and display panel | |
CN107146575A (en) | Organic light emitting diode display | |
CN109979394A (en) | Pixel circuit and its driving method, array substrate and display device | |
CN113689825A (en) | Driving circuit, driving method and display device | |
US11900873B2 (en) | Display panels, methods of driving the same, and display devices | |
CN104778915B (en) | Display device and pixel circuit and display driving method thereof | |
CN110062944A (en) | Pixel circuit and its driving method, display device | |
US11238789B2 (en) | Pixel circuit having a data line for sensing threshold and mobility characteristics of the circuit | |
CN110062943A (en) | Pixel circuit and its driving method, display device | |
CN109493790A (en) | Driving circuit and driving method of display panel and display device | |
CN111613178A (en) | Pixel circuit, driving method thereof, display substrate and display device | |
JP4334353B2 (en) | Image display device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |