CN109560142B - Novel silicon carbide junction barrier Schottky diode and manufacturing method thereof - Google Patents
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- 230000004888 barrier function Effects 0.000 title claims abstract description 150
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims abstract description 64
- 229910010271 silicon carbide Inorganic materials 0.000 title claims abstract description 64
- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 239000000758 substrate Substances 0.000 claims abstract description 19
- 230000000670 limiting effect Effects 0.000 claims abstract description 13
- 239000010410 layer Substances 0.000 claims description 31
- 238000000151 deposition Methods 0.000 claims description 19
- 239000002184 metal Substances 0.000 claims description 18
- 230000002829 reductive effect Effects 0.000 claims description 10
- 238000005566 electron beam evaporation Methods 0.000 claims description 9
- 238000001017 electron-beam sputter deposition Methods 0.000 claims description 9
- 238000001259 photo etching Methods 0.000 claims description 8
- 238000000137 annealing Methods 0.000 claims description 6
- 230000008021 deposition Effects 0.000 claims description 6
- 238000002161 passivation Methods 0.000 claims description 6
- 238000005468 ion implantation Methods 0.000 claims description 5
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 3
- 238000000227 grinding Methods 0.000 claims description 3
- 238000000206 photolithography Methods 0.000 claims description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 3
- 230000001681 protective effect Effects 0.000 claims description 3
- 239000011241 protective layer Substances 0.000 claims description 3
- 238000005530 etching Methods 0.000 claims 1
- 230000003287 optical effect Effects 0.000 claims 1
- 230000007423 decrease Effects 0.000 abstract description 2
- 238000000034 method Methods 0.000 abstract description 2
- 238000005036 potential barrier Methods 0.000 abstract 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 229910052681 coesite Inorganic materials 0.000 description 3
- 229910052906 cristobalite Inorganic materials 0.000 description 3
- 230000003247 decreasing effect Effects 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 229910052682 stishovite Inorganic materials 0.000 description 3
- 229910052905 tridymite Inorganic materials 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D8/00—Diodes
- H10D8/60—Schottky-barrier diodes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
- H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]
- H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
- H10D62/107—Buried supplementary regions, e.g. buried guard rings
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- H—ELECTRICITY
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
- H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
- H10D62/8325—Silicon carbide
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- H—ELECTRICITY
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D8/00—Diodes
- H10D8/01—Manufacture or treatment
- H10D8/051—Manufacture or treatment of Schottky diodes
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Abstract
本发明提供了新型碳化硅结势垒肖特基二极管，包括层叠设置的第一导电类型碳化硅衬底，第一导电类型碳化硅外延层；所述第一导电类型碳化硅外延层的上表面由中心向外依次设置有有源区、保护环和第二导电类型终端场限环；所述有源区包括间隔设置的多个第二导电类型结势垒区；沿着保护环向有源区的中心的方向，相邻第二导电类型结势垒区的间距逐渐增大，且第二导电类型结势垒区的宽度逐渐减小。本发明还提供了上述的碳化硅结势垒肖特基二极管的制作方法。
The present invention provides a novel silicon carbide junction barrier Schottky diode, comprising a first conductive type silicon carbide substrate, a first conductive type silicon carbide epitaxial layer, and an upper surface of the first conductive type silicon carbide epitaxial layer. An active area, a guard ring and a second conductivity type terminal field limiting ring are arranged in sequence from the center to the outside; the active area includes a plurality of second conductivity type junction potential barrier areas arranged at intervals; In the direction of the center of the region, the spacing between adjacent second conductive type junction barrier regions gradually increases, and the width of the second conductive type junction barrier regions gradually decreases. The present invention also provides a method for fabricating the above-mentioned silicon carbide junction barrier Schottky diode.
Description
Technical Field
The present invention relates to semiconductor power devices, and more particularly to silicon carbide diodes.
Background
Chinese patent 200710153275.9, entitled "SiC Schottky Barrier semiconductor device", describes that the junction barrier d1/d2 of the second conductivity type is not less than 1; in this patent, the depth of the entire guard ring < the active junction barrier depth; chinese patent: CN201710027731 entitled "sic schottky diode structure for improving surge capability and preparation method" describes that the width of the junction barrier region of the active region is 2 kinds of width, and the spacing is uniformly distributed.
In the above patent description, the junction depths of the active P-region and the guard ring P-region coincide. This results in a junction barrier diode with low avalanche capability.
Disclosure of Invention
The invention aims to provide a manufacturing method of a novel silicon carbide junction barrier Schottky diode, and the avalanche tolerance of the Schottky diode is improved.
In order to solve the technical problem, the invention provides a novel silicon carbide junction barrier schottky diode, which comprises a first conductive type silicon carbide substrate and a first conductive type silicon carbide epitaxial layer, wherein the first conductive type silicon carbide substrate and the first conductive type silicon carbide epitaxial layer are arranged in a stacked mode; the upper surface of the first conductive type silicon carbide epitaxial layer is provided with an active region, a protection ring and a second conductive type terminal field limiting ring from the center to the outside in sequence; the active region comprises a plurality of second conductive type junction barrier regions which are arranged at intervals;
and along the direction of the protective ring towards the center of the active region, the distance between the adjacent second conduction type junction barrier regions is gradually increased, and the width of the second conduction type junction barrier regions is gradually reduced.
In a preferred embodiment: the protection ring is divided into a shallow junction and a deep junction; the junction depth and concentration of the shallow junction are the same as those of the second conduction type terminal field limiting ring; the junction depth and concentration of the deep junction are the same as those of the second conductive type junction barrier region; the shallow junction and the deep junction are overlapped; width W of the deep junction0Is 5-35 um.
In a preferred embodiment: the active region comprises n second conductivity type junction barriers, the width W of the first junction barrier adjacent to the guard ring1Is 1-15 um; spacing S between guard ring and first junction barrier region10.5-8 um; width W of n-th second conductivity type junction barrier regionnIs 0.5-4um, and the distance S between the n-1 st second conductive type junction barrier region and the n second conductive type junction barrier regionnIs 5-10 um.
In a preferred embodiment: each of the second conductive type junction barrier regions includes one or at least two sub-junction barrier regions; the widths of the at least two sub-junction barrier regions are the same, and the intervals between the sub-junction barrier regions are also the same; and the distance is equal to the distance between the second conductive type junction barrier region where the second conductive type junction barrier region is located and the previous second conductive type junction barrier region.
In a preferred embodiment: the second conductive type junction barrier region is in a long strip shape, the distance between every two adjacent second conductive type junction barrier regions is gradually increased along the direction from two sides of the protection ring to the center of the active region, and the width of the second conductive type junction barrier region is gradually reduced.
In a preferred embodiment: the second conductive type junction barrier region is annular, the distance between the adjacent second conductive type junction barrier regions is gradually increased along the direction from the periphery of the protection ring to the center of the active region, and the width of the second conductive type junction barrier region is gradually reduced.
The invention also provides a manufacturing method of the novel silicon carbide junction barrier Schottky diode, which comprises the following steps:
1) preparing a silicon carbide substrate, wherein the resistivity of the silicon carbide substrate is 0.001-0.05 omega-cm, and the thickness of the silicon carbide substrate is 200-;
2) growing an epitaxial layer of silicon carbide of a first conductivity type on a silicon carbide substrate at a concentration of 1e15-2e16cm-3；
3) On the upper surface of the silicon carbide epitaxial layer, SiO is deposited2Photoetching and selectively implanting ions to form a plurality of second conductive type junction barrier regions and deep junctions which are arranged at intervals; the deep junction is positioned outside the second conductive type junction barrier region; the depth of the deep junction and the depth of the second conductive type junction barrier region are the same;
the plurality of second conductive type junction barrier regions are along the direction from outside to inside, the distance between every two adjacent second conductive type junction barrier regions is gradually increased, and the width of each second conductive type junction barrier region is gradually reduced;
4) forming a second conductive type terminal field limiting ring and a shallow junction with the same depth on the upper surface of the silicon carbide epitaxial layer through photoetching and selective ion implantation; wherein the shallow junction is located outside the deep junction and overlaps with the deep junction; the second conduction type terminal field limiting ring is positioned outside the shallow junction;
5) thinning the back surface of the silicon carbide substrate to 200-220um through physical grinding, depositing metal Ni on the back surface of the silicon carbide substrate through electron beam evaporation or sputtering, and annealing at 900 ℃ to form ohmic contact;
6) depositing Ti on the upper surface of the silicon carbide epitaxial layer by electron beam evaporation or sputtering, and annealing at 500 ℃ to form Schottky metal;
7) depositing metal Al on the upper surface of the Schottky metal by electron beam evaporation or sputtering to form an anode;
8) depositing a SiO2/Si3N4 layer on the upper surface of the silicon carbide epitaxial layer and the upper surface of the anode metal through PECVD, and forming a passivation layer through photoetching;
9) forming a protective layer on the upper surface of the passivation layer 19 by deposition and photolithography;
10) on the lower surface of the ohmic contact, a TiNiAg cathode metal is formed by deposition.
In a preferred embodiment: each of the second conductive type junction barrier regions includes one or at least two sub-junction barrier regions; the widths of the at least two sub-junction barrier regions are the same, and the intervals between the sub-junction barrier regions are also the same; and the distance is equal to the distance between the second conductive type junction barrier region where the second conductive type junction barrier region is located and the previous second conductive type junction barrier region located on the outer side of the second conductive type junction barrier region.
In a preferred embodiment: the second conductive type junction barrier region is in a long strip shape, the distance between the adjacent second conductive type junction barrier regions is gradually increased along the inward direction of two sides of the deep junction, and the width of the second conductive type junction barrier region is gradually reduced.
In a preferred embodiment: the second conductive type junction barrier region is annular, the distance between every two adjacent second conductive type junction barrier regions is gradually increased along the inward direction of the periphery of the deep junction, and the width of the second conductive type junction barrier region is gradually reduced.
The manufacturing method of the novel silicon carbide junction barrier Schottky diode provided by the invention can improve the avalanche tolerance of the Schottky diode.
Drawings
Fig. 1 is a layered structure diagram of a schottky diode according to a preferred embodiment 1 of the present invention;
fig. 2 is a schematic view of an active region in preferred embodiment 1 of the present invention;
fig. 3 is a schematic view of an active region in preferred embodiment 2 of the present invention;
fig. 4 is a layered structure diagram of a schottky diode according to a preferred embodiment 3 of the present invention;
fig. 5 is a schematic view of an active region in preferred embodiment 3 of the present invention;
FIG. 6 is a schematic diagram of an active region in the preferred embodiment 4 of the present invention;
FIGS. 7 to 16 are schematic views of the production process of preferred embodiment 5 of the present invention;
fig. 17 and 18 are schematic diagrams showing differences between the production process in preferred embodiment 6 and embodiment 5.
Detailed Description
In order to make the technical solution of the present invention clearer, the present invention will now be described in further detail with reference to the following embodiments and accompanying drawings:
example 1
Referring to fig. 1, the present embodiment provides a novel silicon carbide junction barrier schottky diode, including a first conductivity type silicon carbide substrate 10, a first conductivity type silicon carbide epitaxial layer 11; an active region 31, a protection ring 32 and a second conductive type terminal field limiting ring 13 are sequentially arranged on the upper surface of the first conductive type silicon carbide epitaxial layer 11 from the center to the outside; the active region 31 includes a plurality of second conductive type junction barrier regions 12 arranged at intervals;
the interval between the adjacent second conductive type junction barrier regions 12 is gradually increased and the width of the second conductive type junction barrier regions 12 is gradually decreased in a direction of the guard ring 32 toward the center of the active region 31.
Specifically, the guard ring 32 is divided into a shallow junction 14 and a deep junction 15; the junction depth and concentration of the shallow junction 14 are the same as those of the second conductivity type terminal field limiting ring 13; the junction depth and concentration of the deep junction 15 are the same as those of the second conductive type junction barrier region 12; the shallow junction and the deep junction are overlapped; width W of the deep junction0Is 5-35 um.
The active region 31 includes n second conductivity type junction barriers 12, a width W of a first junction barrier adjacent to the guard ring 321Is 1-15 um; guard ring 32 to first junction barrier spacing S10.5-8 um; width W of n-th second conductivity type junction barrier regionnIs 0.5-4um, and the distance S between the n-1 st second conductive type junction barrier region and the n second conductive type junction barrier regionnIs 5-10 um.
The structure is mainly characterized in that after intervals among the junction barrier regions are gradually increased, when applied reverse bias is continuously increased, the distance between the junction barrier regions at the position, close to the center, of the active region is larger, the electric field intensity of the Schottky junction is larger, the Schottky barrier height of the region is reduced due to the Schottky effect and becomes a breakdown weak point, and therefore a breakdown point is introduced into the center region of the active region, the heat dissipation area in an avalanche state is increased, and the avalanche resistance is improved.
In this embodiment, each of the second-conductivity-type junction barrier regions 12 includes a sub-junction barrier region. In addition, in this embodiment, the second-conductivity-type junction barrier region 12 is in a long strip shape, and the distance between adjacent second-conductivity-type junction barrier regions 12 gradually increases and the width of the second-conductivity-type junction barrier region 12 gradually decreases along the direction from the two sides of the guard ring 32 to the center of the active region 31, as shown in fig. 2.
Example 2
Referring to fig. 3, the present embodiment is different from embodiment 1 in that: the second conductive type junction barrier region 12 is annular, and the distance between adjacent second conductive type junction barrier regions 12 is gradually increased and the width of the second conductive type junction barrier region 12 is gradually decreased along the direction from the periphery of the guard ring 32 to the center of the active region 31.
Example 3
Referring to fig. 4 and 5, the present embodiment is different from embodiment 1 in that: in this embodiment, each of the second conductivity type junction barrier 12 regions includes two sub-junction barrier regions; the widths of the at least two sub-junction barrier regions are the same, and the intervals between the sub-junction barrier regions are also the same; and the spacing is equal to the spacing between the second-conductivity-type junction barrier region 12 in which it is located and the last second-conductivity-type junction barrier region 12. This results in a group gradual change structure.
Example 4
Referring to fig. 6, the present embodiment is different from embodiment 3 in that: the second conductive type junction barrier region 12 is annular, and the distance between adjacent second conductive type junction barrier regions 12 is gradually increased and the width of the second conductive type junction barrier region 12 is gradually decreased along the direction from the periphery of the guard ring 32 to the center of the active region 31.
Example 5
Referring to fig. 7-16, the present embodiment provides a method for manufacturing a novel silicon carbide junction barrier schottky diode, including the following steps:
1) preparing a silicon carbide substrate 10 with the resistivity of 0.001-0.05 omega cm and the thickness of 200-;
2) on a silicon carbide substrate 10, a silicon carbide epitaxial layer 11 of a first conductivity type is grown at a concentration of 1e15-2e16cm-3；
3) On the upper surface of the silicon carbide epitaxial layer 11, by depositing SiO2Photoetching and selective ion implantation to form a plurality of second conductive type junction barrier regions 12 and deep junctions 15 which are arranged at intervals; the deep junction 15 is located outside the second conductivity type junction barrier region 12; the depth of the deep junction 15 is the same as that of the second conductive type junction barrier region 12;
the plurality of second conductive type junction barrier regions 12 are along the direction from outside to inside, the distance between adjacent second conductive type junction barrier regions 12 is gradually increased, and the width of the second conductive type junction barrier regions 12 is gradually reduced;
4) forming a second conductive type terminal field limiting ring 13 and a shallow junction 14 with the same depth on the upper surface of the silicon carbide epitaxial layer 11 through photoetching and selective ion implantation; wherein the shallow junction 14 is located outside the deep junction 15 and overlaps the deep junction 15; the second conductivity type termination field limiting ring 13 is located outside the shallow junction 14;
5) thinning the back surface of the silicon carbide substrate 10 to 200-220um by physical grinding, depositing metal Ni on the back surface of the silicon carbide substrate 10 by electron beam evaporation or sputtering, and annealing at 900 ℃ to form an ohmic contact 21;
6) depositing Ti on the upper surface of the silicon carbide epitaxial layer 11 by electron beam evaporation or sputtering, and annealing at 500 ℃ to form a Schottky metal 17;
7) depositing a metal AI on the upper surface of the Schottky metal by electron beam evaporation or sputtering to form an anode 18;
8) depositing a SiO2/Si3N4 layer on the upper surface of the silicon carbide epitaxial layer 11 and the upper surface of the anode 18 metal through PECVD, and forming a passivation layer 19 through photoetching;
9) forming a protective layer 20 on the upper surface of the passivation layer 19 by deposition and photolithography;
10) on the lower surface of the ohmic contact 21, a TiNiAg cathode metal 22 is formed by deposition.
In this embodiment, each of the second conductive-type junction barriers 12 includes a sub-junction barrier.
Example 6
This example differs from example 6 in that: each second conductive type junction barrier region 12 includes at least two sub-junction barrier regions, and the widths of the at least two sub-junction barrier regions are the same, and the intervals between the at least two sub-junction barrier regions are also the same; and the distance is equal to the distance between the second conductive type junction barrier region where the second conductive type junction barrier region is located and the previous second conductive type junction barrier region located on the outer side of the second conductive type junction barrier region. As shown in fig. 17 and 18.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (9)
1. The novel silicon carbide junction barrier Schottky diode is characterized by comprising a first conductive type silicon carbide substrate and a first conductive type silicon carbide epitaxial layer which are arranged in a laminated mode; the upper surface of the first conductive type silicon carbide epitaxial layer is provided with an active region, a protection ring and a second conductive type terminal field limiting ring from the center to the outside in sequence; the active region comprises a plurality of second conductive type junction barrier regions which are arranged at intervals;
along the direction of the protective ring towards the center of the active region, the distance between every two adjacent second conduction type junction barrier regions is gradually increased, and the width of each second conduction type junction barrier region is gradually reduced; the protection ring is divided into a shallow junction and a deep junction; the junction depth and concentration of the shallow junction are the same as those of the second conduction type terminal field limiting ring; the junction depth and concentration of the deep junction are the same as those of the second conductive type junction barrier region; the shallow junction and the deep junction are overlapped; width W of the deep junction0Is 5-35 μm.
2. The novel silicon carbide junction barrier schottky diode of claim 1 wherein: the active region comprises n second conductivity type junction barriers, the width W of the first junction barrier adjacent to the guard ring1Is 1-15 μm; spacing S between guard ring and first junction barrier region10.5-8 μm; width W of n-th second conductivity type junction barrier regionn0.5-4 μm, and the distance S between the n-1 st second conductive type junction barrier region and the n-th second conductive type junction barrier regionnIs 5-10 μm.
3. The novel silicon carbide junction barrier schottky diode of claim 2 wherein: each of the second conductive type junction barrier regions includes one or at least two sub-junction barrier regions; the widths of the at least two sub-junction barrier regions are the same, and the intervals between the sub-junction barrier regions are also the same; and the distance is equal to the distance between the second-conductivity-type junction barrier region where the second-conductivity-type junction barrier region is located and the previous second-conductivity-type junction barrier region along the direction of the protective ring towards the center of the active region.
4. The novel silicon carbide junction barrier schottky diode of claim 1 wherein: the second conductive type junction barrier region is in a strip shape.
5. The novel silicon carbide junction barrier schottky diode of claim 1 wherein: the second conductive type junction barrier region is annular.
6. The manufacturing method of the novel silicon carbide junction barrier Schottky diode is characterized by comprising the following steps of:
1) preparing a silicon carbide substrate with the resistivity of 0.001-0.05 omega-cm and the thickness of 200-;
2) growing an epitaxial layer of silicon carbide of a first conductivity type on a silicon carbide substrate at a concentration of 1e15-2e16cm-3；
3) On the upper surface of the silicon carbide epitaxial layer, SiO is deposited2And then, the optical etching is carried out,forming a plurality of second conductive type junction barrier regions and deep junctions which are arranged at intervals by selective ion implantation; the deep junction is positioned outside the second conductive type junction barrier region; the depth of the deep junction and the depth of the second conductive type junction barrier region are the same;
the plurality of second conductive type junction barrier regions are along the direction from outside to inside, the distance between every two adjacent second conductive type junction barrier regions is gradually increased, and the width of each second conductive type junction barrier region is gradually reduced;
4) forming a second conductive type terminal field limiting ring and a shallow junction with the same depth on the upper surface of the silicon carbide epitaxial layer through photoetching and selective ion implantation; wherein the shallow junction is located outside the deep junction and overlaps with the deep junction; the second conduction type terminal field limiting ring is positioned outside the shallow junction;
5) thinning the back surface of the silicon carbide substrate to 200-220 mu m by physical grinding, depositing metal Ni on the back surface of the silicon carbide substrate by electron beam evaporation or sputtering, and annealing at 900 ℃ to form ohmic contact;
6) depositing Ti on the upper surface of the silicon carbide epitaxial layer by electron beam evaporation or sputtering, and annealing at 500 ℃ to form Schottky metal;
7) depositing metal Al on the upper surface of the Schottky metal by electron beam evaporation or sputtering to form an anode;
8) depositing SiO on the upper surface of the silicon carbide epitaxial layer and the upper surface of the anode metal by PECVD2/Si3N4A layer, forming a passivation layer by photolithography;
9) forming a protective layer on the upper surface of the passivation layer through deposition and photoetching;
10) on the lower surface of the ohmic contact, a TiNiAg cathode metal is formed by deposition.
7. The method of manufacturing a novel silicon carbide junction barrier schottky diode as claimed in claim 6, wherein: each of the second conductive type junction barrier regions includes one or at least two sub-junction barrier regions; the widths of the at least two sub-junction barrier regions are the same, and the intervals between the sub-junction barrier regions are also the same; and the distance is equal to the distance between the second conductive type junction barrier region where the second conductive type junction barrier region is located and the previous second conductive type junction barrier region located on the outer side of the second conductive type junction barrier region.
8. The method of manufacturing a novel silicon carbide junction barrier schottky diode as claimed in claim 6, wherein: the second conductive type junction barrier region is in a strip shape.
9. The method of manufacturing a novel silicon carbide junction barrier schottky diode as claimed in claim 6, wherein: the second conductive type junction barrier region is annular.
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| CN110212023B (en) * | 2019-05-29 | 2020-10-09 | 西安电子科技大学 | A Junction Barrier Schottky Diode capable of Reducing Reverse Leakage Current |
| WO2020238587A1 (en) * | 2019-05-29 | 2020-12-03 | 西安电子科技大学 | Junction barrier schottky diode |
| CN112216746B (en) * | 2019-07-11 | 2024-05-14 | 即思创意股份有限公司 | Silicon carbide semiconductor device |
| CN112993009B (en) * | 2019-12-17 | 2023-04-18 | 株洲中车时代半导体有限公司 | Junction terminal structure of power device, manufacturing method and power device |
| CN113937168A (en) * | 2020-07-13 | 2022-01-14 | 珠海格力电器股份有限公司 | Silicon carbide junction barrier Schottky semiconductor device and method of making the same |
| CN114122150B (en) * | 2020-08-25 | 2024-04-05 | 珠海格力电器股份有限公司 | Preparation method and application of silicon carbide power diode |
| CN113851544B (en) * | 2021-09-23 | 2022-06-10 | 先之科半导体科技(东莞)有限公司 | A Schottky diode with reduced forward turn-on voltage |
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