CN109521615A - Pixel array substrate - Google Patents
Pixel array substrate Download PDFInfo
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- CN109521615A CN109521615A CN201811600985.6A CN201811600985A CN109521615A CN 109521615 A CN109521615 A CN 109521615A CN 201811600985 A CN201811600985 A CN 201811600985A CN 109521615 A CN109521615 A CN 109521615A
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- 239000000758 substrate Substances 0.000 title claims abstract description 117
- 230000002093 peripheral effect Effects 0.000 claims abstract description 23
- 239000003990 capacitor Substances 0.000 claims description 10
- 230000005611 electricity Effects 0.000 claims description 6
- 230000001360 synchronised effect Effects 0.000 claims description 2
- 239000010410 layer Substances 0.000 description 92
- 239000000463 material Substances 0.000 description 23
- 239000010408 film Substances 0.000 description 13
- 238000010586 diagram Methods 0.000 description 10
- 239000007769 metal material Substances 0.000 description 10
- 239000004065 semiconductor Substances 0.000 description 10
- 238000000034 method Methods 0.000 description 8
- 230000035515 penetration Effects 0.000 description 6
- 230000012447 hatching Effects 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 239000004020 conductor Substances 0.000 description 4
- 239000012212 insulator Substances 0.000 description 4
- 239000010409 thin film Substances 0.000 description 4
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- -1 aluminium tin-oxide Chemical compound 0.000 description 3
- JYMITAMFTJDTAE-UHFFFAOYSA-N aluminum zinc oxygen(2-) Chemical compound [O-2].[Al+3].[Zn+2] JYMITAMFTJDTAE-UHFFFAOYSA-N 0.000 description 3
- 230000005684 electric field Effects 0.000 description 3
- 229910044991 metal oxide Inorganic materials 0.000 description 3
- 150000004706 metal oxides Chemical class 0.000 description 3
- MWUXSHHQAYIFBG-UHFFFAOYSA-N nitrogen oxide Inorganic materials O=[N] MWUXSHHQAYIFBG-UHFFFAOYSA-N 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 2
- 229910010272 inorganic material Inorganic materials 0.000 description 2
- 239000011147 inorganic material Substances 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 239000011368 organic material Substances 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- RHZWSUVWRRXEJF-UHFFFAOYSA-N indium tin Chemical compound [In].[Sn] RHZWSUVWRRXEJF-UHFFFAOYSA-N 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
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- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
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- 229920005591 polysilicon Polymers 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
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- 239000011787 zinc oxide Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0416—Control or interface arrangements specially adapted for digitisers
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Nonlinear Science (AREA)
- General Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Engineering & Computer Science (AREA)
- Optics & Photonics (AREA)
- Liquid Crystal (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Human Computer Interaction (AREA)
- Geometry (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Position Input By Displaying (AREA)
Abstract
本发明公开了一种像素阵列基板，包括基底、多条扫描线及多条数据线、多个像素结构、共用电极、第一绝缘层、触控信号线、栅极驱动电路及辅助电极。基底具有显示区及显示区外的周边区。多个像素结构设置于显示区，且分别与多条扫描线及多条数据线电性连接。每一像素结构包括主动元件及电性连接至主动元件的像素电极。触控信号线与共用电极电性连接。栅极驱动电路设置于周边区，且与至少一条扫描线电性连接。辅助电极设置于周边区，且与至少部分的栅极驱动电路重叠。辅助电极与邻近于栅极驱动电路的共用电极电性连接，以形成边缘触控感测垫。
The invention discloses a pixel array substrate, which includes a substrate, a plurality of scan lines and a plurality of data lines, a plurality of pixel structures, a common electrode, a first insulating layer, a touch signal line, a gate drive circuit and an auxiliary electrode. The substrate has a display area and a peripheral area outside the display area. Multiple pixel structures are disposed in the display area and are electrically connected to multiple scan lines and multiple data lines respectively. Each pixel structure includes an active element and a pixel electrode electrically connected to the active element. The touch signal line is electrically connected to the common electrode. The gate driving circuit is disposed in the peripheral area and is electrically connected to at least one scan line. The auxiliary electrode is disposed in the peripheral area and overlaps at least part of the gate driving circuit. The auxiliary electrode is electrically connected to the common electrode adjacent to the gate driving circuit to form an edge touch sensing pad.
Description
Technical field
The invention relates to a kind of substrates, and in particular to a kind of image element array substrates.
Background technique
Display using increasingly extensive, the audiovisual entertainment of household, the information display board of public arena, electric contention such as
Display and its all visible trace of portable electronic product.In recent years, display produced in automobile-used field or wearable electronics
The application of product, which is also gradually expanded, comes, such as: vehicle rear-view mirror, Vehicular instrument board, multi-function wrist-instrument/bracelet etc..This kind of electricity
Sub-device display mounted is mostly special-shaped (Free form) display, and appearance may be oval, round or other
It is non-rectangle, and there is touch function mostly.
Embedded touch (In-cell touch) technology has the advantage being easily thinned, therefore is increasingly becoming in recent years
The mainstream of touch control display.In order to meet the needs of abnormity display, touching of the touch control display at the special-shaped edge of neighbouring viewing area
Control sensor pad has the non-straight edges for complying with special-shaped showing edge.However, touch-control sensing pad with non-straight edges and remote
The equivalent capacity of the touch-control sensing pad at the special-shaped edge from viewing area has differences, and then influences touch control display on viewing area side
The touch-control performance of edge.Therefore, how in the case where meeting special-shaped display demand, while the touch-control effect at the special-shaped edge of viewing area is promoted
Can, it is that relevant manufactures one of want to solve the problems, such as.
Summary of the invention
The present invention provides a kind of image element array substrates, using the touch-control performance of the touch control display of this image element array substrates
It is good.
A kind of image element array substrates of the invention include substrate, multi-strip scanning line and multiple data lines, multiple dot structures,
Common electrode, the first insulating layer, touching signals line, gate driving circuit and auxiliary electrode.Substrate has viewing area and display
Peripheral region outside area.Multi-strip scanning line and multiple data lines are set in substrate.Multiple dot structures are set to viewing area, and divide
It is not electrically connected with multi-strip scanning line and multiple data lines.Each dot structure includes active member and is electrically connected to actively
The pixel electrode of element.Common electrode is overlapped in multiple pixel electrodes of multiple dot structures.First insulating layer is set to multiple
Between pixel electrode and common electrode.Touching signals line and common electrode are electrically connected.Gate driving circuit is set to substrate
Peripheral region, and be electrically connected at least one scan line, wherein common electrode is adjacent to gate driving circuit.Auxiliary electrode setting
In the peripheral region of substrate, and it is Chong Die at least part of gate driving circuit.Auxiliary electrode and common electrode are electrically connected, with shape
At edge touch-control sensing pad.
In one embodiment of this invention, above-mentioned image element array substrates further include the first bucking electrode, electrically isolate in
Auxiliary electrode and gate driving circuit, and be set between auxiliary electrode and at least part of gate driving circuit.
In one embodiment of this invention, there is the first bucking electrode of above-mentioned image element array substrates capacitor to inhibit letter
Number, touching signals line has a touch drive signal, and capacitor inhibits signal and touch drive signal in synchronous in timing, and capacitor suppression
Signal processed and the voltage waveform of touch drive signal are substantially the same.
In one embodiment of this invention, the first insulating layer of above-mentioned image element array substrates covers common electrode, multiple
Pixel electrode is set on the first insulating layer, and the first bucking electrode and common electrode are formed in same first transparency conducting layer, and
Auxiliary electrode and multiple pixel electrodes are formed in same second transparency conducting layer.
In one embodiment of this invention, the first insulating layer of above-mentioned image element array substrates covers multiple pixel electrodes,
Common electrode is set on the first insulating layer, and the first bucking electrode and multiple pixel electrodes are formed in same first electrically conducting transparent
Layer, and auxiliary electrode and common electrode are formed in same second transparency conducting layer.
In one embodiment of this invention, above-mentioned image element array substrates further include secondary shielding electrode, are set to first
Between bucking electrode and gate driving circuit, wherein secondary shielding electrode is grounded.
In one embodiment of this invention, the first insulating layer of above-mentioned image element array substrates covers common electrode, each
The pixel electrode of dot structure is set on the first insulating layer and has the multiple slits Chong Die with common electrode.
In one embodiment of this invention, above-mentioned image element array substrates further include second insulating layer, cover multiple pixels
Multiple active members, multi-strip scanning line, multiple data lines and the touching signals line of structure, and touching signals line and a plurality of data
Line is formed in same film layer.
In one embodiment of this invention, above-mentioned image element array substrates further include second insulating layer and third insulating layer.
Second insulating layer covers multiple active members, multi-strip scanning line and the multiple data lines of multiple dot structures, and wherein touch-control is believed
Number line is set in second insulating layer.Third insulating layer covers touching signals line, and wherein common electrode is set to third insulating layer
On.
In one embodiment of this invention, the first insulating layer of above-mentioned image element array substrates covers multiple pixel electrodes,
Common electrode is set on the first insulating layer and has the multiple slits Chong Die with multiple pixel electrodes.
In one embodiment of this invention, above-mentioned image element array substrates further include second insulating layer, cover multiple pixels
Multiple active members, multi-strip scanning line, multiple data lines and the touching signals line of structure, and touching signals line and a plurality of data
Line is formed in same film layer.
In one embodiment of this invention, above-mentioned image element array substrates further include second insulating layer and third insulation
Layer.Second insulating layer covers multiple active members, multi-strip scanning line and the multiple data lines of multiple dot structures, plurality of
Pixel electrode is set in second insulating layer.Third insulating layer is set on the first insulating layer and covers touching signals line, wherein
Common electrode is set on third insulating layer.
In one embodiment of this invention, the viewing area of above-mentioned image element array substrates is non-rectangle.
In one embodiment of this invention, the common electrode of above-mentioned image element array substrates has non-straight edges.
Based on above-mentioned, in the image element array substrates of the embodiment of the present invention, the common electrode of neighbouring edge of display area with
The auxiliary electrode that peripheral region is arranged in is electrically connected, to form edge touch-control sensing pad.Utilize the auxiliary electricity that peripheral region is set
The sensing area of pole, edge touch-control sensing pad can increase, and then reduce the sensing area and internal touch-control of edge touch-control sensing pad
The difference of the sensing area of sensor pad.
To make the foregoing features and advantages of the present invention clearer and more comprehensible, special embodiment below, and cooperate institute's accompanying drawings
It is described in detail below.
Detailed description of the invention
Fig. 1 is that the image element array substrates of the first embodiment of the present invention and the periphery being configured on image element array substrates hide
The upper schematic diagram of light pattern.
Fig. 2 is the enlarged diagram of the region I of the image element array substrates of Fig. 1.
Fig. 3 is the diagrammatic cross-section of the image element array substrates of the first embodiment of the present invention.
The touching signals line and the first bucking electrode that Fig. 4 is the image element array substrates of Fig. 2 are in the input signal of each timing
Schematic diagram.
Fig. 5 is the enlarged diagram of the image element array substrates of the second embodiment of the region I of Fig. 1.
Fig. 6 is the diagrammatic cross-section of the image element array substrates of the second embodiment of the present invention.
Fig. 7 is the diagrammatic cross-section of the image element array substrates of the third embodiment of the present invention.
Fig. 8 is the diagrammatic cross-section of the image element array substrates of the fourth embodiment of the present invention.
Fig. 9 is the diagrammatic cross-section of the image element array substrates of the fifth embodiment of the present invention.
Wherein, appended drawing reference:
10,10A~10D: image element array substrates
20: periphery light-shielding pattern
20a: edge
100: substrate
150: insulating layer
250: insulator layer
250a~250b, 280a~280b, 450a~450c, 650a~650c: contact hole
280: flat sublayer
300: second insulating layer
400: the first transparency conducting layers
410,410-1,410-2,560: common electrode
410a: non-straight edges
410b: linear edge
420: the first bucking electrodes
450: the first insulating layers
500: the second transparency conducting layers
510: auxiliary electrode
520,430: pixel electrode
520a, 560a: slit
530: the first switching patterns
600: secondary shielding electrode
650: third insulating layer
AA: viewing area
AAa: non-rectilinear border
AAa-1, AAa-2: stepped edges
CH, CH2: semiconductor pattern
D, D2: drain electrode
DL: data line
DS1: touch drive signal
DS2: capacitor inhibits signal
ESP: edge touch-control sensing pad
G, G2: grid
GC: gate driving circuit
I: region
PA: peripheral region
PX: dot structure
S, S2: source electrode
SL: scan line
T: active member
Td: display time interval
Tt: the touch-control period
T2: electrostatic protection element
TL: touching signals line
Vcom: common potential
X, Y, Z: direction
A-A ', B-B ', C-C ', D-D ': hatching line
Specific embodiment
With detailed reference to exemplary embodiment of the invention, the example of exemplary embodiment is illustrated in institute's accompanying drawings
In.Whenever possible, similar elements symbol is used to indicate same or similar part in schema and description.
Fig. 1 is the image element array substrates 10 of the first embodiment of the present invention and week for being configured on image element array substrates 10
The upper schematic diagram of side light-shielding pattern 20.Fig. 2 is the enlarged diagram of the region I of the image element array substrates 10 of Fig. 1.Fig. 3 is this
The diagrammatic cross-section of the image element array substrates 10 of the first embodiment of invention.In particular, the section of the image element array substrates 10 of Fig. 3
Hatching line A-A ' and hatching line B-B ' corresponding to Fig. 2.It should be noted that Fig. 1 is painted periphery light-shielding pattern 20 for the sake of clearly showing
And substrate 100, common electrode 410, touch-control cabling TL and the contact hole 450a of the image element array substrates 10 of Fig. 2, and omit Fig. 2
Image element array substrates 10 other components.
Fig. 1 is please referred to, image element array substrates 10 include substrate 100, multiple common electrodes 410 and a plurality of touching signals line
TL.Substrate 100 has the peripheral region PA outside viewing area AA and viewing area AA.In the present embodiment, peripheral region PA can basidigitale
100 region covered by periphery light-shielding pattern 20, viewing area AA can basidigitale 100 do not covered by periphery light-shielding pattern 20
Region；That is, the boundary of peripheral region PA and viewing area AA can be by the upright projection institute of the edge 20a of periphery light-shielding pattern 20
Definition.In the present embodiment, each touching signals line TL is electrically connected with a corresponding common electrode 410.When touch-control sensing
Section, common electrode 410 is used as touch-control sensing pad, and touching signals line TL is to transmit touching signals.In the present embodiment,
Touching signals line TL generally extends in direction y and is arranged in substrate 100 along direction X.In the present embodiment, direction Y
Can be substantially orthogonal with direction X, but invention is not limited thereto.
Common electrode 410 is set in the AA of viewing area.In this example it is shown that area AA is non-rectangle.For example, as
The viewing area AA of pixel array substrate 10 has non-rectilinear border AAa, and the non-rectilinear border AAa of part is non-parallel to the straight of direction Y
For line segment also non-parallel to the horizontal line section of direction X, the non-rectilinear border AAa of viewing area AA is, for example, stepped edges AAa-1, AAa-
2, but invention is not limited thereto.According to other embodiments, the non-rectilinear border AAa of viewing area AA is also possible to arc-shaped side
Edge.In the present embodiment, the common electrode 410-1 for being in close proximity to the non-rectilinear border AAa of viewing area AA has non-straight edges
410a.For example, in the present embodiment, it is in close proximity to the non-straight of the common electrode 410-1 of the non-rectilinear border AAa of viewing area AA
Line edge 410a is stepped edges, and another common electrode 410-2 of the non-rectilinear border AAa far from viewing area AA can have
Linear edge 410b；That is, in the present embodiment, being in close proximity to a common electrode of the non-rectilinear border AAa of viewing area AA
The shape of 410-1 may differ from the shape of another common electrode 410-2 of the non-rectilinear border AAa far from viewing area AA, close to
The non-rectilinear border far from viewing area AA is smaller than in the area of the common electrode 410-1 of the non-rectilinear border AAa of viewing area AA
The area of another common electrode 410-2 of AAa, but invention is not limited thereto.According to other embodiments, it is in close proximity to viewing area
The non-straight edges 410a of the common electrode 410-1 of the non-rectilinear border AAa of AA is also possible to arcuate edge.
Referring to figure 2., in the present embodiment, image element array substrates 10 include multi-strip scanning line SL, multiple data lines DL and
Multiple dot structure PX.Multi-strip scanning line SL and multiple data lines DL are set in substrate 100.In the present embodiment, data line
DL generally in direction y extend and be arranged in substrate 100 along direction X, scan line SL extend generally on the X of direction and
It is arranged in substrate 100 along direction Y.Multiple dot structure PX are set to viewing area AA, and respectively with multi-strip scanning line SL and
Multiple data lines DL is electrically connected.For example, in the present embodiment, multiple dot structure PX can array be arranged in viewing area AA
It is interior, and each dot structure PX is electrically connected with a corresponding data line DL and corresponding scan line SL, but the present invention
It is not limited.
Referring to figure 2. and Fig. 3, in the present embodiment, each dot structure PX has active member T.Active member T includes
Thin film transistor (TFT), thin film transistor (TFT) have grid G, source S, drain D and semiconductor pattern CH.Grid G is set to substrate 100
On, and be electrically connected with a corresponding scan line SL.Source S is set in substrate 100, and with corresponding data line DL
It is electrically connected.Different twoth areas are electrically connected source S with semiconductor pattern CH's respectively from drain D.For example, in the present embodiment
In, the structure of semiconductor pattern CH can be single-layer or multi-layer；The material of semiconductor pattern CH may include amorphous silicon, polysilicon, micro-
Crystal silicon, monocrystalline silicon, organic semiconducting materials, oxide semiconductor material (such as: indium-zinc oxide, indium gallium zinc oxide or
Other suitable materials or combinations of the above) or other suitable materials or containing dopant (dopant) in above-mentioned material
In or combinations of the above.
In the present embodiment, grid G and the material of multi-strip scanning line SL are optionally identical；That is, grid G and
Multi-strip scanning line SL may be selectively formed at same film layer.In addition, in the present embodiment, source S, drain D and a plurality of data
The material of line DL is optionally identical；That is, source S, drain D and multiple data lines DL may be selectively formed at together
One film layer.For example, in the present embodiment, considering based on electric conductivity, grid G, source S, drain D, multi-strip scanning line SL
And the material of multiple data lines DL is usually to use metal material.However, invention is not limited thereto, implemented according to others
Other conductive materials can also be used in example, grid G, source S, drain D, multi-strip scanning line SL and multiple data lines DL, such as: it closes
Gold, the nitrogen oxides of the nitride of metal material, the oxide of metal material, metal material or other suitable materials or
The stack layer of metal material and other conductive materials.
In the present embodiment, each dot structure PX further includes the pixel electrode 520 for being electrically connected at active member T.Picture
Plain electrode 520 is arranged on the first insulating layer 450, and passes through the drain D of contact hole 250b, 280b, 450b and active member T electricity
Property connection.In the present embodiment, each common electrode 410 can be overlapped in multiple pixel electrodes 520 of multiple dot structure PX, institute
It states overlapping and refers to and be overlapped on vertical 100 direction of substrate (i.e. direction Z).In the present embodiment, the pixel electricity of each dot structure PX
Pole 520 has the multiple slit 520as (be illustrated in Fig. 2) Chong Die with common electrode 410.For example, in the present embodiment, as
Plain electrode 520 is optionally penetration electrode.The material of penetration electrode includes metal oxide, such as: the oxidation of indium tin
Object, indium-zinc oxide, aluminium tin-oxide, aluminium zinc oxide or other suitable oxides or be above-mentioned heap both at least
Lamination.
Referring to figure 3., in the present embodiment, image element array substrates 10 further include insulating layer 150, are set to grid G and half
Between conductive pattern CH.In the present embodiment, it is arranged in above grid G to the semiconductor pattern CH property of can choose, and then is formed
Bottom grid film transistor (bottom-gate TFT).However, invention is not limited thereto, according to other embodiments,
Active member T can also be the thin film transistor (TFT) of top gate-type thin film transistor (top-gate TFT) or other appropriate patterns.
In the present embodiment, the material of insulating layer 150 may include inorganic material (such as: silica, silicon nitride, silicon oxynitride, Qi Tahe
The stack layer of suitable material or above-mentioned at least two material), organic material or other suitable materials or combinations of the above.
In the present embodiment, touching signals line TL is arranged on insulating layer 150, and touching signals line TL and multiple data lines
The material of DL can be identical；That is, touching signals line TL and multiple data lines DL can be formed in same film layer.For example,
In the present embodiment, the material of considering based on electric conductivity, touching signals line TL and multiple data lines DL are usually to use metal
Material.However, invention is not limited thereto, according to other embodiments, touching signals line TL and multiple data lines DL can also make
With other conductive materials, such as: the nitrogen oxidation of alloy, the nitride of metal material, the oxide of metal material, metal material
The stack layer of object or other suitable materials or metal material and other conductive materials.
Referring to figure 2. and Fig. 3, in the present embodiment, image element array substrates 10 further include second insulating layer 300.Second absolutely
Edge layer 300 covers multiple active member T, multi-strip scanning line SL, multiple data lines DL and the touch-control letter of multiple dot structure PX
Number line TL.In the present embodiment, the material of second insulating layer 300 include inorganic material (such as: silica, silicon nitride, nitrogen oxidation
The stack layer of silicon, other suitable materials or above-mentioned at least two material), organic material or other suitable materials or on
The combination stated.
For example, in the present embodiment, second insulating layer 300 optionally includes insulator layer 250 and skewness factor
Layer 280.However, the invention is not limited thereto, in other implementations, second insulating layer 300 can also by single film layer or by three with
On film layer formed.In the present embodiment, insulator layer 250 has contact hole 250a and the overlapping for being overlapped in touch-control cabling TL
In the contact hole 250b of the drain D of active member T.Flat sublayer 280 is covered on insulator layer 250, and flat sublayer 280 has
There are the contact hole 280b of the contact hole 280a for being overlapped in touch-control cabling TL and the drain D for being overlapped in active member T.
For example, in the present embodiment, contact hole 250a and contact hole 280a can be trimmed, that is to say, that contact hole
250a and contact hole 280a can utilize same mask and be formed simultaneously in same etch process；Contact hole 250b and contact hole
280b can be trimmed, that is to say, that contact hole 250b and contact hole 280b can be using same mask and same in same etch process
When formed, but the present invention is not to be limited.
In the present embodiment, image element array substrates 10 further include gate driving circuit GC.Gate driving circuit GC is set to
The peripheral region PA of substrate 100, and be electrically connected at least one scan line SL.In the present embodiment, gate driving circuit GC packet
Include an at least active member (not being painted) and electrostatic protection element T2.Electrostatic protection element T2 includes grid G 2, source S 2, drain electrode
D2 and semiconductor pattern CH2.Grid G 2 is set in substrate 100.Source S 2 is set in substrate 100.Source S 2 and drain D 2
Twoth area different from semiconductor pattern CH2's are electrically connected respectively.For example, in the present embodiment, positioned at the picture of viewing area AA
The active member T of plain structure PX can be formed simultaneously with the gate driving circuit GC positioned at peripheral region PA in processing procedure；That is,
Gate driving circuit GC is integrated gate driving circuit (gate driver-on-array；GOA), but the present invention not as
Limit.In the present embodiment, image element array substrates 10 further include the first bucking electrode 420.First bucking electrode 420 is arranged flat
In sublayer 280, and it is Chong Die at least part of gate driving circuit GC.By the setting of the first bucking electrode 420, it can inhibit grid
Electrical influence of the electric field of pole driving circuit GC to surrounding component.
In the present embodiment, the setting of common electrode 410 separates in flat sublayer 280, and with the first bucking electrode 420.
For example, in the present embodiment, the first bucking electrode 420 can be formed in same film layer with common electrode 410, but the present invention is not
As limit.First bucking electrode 420 is all with 410 property of can choose of common electrode penetration electrode.Penetration electrode
Material includes metal oxide, such as: indium tin oxide, indium-zinc oxide, aluminium tin-oxide, aluminium zinc oxide or other conjunctions
Suitable oxide or be above-mentioned stack layer both at least.That is, in the present embodiment, the first bucking electrode 420 with
Common electrode 410 can be formed by the first transparency conducting layer 400, but invention is not limited thereto.
In the present embodiment, image element array substrates 10 further include the first insulating layer 450, cover common electrode 410 and first
Bucking electrode 420.First insulating layer 450 has the contact hole 450a for being overlapped in touch-control cabling TL and is overlapped in active member T
Drain D contact hole 450b.For example, in the present embodiment, contact hole 450a can be trimmed with contact hole 250a, 280a,
That is, contact hole 450a can utilize same mask with contact hole 250a, 280a and be formed simultaneously in same etch process；
Contact hole 450b can be trimmed with contact hole 250b, 280b, that is to say, that contact hole 450b and contact hole 250b, 280b are available
It same mask and is formed simultaneously in same etch process, but invention is not limited thereto.
In the present embodiment, image element array substrates 10 further include auxiliary electrode 510.Auxiliary electrode 510 is set to substrate 100
Peripheral region PA, and be arranged on the first insulating layer 450, and by contact hole 450a, 280a, 250a be electrically connected to touch-control believe
Number line TL.In the present embodiment, auxiliary electrode 510 and at least part of gate driving circuit GC in vertical 100 direction of substrate (i.e.
Direction Z) on be overlapped.First bucking electrode 420 is set between auxiliary electrode 510 and at least part of gate driving circuit GC.
That is, the first bucking electrode 420 is electrically isolated in auxiliary electrode 510 and gate driving circuit GC.Special one is mentioned that,
In the present embodiment, auxiliary electrode 510 is next to non-rectilinear border AAa (the e.g. stepped edges AAa- of viewing area AA
1, AAa-2) peripheral region PA, and auxiliary electrode 510 is not arranged in the peripheral region PA close to linear edge 410b, but the present invention is not
As limit.
In the present embodiment, image element array substrates 10 further include the first switching pattern 530.First switching pattern 530 with it is auxiliary
Help electrode 510 to be formed in same film layer, the first switching pattern 530 and auxiliary electrode 510 be directly connected to and from auxiliary electrode 510 to
Viewing area AA extends.First switching pattern 530 is arranged on the first insulating layer 450, and passes through the contact hole of the first insulating layer 450
450c and common electrode 410 are electrically connected.For example, in the present embodiment, auxiliary electrode 510 and the first switching pattern 530
It is optionally all penetration electrode.The material of penetration electrode includes metal oxide, such as: indium tin oxide, indium zinc
Oxide, aluminium tin-oxide, aluminium zinc oxide or other suitable oxides or be above-mentioned stack layer both at least.It is special
It is not that in the present embodiment, auxiliary electrode 510, pixel electrode 520 and the first switching pattern 530 can be by the second electrically conducting transparents
Layer 500 is formed, but invention is not limited thereto.
In the present embodiment, auxiliary electrode 510 optionally through first switching pattern 530 be electrically connected to adjacent to
The common electrode 410-1 of gate driving circuit GC, the common electrode 410-1 being electrically connected to each other and auxiliary electrode 510 form side
Edge touch-control sensing pads ESP.However, the invention is not limited thereto, and in other embodiments, the auxiliary Chong Die with gate driving circuit GC
The common electrode that other appropriate ways are electrically connected to the non-rectilinear border AAa of neighbouring viewing area AA can also be used in electrode 510
410-1, to form edge touch-control sensing pad ESP.
In the present embodiment, using the auxiliary electrode 510 for being set to peripheral region PA, edge touch-control sensing pads the sensing of ESP
Area can increase, and then the sensing area for reducing edge touch-control sensing pad ESP and internal touch-control sensing pad are (i.e. far from viewing area AA
Another common electrode 410-2 on boundary, is illustrated in Fig. 1) sensing area difference.That is, by auxiliary electrode 510
Setting, positioned at the equivalent capacity of the edge touch-control sensing pad ESP of the non-rectilinear border AAa and its near zone of viewing area AA and remote
Inside touch-control sensing pad from viewing area AA non-rectilinear border AAa is (i.e. far from another common electrode 410- on the viewing area boundary AA
2) difference of equivalent capacity is reduced, and facilitates the promotion of touch-control performance.
Fig. 4 is that the touching signals line TL of the image element array substrates of Fig. 2 and the first bucking electrode 420 are believed in the input of each timing
Number schematic diagram.Referring to figure 4., in the present embodiment, in display time interval TdInterior, pixel electrode 520 has display driving current potential,
The common electrode 410 for being electrically connected to touching signals line TL has common potential Vcom, show driving current potential and common potential Vcom
Between voltage difference to be applied to the display medium (such as: liquid crystal) for using the touch control display of image element array substrates 10, into
And make the pixel region where dot structure PX that there is corresponding brightness, (i.e. display time interval T at this timedIt is interior), the first bucking electrode 420
It is grounded to the property of can choose (Ground, GND), with the electric field of suppressor grid driving circuit GC to the electrical shadow of surrounding component
It rings.
In the present embodiment, in touch-control period TtInterior, touching signals line TL can have a touch drive signal DS1, and first
Bucking electrode 420 can have capacitor to inhibit signal DS2.Capacitor inhibits signal DS2 and touch drive signal DS1 can be in same in timing
Step, and capacitor inhibits signal DS2 and the voltage waveform of touch drive signal DS1 substantially the same.By the first bucking electrode 420
Capacitor inhibit signal DS2 and touching signals line TL touch drive signal DS1 synchronization, edge touch-control sensing pad can be reduced
Generated parasitic capacitance between ESP and the first bucking electrode 420, and then optimize the touch control characteristics at the edge viewing area AA.
Fig. 5 is the enlarged diagram of the image element array substrates 10A of the second embodiment of the region I of Fig. 1.Fig. 6 is the present invention
Second embodiment image element array substrates 10A diagrammatic cross-section.In particular, the section pair of the image element array substrates 10A of Fig. 6
It should be in the hatching line C-C ' and hatching line D-D ' of Fig. 5.In addition, Fig. 5 omits the secondary shielding electrode 600 of Fig. 6 for the sake of being clearly painted
It is painted.
Referring to figure 5. and Fig. 6,10 class of image element array substrates of the image element array substrates 10A and Fig. 2 and Fig. 3 of the present embodiment
Seemingly, the difference of the two is: the touching signals line TL of the present embodiment is arranged in second insulating layer 300, and image element array substrates
10A further includes secondary shielding electrode 600.Secondary shielding electrode 600 is set to the first bucking electrode 420 and gate driving circuit GC
Between.Secondary shielding electrode 600 is grounded.For example, in the present embodiment, secondary shielding electrode 600 and touching signals line TL
Material can be identical；That is, secondary shielding electrode 600 and touching signals line TL can be formed in same film layer, but the present invention
It is not limited.
Fig. 6 is please referred to, in the present embodiment, image element array substrates 10A further includes third insulating layer 650, covering touch-control letter
Number line TL and secondary shielding electrode 600.Common electrode 410 and the first bucking electrode 420 are set on third insulating layer 650, and
The touching signals line TL of common electrode 410 and image element array substrates 10A are electrically connected.For example, in the present embodiment, Yu Xian
Show period and touch-control period, secondary shielding electrode 600 is optionally grounded or connects common potential, with suppressor grid driving circuit
Electrical influence of the electric field of GC to surrounding component.
In the present embodiment, third insulating layer 650 has the contact hole 650a for being overlapped in touch-control cabling TL and is overlapped in master
The contact hole 650b of the drain D of dynamic element T.For example, in the present embodiment, contact hole 650a and contact hole 450a can be cut
Together, that is to say, that contact hole 650a and contact hole 450a can utilize same mask and be formed simultaneously in same etch process；It connects
Touching window 650b and contact hole 450b can be trimmed, that is to say, that contact hole 650b and contact hole 450b can utilize same mask and in
It is formed simultaneously in same etch process, but invention is not limited thereto.In the present embodiment, auxiliary electrode 510 can pass through contact
Window 450a, 650a are electrically connected to touching signals line TL, and pixel electrode 520 can pass through contact hole 450b, 650b, 280b, 250b
It is electrically connected to the drain D of active member T.
Fig. 7 is the diagrammatic cross-section of the image element array substrates 10B of the third embodiment of the present invention.Please refer to Fig. 7, this implementation
The image element array substrates 10B of example is similar with the image element array substrates 10A of Fig. 6, and the difference of the two is: the touch-control letter of the present embodiment
Number line TL and secondary shielding electrode 600 are arranged on the first insulating layer 450, and secondary shielding electrode 600 is arranged in auxiliary electrode
510 and first between bucking electrode 420；Third insulating layer 650 is set on the first insulating layer 450.That is, the picture of Fig. 7
The difference of the image element array substrates 10A of pixel array substrate 10B and Fig. 6 is, touching signals line TL (and secondary shielding electrode 600)
The formation of affiliated film layer (such as: third metal layer) and film layer belonging to common electrode 410 (such as: the first transparency conducting layer)
Sequence is different.The upper schematic diagram phase of the image element array substrates 10A of the upper schematic diagram and Fig. 5 of the image element array substrates 10B of Fig. 7
Together, it is just not repeated to be painted in this.
Fig. 8 is the diagrammatic cross-section of the image element array substrates 10C of the fourth embodiment of the present invention.Please refer to Fig. 8, this implementation
The image element array substrates 10C of example is similar with the image element array substrates 10 of Fig. 3, and the two difference is: first insulation of the present embodiment
Layer 450 covers the pixel electrode 430 of dot structure PX, and common electrode 560 is set on the first insulating layer 450, and has and picture
Multiple slit 560a that plain electrode 430 is overlapped.In short, the dot structure PX of image element array substrates 10C is common electrode upper
The pattern of (top common electrode).
For example, in the present embodiment, auxiliary electrode 510 and common electrode 560 can be formed in same second and transparent lead
Electric layer 500, and auxiliary electrode 510 may be directly connected to common electrode 560, that is to say, that auxiliary electrode 510 is not needed by
One switching pattern 530 (being illustrated in Fig. 3) is electrically connected with the common electrode 560 adjacent to gate driving circuit GC；First shielding
Electrode 420 and pixel electrode 430 can be formed in same first transparency conducting layer 400, but invention is not limited thereto.
Fig. 9 is the diagrammatic cross-section of the image element array substrates 10D of the fifth embodiment of the present invention.Please refer to Fig. 9, this implementation
The difference of the image element array substrates 10B of the image element array substrates 10D and Fig. 7 of example are: first insulating layer 450 of the present embodiment covers
The pixel electrode 430 of lid dot structure PX, common electrode 560 are set on third insulating layer 650, and are had and pixel electrode
Multiple slit 560a of 430 overlappings.In short, the dot structure PX of image element array substrates 10D is common electrode in upper (top
Common electrode) pattern.For example, in the present embodiment, auxiliary electrode 510 can be formed with common electrode 560
In same second transparency conducting layer 500, and auxiliary electrode 510 may be directly connected to common electrode 560；First bucking electrode 420
It can be formed in same first transparency conducting layer 400 with pixel electrode 430, but invention is not limited thereto.
In conclusion in the image element array substrates of the embodiment of the present invention, the common electrode of neighbouring edge of display area with
The auxiliary electrode that peripheral region is arranged in is electrically connected, to form edge touch-control sensing pad.Utilize the auxiliary electricity for being set to peripheral region
The sensing area of pole, edge touch-control sensing pad can increase, and then reduce the sensing area and internal touch-control of edge touch-control sensing pad
The difference of the sensing area of sensor pad.That is, being located at edge of display area and its near zone by the setting of auxiliary electrode
The equivalent capacity of edge touch-control sensing pad and the difference of equivalent capacity of the inside touch-control sensing pad far from edge of display area obtain
To reduce, and facilitate the promotion of touch-control performance.
Although the present invention has been disclosed by way of example above, it is not intended to limit the present invention., any technical field
Middle tool usually intellectual, without departing from the spirit and scope of the present invention, when can make some changes and embellishment, thus it is of the invention
Protection scope should be defined by the scope of the appended claims.
Claims (14)
1. a kind of image element array substrates characterized by comprising
One substrate, with the peripheral region outside a viewing area and the viewing area；
Multi-strip scanning line and multiple data lines are set in the substrate；
Multiple dot structures are set to the viewing area, and respectively with those scan lines and those data line electrical connections, wherein often
One dot structure includes an active member and the pixel electrode for being electrically connected to the active member；
One common electrode, the plurality of pixel electrodes being overlapped in those dot structures；
One first insulating layer, is set between those pixel electrodes and the common electrode；
One touching signals line is electrically connected with the common electrode；
One gate driving circuit is set to the peripheral region of the substrate, and is electrically connected at least one scan line, and wherein this is total
With electrode adjacent to the gate driving circuit；
One auxiliary electrode is set to the peripheral region of the substrate, and Chong Die at least part of gate driving circuit, wherein should
Auxiliary electrode and the common electrode are electrically connected, to form an edge touch-control sensing pad.
2. image element array substrates as described in claim 1, which is characterized in that further include:
One first bucking electrode is electrically isolated in the auxiliary electrode and the gate driving circuit, and be set to the auxiliary electrode with
Between at least part of gate driving circuit.
3. image element array substrates as claimed in claim 2, which is characterized in that there is first bucking electrode capacitor to inhibit letter
Number, which has a touch drive signal, which inhibits signal and the touch drive signal in synchronous in timing,
And the capacitor inhibits signal and the voltage waveform of the touch drive signal substantially the same.
4. image element array substrates as claimed in claim 2, which is characterized in that first insulating layer covers the common electrode, should
A little pixel electrodes are set on first insulating layer, and first bucking electrode and the common electrode are formed in same first and transparent lead
Electric layer, and the auxiliary electrode and those pixel electrodes are formed in same second transparency conducting layer.
5. image element array substrates as claimed in claim 2, which is characterized in that first insulating layer covers those pixel electrodes,
The common electrode is set on first insulating layer, and it is transparent which with those pixel electrodes is formed in same first
Conductive layer, and the auxiliary electrode and the common electrode are formed in same second transparency conducting layer.
6. image element array substrates as claimed in claim 2, which is characterized in that further include:
One secondary shielding electrode is set between first bucking electrode and the gate driving circuit, wherein secondary shielding electricity
Pole ground connection.
7. image element array substrates as described in claim 1, which is characterized in that first insulating layer covers the common electrode, often
The pixel electrode of one dot structure is set on first insulating layer and has multiple slits.
8. image element array substrates as claimed in claim 7, which is characterized in that further include:
One second insulating layer covers multiple active members, those scan lines, those data lines and the touching of those dot structures
Signal wire is controlled, and the touching signals line and those data lines are formed in same film layer.
9. image element array substrates as claimed in claim 7, which is characterized in that further include:
One second insulating layer covers multiple active members, those scan lines and those data lines of those dot structures, wherein
The touching signals line is set in the second insulating layer；And
One third insulating layer covers the touching signals line, and wherein the common electrode is set on the third insulating layer.
10. image element array substrates as described in claim 1, which is characterized in that first insulating layer covers those pixel electrodes,
The common electrode is set on first insulating layer and has the multiple slits Chong Die with those pixel electrodes.
11. image element array substrates as claimed in claim 10, which is characterized in that further include:
One second insulating layer covers multiple active members, those scan lines, those data lines and the touching of those dot structures
Signal wire is controlled, and the touching signals line and those data lines are formed in same film layer.
12. image element array substrates as claimed in claim 10, which is characterized in that further include:
One second insulating layer covers multiple active members, those scan lines and those data lines of those dot structures, wherein
Those pixel electrodes are set in the second insulating layer；And
One third insulating layer is set on first insulating layer and covers the touching signals line, and wherein the common electrode is set to
On the third insulating layer.
13. image element array substrates as described in claim 1, which is characterized in that the viewing area is non-rectangle.
14. image element array substrates as claimed in claim 13, which is characterized in that the common electrode has non-straight edges.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW107133265 | 2018-09-20 | ||
| TW107133265A TWI683292B (en) | 2018-09-20 | 2018-09-20 | Pixel array substrate |
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| Publication Number | Publication Date |
|---|---|
| CN109521615A true CN109521615A (en) | 2019-03-26 |
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ID=65797861
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811600985.6A Pending CN109521615A (en) | 2018-09-20 | 2018-12-26 | Pixel array substrate |
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| TW (1) | TWI683292B (en) |
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| CN110045881A (en) * | 2018-11-01 | 2019-07-23 | 友达光电股份有限公司 | Touch-control display panel |
| CN110941364A (en) * | 2019-06-14 | 2020-03-31 | 友达光电股份有限公司 | touch device |
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| CN111427479B (en) * | 2019-12-06 | 2023-04-07 | 友达光电股份有限公司 | Display device |
| CN114207699B (en) * | 2020-06-18 | 2024-01-30 | 京东方科技集团股份有限公司 | Display panel, manufacturing method and display device thereof |
| CN114207699A (en) * | 2020-06-18 | 2022-03-18 | 京东方科技集团股份有限公司 | Display panel, method for manufacturing the same, and display device |
| CN113471222B (en) * | 2020-07-08 | 2023-06-13 | 友达光电股份有限公司 | Pixel Array Substrate |
| CN113471222A (en) * | 2020-07-08 | 2021-10-01 | 友达光电股份有限公司 | Pixel array substrate |
| CN112667109A (en) * | 2020-08-11 | 2021-04-16 | 友达光电股份有限公司 | Touch control display device |
| CN114415431A (en) * | 2020-10-28 | 2022-04-29 | 瀚宇彩晶股份有限公司 | Display panel and manufacturing method thereof |
| CN113380835B (en) * | 2020-11-20 | 2023-07-25 | 友达光电股份有限公司 | Pixel array substrate |
| CN113380835A (en) * | 2020-11-20 | 2021-09-10 | 友达光电股份有限公司 | Pixel array substrate |
| CN114706242A (en) * | 2022-04-07 | 2022-07-05 | 友达光电（昆山）有限公司 | Display panel |
| CN114706242B (en) * | 2022-04-07 | 2024-03-08 | 友达光电（昆山）有限公司 | display panel |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI683292B (en) | 2020-01-21 |
| TW202013334A (en) | 2020-04-01 |
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