CN109461813B - Resistive random access memory based on tungsten sulfide nanosheet and preparation method thereof - Google Patents

Abstract

The present invention provides a resistive memory based on tungsten sulfide nanosheets and a preparation method thereof. The structure of the memristor sequentially includes a Pt substrate and a first ZrO ₂ formed on the Pt substrate from bottom to top. A resistive switching layer, a WS ₂ nanosheet dielectric layer formed on the first ZrO ₂ resistive switching layer, a second ZrO ₂ resistive switching layer formed on the WS ₂ nanosheet dielectric layer, and a second ZrO ₂ Ag electrode layer formed on the resistive layer. The resistive memory provided by the present invention has good resistive characteristics through performance testing, showing a relatively stable resistance value change. _The anti-fatigue properties of the 2nm-sheet resistive memory are excellent in both high-resistance and low-resistance states.

Description

A kind of resistive memory based on tungsten sulfide nanosheets and preparation method thereof

technical field

The invention relates to the technical field of resistive memory, in particular to a resistive memory based on tungsten sulfide nanosheets and a preparation method thereof.

Background technique

In recent years, the size of integrated circuit technology has reached below 20 nanometers, and traditional non-volatile memory devices have approached the physical limit. The development of a new generation of non-volatile memory has become a hot research area for scientists from all over the world. At present, the main types of non-volatile memory are magnetic memory, phase change memory and resistive memory. Among them, resistive memory has the advantages of low power consumption, fast read and write speed, good data retention ability, simple production, easy integration, etc. It is a new generation of memory with great application prospects.

The general structure of the resistive memory is a typical sandwich structure, which has upper and lower electrodes and a varistor material arranged between the upper and lower electrodes to generate a resistive phenomenon. Under the action of the external bias voltage, the resistance state of the device will change from high to low resistance state, so as to realize the storage of 0 and 1. For the resistive memory, the selection of different resistive layer materials will have a great impact on the device. It can be said that the resistive layer material is the core of the resistive memory.

Scientific research has shown that there are many kinds of materials that can be used as resistive layers, and there are currently four main categories. One is perovskite oxides. Many devices based on this material exhibit bipolar memory properties, but such materials are difficult to fabricate and incompatible with conventional devices. The second is transition metal oxides. Transition metal binary oxides have the advantages of simple composition, low cost, easy preparation, and manufacturing compatible with CMOS processes. Although resistive memory devices based on transition metal binary oxides have many advantages, but The resistive switching mechanism is not completely clear, and the reliability of the device needs to be studied, which hinders its development and application to a certain extent. The development prospect of this type of resistive switching device is not very clear. The third is solid-state electrolyte. This type of resistive memory has a typical sandwich structure, including electrochemically active electrodes (Ag, Cu, etc.), electrochemically inert electrodes (W, Pt, etc.) and a resistive functional layer composed of solid electrolyte materials. Their resistance-switching properties are caused by the formation and fracture of metal conductive filaments caused by the migration of metal cations generated by electrochemical reactions of active metal electrode materials under the action of an electric field. When an appropriate forward voltage is applied to the active metal electrode, the active metal will undergo an oxidation reaction and become the corresponding metal cation. Under the action of the electric field, it will migrate to the inert electrode through the solid electrolyte material, and obtain electrons after reaching the surface of the inert electrode. A reduction reaction occurs to produce metal atoms. The metal atoms are deposited on the cathode, and the metal filament first grows on the side of the inert electrode. When the filament grows completely and connects to the active electrode of the metal, a conductive channel is formed, the memory changes from a high-resistance state to a low-resistance state, and the device is turned on. After the reverse voltage is applied, the metal conductive filament will undergo electrochemical dissolution, the metal forming the conductive channel is oxidized into metal cations, and migrate to the active electrode under the action of the electric field. At this time, the conductive channel is broken, and the memory changes from a low resistance state Transitioning to a high-impedance state, the device switches to an off state. Fourth, organic materials. At present, organic materials are simple to manufacture and low in cost, and the research on making resistive memory by using the bistable properties of organic materials is relatively extensive. Compared with inorganic materials, the biggest advantage of organic materials is that they have a wide variety and a large choice. Although organic materials have many advantages, most organic materials have poor stability and storage performance, are not resistant to high temperature, have poor durability and data memory characteristics, and are relatively slow in reading, writing, erasing and other operations. To a certain extent, it affects the application of organic materials in the field of resistive memory devices. Therefore, further research on memory devices with stable resistance value changes, good storage performance, good memory characteristics, good fatigue resistance and durability, and fast operation speeds such as reading, writing, and erasing is a subject actively explored in the industry.

SUMMARY OF THE INVENTION

One of the objectives of the present invention is to provide a resistive memory to solve the problems of unsatisfactory resistance stability and anti-fatigue durability of the existing resistive memory.

Another object of the present invention is to provide a method for preparing a resistive memory.

One of the objectives of the present invention is achieved through the following technical solutions: a resistive memory, the structure of which sequentially includes a Pt substrate, a first ZrO ₂ resistive layer formed on the Pt substrate, and a A WS _{2 nanosheet dielectric layer formed on the first ZrO 2 resistive switching layer, a second ZrO 2 resistive switching layer formed on the WS 2 nanosheet dielectric layer} , and a second ZrO ₂ resistive switching layer formed Ag electrode layer.

The thickness of the WS ₂ nanosheet dielectric layer is 10-100 nm.

The thicknesses of the first ZrO ₂ resistive switching layer and the second ZrO ₂ resistive switching layer are both 5-50 nm.

The Ag electrode layer is composed of a plurality of circular electrodes with a diameter of 80-300 μm uniformly distributed on the second ZrO ₂ resistive switching layer.

The thickness of the circular electrode is 50-200 nm.

The present invention also provides a method for preparing the above-mentioned resistive memory, comprising the following steps:

(a) The Pt substrate was cleaned with ultrasonic waves in acetone, alcohol and deionized water in sequence, and then dried with N ₂ after removal;

(b) Fix the dry and clean Pt substrate on the substrate stage of the magnetron sputtering equipment cavity, and evacuate the cavity to 1×10 ^-4 ~ 6×10 ^-4 Pa, and flow into the cavity The flow rate is 20~75sccm Ar and 10~40sccm O ₂ , adjust the interface valve to maintain the pressure in the cavity at 1~6Pa, turn on the radio frequency source that controls the glow of the ZrO ₂ target, and adjust the power of the radio frequency source to 60~100W, Make the ZrO ₂ target glow, and pre-sputter for 1~5min; after that, the first ZrO ₂ resistive layer is formed on the Pt substrate by the formal sputtering for 10~30min;

(c) Place the Pt substrate formed with the first ZrO ₂ resistive layer on the tray of the glue spinner, suck the WS ₂ solution dropwise onto the substrate with a needle, and set the rotation speed to 300~2000 r/min to make The WS ₂ solution was shaken on the Pt substrate, and then the WS ₂ solution was naturally evaporated to form a layered WS ₂ nanosheet dielectric layer;

(d) _The Pt substrate formed with the first ZrO2 resistive switching layer and the WS2 nanosheet dielectric layer was fixed _on the substrate stage of the magnetron sputtering equipment cavity, and the cavity was evacuated to 1 × 10 ^{− 4} ~ 6×10 ^-4 Pa, flow 20~75sccm of Ar and 10~40sccm of O ₂ into the cavity, adjust the interface valve to keep the pressure in the cavity at 1~6Pa, open the control ZrO ₂ target The power of the radio frequency source was adjusted to 60~100W to make the ZrO ₂ target glow, and the pre-sputtering was performed for 1~5min; after that, the formal sputtering was performed for 10~30min, and the second ZrO was formed on the WS ₂ nanosheet dielectric layer. ₂ resistive layer;

(e) A mask was placed on the Pt substrate formed with the first ZrO ₂ resistive switching layer, the WS ₂ nanosheet dielectric layer and the second ZrO ₂ resistive switching layer, and the cavity was evacuated to 1×10 ^-4 ~ 4×10 ^-4 Pa, pour Ar with a flow rate of 20~30sccm into the cavity, adjust the interface valve to keep the pressure in the cavity at 1~6Pa, turn on the DC source that controls the ignition of the Ag target, and adjust the power of the DC source to 8 ~11W, make the Ag target glow, and pre-sputter for 4~6min; after that, the formal sputtering is 6~10min, and the Ag electrode layer is formed on the second ZrO ₂ resistive layer.

The thicknesses of the first ZrO ₂ resistive switching layer in step (b) and the second ZrO ₂ resistive switching layer in step (d) are both 5-50 nm.

In step (c), the WS ₂ solution is prepared by dissolving WS ₂ in an ethanol solution and fully mixing, WS ₂ : ethanol solution=1 mg: 1 mL; the thickness of the WS ₂ nanosheet dielectric layer is 10-100 nm.

In step (e), circular holes with a diameter of 80-300 μm are uniformly distributed on the mask.

In step (e), the Ag electrode layer is composed of several circular electrodes with a diameter of 80-300 μm uniformly distributed on the second ZrO ₂ resistive layer, and the thickness of the circular electrodes is 50-200 nm.

The WS ₂ nano-sheet resistive memory provided by the present invention forms a WS ₂ nano-sheet dielectric layer by drop coating and uniformly spun with a glue spinner, and the ZrO ₂ resistive-change layer is grown twice by a magnetron sputtering method, and the obtained resistive-variable memory passes through _The performance test proves that it has good resistance characteristics, showing a relatively stable resistance value change. The anti-fatigue properties in both resistance state and low resistance state are excellent.

The preparation method provided by the invention is simple and easy to operate, has good operability, and optimizes the performance of the device. It is different from the traditional storage device prepared by using oxides, has a novel and unique structure, and has good performance, so that the storage performance of the resistive memory is more stable and stable. Strong durability and broader application prospects.

Description of drawings

FIG. 1 is a schematic structural diagram of a resistive memory.

FIG. 2 is a schematic structural diagram of the magnetron sputtering equipment used in the preparation of the WS ₂ nanosheet resistive memory in Example 2. FIG.

3 is a scanning electron microscope (SEM) picture of the WS ₂ nanosheet resistive memory WS ₂ dielectric layer prepared in Example 2.

FIG. 4 is a comparison diagram of current-voltage characteristic forming curves before and after optimization of adding WS ₂ nanosheets in Example 2. FIG.

FIG. 5 is a comparison diagram of the high and low resistance state retention characteristic curves before and after optimization of adding WS ₂ nanosheets in Example 2. FIG.

FIG. 6 is a comparison diagram of repetitive characteristic curves before and after optimization of adding WS ₂ nanosheets in Example 2. FIG.

FIG. 7 is a comparison diagram of the durability curves of high and low resistance states before and after optimization of adding WS ₂ nanosheets in Example 2. FIG.

Detailed ways

The following examples are used to further illustrate the present invention in detail, but the examples do not limit the present invention in any form. Unless otherwise specified, the reagents, methods and equipment used in the present invention are conventional reagents, methods and equipment in the technical field.

Example 1

The structure of the WS ₂ nanosheet resistive memory prepared by the present invention is shown in FIG. 1 , including the bottommost substrate 1 , the first ZrO ₂ resistive layer 2 grown on the substrate 1 , and the first ZrO ₂ resistive A WS2 nanosheet dielectric layer 3 bonded on layer ₂ , a _second ZrO2 resistive switching layer 4 grown on the WS2 nanosheet dielectric layer ₃ , and an Ag electrode layer 5 grown on the _second ZrO2 resistive switching layer 4 .

The substrate 1 is a Pt substrate, the thickness of the WS ₂ nanosheet dielectric layer 3 is 10-100 nm; the thickness of the first ZrO ₂ resistive switching layer 2 and the second ZrO ₂ resistive switching layer 4 are both 5-50 nm.

The thickness of the Ag electrode layer 5 can be in the range of 50nm-200nm; the Ag electrode layer 5 includes a plurality of circular electrodes with a diameter of 80-300μm uniformly distributed on the second ZrO ₂ resistive layer 4 .

Example 2

_The preparation method of the WS2 nanosheet resistive memory of the present invention comprises the following steps:

(1) Wipe the surface of the Pt substrate with absorbent cotton dipped in acetone and anhydrous ethanol in turn, wipe off the dust and other small particles attached to the surface, and preliminarily remove the oil on the surface, and then put the Pt substrate in acetone. Use ultrasonic cleaning for 10 minutes, then put it in alcohol and ultrasonically clean it for 10 minutes, then take it out with a clip, put it in deionized water and ultrasonically clean it for 5 minutes, then take it out and dry it with _N2 ;

(2) Preparation of the first ZrO ₂ resistive switching layer: Using the magnetron sputtering equipment shown in FIG. 2 , the Pt substrate was fixed on the magnetron sputtering table 8, and the table 8 was placed in The substrate table 9 in the cavity is fixed, and the cavity is closed and the cavity is evacuated; when the pressure in the cavity is evacuated below 5 × 10 ^-4 Pa, the air inlet valve 6 is opened to flow into the cavity. 50sccm of Ar and 25sccm of O ₂ , by adjusting the switch size of the plug-in valve 7, the pressure in the cavity is adjusted to maintain the air pressure in the cavity at 3Pa; the radio frequency source is turned on to make the ZrO ₂ target glow, and the power of the radio frequency source is adjusted to 80W, pre-sputtering for 3min, then formal sputtering for 10min, a first ZrO2 resistive layer with a thickness of 10nm was formed on the Pt substrate _;

(3) Preparation of WS ₂ nanosheet dielectric layer: Dissolve 1 mg of WS ₂ in 1 mL of ethanol solution (75%) and mix well to obtain a WS ₂ solution; the Pt substrate treated in step (2) is placed in a shaker Melter; suck the prepared WS ₂ solution with a disposable needle, drop it in the middle of the Pt substrate, the solution will expand around the Pt substrate, and finally cover the entire surface, and then the WS 2 solution will be melted at a speed of 300-2000 r/min. ₂ The solution was shaken to form a layered WS ₂ nanosheet dielectric layer with a thickness of 65 nm;

(4) Preparation of the second ZrO ₂ resistive switching layer: The magnetron sputtering equipment shown in Figure 2 is used to carry out the secondary growth of the ZrO ₂ resistive switching layer. The process conditions are the same as in step (2), and finally the WS ₂ A second ZrO ₂ resistive switching layer with a thickness of 10 nm is formed on the nanosheet dielectric layer;

(5) Preparation of Ag electrode layer: Place a mask with circular holes with a diameter of 90 μm evenly distributed on the second ZrO ₂ resistive layer formed in step (4), arrange the tableting table 8, and put it into the cavity On the substrate table 9 in the body, close the cavity after fixing, and evacuate the cavity and gas path to about 2 × 10 ^-4 Pa; turn on the DC source that controls the glow of the Ag target, and adjust the power of the DC source to 10W, The Ag target can be ignited, and then pre-sputtered for 6 minutes; after that, the formal sputtering was performed for 10 minutes, and an Ag electrode layer with a thickness of 60 nm was formed on the second ZrO ₂ resistive layer.

The structure of the resistive memory before optimization by this method can be expressed as Ag/ZrO ₂ /Pt, and the structure of the optimized WS ₂ nanosheet resistive memory can be expressed as Ag/ ZrO ₂ / WS ₂ /ZrO ₂ /Pt. The device is a new type of resistive memory device, and the key point is that a WS ₂ nanosheet dielectric layer is added between ZrO ₂ .

The above-mentioned embodiment is an example of the preparation method protected by the present invention, as long as it is within the scope of the process parameters described in the claims and the specification (such as the vacuum degree of the cavity of the magnetron sputtering, the power of the radio frequency source) , pre-sputtering time and formal sputtering time, etc.), the resistive memory to be protected by the present invention can be obtained, and the prepared resistive memory has basically similar performance to the device prepared in Example 2.

Example 3 Performance Test

The current-voltage forming characteristic curve was measured by adding the scanning voltage of the resistive memory (Ag/ZrO ₂ /Pt) prepared before the optimization in Example 2, and the results are shown in Figure 4a. It can be seen from the dark curve in Figure 4a that when the forward scanning voltage is gradually increased from 0V to 1.5V for the first time, the device is in a high resistance state (the current is small) at the beginning, and when it is about 1.2V, it is The resistance state gradually changes from high resistance to low resistance state. As the voltage increases, the low resistance state reaches a stable value; after reaching the maximum scan voltage, the scan voltage begins to gradually decrease, and when the scan voltage continues to decrease to 0V , and then start the negative scan to about -0.23V, reach the off voltage, slowly and gradually change from the low resistance state to the high resistance state, and the device remains in the high resistance state until the voltage sweeps back to 0V. It can be seen from the light-colored curve in Figure 4a that when the forward scanning voltage is gradually increased from 0V to 1.5V for the second time, the device is in a high resistance state (the current is small) at the beginning, and when it is about 0.5V, it is The resistance state gradually changes from high resistance to low resistance state. As the voltage increases, the low resistance state reaches a stable value; after reaching the maximum scan voltage, the scan voltage begins to gradually decrease, and when the scan voltage continues to decrease to 0V , and then start the negative scan to around -0.15V, reaching the off voltage, slowly and gradually transforming from the low resistance state to the high resistance state, and the device remains in the high resistance state until the voltage sweeps back to 0V.

The current-voltage forming characteristic curve of the WS ₂ nanosheet resistive memory that was optimized after the optimization in Example 2 was added to measure its current-voltage forming characteristic curve, and the results are shown in Figure 4b. It can be seen from the dark curve in Figure 4b that when the forward scanning voltage gradually increases from 0V to 0.6V, the device is in a high-resistance state at the beginning (the current is small), and at about 0.5V, its resistance state is changed by The high resistance gradually changes to the low resistance state. As the voltage increases, the low resistance state reaches a stable value; after reaching the maximum scan voltage, the scan voltage begins to gradually decrease, and when the scan voltage continues to decrease to 0V, it begins to negative When the scanning is about -0.13V, the off voltage is reached, and the low-resistance state is slowly and gradually transformed into a high-resistance state, and the device remains in the high-resistance state until the voltage sweeps back to 0V. It can be seen from the light-colored curve in Figure 4b that when the forward scanning voltage gradually increases from 0V to 0.6V, the device is in a high-resistance state at the beginning (the current is small), and when it is about 0.18V, its resistance state is changed by The high resistance gradually changes to the low resistance state. As the voltage increases, the low resistance state reaches a stable value; after reaching the maximum scan voltage, the scan voltage begins to gradually decrease, and when the scan voltage continues to decrease to 0V, it begins to negative When the voltage is scanned to about -0.06 V, the off voltage is reached, and the low-resistance state is slowly and gradually transformed into a high-resistance state, and the device remains in the high-resistance state until the voltage sweeps back to 0V. It is obvious that the switching voltage of the forming process is reduced after optimization.

The retention characteristics of the resistive memory before optimization are examined, and the results are shown in Figure 5a. The retention characteristics of the optimized resistive memory prepared in Example 2 were tested, and the results are shown in Figure 5b. It can be seen from Figure 5 that the optimized WS ₂ nanosheet resistive memory based on this method has good retention characteristics, with obvious high and low resistance states, and still has obvious high and low resistance states after 4×10 ⁴ s.

The repetition characteristics of the resistive memory before optimization are tested, and the results are shown in Figure 6a, and the repetition characteristics of the optimized resistance memory prepared in Example 2 are shown in Figure 6b. The WS ₂ nanosheet resistive memory prepared by the optimized method has more stable electrical properties and better repeatability.

The durability of the resistive memory before optimization is tested, and the results are shown in Fig. 7a, and the durability of the optimized resistive memory prepared in Example 2 is shown in Fig. 7b. The WS ₂ nanosheet resistive memory prepared by the optimized method has a durability of 1×10 ⁹ and better stability.

The above examples are preferred embodiments of the present invention, but the embodiments of the present invention are not limited by the examples, and any other changes, modifications, substitutions, combinations, The simplification should be equivalent replacement manners, which are all included in the protection scope of the present invention.

Claims (8)

1. The resistive random access memory is characterized by sequentially comprising a Pt substrate and first ZrO formed on the Pt substrate from bottom to top ₂ A resistance change layer on the first ZrO ₂ WS formed on the resistive layer ₂ Nanosheet dielectric layer in WS ₂ Second ZrO formed on the nanosheet dielectric layer ₂ A resistance change layer and a layer on the second ZrO ₂ An Ag electrode layer formed on the resistance change layer; the WS ₂ The thickness of the nanosheet dielectric layer is 10-100 nm; the first ZrO ₂ Resistance change layer and second ZrO ₂ The thickness of the resistance change layer is 5-50 nm.

2. The resistive random access memory according to claim 1, wherein the Ag electrode layer is formed by a plurality of Ag electrode layers uniformly distributed on the second ZrO layer ₂ And a circular electrode with a diameter of 80-300 μm on the resistance change layer.

3. The resistive random access memory according to claim 2, wherein the circular electrode has a thickness of 50 to 200 nm.

4. A preparation method of a resistive random access memory is characterized by comprising the following steps:

(a) sequentially cleaning a Pt substrate in acetone, alcohol and deionized water by using ultrasonic waves, taking out the Pt substrate, and then using N ₂ Drying;

(b) fixing the dry and clean Pt substrate on a substrate table of a cavity of a magnetron sputtering device, and vacuumizing the cavity to 1 x 10 ^-4 ~6×10 ^-4 Pa, introducing Ar with the flow rate of 20-75 sccm and O with the flow rate of 10-40 sccm into the cavity ₂ Adjusting the interface valve to maintain the pressure in the cavity at 1-6 Pa, and opening the ZrO control valve ₂ The power of the radio frequency source is adjusted to be 60-100W so as to enable ZrO to be generated ₂ Starting glow of the target material, and pre-sputtering for 1-5 min; then formally sputtering for 10-30 min to form first ZrO on the Pt substrate ₂ A resistance change layer;

(c) will be formed with the first ZrO ₂ The Pt substrate of the resistance change layer is arranged on a tray of a spin coater, and the WS is absorbed by a needle tube ₂ Dropping the solution onto the substrate at a rotation speed of 300-2000 r/min to obtain WS ₂ The solution was spun down on a Pt substrate, after which WS was allowed to stand ₂ The solution naturally evaporates, i.e. forming a layered WS ₂ A nanosheet dielectric layer;

(d) will be formed with the first ZrO ₂ Resistance change layer and WS ₂ Fixing the Pt substrate of the nanosheet medium layer on a substrate table of a cavity of a magnetron sputtering device, and vacuumizing the cavity to 1 x 10 ^-4 ~6×10 ^-4 Pa, introducing Ar with the flow rate of 20-75 sccm and O with the flow rate of 10-40 sccm into the cavity ₂ Adjusting the interface valve to maintain the pressure in the cavity at 1-6 Pa, and opening the ZrO control valve ₂ The power of the radio frequency source is adjusted to be 60-100W so as to enable ZrO to be generated ₂ Starting the brightness of the target material, and pre-sputtering for 1-5 min; then, sputtering for 10-30 min in WS ₂ A second ZrO layer is formed on the nano-sheet medium layer ₂ A resistance change layer;

(e) at the formation of the first ZrO ₂ Resistive layer, WS ₂ A nanosheet dielectric layer and a second ZrO ₂ Placing a mask plate on a Pt substrate of the resistance change layer, and vacuumizing the cavity to 1 × 10 ^-4 ~4×10 ^-4 Pa, introducing Ar with the flow rate of 20-30 sccm into the cavity, and adjusting to connectThe port valve enables the pressure in the cavity to be maintained at 1-6 Pa, a direct current source for controlling the brightness of the Ag target is turned on, the power of the direct current source is adjusted to be 8-11W, the Ag target is enabled to be bright, and pre-sputtering is carried out for 4-6 min; then formally sputtering for 6-10 min to obtain the second ZrO ₂ And forming an Ag electrode layer on the resistance change layer.

5. The method for manufacturing a resistance change memory according to claim 4, wherein the first ZrO in the step (b) ₂ A resistance change layer and the second ZrO in step (d) ₂ The thickness of the resistance change layer is 5-50 nm.

6. The method of claim 4, wherein in step (c), the WS is ₂ The solution is WS ₂ Dissolving in ethanol solution and mixing thoroughly to obtain WS ₂ Ethanol solution = 1 mg: 1 mL; the WS ₂ The thickness of the nanosheet dielectric layer is 10-100 nm.

7. The preparation method of the memristor based on zinc oxide according to claim 4, wherein in the step (e), circular holes with the diameter of 80-300 μm are uniformly distributed on the mask.

8. The method for preparing a memristor based on zinc oxide according to claim 4, wherein in the step (e), the Ag electrode layer is formed by a plurality of Ag electrode layers uniformly distributed on the second ZrO layer ₂ And the diameter of the circular electrode on the resistance change layer is 80-300 mu m, and the thickness of the circular electrode is 50-200 nm.

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