CN109450432B - Radio frequency input port protection circuit - Google Patents
Radio frequency input port protection circuit Download PDFInfo
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- CN109450432B CN109450432B CN201811559336.6A CN201811559336A CN109450432B CN 109450432 B CN109450432 B CN 109450432B CN 201811559336 A CN201811559336 A CN 201811559336A CN 109450432 B CN109450432 B CN 109450432B
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- 230000003068 static effect Effects 0.000 claims abstract description 55
- 230000005611 electricity Effects 0.000 claims abstract description 49
- 239000003990 capacitor Substances 0.000 claims description 23
- 230000001052 transient effect Effects 0.000 claims description 7
- 230000005284 excitation Effects 0.000 claims description 6
- 239000003381 stabilizer Substances 0.000 abstract 1
- 230000001629 suppression Effects 0.000 abstract 1
- 238000009825 accumulation Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 230000006978 adaptation Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00315—Modifications for increasing the reliability for protection in field-effect transistor circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
- H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00369—Modifications for compensating variations of temperature, supply voltage or other physical parameters
- H03K19/00384—Modifications for compensating variations of temperature, supply voltage or other physical parameters in field effect transistor circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/017509—Interface arrangements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018507—Interface arrangements
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
The invention discloses a radio frequency input port protection circuit, which comprises a low dropout linear voltage regulator, a first diode, a second diode, a filter circuit and an electrostatic protection circuit, wherein the positive electrode of the first diode is connected with the radio frequency input port and the negative electrode of the second diode; the input end of the filter circuit is connected with the output end of the low dropout linear voltage regulator, and the output end of the filter circuit is connected with the cathode of the first diode; the input end of the electrostatic protection circuit is connected with the cathode of the first diode, and the output end of the electrostatic protection circuit is grounded; the invention provides the static protection circuit bias and the direct current bias of the radio frequency input port by suppressing the voltage of power supply interference and noise in the output voltage of the low dropout linear voltage stabilizer through the filter circuit, thereby improving the power supply suppression ratio of the radio frequency receiving circuit; meanwhile, the invention discharges the static electricity input to the radio frequency input port through the static electricity protection circuit, thereby realizing the high static electricity protection of the radio frequency receiving circuit.
Description
[ technical field ]
The invention relates to the technical field of communication, in particular to a radio frequency input port protection circuit.
Background art
As shown in fig. 1, the existing rf input port protection circuit includes a low dropout linear regulator LDO, a first diode D1, and a second diode D2; the input end of the low dropout linear regulator LDO receives the voltage VCC output by the power supply, and the output end is connected with the cathode of the first diode D1; the anode of the first diode D1 is connected with the cathode of the second diode D2, and the anode of the second diode D2 is grounded GND; the common electrode of the first diode D1 and the second diode D2 is connected with a radio frequency input port; the radio frequency input port is connected with an internal circuit; the LDO is used for outputting stable output voltage VDD to the radio frequency input port; the first diode D1 and the second diode D2 are used for discharging static electricity of the radio frequency input port.
Although the static electricity protection of the radio frequency input port is realized in the prior art, the radio frequency input port still has the problem of low power supply rejection ratio which is fatal to a radio frequency receiving circuit.
Summary of the invention
The invention aims to provide a radio frequency input port protection circuit which realizes high power supply rejection ratio and high electrostatic protection of the radio frequency input circuit.
The invention is realized by the following technical scheme:
the radio frequency input port protection circuit comprises a low dropout linear voltage regulator, a first diode and a second diode, wherein the positive electrode of the first diode is connected with the radio frequency input port and the negative electrode of the second diode, and the positive electrode of the second diode is grounded; the radio frequency input port protection circuit further comprises a filter circuit and an electrostatic protection circuit; the input end of the filter circuit is connected with the output end of the low dropout linear voltage regulator, and the output end of the filter circuit is connected with the cathode of the first diode; the input end of the static protection circuit is connected with the cathode of the first diode, and the output end of the static protection circuit is grounded.
Further, the electrostatic protection circuit comprises a first electrostatic protection circuit and a second electrostatic protection circuit; when the static electricity input into the radio frequency input port is a small amount of positive charge, the static electricity input into the radio frequency input port is discharged through the first static electricity protection circuit; when the static electricity input to the radio frequency input port is a large number of positive charges or passes through the accumulated large number of positive charges, the static electricity input to the radio frequency input port is discharged through the second static electricity protection circuit.
As a specific embodiment, the first electrostatic protection circuit includes a fourth resistor, a second capacitor, a first inverter, and a second NMOS transistor; the cathode of the first diode is connected with one end of the fourth resistor and the drain electrode of the second NMOS transistor; the other end of the fourth resistor is connected with one end of the second capacitor and the input end of the first inverter; the output end of the first inverter is connected with the grid electrode of the second NMOS transistor; the other end of the second capacitor and the source electrode of the second NMOS transistor are grounded.
As a specific embodiment, the first inverter includes a first PMOS transistor and a first NMOS transistor; the grid electrode of the first PMOS transistor and the grid electrode of the first NMOS transistor are connected with the other end of the fourth resistor; the source electrode of the first PMOS transistor is connected with the cathode of the first diode; the source electrode of the first NMOS transistor is grounded; the drain of the first PMOS transistor and the drain of the first NMOS transistor are connected with the gate of the second NMOS transistor.
As a specific embodiment, the second electrostatic protection circuit includes a fifth resistor, a sixth resistor, a second PMOS transistor, a second inverter, a third inverter, and a fifth NMOS transistor; the cathode of the first diode is connected with the source electrode of the second PMOS transistor and the drain electrode of the fifth NMOS transistor; the grid electrode of the second PMOS transistor is connected with one end of the fifth resistor; the drain electrode of the second PMOS transistor is connected with one end of the sixth resistor and the input end of the second inverter; the output end of the second inverter is connected with the input end of the third inverter; the output end of the third inverter is connected with the grid electrode of the fifth NMOS transistor; the other end of the fifth resistor, the other end of the sixth resistor and the source electrode of the fifth NMOS transistor are grounded.
As a specific embodiment, the second inverter includes a third PMOS transistor and a third NMOS transistor, where a gate of the third PMOS transistor and a gate of the third NMOS transistor are connected to a drain of the second PMOS transistor, a source of the third PMOS transistor is connected to a cathode of the first diode, a source of the third NMOS transistor is grounded, a drain of the third PMOS transistor and a drain of the third NMOS transistor are connected to an input of the third inverter, and/or the third inverter includes a fourth PMOS transistor and a fourth NMOS transistor, a gate of the fourth PMOS transistor and a gate of the fourth NMOS transistor are connected to an output of the second inverter, a source of the fourth PMOS transistor is connected to a cathode of the first diode, a source of the fourth NMOS transistor is grounded, and a drain of the fourth PMOS transistor and a drain of the fourth NMOS transistor are connected to a gate of the fifth NMOS transistor.
As a specific embodiment, the filter circuit includes a first resistor and a first capacitor; one end of the first resistor is connected with the output end of the low dropout linear voltage regulator, and the other end of the first resistor is connected with one end of the first capacitor and the cathode of the first diode; the other end of the first capacitor is grounded.
Further, the radio frequency input port protection circuit further comprises a voltage division circuit; the input end of the voltage dividing circuit is connected with the common end of the first resistor and the first capacitor, and the output end of the voltage dividing circuit is connected with the radio frequency input port and is used for outputting half of the output voltage of the low-dropout linear voltage regulator to the radio frequency input port.
As a specific embodiment, the voltage dividing circuit includes a second resistor and a third resistor; one end of the second resistor is connected with the common end of the first resistor and the first capacitor, and the other end of the second resistor is connected with one end of the third resistor and the radio frequency input port; the other end of the third resistor is grounded; the sum of the resistance values of the first resistor and the second resistor is equal to the resistance value of the third resistor.
Further, the radio frequency input port protection circuit further comprises a voltage division circuit; the input end of the voltage dividing circuit is connected with the output end of the filter circuit, and the output end of the voltage dividing circuit is connected with the radio frequency input port and is used for outputting half of the output voltage of the low-dropout linear voltage regulator to the radio frequency input port.
The invention has the beneficial effects that:
according to the invention, noise in the output voltage of the low dropout linear voltage regulator is suppressed by the filter circuit, so that the power supply rejection ratio of the radio frequency receiving circuit is improved; according to the invention, the static electricity input into the radio frequency input port is released through the static electricity protection circuit, so that the high static electricity protection of the radio frequency receiving circuit is realized. Further, the invention releases transient excited positive charges of the input radio frequency input port through the first electrostatic protection circuit, and releases relatively slowly accumulated positive charges of the input radio frequency input port through the second electrostatic protection circuit. Furthermore, the invention outputs half of the output voltage of the low dropout linear voltage regulator to the radio frequency input port through the voltage dividing circuit, thereby realizing low parasitic capacitance of the radio frequency input port.
Description of the drawings
In order to more clearly illustrate the embodiments of the present invention, the drawings that are used in the embodiments will be briefly described below. The drawings in the following description are only examples of the present invention and other drawings may be obtained from these drawings without inventive effort for a person of ordinary skill in the art.
FIG. 1 is a circuit schematic of a prior art radio frequency input port protection circuit;
FIG. 2 is a block diagram of the RF input port protection circuit of the present invention;
fig. 3 is a schematic circuit diagram of the rf input port protection circuit of the present invention.
Best mode for carrying out the invention
The present invention will be described in detail with reference to the accompanying drawings.
The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions, and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
As shown in fig. 2, a radio frequency input port protection circuit includes a low dropout linear regulator LDO, a first diode D1, a second diode D2, a filter circuit, a voltage divider circuit, and an electrostatic protection circuit; the input end of the low dropout linear regulator LDO is connected with the positive electrode of the power supply and receives the voltage VCC output by the power supply; the output end of the LDO is connected with the input end of the filter circuit, and the output voltage VDD is supplied to the filter circuit; the output end of the filter circuit, the input end of the voltage dividing circuit and the input end of the static protection circuit are connected with the cathode of the first diode D1; the anode of the first diode D1 is connected with a radio frequency input port, the output end of the voltage dividing circuit and the cathode of the second diode D2, and the radio frequency input port is connected with a radio frequency receiving circuit; the positive electrode of the second diode D2 and the output terminal of the electrostatic protection circuit are grounded GND.
In this embodiment, the filter circuit improves the power supply rejection ratio of the radio frequency receiving circuit by filtering noise in the output voltage VDD of the LDO; the voltage dividing circuit outputs voltage VDD/2 to the radio frequency input port according to the principle of series resistance voltage division, so that the bias voltage of the radio frequency input port is guaranteed to be VDD/2, and the parasitic capacitance of the radio frequency input port is reduced; the static protection circuit is used for releasing static electricity input to the radio frequency input port and realizing high static protection of the radio frequency receiving circuit.
In this embodiment, when the static electricity input to the rf input port is negative, the first diode D1 is turned off, the second diode D2 is turned on, and the static electricity input to the rf input port is discharged through the turned-on second diode D2; when the static electricity input to the radio frequency input port is positive charge, the first diode D1 is turned on, the second diode D2 is turned off, and the static electricity input to the radio frequency input port is discharged through the static electricity protection circuit.
As shown in fig. 3, in the present embodiment, the filter circuit includes a first resistor R1 and a first capacitor C1; one end of the first resistor R1 is connected with the output end of the low dropout linear regulator LDO, and the other end of the first resistor R1 is connected with one end of the first capacitor C1 and the cathode of the first diode D1; the other end of the first capacitor C1 is grounded GND.
As shown in fig. 3, in the present embodiment, the voltage dividing circuit includes a second resistor R2 and a third resistor R3; one end of the second resistor R2 is connected with the cathode of the first diode D1, the other end of the second resistor R2 is connected with the anode of the first diode D1 and one end of the third resistor R3, and the other end of the third resistor R3 is grounded GND.
In the present embodiment, r1+r2=r3; according to the principle of series resistance voltage division, the voltage at the positive electrode of the first diode D1 (i.e. the bias voltage of the rf input port) =r3×vdd/(r1+r2+r3) =vdd/2.
As shown in fig. 1, in the present embodiment, the electrostatic protection circuit includes a first electrostatic protection circuit and a second electrostatic protection circuit; when the static electricity input into the radio frequency input port is formed by positive charges released by transient excitation, the static electricity input into the radio frequency input port is released through the first static electricity protection circuit; when the static electricity input to the radio frequency input port is formed by slowly accumulating positive charges, the static electricity input to the radio frequency input port is discharged through the second static electricity protection circuit.
In this embodiment, when the static electricity accumulation time of the input rf input port is less than 1us, the static electricity is positive charge released by transient excitation, and is released by the first static electricity protection circuit; when the static electricity accumulation time of the input radio frequency input port is larger than or equal to lus, the static electricity is slowly accumulated positive charges and is discharged through the second static electricity protection circuit.
As shown in fig. 3, in the present embodiment, the first electrostatic protection circuit includes a fourth resistor R4, a second capacitor C2, a first PMOS transistor P1, a first NMOS transistor N1, and a second NMOS transistor N2; the cathode of the first diode D1 is connected with one end of the fourth resistor R4, the source electrode of the first PMOS transistor P1 and the drain electrode of the second NMOS transistor N2; the other end of the fourth resistor R4 is connected with one end of the second capacitor C2, the grid electrode of the first PMOS transistor P1 and the grid electrode of the first NMOS transistor N1; the drain electrode of the first PMOS transistor P1 and the drain electrode of the first NMOS transistor N1 are connected with the grid electrode of the second NMOS transistor N2; the other end of the second capacitor C2, the source of the first NMOS transistor N1, and the source of the second NMOS transistor N2 are grounded GND.
In the present embodiment, the first PMOS transistor P1 and the first NMOS transistor N1 form a first inverter; when the static electricity input into the radio frequency input port is formed by positive charges released by transient excitation, the voltage output by the common end of the fourth resistor R4 and the second capacitor C2 to the grid electrode of the first PMOS transistor P1 and the grid electrode of the first NMOS transistor N1 (namely, the voltage of the input end of the first inverter) is low level, the voltage output by the drain electrode of the first PMOS transistor P1 and the drain electrode of the first NMOS transistor N1 (namely, the voltage of the output end of the first inverter) is high level, the first inverter outputs high level to the grid electrode of the second NMOS transistor N2, so that the second NMOS transistor N2 is conducted, and the static electricity input into the radio frequency input port is released through the conducted second NMOS transistor N2; when the static electricity input to the rf input port is formed by slowly accumulated positive charges, the voltage output to the gate of the first PMOS transistor P1 and the voltage output to the drain of the first NMOS transistor N1 (i.e., the voltage output to the output of the first inverter) become high, the first inverter outputs low to the gate of the second NMOS transistor N2, so that the second NMOS transistor N2 is turned off, and the static electricity input to the rf input port cannot be released through the second NMOS transistor N2 any more, i.e., the static electricity formed by slowly accumulated positive charges cannot be released by the first static electricity protection module.
As shown in fig. 3, in the present embodiment, the second electrostatic protection circuit includes a fifth resistor R5, a sixth resistor R6, a second PMOS transistor P2, a third PMOS transistor P3, a fourth PMOS transistor P4, a third NMOS transistor N3, a fourth NMOS transistor N4, and a fifth NMOS transistor N5; the cathode of the first diode D1 is connected to the source of the second PMOS transistor P2, the source of the third PMOS transistor P3, the source of the fourth PMOS transistor P4 and the drain of the fifth NMOS transistor N5; the grid electrode of the second PMOS transistor P2 is connected with one end of the fifth resistor R5, and the drain electrode of the second PMOS transistor P2 is connected with one end of the sixth resistor R6, the grid electrode of the third PMOS transistor P3 and the grid electrode of the third NMOS transistor N3; the drain of the third PMOS transistor P3 and the drain of the third NMOS transistor N3 are connected to the gate of the fourth PMOS transistor P4 and the gate of the fourth NMOS transistor N4; the drain of the fourth PMOS transistor P4 and the drain of the fourth NMOS transistor N4 are connected to the gate of the fifth NMOS transistor N5; the other end of the fifth resistor R5, the other end of the sixth resistor R6, the source of the third NMOS transistor N3, the source of the fourth NMOS transistor N4, and the source of the fifth NMOS transistor N5 are grounded GND.
In the present embodiment, the third PMOS transistor P3 and the third NMOS transistor N3 form a second inverter, and the fourth PMOS transistor P4 and the fourth NMOS transistor N4 form a third inverter; when the static electricity input to the rf input port is formed by positive charges released by transient excitation, the voltages of the gates of the second PMOS transistor P3 and the third NMOS transistor N3 (i.e., the voltage at the input end of the second inverter) are low, the voltages of the drain of the third PMOS transistor P3 and the drain of the third NMOS transistor N3 (i.e., the voltage at the output end of the second inverter) are high, the voltages of the gate of the fourth PMOS transistor P4 and the gate of the fourth NMOS transistor N4 (i.e., the voltage at the input end of the third inverter) are high, the voltages of the drain of the fourth PMOS transistor P4 and the drain of the fourth NMOS transistor N4 (i.e., the voltage at the output end of the third inverter) are low, the voltages of the drain of the fifth NMOS transistor N5 and the output end of the third inverter are low, the static electricity input to the rf input port cannot be released through the second electrostatic protection circuit, i.e., the static electricity input to the rf input port cannot be released by transient excitation; when the static electricity input to the rf input port is composed of slowly accumulated positive charges, the voltages output from the drain of the second PMOS transistor P2 to the gate of the third PMOS transistor P3 and the drain of the third NMOS transistor N3 (i.e., the voltage at the input end of the third inverter) become high, the voltages output from the drain of the third PMOS transistor P3 and the drain of the third NMOS transistor N3 (i.e., the voltage at the output end of the second inverter) become low, the voltages received from the output end of the second inverter by the gate of the fourth PMOS transistor P4 and the gate of the fourth NMOS transistor N4 (i.e., the voltage at the input end of the third inverter) also become low, the voltages output from the drain of the fourth PMOS transistor P4 and the drain of the fourth NMOS transistor N4 (i.e., the voltage at the output end of the third inverter) become high, the fifth NMOS transistor N5 also becomes high, and the fifth NMOS transistor N5 is turned on, thereby releasing the static electricity input to the rf input port.
The above-mentioned embodiments are only preferred embodiments of the present invention, and the protection scope of the present invention is not limited to the above-mentioned embodiments, and all technical solutions belonging to the concept of the present invention belong to the protection scope of the present invention. It should be noted that modifications and adaptations to the present invention may occur to one skilled in the art without departing from the principles of the present invention and are intended to be within the scope of the present invention.
Claims (8)
1. The utility model provides a radio frequency input port protection circuit, includes low dropout linear voltage regulator, first diode and second diode, and the positive pole of first diode is connected with the negative pole of radio frequency input port and second diode, and the positive pole of second diode ground connection, its characterized in that: the device also comprises a filter circuit and an electrostatic protection circuit; the input end of the filter circuit is connected with the output end of the low dropout linear voltage regulator, and the output end of the filter circuit is connected with the cathode of the first diode; the input end of the electrostatic protection circuit is connected with the cathode of the first diode, and the output end of the electrostatic protection circuit is grounded;
the electrostatic protection circuit comprises a first electrostatic protection circuit and a second electrostatic protection circuit; when the static electricity input into the radio frequency input port is formed by positive charges released by transient excitation, the static electricity input into the radio frequency input port is released through the first static electricity protection circuit; when the static electricity input into the radio frequency input port is formed by slowly accumulated positive charges, the static electricity input into the radio frequency input port is discharged through the second static electricity protection circuit;
the second electrostatic protection circuit comprises a fifth resistor, a sixth resistor, a second PMOS transistor, a second inverter, a third inverter and a fifth NMOS transistor; the cathode of the first diode is connected with the source electrode of the second PMOS transistor and the drain electrode of the fifth NMOS transistor; the grid electrode of the second PMOS transistor is connected with one end of the fifth resistor; the drain electrode of the second PMOS transistor is connected with one end of the sixth resistor and the input end of the second inverter; the output end of the second inverter is connected with the input end of the third inverter; the output end of the third inverter is connected with the grid electrode of the fifth NMOS transistor; the other end of the fifth resistor, the other end of the sixth resistor and the source electrode of the fifth NMOS transistor are grounded.
2. The radio frequency input port protection circuit of claim 1, wherein: the first electrostatic protection circuit comprises a fourth resistor, a second capacitor, a first inverter and a second NMOS transistor; the cathode of the first diode is connected with one end of the fourth resistor and the drain electrode of the second NMOS transistor; the other end of the fourth resistor is connected with one end of the second capacitor and the input end of the first inverter; the output end of the first inverter is connected with the grid electrode of the second NMOS transistor; the other end of the second capacitor and the source electrode of the second NMOS transistor are grounded.
3. The radio frequency input port protection circuit of claim 2, wherein: the first inverter includes a first PMOS transistor and a first NMOS transistor; the grid electrode of the first PMOS transistor and the grid electrode of the first NMOS transistor are connected with the other end of the fourth resistor; the source electrode of the first PMOS transistor is connected with the cathode of the first diode; the source electrode of the first NMOS transistor is grounded; the drain of the first PMOS transistor and the drain of the first NMOS transistor are connected with the gate of the second NMOS transistor.
4. The radio frequency input port protection circuit of claim 1, wherein: the second inverter comprises a third PMOS transistor and a third NMOS transistor, the grid electrode of the third PMOS transistor and the grid electrode of the third NMOS transistor are connected with the drain electrode of the second PMOS transistor, the source electrode of the third PMOS transistor is connected with the cathode electrode of the first diode, the source electrode of the third NMOS transistor is grounded, the drain electrode of the third PMOS transistor and the drain electrode of the third NMOS transistor are connected with the input end of the third inverter, and/or the third inverter comprises a fourth PMOS transistor and a fourth NMOS transistor, the grid electrode of the fourth PMOS transistor and the grid electrode of the fourth NMOS transistor are connected with the output end of the second inverter, the source electrode of the fourth PMOS transistor is connected with the cathode electrode of the first diode, the source electrode of the fourth NMOS transistor is grounded, and the drain electrode of the fourth PMOS transistor and the drain electrode of the fourth NMOS transistor are connected with the grid electrode of the fifth NMOS transistor.
5. The radio frequency input port protection circuit of any of claims 1-4, wherein: the filter circuit comprises a first resistor and a first capacitor; one end of the first resistor is connected with the output end of the low dropout linear voltage regulator, and the other end of the first resistor is connected with one end of the first capacitor and the cathode of the first diode; the other end of the first capacitor is grounded.
6. The radio frequency input port protection circuit of claim 5, wherein: the circuit also comprises a voltage dividing circuit; the input end of the voltage dividing circuit is connected with the common end of the first resistor and the first capacitor, and the output end of the voltage dividing circuit is connected with the radio frequency input port and is used for outputting half of the output voltage of the low-dropout linear voltage regulator to the radio frequency input port.
7. The radio frequency input port protection circuit of claim 6, wherein: the voltage dividing circuit comprises a second resistor and a third resistor; one end of the second resistor is connected with the common end of the first resistor and the first capacitor, and the other end of the second resistor is connected with one end of the third resistor and the radio frequency input port; the other end of the third resistor is grounded; the sum of the resistance values of the first resistor and the second resistor is equal to the resistance value of the third resistor.
8. The radio frequency input port protection circuit of any of claims 1-4, wherein: the circuit also comprises a voltage dividing circuit; the input end of the voltage dividing circuit is connected with the output end of the filter circuit, and the output end of the voltage dividing circuit is connected with the radio frequency input port and is used for outputting half of the output voltage of the low-dropout linear voltage regulator to the radio frequency input port.
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| CN201811559336.6A CN109450432B (en) | 2018-12-18 | 2018-12-18 | Radio frequency input port protection circuit |
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| CN201811559336.6A CN109450432B (en) | 2018-12-18 | 2018-12-18 | Radio frequency input port protection circuit |
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| CN109450432B true CN109450432B (en) | 2024-04-02 |
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| CN112947663A (en) * | 2021-03-26 | 2021-06-11 | 广州飒特红外科技有限公司 | Bias voltage generating circuit of uncooled infrared detector |
| CN113258953B (en) * | 2021-06-25 | 2021-10-01 | 成都爱旗科技有限公司 | Radio frequency device, communication device and electrostatic protection method of radio frequency device |
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| CN109450432A (en) | 2019-03-08 |
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