CN109449891A - Improve the single-wafer battery protecting circuit and charge-discharge circuit of anti-peak voltage ability - Google Patents
Improve the single-wafer battery protecting circuit and charge-discharge circuit of anti-peak voltage ability Download PDFInfo
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- CN109449891A CN109449891A CN201811536650.2A CN201811536650A CN109449891A CN 109449891 A CN109449891 A CN 109449891A CN 201811536650 A CN201811536650 A CN 201811536650A CN 109449891 A CN109449891 A CN 109449891A
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- 239000000758 substrate Substances 0.000 claims abstract description 69
- 238000007599 discharging Methods 0.000 claims abstract description 7
- 101100169313 Viola odorata Voc2 gene Proteins 0.000 claims description 13
- 238000000034 method Methods 0.000 claims description 12
- 239000003990 capacitor Substances 0.000 claims description 11
- 101100497923 Viola odorata Voc1 gene Proteins 0.000 claims description 8
- 230000004044 response Effects 0.000 claims description 8
- 238000001514 detection method Methods 0.000 claims description 4
- 230000005540 biological transmission Effects 0.000 claims description 2
- 230000001934 delay Effects 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 description 54
- 230000015556 catabolic process Effects 0.000 description 16
- 238000010586 diagram Methods 0.000 description 16
- 230000005611 electricity Effects 0.000 description 14
- 238000005516 engineering process Methods 0.000 description 12
- 238000004519 manufacturing process Methods 0.000 description 12
- 238000010998 test method Methods 0.000 description 8
- 230000008569 process Effects 0.000 description 5
- 230000001012 protector Effects 0.000 description 5
- 101100169314 Viola odorata Voc3 gene Proteins 0.000 description 4
- 230000002093 peripheral effect Effects 0.000 description 3
- -1 VCHN is high Proteins 0.000 description 2
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
- H02H9/04—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
- H02H9/045—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage adapted to a particular application and not provided for elsewhere
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
- H02J7/0036—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits using connection detecting circuits
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0063—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with circuits adapted for supplying loads from the battery
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Abstract
本发明提供了一种提高抗尖峰电压能力的单晶圆电池保护电路及充放电电路。电池保护电路包括：基本保护电路、钳压电路、栅极衬底控制电路和充放电控制MOS管；充放电控制MOS管的源极或漏极的一端连接至电池，另一端连接至充电器或负载，栅极和衬底连接至栅极衬底控制电路；基本保护电路检测电池的充放电情况，向栅极衬底控制电路发送控制信号，使栅极衬底控制电路根据控制信号控制充放电控制MOS管的导通情况，从而对电池的充放电进行控制；钳压电路用于钳制栅极衬底控制电路的供电电压，防止栅极衬底控制电路、充放电控制MOS管损坏。本发明可使电池保护电路免受尖峰电压和直流高电压的破坏，延长充放电电路的使用寿命。The invention provides a single-wafer battery protection circuit and a charge and discharge circuit for improving the anti-spike voltage capability. The battery protection circuit comprises: a basic protection circuit, a clamping circuit, a gate substrate control circuit and a charge and discharge control MOS tube; one end of the source or the drain of the charge and discharge control MOS tube is connected to the battery, and the other end is connected to the charger or The load, the gate and the substrate are connected to the gate substrate control circuit; the basic protection circuit detects the charge and discharge condition of the battery, and sends a control signal to the gate substrate control circuit to cause the gate substrate control circuit to control the charge and discharge according to the control signal The conduction state of the MOS tube is controlled to control the charging and discharging of the battery; the clamping circuit is used to clamp the supply voltage of the gate substrate control circuit, and the gate substrate control circuit and the charge and discharge control MOS tube are prevented from being damaged. The invention can protect the battery protection circuit from the spike voltage and the DC high voltage, and prolong the service life of the charge and discharge circuit.
Description
Technical field
The present invention relates to battery charging and discharging technical field, espespecially a kind of single-wafer battery for improving anti-peak voltage ability is protected
Protection circuit and charge-discharge circuit.
Background technique
With being continuously increased for mobile terminal function in recent years, the performance of mobile terminal is also rapidly being promoted, this is to terminal
Battery also proposed bigger requirement.Some application batteries needs are made very small, and it is very low that some application batteries need to be made cost,
And traditional battery protection schemes usually account for that plate area is very big, and cost is very high, are increasingly not suitable with the new market demand.
Traditional battery protection schemes are reached by discrete device.It needs a control circuit chip and one includes
There are two the chips of N-type power MOS pipe.Control circuit chip is realized by controlling the grid voltage of the two power MOS pipes
To the charge and discharge control of battery.Control circuit chip is to be made into CMOS technology, and power MOS pipe chip usually uses one kind vertical
DMOS the or UMOS pipe of structure is made into.Since CMOS and DMOS/UMOS are two kinds of entirely different techniques, control circuit core
Piece and two power MOS pipe chips are two independent chips typically from two different suppliers.In addition this separation
The charge and discharge peripheral circuit of device solution needs two resistance and a capacitor.
In order to reduce the scheme area of above-mentioned discrete device battery protection and reduce scheme cost, in Chinese patent
In CN103474967A, our company proposes single-wafer battery protecting circuit and charge-discharge circuit.This single-wafer battery protection electricity
The control circuit chip of traditional scheme, two power MOS pipe chips and a peripheral resistance are all integrated into one and half by road
On conductor substrate, peripheral charge-discharge circuit only needs a resistance and a capacitor.The single-wafer battery protection schemes that our company proposes
Not only by control circuit chip on two power MOS pipe integrated chips a to semiconductor substrate, further, our company will be passed
Two power MOS pipe structures of system scheme are merged into a power MOS pipe to further reduce scheme area and reduce scheme cost.
Currently, in order to which circuit area is accomplished that minimum and cost is accomplished minimum, usually selects 5V CMOS technology real
It is existing.And 5V CMOS technology metal-oxide-semiconductor breakdown voltage is in 8V~12V.Since battery protecting circuit is in charge and discharge and production test
The up to peak voltage of 16V and DC high voltage may be generated in journey, protected with the single-wafer battery that 5V CMOS technology is made into
Protection circuit can be by peak voltage or DC high voltage breakdown to cause the damage of single-wafer battery protecting circuit.
A kind of intuitive solution is that the higher semiconductor technology of breakdown voltage is selected to increase single-wafer battery protection
The pressure voltage of circuit can bear 16V peak voltage and DC high voltage, it is done so that will increase the technique number of plies with
And semiconductor devices occupied area on chip is greatly increased, so that the cost for protecting circuit is gone up significantly.
In view of this, the present invention provides a kind of single-wafer battery protecting circuit for improving anti-peak voltage ability and charge and discharges
Circuit, to solve the problems, such as that above-mentioned single-wafer battery protecting circuit is damaged by DC high voltage and peak voltage.
Summary of the invention
The object of the present invention is to provide a kind of single-wafer battery protecting circuit for improving anti-peak voltage ability and charge and discharge
Circuit, in battery production test process and charge and discharge in use, single-wafer battery protecting circuit can be made from DC high voltage
With the damage of peak voltage, extend the service life of charge-discharge circuit and battery.
Technical solution provided by the invention is as follows:
The present invention provides a kind of single-wafer battery protecting circuits for improving anti-peak voltage ability, comprising: basic protection
Circuit, voltage clamping circuit, grid substrate control circuit and charge and discharge control metal-oxide-semiconductor；
One end of the source electrode and drain electrode of the charge and discharge control metal-oxide-semiconductor is connected to battery negative terminal, the charge and discharge control MOS
The other end of the source electrode and drain electrode of pipe is connected to the cathode of charger or load；The grid and lining of the charge and discharge control metal-oxide-semiconductor
Bottom is respectively connected to the grid substrate control circuit.
The charge status of the basic protection circuit detection battery sends control letter to the grid substrate control circuit
Number, so that the grid substrate control circuit is controlled the conducting situation of the charge and discharge control metal-oxide-semiconductor according to the control signal, from
And the charge and discharge of battery are controlled；
The voltage clamping circuit is used to clamp down on the supply voltage of grid substrate control circuit, prevents the grid substrate control electricity
Road, the damage of charge and discharge control metal-oxide-semiconductor.
Battery protecting circuit in this programme is related to very more semiconductor devices, in battery production test process and fills
Electric discharge may be damaged when using by peak voltage or DC high voltage.Such as the breakdown voltage of 5V CMOS technology metal-oxide-semiconductor 8V~
12V will damage metal-oxide-semiconductor if the peak voltage generated when production test procedure and charge and discharge use is more than this breakdown voltage
It is bad.General intuitive solution is to improve the pressure voltage of metal-oxide-semiconductor, so will increase the technique number of plies and increase metal-oxide-semiconductor exists
Area on chip improves the cost of chip.This programme is in order to guaranteeing that cost and chip area under the premise of protect device
It is not damaged by peak voltage or DC high voltage, joined voltage clamping circuit, in a certain range by voltage clamp, even if in life
Produce test process in and charge and discharge using when have peak voltage or DC high voltage, voltage clamp can also pacified by voltage clamping circuit
Full voltage range protects circuit not to be damaged.
In the production test procedure of battery protecting circuit, battery protection chip and resistance capacitance are made into battery first
Then battery protecting plate and battery core are concatenated together into the battery with defencive function by protection board.In the production of the battery
Such as protection board tester, comprehensive tester, the test equipments such as grading system can be often used in test process.Protection board tester
For detecting whether protection board is qualified, comprehensive tester is for detecting whether the battery with defencive function is qualified, and grading system is used for
Detect the amount of capacity of the battery with defencive function.These test equipments often generate the point for being up to 16V during the test
Peak voltage or DC high voltage, therefore, conventional batteries protection scheme are needed charge control metal-oxide-semiconductor Mc and control of discharge metal-oxide-semiconductor
The breakdown voltage of Md accomplishes 16V or more, to prevent stop-band defencive function battery in production test procedure by the peak voltage of 16V
Or DC high voltage breakdown.
Theoretically, single-wafer battery protecting circuit is needed the breakdown voltage of the source electrode and drain electrode of charge and discharge control metal-oxide-semiconductor
Accomplish 16V or more simultaneously, just can guarantee that the battery with defencive function is not devices under the height of generation in production test procedure
Peak voltage or DC high voltage up to 16V puncture.But the breakdown voltage of charge and discharge control metal-oxide-semiconductor is accomplished into 16V or more, at
This meeting is very high.
Using voltage clamping circuit of the invention, the pressure resistance of charge and discharge control metal-oxide-semiconductor only needs 12V, that is, tradition 5V CMOS work
The breakdown voltage of skill, can anti-stop-band defencive function battery in production test procedure and charge and discharge use when be not up to
The peak voltage or DC high voltage of 16V punctures.
Preferably, the grid substrate control circuit includes grid control section and substrate control section；The grid control
System part is connect with the grid of the charge and discharge control metal-oxide-semiconductor, the substrate control section and the charge and discharge control metal-oxide-semiconductor
Substrate connection；
The grid control section exports grid control response signal according to the control signal, and it is automatically controlled to control the charge and discharge
The grid voltage of metal-oxide-semiconductor processed, the substrate control section export substrate control response signal according to the control signal, control institute
The underlayer voltage of charge and discharge control metal-oxide-semiconductor is stated, to control the conducting situation of the charge and discharge control metal-oxide-semiconductor.
Preferably, the voltage clamping circuit includes divider resistance R5 and Zener；One end of the divider resistance R5 is connected to
The other end of supply voltage VDD, the divider resistance R5 are connected to the cathode of the Zener, the anode connection of the Zener
The end VSS.
This programme can well clamp down on the supply voltage of grid substrate control circuit according to the principle of stabilized voltage of Zener
Within the scope of safe voltage, grid substrate control circuit and charge and discharge control metal-oxide-semiconductor is protected not to be damaged.
Preferably, the voltage clamping circuit includes divider resistance R5 and N number of unidirectional concatenated diode, N >=1；
One end of the divider resistance R5 is connected to supply voltage VDD, and the other end of the divider resistance R5 is connected to institute
The anode of N number of unidirectional concatenated diode is stated, the negative terminal of N number of unidirectional concatenated diode is connected to the end VSS.
Preferably, the voltage clamping circuit includes divider resistance R5 and N number of concatenated NMOS tube, N >=1；
One end of the divider resistance R5 is connected to supply voltage VDD, and the other end of the divider resistance R5 passes through the N
A concatenated NMOS tube is connected to the end VSS.
Preferably, the voltage clamping circuit includes divider resistance R5 and N number of concatenated PMOS tube, N >=1；
One end of the divider resistance R5 is connected to supply voltage VDD, and the other end of the divider resistance R5 passes through the N
A concatenated PMOS tube is connected to the end VSS.
Preferably, the voltage clamping circuit includes low pressure difference linear voltage regulator.
Preferably, further includes: thermal-shutdown circuit, for detecting the integrated core of the battery protecting circuit institute in charge and discharge
The temperature of piece, and with the transmission for controlling signal described in the basic protection circuit co- controlling.
Preferably, the thermal-shutdown circuit includes excess temperature comparator and logic control element.
Thermal-shutdown circuit is capable of the temperature of chip where real-time detection battery protecting circuit in this programme, when temperature occurs
When abnormal, thermal-shutdown circuit can be transmitted across temperature control signal, disconnect charging and discharging circuit, play to battery protecting circuit
Protective effect.
Preferably, the basic protection circuit specifically includes:
Reference circuit, electric discharge overcurrent comparator, discharge short comparator, charging overcurrent comparator, over-discharge voltage comparator,
Overcharged voltage comparator, delay circuit, charge and discharge power detection circuit；The control signal includes first control signal VCHOC1,
Two control signal VOC2 and third control signal VOD2；
The reference circuit is used to generate the positive input signal VOC1 of the electric discharge overcurrent comparator；The discharge short ratio
Compared with the positive input signal VSHORT of device；The negative input signal VCHOC of the charging overcurrent comparator；The over-discharge voltage comparator
Negative input signal VODV；The positive input signal VOCV of the overcharged voltage comparator；And generate the excess temperature comparator
Positive input signal VPN and negative input signal VOTP.
The electric discharge size of the overcurrent comparator based on positive input signal VOC1 Yu negative input signal-virtual ground voltage VM1
Comparison result exports high level VDD or low level VGND；
The discharge short comparator is big based on positive input signal VSHORT and negative input signal-virtual ground voltage VM1's
Small comparison result exports high level VDD or low level VGND；
The charging overcurrent comparator is based on the big of positive input signal virtual ground voltage VM1 and negative input signal VCHOC
Small comparison result exports high level VDD or low level VGND；And it is controlled to grid substrate control circuit output described first
Signal VCHOC1；
Negative input letter of the overcharged voltage comparator based on positive input signal VOCV and vdd voltage after electric resistance partial pressure
The size comparison result of number VROCV exports high level VDD or low level VGND；
Positive input signal VRODV and negative input of the over-discharge voltage comparator based on vdd voltage after electric resistance partial pressure
The size comparison result of signal VODV exports high level VDD or low level VGND；
The output of output result, the discharge short comparator of the delay circuit based on the electric discharge overcurrent comparator
As a result, output result, the output result and the overdischarge of the overcharged voltage comparator of the charging overcurrent comparator
The output of comparator is pressed as a result, carrying out respective delay, respective delay length may be different, using logical process
Export the second control signal VOC2 and third control signal VOD2.
Preferably, in the basic protection circuit, the second control signal VOC2 and the third control signal
When VOD2 exports high level, grid substrate control circuit is controlled according to the second control signal VOC2 and the third
Signal VOD2 exports high-level gate voltage VGATE as grid control response signal；
When second control signal VOC2 and third control signal VOD2 at least one output low level VGND, grid lining
Bottom control circuit controls signal VOD2, output low level grid electricity according to the second control signal VOC2 and the third
Press VGATE as grid control response signal.
The present invention also provides a kind of battery chargers, including above-mentioned battery protecting circuit, charger, battery, RC
Filter circuit, in which:
One end of resistance R0 is connect with supply voltage vdd terminal in the RC filter circuit, and the other end of the resistance R0 is same
The anode connection of the battery；
One end of capacitor C0 is connect with the supply voltage vdd terminal in the RC filter circuit, and the capacitor C0's is another
It holds and is connected with the cathode of the battery；
The anode of the charger is connect in charging with the anode of the battery, provides charging voltage for the battery.
The present invention also provides a kind of battery discharging circuits, including above-mentioned battery protecting circuit, RC filter circuit, electricity
Pond, load, in which:
One end of resistance R0 is connect with supply voltage vdd terminal in the RC filter circuit, the other end of the resistance R0 with
The anode connection of the battery；
One end of capacitor C0 is connect with the supply voltage vdd terminal in the RC filter circuit, and the capacitor C0's is another
It holds and is connected with the cathode of the battery；
The anode of the battery is connect in electric discharge with the anode of the load, provides power supply for the load, described negative
The cathode of load is connect by charge and discharge control metal-oxide-semiconductor with the cathode of the battery.
A kind of single-wafer battery protecting circuit for improving anti-peak voltage ability provided through the invention and charge and discharge electricity
Road, can bring it is following at least one the utility model has the advantages that
In the present invention, using voltage clamping circuit, by the electricity between the end supply voltage GVDD and VSS of grid substrate control circuit
Pressing tongs system is within a preset range.It is resistance in production test procedure and when charge and discharge use to improve battery protecting circuit chip
Pressure, prevents the device failure in battery protecting circuit.
Detailed description of the invention
Below by clearly understandable mode, preferred embodiment is described with reference to the drawings, improves anti-peak voltage to a kind of
The single-wafer battery protecting circuit of ability and above-mentioned characteristic, technical characteristic, advantage and its implementation of charge-discharge circuit give
It further illustrates.
Fig. 1 is the charging and discharging circuit structure diagram of traditional discrete device battery protecting circuit；
Fig. 2 is the charging and discharging circuit structure diagram of existing single-wafer battery protecting circuit；
Fig. 3 is a kind of circuit diagram of grid substrate control circuit in existing single-wafer battery protection schemes technology；
Fig. 4 is a kind of single-wafer battery protecting circuit for improving anti-peak voltage ability of the present invention and charge-discharge circuit structure
Figure；
Fig. 5 is the structure chart of the basic protection circuit in Fig. 4；
Fig. 6 is the circuit diagram of thermal-shutdown circuit in Fig. 4；
Fig. 7 is a kind of circuit diagram of the grid substrate control circuit in Fig. 4；
Fig. 8 is another circuit diagram of the grid substrate control circuit in Fig. 4；
Fig. 9 is a kind of circuit diagram of the voltage clamping circuit in one embodiment of the invention；
Figure 10 is another circuit diagram of the voltage clamping circuit in one embodiment of the invention；
Figure 11 is another circuit diagram of the voltage clamping circuit in one embodiment of the invention；
Figure 12 is another circuit diagram of the voltage clamping circuit in one embodiment of the invention；
Figure 13 is another circuit diagram of the voltage clamping circuit in one embodiment of the invention.
Specific embodiment
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, Detailed description of the invention will be compareed below
A specific embodiment of the invention.It should be evident that drawings in the following description are only some embodiments of the invention, for
For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other
Attached drawing, and obtain other embodiments.
To make simplified form, part related to the present invention is only schematically shown in each figure, they are not represented
Its practical structures as product.In addition, there is identical structure or function in some figures so that simplified form is easy to understand
Component only symbolically depicts one of those, or has only marked one of those.Herein, "one" is not only indicated
" only this ", can also indicate the situation of " more than one ".
Fig. 1 is the charge-discharge circuit of traditional discrete device battery protection schemes.Control circuit A passes through two power of control
The grid voltage of metal-oxide-semiconductor (Mc and Md) realizes the charge and discharge control to battery.Control circuit A be made into CMOS technology, and
Power MOS pipe (Mc and Md) is usually made into a kind of DMOS or UMOS pipe of vertical structure.Since CMOS and DMOS/UMOS are two
The entirely different technique of kind, therefore control circuit A and two power MOS pipes (Mc and Md) are typically from two different supplies
Quotient, is two independent chips, and peripheral circuit needs two resistance R0 and Rvm and capacitor C0.
Fig. 2 is the internal frame diagram and charge-discharge circuit of battery protecting circuit in single-wafer battery protection schemes technology.Work as electricity
When pond protection circuit enters overcharged voltage protection, charging overcurrent protection or charging overheat protector, the charging of battery protecting circuit is logical
Road is closed, and the voltage of charger is provided by external charging circuit completely.Basic protection circuit inside battery protecting circuit, mistake
Temperature protection circuit, logic control element I12, logic control element I13 are battery power supplies, and without high voltage, circuit will not be high
Pressure is broken.But supply voltage of the grid substrate control circuit in charge protection is charger voltage, in production test procedure
And in charger access procedure, this voltage is likely to be breached the high pressure of 16V, then can damage the grid substrate control circuit,
Simultaneously it is also possible to that the charge and discharge control metal-oxide-semiconductor M0 can be damaged.Fig. 3 is that grid serves as a contrast in existing single-wafer battery protection schemes technology
The circuit diagram of bottom control circuit.Referring to shown in Fig. 3, the substrate control of grid control circuit and output VSUB including outputting VGA TE
Circuit processed, since the low level VSS voltage and VGND voltage of grid control circuit are not duplicate current potential, grid control electricity
Road input VOD voltage, VOC voltage, VCHOC1 voltage low potential be VGND voltage, need to be converted into VSS voltage.VOD electricity
Pressure, VOC voltage, VCHOC1 voltage require a level shifting circuit, say by taking the level shifting circuit of VOD voltage as an example below
It is bright.
Metal-oxide-semiconductor M7, M8, M9, M10, logic control element I6 complete the low transition of VOD voltage.When VOD voltage is height
When level VDD, for transistor M7 by, transistor M8 conducting, VODP voltage is high level VDD；When VOD voltage is low level VGND
When, transistor M7 conducting, transistor M8 are by VODP voltage is low level VSS, completes to turn from VGND level to VSS level
It changes.Similarly VOC voltage is converted into VOCP voltage, VCHOC1 voltage is converted into VCHOC1P voltage, VCHOC1N voltage.When VODP electricity
When pressure, VOCP voltage are all high level, the output of the end VGATE is high level VDD, is when having one in VODP voltage, VOCP voltage
When low level VSS, the output of the end VGATE is low level VSS.When VOCP be high level, VGOC is low level, VGOCB be high level,
The metal-oxide-semiconductor M1 conducting, metal-oxide-semiconductor M2 cut-off, output VSUB voltage are equal to VGND voltage；When VOCP be low level,
VGOC is high level, VGOCB is low level, metal-oxide-semiconductor M1 cut-off, metal-oxide-semiconductor M2 conducting, output VSUB electricity
Pressure is equal to VM voltage.VCHOC1 voltage be it is high when, VCHOC1P voltage be height, VCHOC1N voltage be it is low, the metal-oxide-semiconductor M19 is led
Logical, the described metal-oxide-semiconductor M20 cut-off, VSS voltage are equal to VGND voltage；VCHOC1 voltage be it is low when, VCHOC1P voltage be it is low,
VCHOC1N voltage is height, and the metal-oxide-semiconductor M19 cut-off, metal-oxide-semiconductor M20 conducting, VSS voltage are equal to VM voltage.
In being described above when VCHOC1 voltage is low level, VSS voltage is equal to VM voltage, then vdd voltage~VSS voltage
Between pressure difference between vdd voltage~VM voltage pressure difference, vdd voltage~VM electricity when production test procedure and charge and discharge use
Pressure may generate the up to peak voltage of 16V or DC voltage, and 5V CMOS technology metal-oxide-semiconductor breakdown voltage is in 8V~12V,
Lower than the peak voltage or DC voltage of generation, then existing grid substrate control circuit can be damaged or puncture.
Conclusion based on above-mentioned analysis, the present invention provide a kind of new battery protecting circuit.Fig. 4 is in one embodiment of the invention
Battery charge-discharge circuit structure chart.Fig. 5 is the structure chart of the basic protection circuit in Fig. 4.Fig. 6 is overheat protector in Fig. 4
The circuit diagram of circuit.Fig. 7, Fig. 8 are two kinds of circuit diagrams of the grid substrate control circuit in Fig. 4.As shown in Figure 7, Figure 8, grid
Substrate control circuit includes grid control section and substrate control section, the grid control section and the substrate control section
With common circuit.Referring to shown in Fig. 4 to Fig. 7, relative to the grid substrate control in the battery protecting circuit and Fig. 3 in Fig. 2
Circuit increases voltage clamping circuit and improves grid substrate control circuit.In Fig. 4, when battery protecting circuit enters overcharge
When pressure protection, charging overcurrent protection or charging overheat protector, the charging path of battery protecting circuit is closed, the voltage of charger
It is provided completely by external charging circuit.Referring to shown in Fig. 7, the positive power source terminal of improved grid substrate control circuit is pincers piezoelectricity
When output voltage GVDD, the battery protecting circuit on road enter overcharged voltage protection, charging overcurrent protection or charging overheat protector, bear
Power end VSS voltage is VM, and in addition to this negative power end VSS voltage is VGND.The supply voltage of grid substrate control circuit is
GVDD~VM or GVDD~VGND, the supply voltage are clamped, lower than the breakdown of all metal-oxide-semiconductors inside grid substrate control circuit
Voltage, grid substrate control circuit will not be damaged.
Referring to shown in Fig. 4, the battery protecting circuit in one embodiment of the invention includes: basic protection circuit, overheat protector
Circuit, voltage clamping circuit, grid substrate control circuit, the first logic control element I12, the second logic control element I13, charge and discharge
Control metal-oxide-semiconductor M0.One end of the source electrode and drain electrode of the charge and discharge control metal-oxide-semiconductor M0 is connected to the battery negative terminal, described to fill
The other end of the source electrode and drain electrode of control of discharge metal-oxide-semiconductor M0 is connected to the cathode of the charger or load；The charge and discharge is automatically controlled
The grid and substrate of metal-oxide-semiconductor M0 processed is respectively connected to the grid substrate control circuit；The basic protection circuit detects battery
Charge status, Xiang Suoshu grid substrate control circuit send control signal, make the grid substrate control circuit according to institute
The conducting situation that control signal controls the charge and discharge control metal-oxide-semiconductor M0 is stated, so that the charge and discharge to battery control；
Referring to Figure 5, the basic protection circuit in Fig. 4 includes: reference circuit, electric discharge overcurrent comparator, discharge short
Comparator, charging overcurrent comparator, over-discharge voltage comparator, overcharged voltage comparator, charging detecting circuit, delay circuit, electricity
Hinder R1, resistance R2, resistance R3, resistance R4, logic control element I0, logic control element I1, logic control element I2, logic control
Unit I3 and logic control element I4 processed.
Wherein, reference circuit is used to generate the positive input signal VOC1 of the electric discharge overcurrent comparator, the discharge short
The positive input signal VSHORT of comparator, the charging negative input signal VCHOC of overcurrent comparator, reference output voltage VPN,
The negative input letter of VOTP, the positive input signal VOCV of the overcharged voltage comparator and the generation over-discharge voltage comparator
Number VODV.
Electric discharge overcurrent comparator is based on positive input signal VOC1 compared with the size of negative input signal-virtual ground voltage VM1
As a result, VOC1 exports high level VDD when being greater than VM1, VOC1 exports low level VGND when being lower than VM1.
Size ratio of the discharge short comparator based on positive input signal VSHORT Yu negative input signal-virtual ground voltage VM1
Compared with as a result, VSHORT exports high level VDD when being greater than VM1, VSHORT exports low level VGND when being lower than VM1.
Charge size ratio of the overcurrent comparator based on positive input signal virtual ground voltage VM1 Yu negative input signal VCHOC
Compared with as a result, VM1 exports high level VDD when being greater than VCHOC, VM1 exports low level VGND when being lower than VCHOC.
Negative input letter of the overcharged voltage comparator based on positive input signal VOCV and vdd voltage after electric resistance partial pressure
The size comparison result of number VROCV exports high level VDD or low level VGND.
Positive input signal VRODV and negative input of the over-discharge voltage comparator based on vdd voltage after electric resistance partial pressure
The size comparison result of signal VODV exports high level VDD or low level VGND.
Size comparison result of the charge and discharge power detection circuit based on positive input VGND Yu negative input signal VM1 exports high level
VDD or low level VGND.VGND exports high level VDD when being greater than VM1, VGND exports low level VGND when being lower than VM1.
Delay circuit is used for the output signal VOC1P of overcurrent comparator that discharges, the output signal of discharge short comparator
VSHORTP, the output signal VCHOC1 of overcurrent comparator that charges, output signal VODVP, the overcharged voltage of over-discharge voltage comparator
The output signal VOCVP of comparator is delayed, corresponding output VDOC1, VDSHORT, VDCHOC, VDODV, VDOCV after delay.
VDOC1 is signal of the VOC1P by delay, and VDSHORT is that signal, VDCHOC of the VSHORTP by delay are that VCHOC1 passes through
Signal, the VDODV of delay are that the signal, VDOCV of VODVP into delay excessively are signal of the VOCVP by delay.
When VDOC1, VDSHORT, VDODV, all for it is high when, VOD3 output be high level VDD, VDOC1, VDSHORT,
VDODV, at least one for it is low when, VOD3 output be low level VGND.
When VDCHOC, VDOCV are high, VOC3 output is high level VDD.At least one in VDCHOC, VDOCV is low
When, VOC3 output is low level VGND.
When at least one in VOD3, VCHP is high, VOD2 output is high level VDD, when being all low in VOD3, VCHP
When, VOD2 output is low level VGND.
When at least one in VOC3, VCHN is high, VOC2 output is high level VDD, when being all low in VOC3, VCHN
When, VOC2 output is low level VGND.
Fig. 6 is thermal-shutdown circuit, including excess temperature comparator, the first logic control I14, the second logic control element I15,
Third logic control element I16.
Size comparison result of the excess temperature comparator based on positive input signal VPN Yu negative input signal VOTP, VPN are greater than VOTP
When output high level, VPN be less than VOTP when export low level.
When at least one in VOTPP, VCHN1 is high, VCHOTP output is high level VDD, when VOTPP, VCHN1 are
When low, VCHOTP output is low.
When at least one in VOTPP, VCHP is high, VDISOTP output is high level VDD, when VOTPP, VCHP are
When low, VDISOTP output is low.
Fig. 7 is a kind of circuit diagram of grid substrate control circuit.Relatively original grid substrate control circuit increases
Resistance R11, R12, R13, R14, R15, R16 and metal-oxide-semiconductor M21, M22, M23, M24, M25, M26.Below with R11, R12,
M21, M22 illustrate the effect that resistance and metal-oxide-semiconductor is added: due to increasing voltage clamping circuit, the positive supply of grid substrate control circuit
Voltage be voltage clamping circuit output current potential GVDD, and input voltage VOD may be high level VDD or low level VGND, GVDD~
The voltage of VDD, GVDD~VGND can exceed that the gate breakdown voltage of metal-oxide-semiconductor M7, M8 to damage metal-oxide-semiconductor M7, M8, are added
The maximum voltage of GATE to the GVDD of M7, M8 are the diode voltage of M21, M22 parasitism, the parasitism after R11, M21, R12, M22
Diode voltage will not damage metal-oxide-semiconductor.Similarly: R13, R14, M23, M24 protect M11, M12 not damaged；R15,R16,M25,
M26 protects M15, M16 not damaged.
Fig. 8 is to substitute M21, M22, M23, M24, M25, M26 in Fig. 7 with diode, realizes above-mentioned same function.
Fig. 9 is the structure chart of the voltage clamping circuit in one embodiment of the invention.Including a concatenated divider resistance R5 and Zener
Pipe Z0；The connecting pin of the divider resistance R5 and Zener Z0 is output end GVDD, and another connection of the divider resistance R5 supplies
The other end of piezoelectric voltage VDD, the Zener connect the end VSS.
Principle of the voltage clamp between GVDD and VSS in a preset range can be by foregoing circuit: Zener
PN junction resistance in reverse breakdown state is extremely low, thus in Zener conducting, GVDD~VSS voltage is equal to the breakdown of Zener
Voltage；When Zener is not turned on, GVDD is no better than VDD.
When the voltage of VDD~VSS is lower than the conducting voltage of Zener, GVDD is equal to VDD；When the voltage of VDD~VSS is higher than
When the conducting voltage of Zener, GVDD~VSS maximum output voltage is Zener tube voltage.General IC interior Zener
Conducting voltage is 5.5~6.5V, if the voltage of VDD~VSS continues to increase, electric conduction of the Zener voltage stabilization in Zener
Pressure, remaining voltage are all dropped on resistance R5, be will not have a problem for tens volts of pressure drop on resistance R5；Therefore the pressure resistance of VDD~VSS
Up to tens volts will not all damage voltage clamping circuit.
The supply voltage of grid substrate control circuit is the voltage of GVDD~VSS, and maximum value is the conducting voltage of Zener.
Lower than breakdown voltage 8V~12V of metal-oxide-semiconductor, therefore grid substrate control circuit will not be damaged.
Figure 10 is the structure chart of the voltage clamping circuit in another embodiment of the present invention.
Referring to Fig.1 shown in 0, the voltage clamping circuit includes divider resistance R5 and N number of unidirectional concatenated diode, N >=1；Institute
The one end for stating divider resistance R5 is connected to supply voltage VDD, and the other end of the divider resistance R5 is connected to N number of unidirectional string
The negative terminal of the anode of the diode of connection, N number of unidirectional concatenated diode is connected to the end VSS.
As can be seen that difference is compared with Fig. 9: Zener is replaced with N number of end the supply voltage GVDD to described
The series diode of the end VSS one-way conduction, N >=1.
The principle of voltage clamp between GVDD and VSS within a preset range can be by multiple Diode series: utilize
The gradual characteristic of diode forward conducting voltage, in diode current flow, GVDD~VSS voltage is equal to the electric conduction of multiple diodes
The sum of pressure；When diode is not turned on, GVDD is no better than VDD.
Figure 11 and Figure 12 is the structure chart of the voltage clamping circuit in yet another embodiment of the invention.
Referring to Fig.1 shown in 1,12, the voltage clamping circuit includes divider resistance R5 and N number of concatenated NMOS tube, N >=1；It is described
One end of divider resistance R5 is connected to supply voltage VDD, and the other end of the divider resistance R5 passes through N number of concatenated NMOS
Pipe is connected to the end VSS.Alternatively, the voltage clamping circuit includes divider resistance R5 and N number of concatenated PMOS tube, N >=1；The partial pressure
One end of resistance R5 is connected to supply voltage VDD, and the other end of the divider resistance R5 is connected by N number of concatenated PMOS tube
It is connected to the end VSS.
As can be seen that difference is compared with Fig. 9: Zener is replaced with N number of concatenated NMOS tube or N number of concatenated
PMOS tube, N >=1.
The principle of voltage clamp between GVDD and VSS within a preset range is by multiple NMOS tandem energies: NMOS's
Drain terminal and grid are shorted together, and NMOS is equivalent to a diode, and forward conduction voltage is the threshold voltage vt hn of NMOS.Cause
, when NMOS is connected, GVDD voltage is equal to the sum of the threshold voltage of multiple NMOS for this；When NMOS is not turned on, GVDD is no better than
VDD。
Multiple PMOS tandem energies go here and there the principle of the voltage clamp between GVDD and VSS within a preset range with multiple NMOS
Connection clamps down on the principle of voltage clamp within a preset range between GVDD and VSS.
Figure 13 is the structure chart of the voltage clamping circuit in further embodiment of this invention.
Referring to Fig.1 shown in 3, the voltage clamping circuit includes low pressure difference linear voltage regulator.As can be seen that compared with Fig. 9, difference
Be: voltage clamping circuit is low pressure difference linear voltage regulator.
The principle of voltage clamp between GVDD and VSS within a preset range can be by low pressure difference linear voltage regulator LDO:
When VDD~VSS voltage is lower, VDD~VSS voltage carries out partial pressure output lower voltage VG3, VG3 by resistance R6, resistance R7
Lower than the gate turn-on voltage of NMOS tube M3, NMOS tube M3 is closed, and VD3 is height, and after logic control element I5, VEN0 is
Low, metal-oxide-semiconductor M6 cut-off, metal-oxide-semiconductor M5 conducting, output GVDD voltage is equal to vdd voltage.When VDD~VSS voltage is higher, VDD~
VSS voltage carries out the grid of partial pressure output high voltage VG3, VG3 higher than NMOS tube M3 by resistance R6, resistance R7 and opens electricity
Pressure, NMOS tube M3 open, VD3 be it is low, after logic control element I5, VEN0 be height, metal-oxide-semiconductor M6 conducting, metal-oxide-semiconductor M5 cut
Only, since the positive input voltage reference voltage of amplifier is equal to the cathode input voltage VR10 of amplifier, while VR10 voltage
It divides to obtain by resistance R9, resistance R10 for GVDD, then output voltage: GVDD=reference voltage * (R9+R10)/R10.
It should be noted that above-described embodiment can be freely combined as needed.The above is only of the invention preferred
Embodiment, it is noted that for those skilled in the art, in the premise for not departing from the principle of the invention
Under, several improvements and modifications can also be made, these modifications and embellishments should also be considered as the scope of protection of the present invention.
Claims (12)
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| Application Number | Priority Date | Filing Date | Title |
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| CN2018113105851 | 2018-11-06 |
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| CN201822104395.6U Active CN209250230U (en) | 2018-11-06 | 2018-12-14 | Improve the single-wafer battery protecting circuit and charge-discharge circuit of anti-peak voltage ability |
| CN201811536650.2A Pending CN109449891A (en) | 2018-11-06 | 2018-12-14 | Improve the single-wafer battery protecting circuit and charge-discharge circuit of anti-peak voltage ability |
| CN201921875670.2U Active CN212572076U (en) | 2018-11-06 | 2019-11-01 | Single-wafer battery protection circuit, battery charging and discharging circuit and portable electronic equipment |
| CN201911060468.9A Withdrawn CN110854831A (en) | 2018-11-06 | 2019-11-01 | Single-wafer battery protection circuit, battery charging and discharging circuit and portable electronic equipment |
| CN201911061330.0A Pending CN110854832A (en) | 2018-11-06 | 2019-11-01 | Single-wafer battery protection circuit, battery charging and discharging circuit and portable electronic equipment |
| CN201921874738.5U Active CN212572075U (en) | 2018-11-06 | 2019-11-01 | Single-wafer battery protection circuit, battery charging and discharging circuit and portable electronic equipment |
| CN201921874739.XU Active CN212543359U (en) | 2018-11-06 | 2019-11-01 | Single-wafer battery protection circuit, battery charging and discharging circuit and portable electronic equipment |
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| CN201911060468.9A Withdrawn CN110854831A (en) | 2018-11-06 | 2019-11-01 | Single-wafer battery protection circuit, battery charging and discharging circuit and portable electronic equipment |
| CN201911061330.0A Pending CN110854832A (en) | 2018-11-06 | 2019-11-01 | Single-wafer battery protection circuit, battery charging and discharging circuit and portable electronic equipment |
| CN201921874738.5U Active CN212572075U (en) | 2018-11-06 | 2019-11-01 | Single-wafer battery protection circuit, battery charging and discharging circuit and portable electronic equipment |
| CN201921874739.XU Active CN212543359U (en) | 2018-11-06 | 2019-11-01 | Single-wafer battery protection circuit, battery charging and discharging circuit and portable electronic equipment |
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| CN110445099A (en) * | 2019-08-06 | 2019-11-12 | 苏州赛芯电子科技有限公司 | A kind of semiconductor structure and its manufacturing process of integrated battery protection circuit |
| CN111817407A (en) * | 2020-09-09 | 2020-10-23 | 苏州赛芯电子科技有限公司 | Lithium battery driving protection circuit, protection control circuit and protection device |
| CN112039172A (en) * | 2020-11-03 | 2020-12-04 | 苏州赛芯电子科技股份有限公司 | Grid substrate control circuit, lithium battery and protection device for protection chip of lithium battery |
| CN112769113A (en) * | 2020-12-22 | 2021-05-07 | 深圳市创芯微微电子有限公司 | Battery protection chip and protection circuit thereof |
| WO2022057548A1 (en) * | 2020-09-21 | 2022-03-24 | 深圳市创芯微微电子有限公司 | Battery protection circuit |
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Also Published As
| Publication number | Publication date |
|---|---|
| CN212543359U (en) | 2021-02-12 |
| CN110854832A (en) | 2020-02-28 |
| CN212572076U (en) | 2021-02-19 |
| CN212572075U (en) | 2021-02-19 |
| CN209250230U (en) | 2019-08-13 |
| CN110854831A (en) | 2020-02-28 |
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Address after: 33c, modern media Plaza, 265 Suzhou Avenue East, Suzhou Industrial Park, Suzhou area, China (Jiangsu) pilot Free Trade Zone, Suzhou, Jiangsu 215128 Applicant after: Suzhou Saixin Electronic Technology Co.,Ltd. Address before: 215021 unit 4b6, international science and Technology Park, 1355 Jinjihu Avenue, Suzhou Industrial Park, Suzhou City, Jiangsu Province Applicant before: Suzhou Saixin Electronic Technology Co.,Ltd. |
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