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CN109417288B - Power supply cut-off device - Google Patents

Power supply cut-off device Download PDF

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Publication number
CN109417288B
CN109417288B CN201680087226.7A CN201680087226A CN109417288B CN 109417288 B CN109417288 B CN 109417288B CN 201680087226 A CN201680087226 A CN 201680087226A CN 109417288 B CN109417288 B CN 109417288B
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China
Prior art keywords
switch
detector
circuit
power supply
control device
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CN201680087226.7A
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CN109417288A (en
Inventor
宇田寿人
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/20Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for electronic equipment

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Emergency Protection Circuit Devices (AREA)
  • Protection Of Static Devices (AREA)
  • Keying Circuit Devices (AREA)

Abstract

The power supply cutoff device cuts off power supplied from the power supply to the circuit. The power cut-off device includes a switching circuit, a 1 st detector, a 2 nd detector, and a control device. The switch circuit branches from between a fuse connected to a power supply and the circuit, and a 1 st switch and a 2 nd switch are connected in series. The 1 st detector detects an operation state of the 1 st switch. The 2 nd detector detects the operating state of the 2 nd switch. The control device executes the 1 st operation mode and the 2 nd operation mode. In the 1 st operation mode, the control device acquires the detection value of the 1 st detector or the detection value of the 2 nd detector while alternately turning on or off the 1 st switch and the 2 nd switch, and determines the state of the switching circuit. In the 2 nd operation mode, the control device turns on both the 1 st switch and the 2 nd switch.

Description

Power supply cut-off device
Technical Field
The present invention relates to a power supply shutoff device that shuts off power supplied from a power supply to a circuit.
Background
There is a circuit that operates upon receiving power supply from a power source. There is known a power supply shutoff device that shuts off power supplied from a power supply to a circuit when the circuit fails.
Patent document 1: japanese patent laid-open publication No. 2012-101302
Disclosure of Invention
During the operation of the circuit, there is a request for detecting the state of the power shutoff device in order to confirm whether the power shutoff device is operating normally. Patent document 1 describes a technique for reliably realizing a fail safe of an electric circuit for an electric power tool and the electric power tool. However, in the technique of patent document 1, it is not possible to confirm that the braking switching element and the driving switching element are functioning normally in a state where the motor is driven, and therefore it is not possible to detect that the driving switching element is malfunctioning during the driving of the motor.
The present invention is directed to detecting the state of a unit that cuts off a power supply while a circuit is operating by supplying power from the power supply to the circuit.
The power supply shutoff device according to the present invention shuts off power supplied from a power supply to a circuit. The power cut-off device includes a switching circuit, a 1 st detector, a 2 nd detector, and a control device. The switch circuit branches from between a fuse connected to a power supply and the circuit, and a 1 st switch and a 2 nd switch are connected in series. The 1 st detector detects an operation state of the 1 st switch. The 2 nd detector detects the operating state of the 2 nd switch. The control device executes the 1 st operation mode and the 2 nd operation mode. In the 1 st operation mode, the control device acquires the detection value of the 1 st detector or the detection value of the 2 nd detector while alternately turning on or off the 1 st switch and the 2 nd switch, and determines the state of the switching circuit. In the 2 nd operation mode, the control device turns on both the 1 st switch and the 2 nd switch.
ADVANTAGEOUS EFFECTS OF INVENTION
The invention achieves the following effects: when power is supplied from a power supply to a circuit and the circuit is operating, the state of a unit that shuts off the power supply can be detected.
Drawings
Fig. 1 is a diagram showing a power shutoff device according to embodiment 1.
Fig. 2 is a diagram showing a relationship between the state and the detection value of the 1 st switch and the 2 nd switch according to embodiment 1.
Fig. 3 is a timing chart of an operation signal applied to the 1 st switch and an operation signal applied to the 2 nd switch in embodiment 1.
Fig. 4 is a diagram showing functional blocks of a control device included in the power shutoff device according to embodiment 1.
Fig. 5 is a diagram showing a hardware configuration of the control device according to embodiment 1.
Fig. 6 is a diagram showing a hardware configuration of the control device according to embodiment 1.
Fig. 7 is a flowchart of a power shutoff method executed by the power shutoff device according to embodiment 1.
Fig. 8 is a diagram showing the 1 st detector and the 2 nd detector according to a modification of embodiment 1.
Fig. 9 is a diagram showing a power shutoff device according to embodiment 2.
Fig. 10 is a diagram showing a relationship between the state and the detection value of the 1 st switch and the 2 nd switch according to embodiment 2.
Fig. 11 is a timing chart of an operation signal applied to the 1 st switch and an operation signal applied to the 2 nd switch in embodiment 2.
Detailed Description
Hereinafter, a power shutoff device according to an embodiment of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the embodiments.
Embodiment 1.
Fig. 1 is a diagram showing a power shutoff device 1 according to embodiment 1. The power shutoff device 1 is incorporated in a device control device 10 that controls a device 20. The device control apparatus 10 has a drive circuit 11 and a circuit 12. The drive circuit 11 is a circuit for driving an actuator 21 such as a motor, an air cylinder, and a solenoid included in the device 20. The circuit 12 generates a control signal for operating the actuator 21 and supplies the control signal to the drive circuit 11. The drive circuit 11 generates a drive signal for driving the actuator 21 based on the control signal received from the circuit 12, and supplies the drive signal to the actuator 21. The device 20 is operated by driving the actuator 21. The equipment 20 is a robot, a work machine, a conveying device, and an air conditioner, but is not limited thereto.
Power is supplied to the circuit 12 from the power supply 13. The power supply shutoff device 1 is a device that shuts off power supplied from the power supply 13 to the circuit 12. The power shutoff device 1 operates when an abnormality occurs in the circuit 12, and shuts off power supplied to the circuit 12. A fuse 14 is provided between the power supply 13 and the circuit 12. That is, the fuse 14 is electrically connected to the power supply 13 and the circuit 12. The power supply cutoff device 1 cuts off power supplied from the power supply 13 to the circuit 12 by blowing the fuse 14. Hereinafter, unless otherwise specified, connection means electrical connection.
The power shutoff device 1 includes a switching circuit 2, a 1 st detector 3F, a 2 nd detector 3S, and a control device 4. The switch circuit 2 includes a 1 st switch 2F and a 2 nd switch 2S. One end of the switch circuit 2 is connected between the fuse 14 and the circuit 12, and the other end is connected to ground. In detail, the 1 st terminal Tf of the 1 st switch 2F is connected between the fuse 14 and the circuit 12. The 2 nd terminal Ts of the 1 st switch 2F is connected to the 1 st terminal Tf of the 2 nd switch 2S. The 2 nd terminal Ts of the 2 nd switch 2S is connected to ground. In this way, the 1 st switch 2F and the 2 nd switch 2S are branched from between the fuse 14 and the circuit 12 and connected in series. The 1 st switch 2F and the 2 nd switch 2S are exemplified by switching elements, but are not limited thereto.
The 1 st detector 3F detects the operating state of the 1 st switch 2F. The 2 nd detector 3S detects an operation state of the 2 nd switch 2S. The 1 st detector 3F and the 2 nd detector 3S have the same structure. In embodiment 1, the 1 st detector 3F and the 2 nd detector 3S are photo couplers each formed by combining the light emitting diode 5 and the phototransistor 6, but are not limited to photo couplers as long as the operation states of the 1 st switch 2F and the 2 nd switch 2S can be detected.
The 1 st detector 3F and the 2 nd detector 3S have input terminals 5I and 6I and output terminals 5E and 6E. The input terminal 5I is a terminal on the anode side of the light emitting diode 5, and the input terminal 6I is a terminal on the collector side of the phototransistor 6. The output terminal 5E is a terminal on the cathode side of the light emitting diode 5, and the output terminal 6E is a terminal on the emitter side of the phototransistor 6.
The input terminal 5I of the 1 st detector 3F is connected between the fuse 14 and the circuit 12, specifically, between the circuit 12 and a portion branching to the switch circuit 2. The output terminal 5E of the 1 st detector 3F and the input terminal 5I of the 2 nd detector 3S are connected via a resistor R1. The resistor R1 is connected between the 2 nd terminal Ts of the 1 st switch 2F and the 1 st terminal Tf of the 2 nd switch 2S and the input terminal 5I of the 2 nd detector 3S. The output terminal 5E of the 2 nd detector 3S is connected between the 2 nd terminal Ts of the 2 nd switch 2S and the ground via a resistor R2.
The input terminal 6I of the 1 st detector 3F is connected to the power supply 7 via a resistor R3. The output terminal 6E of the 1 st detector 3F is connected to ground. The input terminal 6I of the 2 nd detector 3S is connected to the power supply 7 via a resistor R4. The output terminal 6E of the 2 nd detector 3S is connected to ground. The power supply 7 is a power supply for driving the power shutoff device 1. The power supply 7 may be a power supply different from the power supply 13, or may be a power supply in which the voltage of the power supply 13 is reduced.
The signal line SL1 is connected between the input terminal 6I of the 1 st detector 3F and the power supply 7, specifically, between the input terminal 6I and the resistor R3. The signal line SL1 is connected to the control device 4. The signal line SL2 is connected between the input terminal 6I of the 2 nd detector 3S and the power supply 7, specifically, between the input terminal 6I and the resistor R4. The signal line SL2 is connected to the control device 4. With the above configuration, the control device 4 obtains the potential of the input terminal 6I of the 1 st detector 3F and the potential of the input terminal 6I of the 2 nd detector 3S.
When the light emitting diode 5 is not emitting light, the 1 st detector 3F and the 2 nd detector 3S are turned off. In this case, the potential of the input terminal 6I of the 1 st detector 3F and the potential of the input terminal 6I of the 2 nd detector 3S are values obtained by stepping down the voltage of the power supply 7 by the resistors R3 and R4. Hereinafter, the potential of the input terminal 6I when the 1 st detector 3F and the 2 nd detector 3S are off is appropriately referred to as an H level.
When the light emitting diode 5 emits light, the 1 st detector 3F and the 2 nd detector 3S are turned on. In this case, the potential of the input terminal 6I of the 1 st detector 3F and the potential of the input terminal 6I of the 2 nd detector 3S become the potential of the ground. Hereinafter, the potential of the input terminal 6I when the 1 st detector 3F and the 2 nd detector 3S are on is appropriately referred to as L level.
When the 1 st switch 2F is turned on, a current flows from the power supply 13 through the fuse 14, the 1 st switch 2F, the 2 nd detector 3S, the resistor R2, and the ground in this order. Thus, the light emitting diode 5 of the 2 nd detector 3S emits light, and the phototransistor 6 is turned on, so that the potential of the input terminal 6I of the 2 nd detector 3S becomes L level. In this case, since the light emitting diode 5 of the 1 st detector 3F does not emit light, the phototransistor 6 is turned off, and as a result, the potential of the input terminal 6I of the 1 st detector 3F becomes H level. If the 1 st switch 2F is turned off, the potential of the input terminal 6I of the 1 st detector 3F becomes L level.
When the 2 nd switch 2S is turned on, a current flows from the power supply 13 through the fuse 14, the 1 st detector 3F, the resistor R1, the 2 nd switch 2S, and the ground in this order. Thus, the light emitting diode 5 of the 1 st detector 3F emits light, and the phototransistor 6 is turned on, so that the potential of the input terminal 6I of the 1 st detector 3F becomes L level. In this case, since the light emitting diode 5 of the 2 nd detector 3S does not emit light, the phototransistor 6 is turned off, and as a result, the potential of the input terminal 6I of the 2 nd detector 3S becomes H level. If the 2 nd switch 2S is turned off, the potential of the input terminal 6I of the 2 nd detector 3S becomes L level.
If the 1 st switch 2F is turned on, the potential of the input terminal 6I of the 1 st detector 3F becomes H level, and if the 1 st switch 2F is turned off, the potential of the input terminal 6I of the 1 st detector 3F becomes L level. If the 2 nd switch 2S is turned on, the potential of the input terminal 6I of the 2 nd detector 3S becomes H level, and if the 2 nd switch 2S is turned off, the potential of the input terminal 6I of the 2 nd detector 3S becomes L level. In this way, the 1 st detector 3F detects on and off of the 1 st switch 2F, and the 2 nd detector 3S detects on and off of the 2 nd switch 2S.
If the potential of the input terminal 6I of the 1 st detector 3F is SI1 and the potential of the input terminal 6I of the 2 nd detector 3S is SI2, the potential SI1 is the result of the 1 st detector 3F detecting the state of the 1 st switch 2F and the potential SI2 is the result of the 2 nd detector 3S detecting the state of the 2 nd switch 2S. Hereinafter, the potential SI1 is referred to as a detected value SI1, and the potential SI2 is referred to as a detected value SI 2. In embodiment 1, both the detection values SI1 and SI2 are H level or L level.
Fig. 2 is a diagram showing the relationship between the states of the 1 st switch 2F and the 2 nd switch 2S according to embodiment 1 and the detection values SI1 and SI 2. As shown in fig. 2, whether the 1 st switch 2F and the 2 nd switch 2S are on or off is determined according to whether the detection values SI1 and SI2 are at the H level or the L level. The control device 4 determines the state of the switch circuit 2, specifically, whether the 1 st switch 2F and the 2 nd switch 2S are on or off, based on the detection value SI1 of the 1 st detector 3F and the detection value SI2 of the 2 nd detector 3S.
The control device 4 operates the 1 st switch 2F and the 2 nd switch 2S. Specifically, the control device 4 applies the operation signal SE1 to the 1 st switch 2F and the operation signal SE2 to the 2 nd switch 2S, thereby turning on the 1 st switch 2F and the 2 nd switch 2S. If the operation signal SE1 and the operation signal SE2 are not transmitted from the control device 4, the 1 st switch 2F and the 2 nd switch 2S are turned off. The control device 4 can independently operate the 1 st switch 2F and the 2 nd switch 2S.
The control device 4 executes the 1 st operation mode and the 2 nd operation mode. The 1 st operation mode is to obtain the detection value SI1 of the 1 st detector 3F or the detection value SI2 of the 2 nd detector 3S while alternately turning on and off the 1 st switch 2F and the 2 nd switch 2S, and to determine the state of the switch circuit 2. In the 2 nd operation mode, both the 1 st switch 2F and the 2 nd switch 2S are turned on.
The 1 st operation mode is for confirming the operation of the switch circuit 2. The 2 nd operation mode is for cutting off the power supplied from the power supply 13 to the circuit 12 by cutting off the connection between the power supply 13 and the circuit 12. In the 1 st operation mode, the control device 4 turns off the 2 nd switch 2S at the timing (timing) of turning on the 1 st switch 2F. The control device 4 turns on the 2 nd switch 2S at the timing when the 1 st switch 2F is turned off.
When the 1 st switch 2F is turned on and the 2 nd switch 2S is turned off, as shown in fig. 2, if the detection value SI1 is at the H level and the detection value SI2 is at the L level, the 1 st switch 2F and the 2 nd switch 2S operate normally. When the 1 st switch 2F is turned off and the 2 nd switch 2S is turned on, as shown in fig. 2, if the detection value SI1 is at the L level and the detection value SI2 is at the H level, the 1 st switch 2F and the 2 nd switch 2S operate normally.
In the 1 st operation mode, the controller 4 is set to a state in which the operation signal SE1 is applied to the 1 st switch 2F and the operation signal SE1 is not applied to the 2 nd switch 2S, and acquires the detection value SI1 from the 1 st detector 3F and the detection value SI2 from the 2 nd detector 3S. As shown in fig. 2, if the detection value SI1 of the 1 st detector 3F is at the H level and the detection value SI2 of the 2 nd detector 3S is at the L level, the 1 st switch 2F and the 2 nd switch 2S operate normally.
Next, the controller 4 obtains the detection value SI1 from the 1 st detector 3F and the detection value SI2 from the 2 nd detector 3S in a state where the operation signal SE2 is applied to the 2 nd switch 2S and the operation signal SE2 is not applied to the 1 st switch 2F. As shown in fig. 2, if the detection value SI1 of the 1 st detector 3F is at the L level and the detection value SI2 of the 2 nd detector 3S is at the H level, the 1 st switch 2F and the 2 nd switch 2S operate normally.
The control device 4 acquires the detection value SI1 of the 1 st detector 3F and the detection value SI2 of the 2 nd detector 3S while alternately turning on and off the 1 st switch 2F and the 2 nd switch 2S. That is, the control device 4 turns off the 2 nd switch 2S when the 1 st switch 2F is on, and turns on the 2 nd switch 2S when the 1 st switch 2F is off. In this way, in the 1 st operation mode, the control device 4 exclusively turns on or off the 1 st switch 2F and the 2 nd switch 2S. The control device 4 determines the state of the switch circuit 2, specifically, whether the 1 st switch 2F and the 2 nd switch 2S are normal or abnormal, based on the values of the detection values SI1 and SI 2.
Even if the 1 st switch 2F is turned on, if the 2 nd switch 2S is turned off, the current from the power supply 13 flows through the circuit 12 through the fuse 14. Similarly, even if the 2 nd switch 2S is turned on, if the 1 st switch 2F is turned off, a current from the power supply 13 flows through the circuit 12 through the fuse 14. Therefore, the control device 4 can determine the state of the switch circuit 2 without interrupting the supply of the electric power from the power supply 13 to the circuit 12, and thus can determine the state of the switch circuit 2 while operating the circuit 12. In this way, the control device 4 can detect a state in which a large current is not caused to flow through the fuse 14 and the fuse 14 is not blown in a state in which power is supplied from the power supply 13 to the circuit 12. That is, the power shutoff device 1 can reduce the possibility of the entire equipment control device 10 failing due to the failure of the switching circuit 2.
In embodiment 1, the control device 4 outputs the determination result RJ of the state of the switching circuit 2 during execution of the 1 st operation mode. The determination result RJ indicates the state of the switch circuit 2, and more specifically, whether the 1 st switch 2F and the 2 nd switch 2S are normal or at least one of the 1 st switch 2F and the 2 nd switch 2S is abnormal. In the former case, the switch circuit 2 is normal, and in the latter case, the switch circuit 2 is abnormal. The control device 4 may output 0 or Low as the determination result RJ when the switch circuit 2 is normal, and output 1 or High as the determination result RJ when the switch circuit 2 is abnormal.
The determination result RJ is not limited to the above. The determination result RJ may be information for notifying whether the switch circuit 2 is normal or abnormal. In this case, the control device 4 can output the determination result RJ to the display device 22 so as to display whether the switching circuit 2 is normal or abnormal. When the display device 22 displays a case where the switching circuit 2 is abnormal, the operator of the device 20 can stop the device 20 or continue the operation of the device 20 while limiting the function.
The determination result RJ may be a command to stop the operation of the circuit 12 or a command to continue the operation of the circuit 12. In this case, when determining that the switching circuit 2 is abnormal, the control device 4 can output a command to stop the operation of the circuit 12 to the circuit 12 as the determination result RJ, and stop the circuit 12. When an abnormality occurs in the switching circuit 2, there is a possibility that the supply of electric power from the power supply 13 to the circuit 12 cannot be cut off when the abnormality occurs in the switching circuit 2. When an abnormality occurs in the circuit 12, the control device 4 outputs a command to stop the circuit 12 to the circuit 12 as the determination result RJ, thereby avoiding a situation in which the operation of the circuit 12 is continued in a state in which there is a possibility that the supply of electric power from the power supply 13 to the circuit 12 cannot be interrupted.
In the 2 nd operation mode, the control device 4 turns on both the 1 st switch 2F and the 2 nd switch 2S. Thus, since the current flows from the power source 13 to the ground through the fuse 14, the 1 st switch 2F, and the 2 nd switch 2S, the fuse 14 is blown. Since the fuse 14 is blown, the supply of electric power from the power supply 13 to the circuit 12 is cut off, and the circuit 12 stops operating. The control device 4 starts the 2 nd operation mode if receiving the abnormality occurrence information IE, which is information that an abnormality has occurred in the circuit 12, from the circuit 12.
When the abnormality occurrence information IE is received from the circuit 12, the control device 4 executes the 2 nd operation mode, thereby cutting off the supply of electric power from the power supply 13 to the circuit 12. As a result, it is possible to avoid a state in which power is continuously supplied from the power supply 13 to the circuit 12 that has become abnormal.
Fig. 3 is a timing chart of the operation signal SE1 applied to the 1 st switch 2F and the operation signal SE2 applied to the 2 nd switch 2S in embodiment 1. The abscissa of fig. 3 represents time t. When the operation signal SE1 is H, the 1 st switch 2F is turned on, and when the operation signal SE1 is L, the 1 st switch 2F is turned off. When the operation signal SE2 is H, the 2 nd switch 2S is turned on, and when the operation signal SE2 is L, the 2 nd switch 2S is turned off.
As described above, if both the 1 st switch 2F and the 2 nd switch 2S are turned on, a current flows from the power supply 13 to the ground through the fuse 14, and the fuse 14 is blown. Therefore, when the control device 4 operates the 1 st switch 2F and the 2 nd switch 2S in the 1 st operation mode, if both are turned on at the same time, the fuse 14 may be blown.
In the 1 st operation mode, the control device 4 sets a period during which both the 1 st switch 2F and the 2 nd switch 2S are off, and alternately turns on or off the 1 st switch 2F and the 2 nd switch 2S. Specifically, as shown in fig. 3, the control device 4 sets a period during which both the operation signal SE1 and the operation signal SE2 become L. At time t1, the operation signal SE1 changes from H to L, but the operation signal SE2 maintains L. The operation signal SE2 changes from L to H at time t2 after time t 1. At time t3, the operation signal SE2 changes from H to L, but the operation signal SE1 remains L. The operation signal SE1 changes from L to H at time t4 after time t 3. That is, the 1 st switch 2F and the 2 nd switch 2S are both turned off during the period from the time t1 to the time t2 and during the period from the time t3 to the time t 4.
In the 1 st operation mode, when the 1 st switch 2F and the 2 nd switch 2S are alternately turned on and off, the control device 4 prevents the fuse 14 from being blown by providing a period during which both the 1 st switch 2F and the 2 nd switch 2S are turned off. As a result, the control device 4 avoids the stop of the operation of the circuit 12 while the 1 st operation mode is executed.
Fig. 4 is a diagram showing functional blocks of the control device 4 included in the power shutoff device 1 according to embodiment 1. The power shutoff device 1 includes a determination unit 4J and a control unit 4C. The determination unit 4J determines the state of the switch circuit 2 based on the detection value SI1 of the 1 st detector 3F and the detection value SI2 of the 2 nd detector 3S, and the operation signal SE1 given to the 1 st switch 2F and the operation signal SE2 given to the 2 nd switch 2S. The judgment unit 4J outputs a judgment result RJ.
The controller 4C applies the operation signal SE1 to the 1 st switch 2F to turn on the 1 st switch 2F, and turns off the 1 st switch 2F by not transmitting the operation signal SE 1. The controller 4C applies the operation signal SE2 to the 2 nd switch 2S to turn on the 2 nd switch 2S, and turns off the 2 nd switch 2S without transmitting the operation signal SE 2. The control unit 4C operates the 1 st switch 2F and the 2 nd switch 2S in the 1 st operation mode when the abnormality occurrence information IE is not received while the circuit 12 is operating. When the abnormality occurrence information IE is received while the circuit 12 is operating, the control unit 4C operates the 1 st switch 2F and the 2 nd switch 2S in the 2 nd operation mode.
Fig. 5 and 6 are diagrams showing a hardware configuration of the control device 4 according to embodiment 1. When the functions of the control device 4 are implemented by software, the control device 4 includes a processor 4P and a memory 4M as shown in fig. 5. The functions of the determination unit 4J and the control unit 4C of the control device 4 are realized by the processor 4P. The processor 4P is also called a CPU (central processing Unit), a processing device, an arithmetic device, a microprocessor, a microcomputer, or a dsp (digital Signal processor).
In this case, the functions of the determination unit 4J and the control unit 4C are realized by software, firmware, or a combination of software and firmware. The software and firmware are described as programs and are stored in the memory 4M. The processor 4P reads and executes the program stored in the memory 4M, thereby realizing the functions of the judgment unit 4J and the control unit 4C. The program may be a program for causing a computer to execute the steps executed by the determination unit 4J and the control unit 4C and the power supply shutoff method according to embodiment 1.
The memory 4M realizes the function of the storage unit of the control device 4. The memory 4M is a volatile or nonvolatile semiconductor memory such as a ram (random access memory), a rom (Read Only memory), a flash memory, an eprom (Erasable Programmable Read Only memory), and an eeprom (electrically Erasable Programmable Read Only memory), a magnetic disk, a flexible disk, an optical disk, a compact disk, a micro disk, and a dvd (digital versatile disc).
The functions of the determination unit 4J and the control unit 4C of the control device 4 may be realized by the processing circuit 4AP shown in fig. 6. The processing circuit 4AP is dedicated hardware for realizing the functions of the determination unit 4J and the control unit 4C. The processing circuit 4AP is a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an asic (application specific integrated circuit), an fpga (field Programmable Gate array), or a combination thereof. The functions of the determination unit 4J and the control unit 4C may be realized by different processing circuits 4AP, or the functions may be realized collectively by 1 processing circuit 4 AP.
The functions of the judgment unit 4J and the control unit 4C may be partly realized by dedicated hardware and partly realized by software or firmware. In this way, the control device 4 can realize the functions of the determination unit 4J and the control unit 4C by hardware, software, firmware, or a combination thereof.
Fig. 7 is a flowchart of a power shutoff method executed by the power shutoff device 1 according to embodiment 1. The control device 4 starts operation if power is supplied from the power supply 13 to the circuit 12 of the appliance control device 10. In step S101, the control device 4 alternately turns on and off the 1 st switch 2F and the 2 nd switch 2S. If an abnormality occurs in the switching circuit 2 in step S102 (Yes in step S102), the control device 4 outputs the determination result RJ in step S103. In step S102, if No abnormality occurs in the switch circuit 2 (No in step S102), the control device 4 repeats step S101 and step S102.
Fig. 8 is a diagram showing the 1 st detector 3Fa and the 2 nd detector 3Sa according to the modification of embodiment 1. The 1 st detector 3Fa and the 2 nd detector 3Sa are switches in which a coil 5a and a switch 6a are combined, and the switch 6a is turned on and off by magnetic force generated by the coil 5 a. One end of the coil 5a and the switch 6a serves as input terminals 5Ia and 6Ia, and the other end serves as output terminals 5Ea and 6 Ea. When a current is caused to flow through the coil 5a, the 1 st detector 3Fa and the 2 nd detector 3Sa close the switch 6a, that is, the current flows from the input terminal 6Ia to the output terminal 6 Ea. Thus, the detection values SI1, SI2 at the input terminal 6Ia obtain the same values as the detection values SI1, SI2 of the 1 st switch 2F and the 2 nd switch 2S using the aforementioned photocoupler.
As described above, the power shutoff device 1 includes: a switch circuit 2 that branches from between a fuse 14 connected to the power supply 13 and the circuit 12, and that is connected in series with a 1 st switch 2F and a 2 nd switch 2S; and a control device 4 that acquires a detection value SI1 of the 1 st detector 3F and a detection value SI2 of the 2 nd detector 3S while alternately turning on and off the 1 st switch 2F and the 2 nd switch 2S, and determines the state of the switch circuit 2. Therefore, since the power shutoff device 1 is turned off while one of the 1 st switch 2F and the 2 nd switch 2S is turned on, the supply of electric power from the power supply 13 to the circuit 12 can be maintained even during the operation confirmation of the 1 st switch 2F and the 2 nd switch 2S. As a result, the power shutoff device 1 can detect the state of the unit that shuts off the power supply, and in embodiment 1, the state of the switch circuit 2, while the circuit 12 is operated by supplying power from the power supply 13 to the circuit 12.
In the power shutoff device 1, the 1 st switch 2F and the 2 nd switch 2S may be different kinds of elements, and the 1 st detector 3F and the 2 nd detector 3S may also be different kinds of elements. Therefore, the power cutoff device 1 has an advantage that the structure is simplified because the selection range of the elements used is expanded. Further, the power supply cutoff device 1 cuts off the supply of electric power from the power supply 13 to the circuit 12 by blowing the fuse 14, and therefore can reliably cut off the supply of electric power to the circuit 12.
In embodiment 1, the power shutoff device 1 is incorporated in the appliance control device 10, but may not be incorporated in the appliance control device 10. In embodiment 1, the fuse 14 is not included in the power supply shutoff device 1, but may be included in the power supply shutoff device 1. The period for turning on or off the 1 st switch 2F and the 2 nd switch 2S is not limited, and is appropriately set according to the specification of the control device 4 or the circuit 12.
In embodiment 1, the circuit 12 is a circuit in which electrical elements such as a resistor, an inductor, a capacitor, and a switch are connected by a conductor. Therefore, in embodiment 1, the circuit 12 is a circuit that generates a control signal for controlling the actuator 21 and supplies the control signal to the drive circuit 11, and is not limited to the above-described circuit, and includes a rotating electric machine, a solenoid, a relay, and the like.
In embodiment 1, the power shutoff device 1 includes two switches, i.e., the 1 st switch 2F and the 2 nd switch 2S, but the number of switches is not limited to two. That is, the power shutoff device 1 has a plurality of switches, and it is sufficient if they are exclusively turned on or off.
The structure of embodiment 1 can be suitably applied to the following embodiments. In addition, a part of the configuration of embodiment 1 may be deleted, or another configuration may be added.
Embodiment 2.
Fig. 9 is a diagram showing a power shutoff device 1b according to embodiment 2. The power cutoff device 1b is different from the power cutoff device 1 according to embodiment 1 in that the 1 st switch 2F and the 2 nd switch 2S of the switch circuit 2b are connected in parallel and the fuse 14 is not provided.
The switch circuit 2b is disposed between the power supply 13 and the circuit 12 of the device control apparatus 10 b. The 1 st switch 2F and the 2 nd switch 2S are connected in parallel between the power supply 13 and the circuit 12. The diode 8F is connected between the 1 st switch 2F and the circuit 12. The diode 8S is connected between the 2 nd switch 2S and the circuit 12. The diodes 8S and 8F are used to prevent a current from flowing backward from one of the 1 st switch 2F and the 2 nd switch 2S when the other is turned on.
The input terminal 5I of the 1 st detector 3F is connected between the 1 st switch 2F and the circuit 12, more specifically, between the 1 st switch 2F and the diode 8F, via the resistor R1. The input terminal 6I of the 1 st detector 3F is connected to the power supply 7 via a resistor R3. Output terminals 5E and 6E of the 1 st detector 3F are both connected to ground. The input terminal 5I of the 2 nd detector 3S is connected between the 2 nd switch 2S and the circuit 12, more specifically, between the 2 nd switch 2S and the diode 8S, via the resistor R2. The input terminal 6I of the 2 nd detector 3S is connected to the power supply 7 via a resistor R4. Output terminals 5E and 6E of the 2 nd detector 3S are both connected to ground.
The portions to which the signal lines SL1 and SL2 are connected are the same as those in embodiment 1. The control device 4 acquires the detection value SI1, which is the potential of the input terminal 6I of the 1 st detector 3F, and the detection values SI1 and SI2, which are the potentials of the input terminals 6I of the 2 nd detector 3S. The configuration of the control device 4 is the same as that of embodiment 1.
In the power source cutoff device 1b, if at least one of the 1 st switch 2F and the 2 nd switch 2S is turned on, electric power is supplied from the power source 13 to the circuit 12. In the power supply shutoff device 1b, if both the 1 st switch 2F and the 2 nd switch 2S are off, the supply of electric power from the power supply 13 to the circuit 12 is shut off.
If the 1 st switch 2F is turned on, the current from the power supply 13 is shunted to the 1 st detector 3F and the circuit 12 after passing through the 1 st switch 2F. When a current flows through the 1 st detector 3F, the light emitting diode 5 of the 1 st detector 3F emits light, and the phototransistor 6 is turned on, so that the detection value SI1 of the input terminal 6I of the 1 st detector 3F becomes L level. When the 1 st switch 2F is off, the current from the power supply 13 does not flow through the 1 st switch 2F, and therefore the detection value SI1 of the input terminal 6I of the 1 st detector 3F becomes H level.
If the 2 nd switch 2S is turned on, the current from the power supply 13 is shunted to the 2 nd detector 3S and the circuit 12 after passing through the 2 nd switch 2S. When the current flows through the 2 nd detector 3S, the light emitting diode 5 of the 2 nd detector 3S emits light, and the phototransistor 6 is turned on, so that the detection value SI2 of the input terminal 6I of the 2 nd detector 3S becomes L level. When the 2 nd switch 2S is off, the current from the power supply 13 does not flow through the 2 nd switch 2S, and therefore the detection value SI2 of the input terminal 6I of the 2 nd detector 3S becomes H level.
Fig. 10 is a diagram showing the relationship between the states of the 1 st switch 2F and the 2 nd switch 2S according to embodiment 2 and the detection values SI1 and SI 2. As shown in fig. 10, whether the 1 st switch 2F and the 2 nd switch 2S are on or off is determined according to whether the detection values SI1 and SI2 are at the H level or the L level. The control device 4 determines the state of the switch circuit 2b, specifically, whether the 1 st switch 2F and the 2 nd switch 2S are on or off, based on the detection value SI1 of the 1 st detector 3F and the detection value SI2 of the 2 nd detector 3S.
In the 1 st operation mode, the control device 4 acquires the detection value SI1 of the 1 st detector 3F and the detection value SI2 of the 2 nd detector 3S while alternately turning on and off the 1 st switch 2F and the 2 nd switch 2S, and determines the state of the switch circuit 2 b. That is, the control device 4 turns off the 2 nd switch 2S when the 1 st switch 2F is on, and turns on the 2 nd switch 2S when the 1 st switch 2F is off. In this way, in the 1 st operation mode, the control device 4 exclusively turns on or off the 1 st switch 2F and the 2 nd switch 2S. The control device 4 determines the state of the switch circuit 2b, specifically, whether the 1 st switch 2F and the 2 nd switch 2S are normal or abnormal, based on the values of the detection values SI1 and SI 2.
In the 2 nd operation mode, the control device 4 turns off both the 1 st switch 2F and the 2 nd switch 2S. If both the 1 st switch 2F and the 2 nd switch 2S are off, the supply of electric power from the power supply 13 to the circuit 12 is cut off.
In the 1 st operation mode, the controller 4 is set to a state in which the operation signal SE1 is applied to the 1 st switch 2F and the operation signal SE1 is not applied to the 2 nd switch 2S, and acquires the detection value SI1 from the 1 st detector 3F and the detection value SI2 from the 2 nd detector 3S. As shown in fig. 10, if the detection value SI1 of the 1 st detector 3F is at the L level and the detection value SI2 of the 2 nd detector 3S is at the H level, the 1 st switch 2F and the 2 nd switch 2S operate normally.
Next, the controller 4 obtains the detection value SI1 from the 1 st detector 3F and the detection value SI2 from the 2 nd detector 3S in a state where the operation signal SE2 is applied to the 2 nd switch 2S and the operation signal SE2 is not applied to the 1 st switch 2F. As shown in fig. 10, if the detection value SI1 of the 1 st detector 3F is at the H level and the detection value SI2 of the 2 nd detector 3S is at the L level, the 1 st switch 2F and the 2 nd switch 2S operate normally.
If the 1 st switch 2F is turned on, the current from the power supply 13 flows through the circuit 12 via the 1 st switch 2F even if the 2 nd switch 2S is turned off. Similarly, if the 2 nd switch 2S is turned on, even if the 1 st switch 2F is turned off, the current from the power supply 13 flows through the circuit 12 via the 2 nd switch 2S. Therefore, the control device 4 can determine the state of the switch circuit 2b without interrupting the supply of electric power from the power supply 13 to the circuit 12, and thus can determine the state of the switch circuit 2b while operating the circuit 12.
In this way, the control device 4 can detect a state in which the switching circuit 2b is not operating normally, that is, a state in which the supply of electric power from the power supply 13 to the circuit 12 cannot be interrupted, in a state in which electric power is supplied from the power supply 13 to the circuit 12. Therefore, the power shutoff device 1b can reduce the possibility of the entire equipment control device 10 failing due to the failure of the switching circuit 2b, as in embodiment 1. The control device 4 is similar to embodiment 1 in that a determination result RJ of the state of the switching circuit 2 is output during execution of the 1 st operation mode.
Fig. 11 is a timing chart of the operation signal SE1 applied to the 1 st switch 2F and the operation signal SE2 applied to the 2 nd switch 2S in embodiment 2. The abscissa of fig. 11 represents time t. If both the 1 st switch 2F and the 2 nd switch 2S are off, the power supply cutoff device 1b cuts off the supply of electric power from the power supply 13 to the circuit 12. That is, when the control device 4 executes the 1 st operation mode, if both the 1 st switch 2F and the 2 nd switch 2S are turned off, there is a possibility that the operation of the circuit 12 is stopped.
In the 1 st operation mode, the control device 4 sets a period during which both the 1 st switch 2F and the 2 nd switch 2S are on, and alternately turns on or off the 1 st switch 2F and the 2 nd switch 2S. Specifically, as shown in fig. 11, the control device 4 sets a period during which both the operation signal SE1 and the operation signal SE2 become H. At time t1, the operation signal SE1 changes from L to H, but the operation signal SE2 remains H. The operation signal SE2 changes from H to L at time t2 after time t 1. At time t3, the operation signal SE2 changes from L to H, but the operation signal SE1 remains H. The operation signal SE1 changes from H to L at time t4 after time t 3. That is, the 1 st switch 2F and the 2 nd switch 2S are both turned on during the period from the time t1 to the time t2 and during the period from the time t3 to the time t 4.
In the 1 st operation mode, the control device 4 sets a period during which both the 1 st switch 2F and the 2 nd switch 2S are on when the 1 st switch 2F and the 2 nd switch 2S are alternately turned on and off. By this processing, since power is supplied from the power supply 13 to the circuit 12 during the 1 st operation mode, even if the 1 st switch 2F and the 2 nd switch 2S are alternately turned on and off, the operation of the circuit 12 is prevented from being stopped.
As described above, the power shutoff device 1b according to embodiment 2 achieves the same operation and effect as the power shutoff device 1 according to embodiment 1. Further, the power cutoff device 1b has an advantage that the structure is simplified because the fuse 14 is not required. In addition, the power supply cutoff device 1b does not need to flow a current necessary for blowing the fuse 14 through the 1 st switch 2F and the 2 nd switch 2S. Therefore, the 1 st switch 2F and the 2 nd switch 2S of the power shutoff device 1b need only be able to flow a current of a magnitude necessary for the circuit 12. In this way, the power cutoff device 1b can use the 1 st switch 2F and the 2 nd switch 2S having lower rated currents than the power cutoff device 1 according to embodiment 1. As a result, the power shutoff device 1b has an advantage that the options of the 1 st switch 2F and the 2 nd switch 2S are increased.
The configurations described in embodiment 1 and embodiment 2 above are an example of the contents of the present invention, and may be combined with other known techniques, and some of the configurations may be omitted or modified without departing from the scope of the present invention.
Description of the reference numerals
1. 1b power source cut-off device, 2F 1 st switch, 2S 2 nd switch, 2b switch circuit, 3F, 3Fa 1 st detector, 3S, 3Sa 2 nd detector, 4 control device, 4AP processing circuit, 4C control section, 4J determination section, 4P processor, 4M memory, 5 light emitting diode, 5a coil, 5E, 5Ea, 6E, 6Ea output terminal, 5I, 5Ia, 6I, 6Ia input terminal, 6 phototransistor, 6a switch, 7, 13 power source, 8F, 8S diode, 10b device control device, 11 drive circuit, 12 circuit, 14 fuse, 20 device, 21 actuator, 22 display device, IE abnormality occurrence information, R1, R2, R3, R4 resistance, RJ determination result, SE1, SE2 operation signal, 1, SI2 detection value (SL potential), 1, SL2 signal line.

Claims (5)

1. A power supply cutoff device that cuts off power supplied from a power supply to a circuit,
the power shutoff device includes:
a switching circuit which branches from a fuse connected to the power supply and the circuit to the circuit, and in which a 1 st switch and a 2 nd switch are connected in series;
a 1 st detector which detects an H level if the 1 st switch is turned on, and detects an L level if the 1 st switch is turned off;
a 2 nd detector which detects an H level if the 2 nd switch is turned on, and detects an L level if the 2 nd switch is turned off; and
a control device that executes a 1 st operation mode for acquiring a detection value of the 1 st detector or a detection value of the 2 nd detector while alternately turning on and off the 1 st switch and the 2 nd switch, and a 2 nd operation mode for determining a state of the switching circuit, the 2 nd operation mode being a mode in which both the 1 st switch and the 2 nd switch are turned on,
the control device determines that the 1 st switch and the 2 nd switch operate normally if the detection value of the 1 st detector is at an H level and the detection value of the 2 nd detector is at an L level, or the detection value of the 1 st detector is at an L level and the detection value of the 2 nd detector is at an H level.
2. A power supply cutoff device that cuts off power supplied from a power supply to a circuit,
the power shutoff device includes:
a switching circuit in which a 1 st switch and a 2 nd switch are connected in parallel between the power supply and the circuit;
a 1 st detector for detecting an operating state of the 1 st switch, wherein the 1 st detector detects an L level if the 1 st switch is turned on, and detects an H level if the 1 st switch is turned off;
a 2 nd detector for detecting an operation state of the 2 nd switch, wherein the 2 nd detector detects an L level if the 2 nd switch is turned on, and detects an H level if the 2 nd switch is turned off;
a control device that executes a 1 st operation mode for acquiring a detection value of the 1 st detector or a detection value of the 2 nd detector while alternately turning on and off the 1 st switch and the 2 nd switch, and a 2 nd operation mode for determining a state of the switching circuit, the 2 nd operation mode being a mode in which both the 1 st switch and the 2 nd switch are turned off,
the control device determines that the 1 st switch and the 2 nd switch operate normally if the detection value of the 1 st detector is an L level and the detection value of the 2 nd detector is an H level, or the detection value of the 1 st detector is an H level and the detection value of the 2 nd detector is an L level.
3. The power cut-off device according to claim 2,
in the 1 st operation mode, the control device sets a period during which both the 1 st switch and the 2 nd switch are on, and alternately turns on or off the 1 st switch and the 2 nd switch.
4. The power shutoff device according to any one of claims 1 to 3,
the control device outputs a result of determination of the state of the switching circuit during execution of the 1 st operation mode.
5. The power shutoff device according to any one of claims 1 to 3,
the control device acquires information indicating a state of the circuit, and executes the 2 nd operation mode when the information indicates an abnormality in the circuit.
CN201680087226.7A 2016-07-01 2016-07-01 Power supply cut-off device Active CN109417288B (en)

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JP2014190960A (en) * 2013-03-28 2014-10-06 Gs Yuasa Corp Switch failure determination device, power storage device, and switch failure determination method
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