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CN109155361B - Adjustable Active Silicon for Coupler Linearity Improvement and Reconfiguration - Google Patents

Adjustable Active Silicon for Coupler Linearity Improvement and Reconfiguration Download PDF

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CN109155361B
CN109155361B CN201780026946.7A CN201780026946A CN109155361B CN 109155361 B CN109155361 B CN 109155361B CN 201780026946 A CN201780026946 A CN 201780026946A CN 109155361 B CN109155361 B CN 109155361B
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CN109155361A (en
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N.斯里拉特塔纳
D.S.怀特菲尔德
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    • HELECTRICITY
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    • HELECTRICITY
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Abstract

电磁耦合器组件包括手柄晶片,该手柄晶片具有设置在其第一表面上的氧化物层。有源半导体层设置在氧化物层上并包含用于接收电源电压的电压端子。电介质材料层设置在有源半导体层上。主传输线设置在电介质材料层上。耦合传输线设置在有源半导体层上,并且是电感性地耦合到主传输线和电容性地耦合到主传输线中的一个。主传输线和耦合传输线之一的至少一部分直接设置在有源半导体层的至少一部分上方。

Figure 201780026946

The electromagnetic coupler assembly includes a handle wafer having an oxide layer disposed on a first surface thereof. The active semiconductor layer is disposed on the oxide layer and includes a voltage terminal for receiving a supply voltage. A layer of dielectric material is disposed on the active semiconductor layer. The main transmission line is disposed on the layer of dielectric material. The coupled transmission line is disposed on the active semiconductor layer and is one of inductively coupled to the main transmission line and capacitively coupled to the main transmission line. At least a portion of one of the main transmission line and the coupled transmission line is disposed directly over at least a portion of the active semiconductor layer.

Figure 201780026946

Description

用于耦合器线性度改进和重新配置的可调节活性硅Tunable Active Silicon for Coupler Linearity Improvement and Reconfiguration

背景技术Background technique

诸如射频(RF)耦合器的电磁耦合器用于各种应用中以提取用于测量、监视或其它用途的信号。例如,RF耦合器可以包含在RF源与负载(诸如天线)之间的信号路径中,以提供从RF源行进到负载的RF信号的前向RF功率的指示和/或从负载反射回来的反向RF功率的指示。RF耦合器通常具有电源输入端口、电源输出端口、耦合端口和隔离端口。当终端阻抗呈现(present)给隔离端口时,在耦合端口处提供从功率输入端口行进到功率输出端口的前向RF功率的指示。当终端阻抗呈现给耦合端口时,在隔离端口处提供从功率输出端口行进到功率输入端口的反向RF功率的指示。终端阻抗通常由各种传统RF耦合器中的50欧姆分流电阻实现。Electromagnetic couplers, such as radio frequency (RF) couplers, are used in a variety of applications to extract signals for measurement, monitoring, or other purposes. For example, an RF coupler may be included in the signal path between an RF source and a load (such as an antenna) to provide an indication of the forward RF power of an RF signal traveling from the RF source to the load and/or the back reflection from the load. indication of the RF power. An RF coupler typically has a power input port, a power output port, a coupling port, and an isolation port. An indication of forward RF power traveling from the power input port to the power output port is provided at the coupled port when the terminating impedance is presented to the isolated port. An indication of reverse RF power traveling from the power output port to the power input port is provided at the isolated port when a terminating impedance is presented to the coupled port. The termination impedance is usually achieved by a 50 ohm shunt resistor in various conventional RF couplers.

图1是示出RF“前端”子系统10的典型布置的示例的框图,该RF“前端”子系统10可以用在诸如移动电话之类的通信装置中,例如用于发送RF信号。功率放大器11向输入到子系统的RF信号提供增益,产生放大的RF信号。滤波器12用于从放大的RF信号中过滤出不需要的频率。RF耦合器13用于从在滤波器12与天线14之间行进的RF信号中提取一部分功率。天线14发送RF信号。Figure 1 is a block diagram showing an example of a typical arrangement of an RF "front-end" subsystem 10 that may be used in a communication device such as a mobile telephone, for example for transmitting RF signals. The power amplifier 11 provides gain to the RF signal input to the subsystem, generating an amplified RF signal. Filter 12 is used to filter out unwanted frequencies from the amplified RF signal. The RF coupler 13 is used to extract a portion of the power from the RF signal traveling between the filter 12 and the antenna 14 . The antenna 14 transmits RF signals.

发明内容Contents of the invention

各方面和实施例涉及电子系统,尤其涉及电磁(EM)耦合器。Aspects and embodiments relate to electronic systems, and more particularly to electromagnetic (EM) couplers.

根据一个方面,提供了一种电磁耦合器组件。电磁耦合器组件包括包含设置在其第一表面上的氧化物层的手柄晶片,设置在氧化物层上并包含用于接收电源电压的电压端子的有源半导体层,设置在有源半导体层上的电介质材料层,设置在电介质材料层上的主传输线,以及设置在电介质材料层上的耦合传输线。耦合传输线是电感性耦合到主传输线并且电容性地耦合到主传输线中的一个。主传输线和耦合传输线之一的至少一部分直接设置在有源半导体层的至少一部分上方。According to one aspect, an electromagnetic coupler assembly is provided. An electromagnetic coupler assembly comprising a handle wafer comprising an oxide layer disposed on a first surface thereof, an active semiconductor layer disposed on the oxide layer and comprising voltage terminals for receiving a supply voltage, disposed on the active semiconductor layer The dielectric material layer, the main transmission line disposed on the dielectric material layer, and the coupling transmission line disposed on the dielectric material layer. The coupled transmission line is one of inductively coupled to the main transmission line and capacitively coupled to the main transmission line. At least a portion of one of the main transmission line and the coupling transmission line is disposed directly over at least a portion of the active semiconductor layer.

在一些实施例中,电磁耦合器组件还包括设置在主传输线和耦合传输线之一上方并且在主传输线和耦合传输线中的另一个下方的第二电介质材料层。In some embodiments, the electromagnetic coupler assembly further includes a second layer of dielectric material disposed over one of the main transmission line and the coupling transmission line and below the other of the main transmission line and the coupling transmission line.

在一些实施例中,有源半导体层包括N型硅和P型硅中的一种。In some embodiments, the active semiconductor layer includes one of N-type silicon and P-type silicon.

在一些实施例中,电压端子定位在主传输线和耦合传输线的单侧。In some embodiments, the voltage terminals are positioned on a single side of the main and coupled transmission lines.

在一些实施例中,电压端子围绕主传输线和耦合传输线的部分下面的区域。In some embodiments, the voltage terminal surrounds the area under portions of the main transmission line and the coupled transmission line.

在一些实施例中,有源半导体层设置在主传输线的一部分下面,但是不在耦合传输线下面。In some embodiments, the active semiconductor layer is disposed under a portion of the main transmission line, but not under the coupling transmission line.

在一些实施例中,有源半导体层设置在耦合传输线的一部分下面,但是不在主传输线下面。In some embodiments, the active semiconductor layer is disposed under a portion of the coupled transmission line, but not under the main transmission line.

在一些实施例中,有源半导体层包含设置在耦合传输线的一部分下面的第一部分和与第一部分电隔离并且设置在主传输线的一部分下面的第二部分。在一些实施例中,电磁耦合器组件包含与有源半导体层的第一部分电连通的第一电压端子和与有源半导体层的第二部分电连通的第二电压端子。In some embodiments, the active semiconductor layer includes a first portion disposed below a portion of the coupled transmission line and a second portion electrically isolated from the first portion and disposed below a portion of the main transmission line. In some embodiments, the electromagnetic coupler assembly includes a first voltage terminal in electrical communication with a first portion of the active semiconductor layer and a second voltage terminal in electrical communication with a second portion of the active semiconductor layer.

在一些实施例中,有源半导体层包含彼此电隔离的多个部分,多个部分中的每个部分设置在主传输线和耦合传输线的不同相应部分下面。In some embodiments, the active semiconductor layer comprises a plurality of portions electrically isolated from each other, each portion of the plurality of portions being disposed below a different respective portion of the main transmission line and the coupling transmission line.

在一些实施例中,有源半导体层的多个部分中的每一个包含相应的电压端子。In some embodiments, each of the plurality of portions of the active semiconductor layer includes a respective voltage terminal.

在一些实施例中,电压端子包含第一部分和第二部分,第一部分设置在主传输线和耦合传输线下面,位于在垂直于预期信号流过主传输线和耦合传输线之一的方向的方向上与主传输线和耦合传输线的第一侧横向定位的位置处,第二部分设置在主传输线和耦合传输线下面,位于在垂直于预期信号流过主传输线和耦合传输线之一的方向的第二方向上与主传输线和耦合传输线的第二侧横向定位的位置处。In some embodiments, the voltage terminal comprises a first portion and a second portion, the first portion being disposed below the main transmission line and the coupling transmission line, positioned in a direction perpendicular to the direction in which the intended signal flows through one of the main transmission line and the coupling transmission line and the main transmission line At a position lateral to the first side of the coupled transmission line, the second portion is disposed below the main transmission line and the coupled transmission line in a second direction perpendicular to the direction in which the desired signal flows through one of the main transmission line and the coupled transmission line. and coupled at a location positioned laterally on the second side of the transmission line.

在一些实施例中,电压端子包含第一部分和第二部分,第一部分设置在主传输线和耦合传输线下面,位于在平行于预期信号流过主传输线和耦合传输线之一的方向的方向上与主传输线和耦合传输线的第一侧横向设置的位置处,第二部分设置在主传输线和耦合传输线下面,位于在平行于预期信号流过主传输线和耦合传输线之一的方向的第二方向上与主传输线和耦合传输线的第二侧横向设置的位置处。In some embodiments, the voltage terminal comprises a first portion and a second portion, the first portion being disposed below the main transmission line and the coupled transmission line, positioned in a direction parallel to the direction in which the intended signal flows through one of the main transmission line and the coupled transmission line with the main transmission line At a position lateral to the first side of the coupled transmission line, the second portion is disposed below the main transmission line and the coupled transmission line in a second direction parallel to the direction in which the desired signal flows through one of the main transmission line and the coupled transmission line. and coupled to the second side of the transmission line at a location positioned laterally.

在一些实施例中,有源半导体层包含掺杂浓度,该掺杂浓度沿着垂直于通过主传输线和耦合传输线之一的预期信号流动方向的方向变化。In some embodiments, the active semiconductor layer includes a doping concentration that varies in a direction perpendicular to the direction of intended signal flow through one of the main transmission line and the coupling transmission line.

在一些实施例中,有源半导体层包含掺杂浓度,该掺杂浓度沿着平行于通过主传输线和耦合传输线之一的预期信号流动方向的方向变化。In some embodiments, the active semiconductor layer includes a doping concentration that varies in a direction parallel to an intended direction of signal flow through one of the main transmission line and the coupling transmission line.

在一些实施例中,与未将电源电压施加到有源半导体层时电磁耦合器中的衬底效应的幅度相比,将电源电压施加到有源半导体层降低了电磁耦合器组件中的衬底效应的幅度。In some embodiments, applying the power supply voltage to the active semiconductor layer reduces the magnitude of the substrate effect in the electromagnetic coupler when the power supply voltage is not applied to the active semiconductor layer. magnitude of the effect.

根据另一方面,提供了一种封装模块。封装模块包括电磁耦合器组件。电磁耦合器组件包括绝缘体上硅(SOI)晶片,其包含具有设置在其第一表面上的氧化物层的手柄晶片,设置在氧化物层上的有源半导体层,设置在有源半导体层上以接收电源电压的电压端子,设置在有源半导体层上的电介质材料层,设置在电介质材料层上的主传输线,以及耦合传输线,其设置在电介质材料层上并配置为响应于接收在主传输线上接收的输入信号而在耦合传输线上提供耦合信号,主传输线和耦合传输线之一的至少一部分形成在有源半导体层的至少一部分上方。根据另一方面,提供了一种包含封装模块的电子装置。根据另一方面,提供了一种包含封装模块的无线通信装置。According to another aspect, a packaging module is provided. The packaged module includes an electromagnetic coupler assembly. An electromagnetic coupler assembly comprising a silicon-on-insulator (SOI) wafer comprising a handle wafer having an oxide layer disposed on a first surface thereof, an active semiconductor layer disposed on the oxide layer, disposed on the active semiconductor layer A voltage terminal to receive a supply voltage, a layer of dielectric material disposed on the active semiconductor layer, a main transmission line disposed on the layer of dielectric material, and a coupling transmission line disposed on the layer of dielectric material and configured to respond to receiving The coupled signal is provided on a coupled transmission line with an input signal received on the system, and at least a portion of one of the main transmission line and the coupled transmission line is formed over at least a portion of the active semiconductor layer. According to another aspect, an electronic device including a packaging module is provided. According to another aspect, a wireless communication device including a packaging module is provided.

根据另一方面,提供了一种电磁耦合器组件。电磁耦合器组件包括:手柄晶片,包括设置在其第一表面上的氧化物层;有源半导体层,设置在氧化物层的至少一部分上,有源半导体层包含用于接收电源电压的电压端子,设置在有源半导体层上的电介质层,以及设置在电介质层上的耦合器,有源半导体层至少部分地在耦合器下方延伸,以基于施加电源电压将手柄晶片与耦合器电隔离。According to another aspect, an electromagnetic coupler assembly is provided. The electromagnetic coupler assembly includes: a handle wafer including an oxide layer disposed on a first surface thereof; an active semiconductor layer disposed on at least a portion of the oxide layer, the active semiconductor layer including voltage terminals for receiving a power supply voltage , a dielectric layer disposed on the active semiconductor layer, and a coupler disposed on the dielectric layer, the active semiconductor layer extending at least partially under the coupler to electrically isolate the handle wafer from the coupler based on an applied supply voltage.

根据另一方面,提供了一种制造电磁耦合器组件的方法。该方法包括在绝缘体上硅(SOI)晶片的有源半导体的上表面上沉积电介质材料层,该晶片包含有源半导体层、设置在有源半导体层下面的掩埋氧化物层、以及设置在掩埋氧化物层下面的手柄晶片,形成与有源半导体层的电接触;在电介质材料层上方形成主传输线;以及在电介质材料层上方形成耦合传输线,耦合传输线配置为响应于接收在主传输线上接收的输入信号而在耦合传输线上提供耦合信号,主传输线和耦合传输线之一的至少一部分形成在有源半导体层的至少一部分上方。According to another aspect, a method of manufacturing an electromagnetic coupler assembly is provided. The method includes depositing a layer of dielectric material on an upper surface of an active semiconductor of a silicon-on-insulator (SOI) wafer, the wafer comprising the active semiconductor layer, a buried oxide layer disposed below the active semiconductor layer, and a buried oxide layer disposed on the buried oxide layer. a handle wafer below the object layer, forming electrical contact with the active semiconductor layer; forming a main transmission line above the layer of dielectric material; and forming a coupling transmission line above the layer of dielectric material, the coupling transmission line being configured to respond to receiving an input received on the main transmission line A coupled signal is provided on a coupled transmission line, at least a portion of one of the main transmission line and the coupled transmission line is formed over at least a portion of the active semiconductor layer.

在一些实施例中,主传输线和耦合传输线两者都形成为与电介质材料层的上表面接触。In some embodiments, both the main transmission line and the coupled transmission line are formed in contact with the upper surface of the layer of dielectric material.

在一些实施例中,该方法还包括形成主传输线和耦合传输线中的一个与电介质材料层的上表面接触,在电介质材料层上形成第二电介质材料层,并且形成在第二电介质材料层的上表面上的主传输线和耦合传输中的另一个。In some embodiments, the method further includes forming one of the main transmission line and the coupling transmission line in contact with the upper surface of the dielectric material layer, forming a second dielectric material layer on the dielectric material layer, and forming a second dielectric material layer on the second dielectric material layer. The main transmission line on the surface and the other one in the coupled transmission.

在一些实施例中,主传输线和耦合传输线中的一个形成在有源半导体层的至少一部分上方,而主传输线和耦合传输线中的另一个不形成在有源半导体层的至少一部分上方。In some embodiments, one of the main transmission line and the coupling transmission line is formed over at least a portion of the active semiconductor layer, and the other of the main transmission line and the coupling transmission line is not formed over at least a portion of the active semiconductor layer.

在一些实施例中,主传输线和耦合传输线两者都形成在有源半导体层的至少一部分上方。In some embodiments, both the main transmission line and the coupling transmission line are formed over at least a portion of the active semiconductor layer.

在一些实施例中,该方法还包括移除手柄晶片的至少下部。In some embodiments, the method further includes removing at least a lower portion of the handle wafer.

下面详细讨论这些示例性方面和实施例的其它方面、实施例和优点。本文所公开的实施例可以以与本文所公开的原理中的至少一个一致的任何方式与其它实施例组合,并且对“实施例”、“一些实施例”、“替代性实施例”、“各种实施例”、“一个实施例”的引用等等不一定是相互排斥的,并且旨在指示所描述的特定特征、结构或特性可以被包含在至少一个实施例中。本文出现的这些术语不一定都指相同的实施例。Further aspects, embodiments and advantages of these exemplary aspects and embodiments are discussed in detail below. Embodiments disclosed herein may be combined with other embodiments in any manner consistent with at least one of the principles disclosed herein, and references to "embodiments," "some embodiments," "alternative embodiments," "each References to "one embodiment", "one embodiment", etc. are not necessarily mutually exclusive and are intended to indicate that a particular feature, structure or characteristic described can be included in at least one embodiment. These terms appearing herein are not necessarily all referring to the same embodiment.

附图说明Description of drawings

下面参考附图讨论至少一个实施例的各个方面,附图不是按比例绘制的。包含附图是为了提供对各个方面和实施例的说明和进一步理解,并且附图被并入并构成本说明书的一部分,但并不旨在作为本发明的限制的定义。在附图中,在各个图中示出的每个相同或几乎相同的部件由相同的数字表示。为清楚起见,不是每个组件都可以被标记在每个图中。在图中:Various aspects of at least one embodiment are discussed below with reference to the accompanying figures, which are not drawn to scale. The accompanying drawings are included to provide illustration and further understanding of various aspects and embodiments, and are incorporated in and constitute a part of this specification but not as a definition of the limits of the invention. In the drawings, each identical or nearly identical component that is illustrated in various figures is represented by a like numeral. For purposes of clarity, not every component may be labeled in every figure. In the picture:

图1是传统RF前端系统的一个示例的框图,该系统包含与RF耦合器级联的单个滤波器;Figure 1 is a block diagram of an example of a conventional RF front-end system that includes a single filter cascaded with an RF coupler;

图2A是RF耦合器中的主线和耦合线的一种布置的简化平面图;Figure 2A is a simplified plan view of an arrangement of main and coupled lines in an RF coupler;

图2B是RF耦合器中的主线和耦合线的另一种布置的简化平面图;Figure 2B is a simplified plan view of another arrangement of main and coupled lines in an RF coupler;

图2C是图2B的RF耦合器中的主线和耦合线的简化截面图;Figure 2C is a simplified cross-sectional view of the main and coupled lines in the RF coupler of Figure 2B;

图2D是RF耦合器中的主线和耦合线的另一种布置的简化平面图;Figure 2D is a simplified plan view of another arrangement of main and coupled lines in an RF coupler;

图3A是RF耦合器结构的实施例的简化图示;Figure 3A is a simplified illustration of an embodiment of an RF coupler structure;

图3B是图3A的实施例的简化平面图;Figure 3B is a simplified plan view of the embodiment of Figure 3A;

图4A是RF耦合器结构的另一个实施例的简化图示;Figure 4A is a simplified illustration of another embodiment of an RF coupler structure;

图4B是图4A的实施例的简化平面图;Figure 4B is a simplified plan view of the embodiment of Figure 4A;

图5A是RF耦合器结构的另一个实施例的简化图示;Figure 5A is a simplified illustration of another embodiment of an RF coupler structure;

图5B是图5A的实施例的简化平面图;Figure 5B is a simplified plan view of the embodiment of Figure 5A;

图5C是RF耦合器结构的另一个实施例的简化图示;Figure 5C is a simplified illustration of another embodiment of an RF coupler structure;

图5D是图5C的实施例的简化平面图;Figure 5D is a simplified plan view of the embodiment of Figure 5C;

图5E是RF耦合器结构的另一个实施例的简化图示;Figure 5E is a simplified illustration of another embodiment of an RF coupler structure;

图5F是图5E的实施例的简化平面图;Figure 5F is a simplified plan view of the embodiment of Figure 5E;

图5G是RF耦合器结构的另一个实施例的简化图示;Figure 5G is a simplified illustration of another embodiment of an RF coupler structure;

图5H是图5G的实施例的简化平面图;Figure 5H is a simplified plan view of the embodiment of Figure 5G;

图5I是RF耦合器结构的另一个实施例的简化图示;Figure 5I is a simplified illustration of another embodiment of an RF coupler structure;

图5J是图5I的实施例的简化平面图;Figure 5J is a simplified plan view of the embodiment of Figure 5I;

图6是RF耦合器结构的实施例的简化平面图;Figure 6 is a simplified plan view of an embodiment of an RF coupler structure;

图7是RF耦合器结构的另一个实施例的简化平面图;Figure 7 is a simplified plan view of another embodiment of an RF coupler structure;

图8A是RF耦合器结构的另一实施例的简化平面图;Figure 8A is a simplified plan view of another embodiment of an RF coupler structure;

图8B是图8A的RF耦合器结构的简化截面图;8B is a simplified cross-sectional view of the RF coupler structure of FIG. 8A;

图9A是RF耦合器结构的另一实施例的简化平面图;Figure 9A is a simplified plan view of another embodiment of an RF coupler structure;

图9B是图9A的RF耦合器结构的简化截面图;9B is a simplified cross-sectional view of the RF coupler structure of FIG. 9A;

图10是RF耦合器结构的另一个实施例的简化平面图;Figure 10 is a simplified plan view of another embodiment of an RF coupler structure;

图11A是RF耦合器结构的另一实施例的简化平面图;11A is a simplified plan view of another embodiment of an RF coupler structure;

图11B是RF耦合器结构的另一实施例的简化平面图;11B is a simplified plan view of another embodiment of an RF coupler structure;

图12是RF耦合器结构的另一个实施例的简化平面图;Figure 12 is a simplified plan view of another embodiment of an RF coupler structure;

图13是RF耦合器结构的另一个实施例的简化平面图;Figure 13 is a simplified plan view of another embodiment of an RF coupler structure;

图14是根据本发明的各方面的包含耦合器的模块的一个示例的框图;14 is a block diagram of one example of a module including a coupler according to aspects of the invention;

图15是根据本发明的各方面的包括耦合器的无线装置的一个示例的框图;15 is a block diagram of one example of a wireless device including a coupler in accordance with aspects of the present invention;

图16是示出图15的无线装置的一个示例的更详细的表示的框图;Figure 16 is a block diagram illustrating a more detailed representation of one example of the wireless device of Figure 15;

图17示出了对如本文所公开的RF耦合器的实施例所进行的测试的结果。Figure 17 shows the results of tests conducted on an embodiment of an RF coupler as disclosed herein.

具体实施方式Detailed ways

本文所公开的方面和实施例包含用于减少电磁(EM)耦合器中的衬底引起的非线性的系统和方法,以及包含这种系统的设备。Aspects and embodiments disclosed herein include systems and methods for reducing substrate-induced nonlinearities in electromagnetic (EM) couplers, and devices incorporating such systems.

可以使用两条传输线(主线和耦合线)在例如硅(Si)手柄晶片衬底或绝缘体上硅(SOI)手柄晶片衬底上形成EM耦合器(这里简称为“耦合器”)以产生电容性耦合效应和电感性耦合效应。耦合器中的衬底效应可以包含来自耦合器传输线与手柄晶片衬底之间的电容值的电容性效应,以及由于在手柄晶片衬底中流动的感应电感性电流引起的电感性效应,有时被称为“镜面效应”。在硅手柄晶片衬底中流动的感应电感电流可以以谐波的形式产生非线性度,例如但不限于二阶(2fo)谐波(通过耦合器传输线的信号的二次谐波)。SOI衬底中的掩埋氧化物是一种绝缘体,有助于将硅衬底手柄晶片与耦合器线隔离,减少衬底效应,但不能完全消除衬底效应。An EM coupler (referred to here simply as a "coupler") can be formed using two transmission lines (main and coupled) on, for example, a silicon (Si) handle wafer substrate or a silicon-on-insulator (SOI) handle wafer substrate to create a capacitive Coupling effects and inductive coupling effects. Substrate effects in a coupler can include capacitive effects from the capacitance between the coupler transmission line and the handle wafer substrate, and inductive effects due to induced inductive currents flowing in the handle wafer substrate, sometimes referred to as Called the "mirror effect". Inductive inductor currents flowing in the silicon handle wafer substrate can generate nonlinearities in the form of harmonics, such as but not limited to second order (2fo) harmonics (the second harmonic of the signal passing through the coupler transmission line). The buried oxide in the SOI substrate is an insulator that helps isolate the silicon substrate handle die from the coupler lines, reducing substrate effects but not completely eliminating them.

耦合器通常包含承载例如RF信号的主线,以及用于获得通过主线行进的信号的特性的指示的耦合线。耦合器中的主线和耦合线可以以各种方式布置(例如,如图2A-2D所示)以提供电容性耦合和电感性耦合的不同相对程度。应当理解,在本文中所公开的任何实施例中的主线和耦合线或其部分可以在平行于包含它们的裸芯的表面的平面中彼此移位,和/或可以是在垂直于包含它们的裸芯的表面的平面中彼此移位,并且可以形成平面或三维耦合器。图2B中和本文中所公开的其它实施例所示的盘绕的主线和耦合线的各个部分可以在层堆叠体的不同层上,或者在包含它们的裸芯的电介质层堆叠体的不同电介质层之间,例如如图2C所示。如图2B和本文中所公开的其它实施例所示的主线和耦合线可以围绕垂直于包含它们的裸芯的表面的轴线盘绕(coil),可以围绕平行于包含它们的裸芯的表面的轴线盘绕,可以围绕关于包含它们的裸芯的表面成角度的轴线盘绕,或者它们的组合。此外,尽管在本文中描述为主线和耦合线,但是形成主线和耦合线的金属结构不需要是线性的,而是可以具有非线性形状。A coupler typically contains a main line carrying, for example, an RF signal, and a coupled line for obtaining an indication of the characteristics of the signal traveling through the main line. The main and coupled lines in a coupler can be arranged in various ways (eg, as shown in FIGS. 2A-2D ) to provide different relative degrees of capacitive and inductive coupling. It should be understood that the main and coupled lines, or portions thereof, in any of the embodiments disclosed herein may be displaced from each other in a plane parallel to the surface of the die containing them, and/or may be perpendicular to the surface of the die containing them. The surfaces of the die are displaced from each other in the plane and can form planar or three-dimensional couplers. Portions of the coiled main and coupled lines shown in FIG. 2B and other embodiments disclosed herein may be on different layers of the layer stack, or on different dielectric layers of the dielectric layer stack containing their die. Between, for example as shown in Figure 2C. The main and coupled wires as shown in FIG. 2B and other embodiments disclosed herein may coil around an axis perpendicular to the surface of the die containing them, may coil around an axis parallel to the surface of the die containing them. coiled, may be coiled about an axis angled with respect to the surface of the die containing them, or a combination thereof. Furthermore, although main and coupled lines are described herein, the metal structures forming the main and coupled lines need not be linear, but may have non-linear shapes.

能够减少耦合器中的衬底效应的结构在图3A中总体上以100示出。包含主线110和耦合线115的耦合器105设置在第一电介质层120上并与第一电介质层120接触。主线110和耦合线115可以包括金属或金属合金,金属合金包含例如铝、铜或本领域已知的其它金属或非金属导体。电介质层120可包括例如二氧化硅、氮化硅或本领域已知的其它电介质,或由其组成。电介质层120设置在有源层125上并与有源层125接触。有源层125在图3A中示出为包括N型硅,但在其它实施例中,可以是本领域已知的任何形式的半导体或半导体的组合。设置触点130(本文也称为“电压端子”)与有源层125电联通并物理接触。触点130允许电压V1从外部电压源(未示出)施加到有源层125。触点130可以包括例如铝、铜或本领域已知的适用于电触点的其它材料,或者在触点130的剩余物与有源层125之间的界面之间包含扩散阻挡层和/或粘附层132,扩散阻挡层和/或粘附层132由钛、氮化钛、钽、氮化钽、氧化铟、碳化钨或本领域已知的其它扩散阻挡和/或粘合层材料构成。掩埋电介质层135(例如,掩埋二氧化硅层)设置在有源层125下方并与有源层125接触。手柄晶片或支撑晶片140设置在掩埋电介质层135下方并与其接触。在一些实施例中,手柄晶片140是轻掺杂的或包括本征半导体,从而为高阻性,具有例如约1kΩ-cm或更高的电阻率。有源层125、掩埋电介质层135和手柄晶片140的组合可以统称为SOI衬底或SOI晶片。在一些实施例中,手柄晶片140可在处理期间例如通过背面研磨变薄或磨平。A structure capable of reducing substrate effects in a coupler is shown generally at 100 in FIG. 3A . The coupler 105 including the main line 110 and the coupled line 115 is disposed on and in contact with the first dielectric layer 120 . Main line 110 and coupled line 115 may comprise a metal or a metal alloy including, for example, aluminum, copper, or other metallic or non-metallic conductors known in the art. Dielectric layer 120 may include or consist of, for example, silicon dioxide, silicon nitride, or other dielectrics known in the art. The dielectric layer 120 is disposed on and in contact with the active layer 125 . Active layer 125 is shown in FIG. 3A as comprising N-type silicon, but in other embodiments may be any form or combination of semiconductors known in the art. Contacts 130 (also referred to herein as “voltage terminals”) are provided in electrical communication and in physical contact with active layer 125 . Contact 130 allows voltage V1 to be applied to active layer 125 from an external voltage source (not shown). Contact 130 may comprise, for example, aluminum, copper, or other materials known in the art to be suitable for electrical contacts, or include a diffusion barrier and/or a diffusion barrier between the remainder of contact 130 and the interface between active layer 125. Adhesion layer 132, diffusion barrier and/or adhesion layer 132 is composed of titanium, titanium nitride, tantalum, tantalum nitride, indium oxide, tungsten carbide, or other diffusion barrier and/or adhesion layer materials known in the art . A buried dielectric layer 135 (eg, a buried silicon dioxide layer) is disposed under and in contact with the active layer 125 . A handle or support wafer 140 is disposed below and in contact with the buried dielectric layer 135 . In some embodiments, the handle wafer 140 is lightly doped or includes an intrinsic semiconductor, and thus is highly resistive, having a resistivity of, for example, about 1 kΩ-cm or higher. The combination of active layer 125, buried dielectric layer 135, and handle wafer 140 may be collectively referred to as an SOI substrate or SOI wafer. In some embodiments, handle wafer 140 may be thinned or ground flat during processing, such as by backgrinding.

与掩埋电介质层135结合的有源层125可以用于将耦合器105与手柄晶片140电屏蔽,以减少或消除由于手柄晶片140的存在而在耦合器105中呈现的衬底效应。在使用中,当负电压V1施加到有源层125时,有源层125变得更导电并且起到类似于接地平面的作用,以将耦合器105与手柄晶片140电屏蔽或者增加将耦合器105与手柄晶片140电屏蔽的程度。不受特定理论的束缚,据信将负电压施加到有源层125的N型硅增加了有源层125中的自由电子的浓度,从而增加了有源层125的导电性。与没有电压V1施加到有源层125时耦合器105的性能相比,通过改善耦合器的线性度,将负电压V1施加到有源层125提高了耦合器105的性能,例如,通过减少由于在手柄晶片140中流动的感应电流而产生的二次谐波。Active layer 125 in combination with buried dielectric layer 135 may serve to electrically shield coupler 105 from handle wafer 140 to reduce or eliminate substrate effects present in coupler 105 due to the presence of handle wafer 140 . In use, when a negative voltage V1 is applied to the active layer 125, the active layer 125 becomes more conductive and acts like a ground plane to electrically shield the coupler 105 from the handle wafer 140 or to increase the coupling between the coupler 105 and the handle wafer 140. 105 is electrically shielded from the handle wafer 140. Without being bound by a particular theory, it is believed that applying a negative voltage to the N-type silicon of the active layer 125 increases the concentration of free electrons in the active layer 125 , thereby increasing the conductivity of the active layer 125 . Applying a negative voltage V1 to the active layer 125 improves the performance of the coupler 105 by improving the linearity of the coupler compared to the performance of the coupler 105 when no voltage V1 is applied to the active layer 125, for example, by reducing the The second harmonic generated by the induced current flowing in the handle wafer 140 .

在图3B中示出具有如图3A中所示的层堆叠体的耦合器结构的实施例的平面图。在该图中,第一电介质层120设置在有源层125的顶部的标记为120、125的区域中。图3A中所示的视图是沿着图3B中所示的线3A的视图。A plan view of an embodiment of a coupler structure having a layer stack as shown in FIG. 3A is shown in FIG. 3B. In this figure, a first dielectric layer 120 is disposed on top of an active layer 125 in regions marked 120 , 125 . The view shown in FIG. 3A is a view along line 3A shown in FIG. 3B .

图4A示出了总体上以100’示出的示例性结构,其能够在利用P型硅作为有源层125的耦合器中降低衬底效应。当施加的电压V1为正时,与没有将电压V1施加到有源层125的耦合器105的性能相比,有源层的导电性增加并且耦合器105的性能增加。还如图4A中所示,在一些实施例中,有源层125可以设置在主线110下面,但不一定是耦合线115。FIG. 4A shows an exemplary structure, shown generally at 100', that can reduce substrate effects in a coupler utilizing P-type silicon as the active layer 125. When the applied voltage V1 is positive, the conductivity of the active layer increases and the performance of the coupler 105 increases compared to the performance of the coupler 105 without the voltage V1 applied to the active layer 125 . As also shown in FIG. 4A , in some embodiments, active layer 125 may be disposed below main line 110 , but not necessarily coupled line 115 .

图4B中示出具有图4A中所示的层堆叠体的耦合器结构的实施例的平面图。在该图中,第一电介质层120设置在有源层125的顶部的标记为120、125的区域中。图4A中所示的视图是沿着图4B中所示的线4A的视图。A plan view of an embodiment of a coupler structure having the layer stack shown in FIG. 4A is shown in FIG. 4B. In this figure, a first dielectric layer 120 is disposed on top of an active layer 125 in regions marked 120 , 125 . The view shown in FIG. 4A is a view along line 4A shown in FIG. 4B.

使用可以被电偏置以使耦合器105与手柄晶片140而不是接地平面屏蔽的有源层125可提供各种优点。在一些实施例中,有源层125在耦合器105中提供比接地平面更低的插入损耗。接地平面效应是永久性的,并且其存在增加了耦合器的接地寄生效应,因此插入损耗更高。有源层125的使用及其可调偏置允许可选地使用有源层125作为接地平面。当不施加偏置(例如,0V/短路或浮动)时,将不会有从耦合器到高导电性有源层125(其表现得像接地平面)的附加寄生效应,因而插入损耗较低。而且,将有源层125偏置到不同电压的能力允许人们定制耦合器105的性能,例如,通过改变耦合器105的电感特性和电容特性,导致耦合器105的耦合因子的变化,和/或耦合器105在不同频率下的方向性。在一些实施例中,增加所施加的电压V1的幅度或绝对值(当有源层125是N型时增加到更负的电压或者当有源层125是P型时增加到更正的电压)可以减小耦合器105的耦合因数。Using an active layer 125 that can be electrically biased to shield the coupler 105 from the handle wafer 140 rather than the ground plane can provide various advantages. In some embodiments, the active layer 125 provides lower insertion loss in the coupler 105 than the ground plane. The ground plane effect is permanent and its presence increases the ground parasitics of the coupler, so the insertion loss is higher. The use of active layer 125 and its adjustable bias allows optional use of active layer 125 as a ground plane. When no bias is applied (eg 0V/short or floating), there will be no additional parasitics from the coupler to the highly conductive active layer 125 (which behaves like a ground plane), so the insertion loss is lower. Moreover, the ability to bias the active layer 125 to different voltages allows one to customize the performance of the coupler 105, for example, by changing the inductive and capacitive characteristics of the coupler 105, resulting in a change in the coupling factor of the coupler 105, and/or Directivity of coupler 105 at different frequencies. In some embodiments, increasing the magnitude or absolute value of the applied voltage V1 (to a more negative voltage when the active layer 125 is N-type or to a more positive voltage when the active layer 125 is P-type) may The coupling factor of the coupler 105 is reduced.

在另一个实施例中,可以在耦合器105的主线110或耦合线115下方提供附加的电介质层。例如,如图5A中总体上以200所示,设置在主线110下方并且在耦合线115上方(或反之亦然)的电介质层205可以设置为主线110或耦合线115中的一个在主线110或耦合线115中的另一个的上方或下方通过,以产生如例如图2B所示的结构。电介质层205可以包括与第一电介质层120相同或不同的一种或多种材料,或者由与第一电介质层120相同或不同的一种或多种材料构成。In another embodiment, an additional dielectric layer may be provided below the main line 110 or coupled line 115 of the coupler 105 . For example, as shown generally at 200 in FIG. 5A , a dielectric layer 205 disposed below main line 110 and above coupled line 115 (or vice versa) may be disposed over one of main line 110 or coupled line 115 over main line 110 or One of the coupled lines 115 is passed over or under the other to produce a structure as shown in, for example, FIG. 2B . The dielectric layer 205 may include or consist of one or more materials that are the same as or different from the first dielectric layer 120 .

图5B中示出了如图5A中所示的具有层堆叠体的耦合器结构的实施例的平面图。从该图中省略了第一电介质层120,以示出有源层125和电介质层205相对于主线110和耦合线115的位置。在图5B中,耦合线115以虚线示出以指示其在电介质层205下方。图5A中所示的视图是沿着图5B中所示的线5A的视图。A plan view of an embodiment of a coupler structure having a layer stack as shown in FIG. 5A is shown in FIG. 5B. The first dielectric layer 120 is omitted from this figure to illustrate the positions of the active layer 125 and the dielectric layer 205 relative to the main line 110 and the coupled line 115 . In FIG. 5B , coupling line 115 is shown in dashed lines to indicate that it is below dielectric layer 205 . The view shown in FIG. 5A is a view along line 5A shown in FIG. 5B.

在另一个实施例中,如图5C中总体上以201所示,电介质层205与第一电介质层120基本上共同延伸或完全共同延伸。图5D中示出了具有图5C中所示的层堆叠体的耦合器结构的实施例的平面图。图5D中未单独示出第一电介质层120,因为它在标记为205、120的区域中与电介质层205共同延伸并设置在电介质层205下面。在图5D中,耦合线115以虚线示出以指示其在电介质层205下方。图5C中所示的视图是沿着图5D中所示的线5C的视图。In another embodiment, as shown generally at 201 in FIG. 5C , the dielectric layer 205 is substantially or fully coextensive with the first dielectric layer 120 . A plan view of an embodiment of a coupler structure having the layer stack shown in FIG. 5C is shown in FIG. 5D. The first dielectric layer 120 is not shown separately in FIG. 5D because it is coextensive with and disposed below the dielectric layer 205 in the regions labeled 205 , 120 . In FIG. 5D , coupling line 115 is shown in dashed lines to indicate that it is below dielectric layer 205 . The view shown in FIG. 5C is a view along line 5C shown in FIG. 5D.

替代地,如图5E所示,通常在202处,电介质层205具有延伸超出第一电介质层120的一个或多个边界的一个或多个边界。图5F示出了具有图5E中所示的层堆叠体的耦合器结构的实施例的平面图。在图5F中,耦合线115以虚线示出以指示其在电介质层205下方。图5E中所示的视图是沿着图5F中所示的线5E的视图。Alternatively, as shown in FIG. 5E , generally at 202 , the dielectric layer 205 has one or more boundaries that extend beyond the one or more boundaries of the first dielectric layer 120 . Figure 5F shows a plan view of an embodiment of a coupler structure having the layer stack shown in Figure 5E. In FIG. 5F , coupling line 115 is shown in dashed lines to indicate that it is below dielectric layer 205 . The view shown in FIG. 5E is a view along line 5E shown in FIG. 5F.

在另一个实施例中,如图5G中总体上以203所示,可以在触点130之上沉积电介质层205和第一电介质层120中的一个或两者。可以通过电介质层205和第一电介质层120中的一个或两者蚀刻通孔132,以提供对触点130的电接触。可以在蚀刻通孔132之前或之后沉积触点130。图5H中示出了具有图5G中所示的层堆叠体的耦合器结构的实施例的平面图。在图5H中,耦合线115以虚线示出以指示其在电介质层205下方。图5G中所示的视图是沿着图5H中所示的线5G的视图。In another embodiment, one or both of the dielectric layer 205 and the first dielectric layer 120 may be deposited over the contacts 130 , as shown generally at 203 in FIG. 5G . Vias 132 may be etched through one or both of dielectric layer 205 and first dielectric layer 120 to provide electrical contact to contacts 130 . The contacts 130 may be deposited before or after the vias 132 are etched. A plan view of an embodiment of a coupler structure having the layer stack shown in FIG. 5G is shown in FIG. 5H. In FIG. 5H , coupling line 115 is shown in dashed lines to indicate that it is below dielectric layer 205 . The view shown in FIG. 5G is a view along line 5G shown in FIG. 5H .

应当理解,在本文所公开的耦合器结构的任何实施例中,主线110和耦合线115不需要具有相似的尺寸,例如宽度或厚度。在各种实施例中,主线110可以比耦合线115更薄、更厚、更宽或更窄。图5I示出了总体上以204示出的实施例,其中主线110比耦合线115更宽和更薄。图5I还示出了耦合线115可以至少部分或完全地设置在主线110上方。如图所示,耦合线115可以直接设置在主线110上方。在其它实施例中,主线110可以至少部分地或完全地(居中或不设置)设置在耦合线115上方。图5J中示出了具有图5I中所示的层堆叠体的耦合器结构的实施例的平面图。在图5J中,耦合线115以虚线示出以指示其在电介质层205下方。图5I中所示的视图是沿着图5J中所示的线5I的视图。It should be understood that in any of the embodiments of the coupler structures disclosed herein, the main line 110 and the coupled line 115 need not have similar dimensions, such as width or thickness. In various embodiments, the main line 110 may be thinner, thicker, wider or narrower than the coupling line 115 . FIG. 5I shows an embodiment, shown generally at 204 , in which the main line 110 is wider and thinner than the coupled line 115 . FIG. 5I also shows that the coupled line 115 may be at least partially or completely disposed over the main line 110 . As shown, the coupled line 115 may be disposed directly over the main line 110 . In other embodiments, the main line 110 may be at least partially or completely (centered or not) disposed above the coupling line 115 . A plan view of an embodiment of a coupler structure having the layer stack shown in FIG. 5I is shown in FIG. 5J. In FIG. 5J , coupling line 115 is shown in dashed lines to indicate that it is below dielectric layer 205 . The view shown in FIG. 5I is a view along line 5I shown in FIG. 5J.

还应当理解,在本文公开的耦合器结构的任何实施例中,主线110和耦合线115不需要是如图4B、图5B、图5D、图5F、图5H和图5J中所示的直线,但是可以形成为线圈或具有凹凸部分,分别如图2B和图2C所示。It should also be understood that in any of the embodiments of the coupler structures disclosed herein, the main line 110 and the coupled line 115 need not be straight lines as shown in FIGS. 4B, 5B, 5D, 5F, 5H and 5J, However, it may be formed as a coil or with concavo-convex portions, as shown in FIGS. 2B and 2C, respectively.

在一些实施例中,耦合器105是双向耦合器。在各种实施例中,有源层125可以设置在整个耦合器105下方,仅在耦合器105的主线110下方,仅在耦合器的耦合线115下方,或者部分地在主线110、耦合线115或两者下方。在一些实施例中,有源层125可以是正方形或矩形形状或图案化为栅格或梳状结构。可以选择有源层125中的掺杂水平以控制要施加的最佳电压V1,以在耦合器105的不同部分中产生所需的衬底效应抑制。触点130可以位于与图3-图5J中所示的不同的位置或距离耦合器105不同的距离,并且在不同的实施例中可以具有不同的形状。例如,触点130可以是点接触、圆盘、线、正方形或矩形或另一多边形的形式。在一些实施例中,耦合器105的设计可以指示触点130的期望位置或配置。In some embodiments, coupler 105 is a bi-directional coupler. In various embodiments, the active layer 125 may be disposed under the entire coupler 105, only under the main line 110 of the coupler 105, only under the coupled line 115 of the coupler, or partially under the main line 110, the coupled line 115 or both below. In some embodiments, the active layer 125 may be square or rectangular in shape or patterned into a grid or comb structure. The doping level in the active layer 125 can be selected to control the optimal voltage V1 to be applied to produce the desired suppression of substrate effects in different parts of the coupler 105 . Contact 130 may be located at a different location or at a different distance from coupler 105 than shown in FIGS. 3-5J , and may have a different shape in different embodiments. For example, the contacts 130 may be in the form of point contacts, discs, lines, squares or rectangles, or another polygon. In some embodiments, the design of coupler 105 may dictate the desired location or configuration of contacts 130 .

图6示出了一个实施例,其中触点130在耦合器105的一侧上为线的形式。图7示出了触点130围绕有源层125上的耦合器105下面的区域的实施例。图8A和图8B示出了其中有源层125形成在主线110下面,但是耦合线115和触点130不处于线的形式的实施例。图8B是图8A沿线8B获取的横截面图。图9A和图9B示出了有源层125形成在耦合线115下面,但是主线110和触点130不处于线的形式的实施例,图9B是图9A沿线9B获取的横截面图。FIG. 6 shows an embodiment where the contacts 130 are in the form of wires on one side of the coupler 105 . FIG. 7 shows an embodiment where the contacts 130 surround the area below the coupler 105 on the active layer 125 . 8A and 8B illustrate an embodiment in which the active layer 125 is formed under the main line 110, but the coupling line 115 and the contact 130 are not in the form of a line. 8B is a cross-sectional view of FIG. 8A taken along line 8B. 9A and 9B show an embodiment in which the active layer 125 is formed under the coupling line 115, but the main line 110 and the contact 130 are not in the form of a line, and FIG. 9B is a cross-sectional view taken along line 9B of FIG. 9A.

图10示出了一个实施例,其中有源区域被图案化成分别设置在主线110和耦合线115下面的两个分开的有源区域125A、125B。每个有源区域125A、125具有相关联的触点130A、130B,在图10中以线的形式示出。电压V2、V3可以施加到相应的触点130A、130B。电压V2、V3可以相同或不同。Figure 10 shows an embodiment where the active area is patterned into two separate active areas 125A, 125B disposed under the main line 110 and the coupled line 115, respectively. Each active area 125A, 125 has an associated contact 130A, 130B, shown in line form in FIG. 10 . Voltages V2, V3 may be applied to respective contacts 130A, 130B. The voltages V2, V3 may be the same or different.

图11A示出了其中有源区域被图案化为设置在主线110和耦合线115的不同部分下面的多个分开的有源区域125C、125D、125E、125F、125G的实施例。每个分开的有源区域125C、125D、125E、125F、125G设置在主线110和耦合线115两者的一部分下面。有源区域125C、125D、125E、125F、125G具有相关联的触点130C、130D、130E、130F、130G。电压V3、V4、V5、V6和V7可以施加到相应的触点130C、130D、130E、130F、130G。电压V3、V4、V5、V6和V7中的任何一个或多个可以与电压V3、V4、V5、V6和V7中其它的任何一个或多个相同或不同。在图11A的实施例的变形中,如图11B所示,有源区域可以形成梳状结构,其中有源区域125C、125D、125E、125F、125G通过具有单个触点130的一个或多个汇流条125H连接。FIG. 11A shows an embodiment in which the active region is patterned as a plurality of separate active regions 125C, 125D, 125E, 125F, 125G disposed under different portions of the main line 110 and the coupled line 115 . Each separate active region 125C, 125D, 125E, 125F, 125G is disposed under a portion of both the main line 110 and the coupled line 115 . Active regions 125C, 125D, 125E, 125F, 125G have associated contacts 130C, 130D, 130E, 130F, 130G. Voltages V3, V4, V5, V6, and V7 may be applied to respective contacts 130C, 130D, 130E, 130F, 130G. Any one or more of voltages V3, V4, V5, V6 and V7 may be the same as or different from any other one or more of voltages V3, V4, V5, V6 and V7. In a variation of the embodiment of FIG. 11A , as shown in FIG. 11B , the active regions may form a comb-like structure in which the active regions 125C, 125D, 125E, 125F, 125G pass through one or more busbars with a single contact 130 strip 125H connection.

在其它实施例中,有源层125中的掺杂水平或掺杂剂浓度和/或通过一个或多个触点施加到有源层125的偏置电压可以在有源层125上变化并且在有源层125上产生偏置梯度效应。如图12中所示,有源层125的掺杂水平可以在垂直于通过主线110和/或耦合线115的信号传播方向的方向上变化。与施加到主线110的第二侧上的触点130I的电压V9相比,可以将不同的电压V8施加到主线110和/或耦合线115的第一侧上的触点130H,以在垂直于通过主线110和/或耦合线115的信号传播方向的方向上在有源层125中产生偏置梯度。In other embodiments, the doping level or dopant concentration in active layer 125 and/or the bias voltage applied to active layer 125 through one or more contacts can be varied across active layer 125 and between A bias gradient effect is generated on the active layer 125 . As shown in FIG. 12 , the doping level of the active layer 125 may vary in a direction perpendicular to the signal propagation direction through the main line 110 and/or the coupled line 115 . A different voltage V8 may be applied to the contact 130H on the first side of the main line 110 and/or the coupled line 115 than the voltage V9 applied to the contact 130I on the second side of the main line 110, so as to be perpendicular to A bias gradient is generated in the active layer 125 in the direction of the signal propagation direction through the main line 110 and/or the coupling line 115 .

如图13中所示,在另一示例中,有源层125的掺杂水平可以在平行于通过主线110和/或耦合线115的信号传播方向的方向上变化。与施加到主线110的第二侧上的触点130K的电压V11相比,可以将不同的电压V10施加到主线110和/或耦合线115的第一侧上的触点130J和/或耦合线115,以在平行于通过主线110和/或耦合线115的信号传播方向的方向上在有源层125中产生偏置梯度。图12和13中的掺杂水平示出为随着有源层125上的距离单调变化,然而,应当理解,在其它实施例中,掺杂水平可以以对数、阶梯函数或其它期望的方式随着有源层125上的距离而变化。As shown in FIG. 13 , in another example, the doping level of the active layer 125 may vary in a direction parallel to the signal propagation direction through the main line 110 and/or the coupled line 115 . A different voltage V10 may be applied to the contact 130J on the first side of the main line 110 and/or the coupled line 115 and/or the coupled line than the voltage V11 applied to the contact 130K on the second side of the main line 110 115 to generate a bias gradient in the active layer 125 in a direction parallel to the signal propagation direction through the main line 110 and/or the coupling line 115 . The doping levels in FIGS. 12 and 13 are shown to vary monotonically with distance across the active layer 125, however, it should be understood that in other embodiments, the doping levels may be logarithmic, step function, or other desired manner. varies with the distance on the active layer 125 .

尽管未在图6-图13中示出,应当理解,在这些实施例中,适当的绝缘体或电介质层(例如图3-图5J中所示的第一电介质层120和/或图5A-5J中所示的电介质层205)使主线110和耦合线115彼此电绝缘,使主线110和耦合线115的部分彼此重叠,并且使主线110和耦合线115与(多个)触点130和(多个)有源层125彼此重叠。Although not shown in FIGS. 6-13, it should be understood that in these embodiments, a suitable insulator or dielectric layer (such as the first dielectric layer 120 shown in FIGS. 3-5J and/or FIGS. 5A-5J Dielectric layer 205 shown in ) electrically insulates main line 110 and coupled line 115 from each other, causes portions of main line 110 and coupled line 115 to overlap each other, and separates main line 110 and coupled line 115 from contact(s) 130 and (multiple) a) active layers 125 overlap each other.

在类似于图3A和3B中所示的耦合器上进行测试,以确定对有源层125施加负电压偏置对700MHz的二阶(2fo)谐波的影响。在测试装置中,主线110和耦合线115由铜形成,厚度为约3μm。主线110和耦合线115下方的氧化物层的厚度为约5μm。N型活性硅层的厚度为约0.14μm。掩埋氧化物层的厚度为约1μm。手柄晶片的厚度约为200μm。该测试的结果如图17所示。可以看出,二阶谐波的幅度随着负偏置从零伏偏置时的-98.9dBm增加到负五伏偏置时的-101.1dBm而减小。随着负偏置增加到负十伏,二阶谐波的幅度开始增加。有源层125偏置到负五伏的二阶谐波的幅度低于当有源层125悬空或短路接地时观察到的幅度。这些结果表明,如本文所公开的,在耦合器结构中的有源层上施加适当的电压偏置可以有效地降低衬底效应并提高耦合器的性能。Tests were performed on a coupler similar to that shown in FIGS. 3A and 3B to determine the effect of applying a negative voltage bias to the active layer 125 on the second order (2fo) harmonic at 700 MHz. In the test device, the main line 110 and the coupling line 115 were formed of copper with a thickness of about 3 μm. The thickness of the oxide layer under the main line 110 and the coupling line 115 is about 5 μm. The thickness of the N-type active silicon layer is about 0.14 μm. The thickness of the buried oxide layer is about 1 μm. The thickness of the handle wafer is about 200 μm. The results of this test are shown in FIG. 17 . It can be seen that the magnitude of the second order harmonic decreases as the negative bias increases from -98.9dBm at zero volt bias to -101.1dBm at negative five volt bias. As the negative bias increases to negative ten volts, the magnitude of the second harmonic begins to increase. The magnitude of the second harmonic with active layer 125 biased to negative five volts is lower than that observed when active layer 125 is left floating or shorted to ground. These results demonstrate that applying a proper voltage bias on the active layer in the coupler structure, as disclosed herein, can effectively reduce the substrate effect and improve the performance of the coupler.

本文中描述的耦合器100的实施例可以在各种不同的模块中实现,包含例如独立的耦合器模块、前端模块、将耦合器与天线切换网络组合的模块、阻抗匹配模块、天线调谐模块等。图14示出了模块300的一个示例,其可以包含本文所讨论的耦合器的任何实施例或示例。模块300具有封装衬底302,其配置为接收多个部件。在一些实施例中,这种部件可以包含具有如本文所述的一个或多个特征的裸芯200。例如,裸芯200可以包含功率放大器(PA)电路202和耦合器100。多个连接焊盘304可以便于诸如引线键合308到基板302上的连接焊盘310的电连接,以便于各种功率和信号传递到裸芯200和从裸芯200传递。Embodiments of the coupler 100 described herein can be implemented in a variety of different modules including, for example, stand-alone coupler modules, front-end modules, modules combining couplers with antenna switching networks, impedance matching modules, antenna tuning modules, etc. . FIG. 14 shows one example of a module 300 that may incorporate any embodiment or example of a coupler discussed herein. Module 300 has a packaging substrate 302 configured to receive a plurality of components. In some embodiments, such a component may include a die 200 having one or more features as described herein. For example, die 200 may include power amplifier (PA) circuitry 202 and coupler 100 . Plurality of connection pads 304 may facilitate electrical connections, such as wire bonds 308 , to connection pads 310 on substrate 302 to facilitate various power and signal transfers to and from die 200 .

在一些实施例中,其它部件可以安装在封装衬底302上或形成在封装衬底302上。例如,可以实现一个或多个表面安装器件(SMT)314和一个或多个匹配网络312。在一些实施例中,封装衬底302可以包含层压衬底。In some embodiments, other components may be mounted or formed on the packaging substrate 302 . For example, one or more surface mount components (SMT) 314 and one or more matching networks 312 may be implemented. In some embodiments, packaging substrate 302 may comprise a laminated substrate.

在一些实施例中,模块300还可以包含一个或多个包装结构,以例如提供保护并便于更容易地处理模块300。这种封装结构可以包含在包装衬底302之上形成的包覆模制件,其尺寸设计成基本上封装在其上的各种电路和部件。In some embodiments, module 300 may also contain one or more packaging structures, for example, to provide protection and to facilitate easier handling of module 300 . Such packaging structures may include an overmold formed over packaging substrate 302 , sized to substantially encapsulate the various circuits and components thereon.

应当理解,尽管在基于引线键合的电连接的背景下描述了模块300,但是本公开的一个或多个特征也可以以其它封装配置实现,包含倒装芯片配置。It should be appreciated that although module 300 is described in the context of wire bond based electrical connections, one or more features of the present disclosure may also be implemented in other packaging configurations, including flip chip configurations.

本文所公开的耦合器的实施例(可选地封装到模块300中)可以有利地用在各种电子装置中。电子装置的示例可以包含但不限于消费电子产品、消费电子产品的部件、电子测试设备、诸如基站的蜂窝通信基础设施等。电子装置的示例可以包含但是不限于智能手机、电话、电视、计算机显示器、计算机、调制解调器、手持计算机、笔记本计算机、平板计算机、电子书阅读器、可穿戴计算机(诸如智能手表)、个人数字助理(PDA)、微波炉、冰箱、汽车、立体声系统、DVD播放器、CD播放器、数字音乐播放器(诸如MP3播放器)、收音机、摄像机、相机、数码相机、便携式存储器芯片、保健监控装置、车载电子系统(诸如汽车电子系统或航空电子系统)、洗衣机、烘干机、洗衣机/干衣机、外围装置、手表、时钟等。此外,电子装置可以包含未完成的产品。Embodiments of couplers disclosed herein, optionally packaged into module 300, may be advantageously used in a variety of electronic devices. Examples of electronic devices may include, but are not limited to, consumer electronics, components of consumer electronics, electronic test equipment, cellular communication infrastructure such as base stations, and the like. Examples of electronic devices may include, but are not limited to, smartphones, telephones, televisions, computer monitors, computers, modems, handheld computers, notebook computers, tablet computers, e-book readers, wearable computers (such as smart watches), personal digital assistants ( PDA), microwave ovens, refrigerators, cars, stereo systems, DVD players, CD players, digital music players (such as MP3 players), radios, video cameras, still cameras, digital cameras, portable memory chips, healthcare monitoring devices, automotive electronics Systems (such as automotive electronics or avionics), washers, dryers, washer/dryers, peripherals, watches, clocks, etc. Additionally, electronic devices may contain unfinished products.

图15是根据某些实施例的包含耦合器的无线设备400的框图。无线装置400可以是蜂窝电话、智能电话、平板计算机、调制解调器、通信网络或配置用于语音和/或数据通信的任何其它便携式或非便携式装置。无线装置400包含接收和发送功率信号的天线440和耦合器100,耦合器100可以测量发送信号的强度并向其它电路元件提供测量强度的指示,以用于分析目的或调整后续发送。例如,耦合器100可以测量来自功率放大器(PA)410的发射RF功率信号,其放大来自收发器402的信号。收发器402可以配置为以已知的方式接收和发送信号。如本领域技术人员将理解的,功率放大器410可以是包含一个或多个功率放大器的功率放大器模块。无线装置400还可以包含电池404,以向无线装置中的各种电子部件提供操作功率。Figure 15 is a block diagram of a wireless device 400 including a coupler, according to some embodiments. Wireless device 400 may be a cellular phone, smart phone, tablet computer, modem, communication network, or any other portable or non-portable device configured for voice and/or data communications. Wireless device 400 includes antenna 440 to receive and transmit power signals and coupler 100, which may measure the strength of the transmitted signal and provide an indication of the measured strength to other circuit components for analysis purposes or to adjust subsequent transmissions. For example, coupler 100 may measure a transmit RF power signal from power amplifier (PA) 410 , which amplifies the signal from transceiver 402 . Transceiver 402 may be configured to receive and transmit signals in a known manner. As will be appreciated by those skilled in the art, the power amplifier 410 may be a power amplifier module containing one or more power amplifiers. The wireless device 400 may also contain a battery 404 to provide operating power to various electronic components in the wireless device.

图16是无线装置400的示例的更详细框图。如图所示,无线装置400可以从天线440接收和发送信号。收发器402配置为生成用于发送的信号和/或处理接收到的信号。生成的用于发送的信号由功率放大器(PA)418接收,其放大来自收发器402的所生成的信号。在一些实施例中,发送和接收功能可以在分开的部件(例如,发送模块和接收模块)中实现,或者在同一模块中实现。天线切换模块406可以配置为在不同的频带和/或模式、发送模式和接收模式等之间切换。还如图16所示,天线440接收经由天线切换模块406提供给收发器402的信号,并且还经由收发器402、PA 418、耦合器100以及天线切换模块406从无线装置400发送信号。然而,在其它示例中,可以使用多个天线。FIG. 16 is a more detailed block diagram of an example of a wireless device 400 . Wireless device 400 may receive and transmit signals from antenna 440 as shown. The transceiver 402 is configured to generate signals for transmission and/or process received signals. The generated signal for transmission is received by a power amplifier (PA) 418 , which amplifies the generated signal from transceiver 402 . In some embodiments, sending and receiving functions may be implemented in separate components (eg, a sending module and a receiving module), or in the same module. The antenna switching module 406 may be configured to switch between different frequency bands and/or modes, transmit and receive modes, and the like. As also shown in FIG. 16 , antenna 440 receives signals provided to transceiver 402 via antenna switching module 406 and also transmits signals from wireless device 400 via transceiver 402 , PA 418 , coupler 100 , and antenna switching module 406 . However, in other examples, multiple antennas may be used.

图16的无线装置400还包括:功率管理系统408,其连接到收发器402,收发器402管理用于无线装置的操作的功率。功率管理系统408还可以控制基带子系统410和无线装置400的其它部件的操作。功率管理系统408以已知的方式经由电池404向无线装置400供电,并且包含可以控制信号传输的一个或多个处理器或控制器,并且还可以基于例如要传输的信号的频率来配置耦合器100。The wireless device 400 of FIG. 16 also includes a power management system 408 connected to the transceiver 402 that manages power for operation of the wireless device. Power management system 408 may also control the operation of baseband subsystem 410 and other components of wireless device 400 . The power management system 408 provides power to the wireless device 400 via the battery 404 in a known manner and contains one or more processors or controllers that can control the transmission of signals and can also configure the couplers based on, for example, the frequency of the signal to be transmitted. 100.

在一个实施例中,基带子系统410连接到用户接口412,以便于向用户提供和从用户接收的语音和/或数据的各种输入和输出。基带子系统410还可以连接到存储器414,存储器414配置为储存数据和/或指令以便于无线装置的操作和/或为用户提供信息的储存。In one embodiment, the baseband subsystem 410 is connected to a user interface 412 to facilitate various inputs and outputs of voice and/or data to and received from a user. Baseband subsystem 410 may also be coupled to memory 414 configured to store data and/or instructions to facilitate operation of the wireless device and/or provide storage of information to a user.

功率放大器418可用于放大各种RF或其它频带传输信号。例如,功率放大器418可以接收使能信号,该使能信号可以用于脉冲(pulse)功率放大器的输出以帮助发送无线局域网(WLAN)信号或任何其它合适的脉冲信号。功率放大器418可以配置为放大各种类型的信号中的任何一种,包含例如全球移动系统(GSM)信号、码分多址(CDMA)信号、W-CDMA信号、长期演进(LTE)信号或EDGE信号。在某些实施例中,功率放大器110和包含开关等的相关联部件可以使用例如pHEMT或BiFET晶体管制造在GaAs衬底上,或者使用CMOS晶体管制造在硅衬底上。Power amplifier 418 may be used to amplify various RF or other frequency band transmission signals. For example, power amplifier 418 may receive an enable signal that may be used to pulse the output of the power amplifier to facilitate transmission of wireless local area network (WLAN) signals or any other suitable pulsed signal. Power amplifier 418 may be configured to amplify any of various types of signals including, for example, Global System for Mobile (GSM) signals, Code Division Multiple Access (CDMA) signals, W-CDMA signals, Long Term Evolution (LTE) signals, or EDGE Signal. In some embodiments, the power amplifier 110 and associated components including switches and the like may be fabricated on a GaAs substrate using, for example, pHEMT or BiFET transistors, or on a silicon substrate using CMOS transistors.

仍然参考图16,无线装置400还可以包含耦合器100,耦合器100具有一个或多个定向EM耦合器,用于测量来自功率放大器418的发射功率信号,并用于向传感器模块416提供一个或多个耦合信号。图16中所示的耦合器100可以是参考图1-图13所描述的耦合器100、100’、200等中的任何一个。传感器模块416可以反过来将信息发送到收发器402和/或直接发送到功率放大器418作为反馈,以进行调整以调节功率放大器418的功率电平。以这种方式,耦合器100可以用于增强/降低具有相对低/高功率的传输信号的功率。然而,应当理解,耦合器100可以用于各种其它实施方式中。Still referring to FIG. 16 , the wireless device 400 may also include a coupler 100 having one or more directional EM couplers for measuring the transmit power signal from the power amplifier 418 and for providing one or more EM couplers to the sensor module 416. a coupled signal. The coupler 100 shown in FIG. 16 may be any of the couplers 100, 100', 200, etc. described with reference to FIGS. 1-13. The sensor module 416 may in turn send information to the transceiver 402 and/or directly to the power amplifier 418 as feedback for adjustments to adjust the power level of the power amplifier 418 . In this way, the coupler 100 can be used to boost/reduce the power of transmitted signals having relatively low/high power. However, it should be understood that coupler 100 may be used in various other implementations.

在无线装置400是具有时分多址(TDMA)架构的移动电话的某些实施例中,耦合器100可以有利地管理来自功率放大器418的RF发射功率信号的放大。在具有时分多址(TDMA)架构的移动电话中,诸如在全球移动通信系统(GSM)、码分多址(CDMA)和宽带码分多址(W-CDMA)系统中找到的那些中,功率放大器418可以用于在功率对时间的规定限度内上下移动功率包络。例如,可以为特定移动电话分配特定频率信道的传输时隙。在这种情况下,功率放大器418可以用于帮助随时间调整一个或多个RF功率信号功率电平,以便防止在指定的接收时隙期间发送信号干扰,并且降低功率消耗。在这种系统中,如上所述,耦合器100可用于测量功率放大器输出信号的功率,以帮助控制功率放大器418。图16中所示的实现方式是示例性而非限制性的。例如,图16的实施方式示出了耦合器100与RF信号的发送结合使用,然而,应当理解,本文所讨论的集成滤波器耦合器的各种示例也可以与接收的RF或其它信号一起使用。In certain embodiments where wireless device 400 is a mobile phone with a time division multiple access (TDMA) architecture, coupler 100 may advantageously manage the amplification of the RF transmit power signal from power amplifier 418 . In mobile phones with Time Division Multiple Access (TDMA) architectures, such as those found in Global System for Mobile Communications (GSM), Code Division Multiple Access (CDMA), and Wideband Code Division Multiple Access (W-CDMA) systems, the power Amplifier 418 may be used to shift the power envelope up and down within specified limits of power versus time. For example, specific mobile telephones may be assigned transmission slots on specific frequency channels. In this case, the power amplifier 418 may be used to help adjust one or more RF power signal power levels over time in order to prevent transmit signal interference and reduce power consumption during designated receive time slots. In such a system, coupler 100 may be used to measure the power of the power amplifier output signal to help control power amplifier 418, as described above. The implementation shown in Figure 16 is exemplary and not limiting. For example, the embodiment of FIG. 16 shows coupler 100 used in conjunction with the transmission of RF signals, however, it should be understood that the various examples of integrated filter couplers discussed herein may also be used with received RF or other signals. .

本文所使用的措辞和术语是出于描述的目的,不应被视为限制。如本文所使用,术语“多个”是指两个或更多个物品或部件。无论是在所写的说明书还是在权利要求书等中,术语“包括”、“包含”、“携带”、“具有”、“含有”和“涉及”都是开放式术语,即,意思是“包含但不仅限于”。从而,使用这些术语意味着包括其后列出的物品及其等同物,以及附加物品。只有过渡短语“由…组成”和“基本上由…组成”分别是关于权利要求的封闭或半封闭的过渡短语。在权利要求中使用诸如“第一”、“第二”、“第三”等的序数术语来修改权利要求元素本身并不意味着一个权利要求元素先于另一个的任何优先级、优先权或顺序,或在进行方法的行为的时间顺序,而是仅用作标签以将具有特定名称的权利要求元素与具有相同名称的另一个元素(如果没有使用序数术语)区分,以区分权利要求元素。The phraseology and terminology used herein are for the purpose of description and should not be regarded as limiting. As used herein, the term "plurality" refers to two or more items or components. Whether in the written specification or in the claims etc., the terms "comprising", "comprising", "carrying", "having", "containing" and "involving" are open-ended terms, that is, meaning " including but not limited to". Accordingly, use of these terms is meant to include the items listed thereafter and equivalents thereof, as well as additional items. Only the transitional phrases "consisting of" and "consisting essentially of" are respectively closed or semi-closed transitional phrases with respect to claims. The use of an ordinal term such as "first", "second", "third" etc. in a claim to modify a claim element does not in itself imply any priority, priority or order, or chronological order in which the acts of the method are performed, but are used only as labels to distinguish a claim element with a particular name from another element with the same name (if an ordinal term is not used), to distinguish a claim element.

已经如此描述了至少一个实施例的若干方面,应当理解,本领域技术人员将容易想到各种改变、修改和改进。任何实施例中描述的任何特征可以被包含在任何其它实施例的任何特征中,或被任何其它实施例的任何特征代替。任何改变、修改和改进旨在成为本公开的一部分,并且旨在落入本发明的范围内。相应地,前面的描述和附图仅是示例性的。Having thus described several aspects of at least one embodiment, it is to be appreciated various alterations, modifications, and improvements will readily occur to those skilled in the art. Any feature described in any embodiment may be included in, or replaced by, any feature of any other embodiment. Any alterations, modifications, and improvements are intended to be part of this disclosure, and are intended to be within the scope of the invention. Accordingly, the foregoing description and drawings are by way of illustration only.

Claims (23)

1. An electromagnetic coupler assembly, comprising:
a silicon-on-insulator (SOI) wafer comprising a handle wafer having an oxide layer disposed on a first surface thereof, an active semiconductor layer disposed on the oxide layer;
a dielectric material layer disposed on the active semiconductor layer;
a main transmission line disposed on the dielectric material layer; and
a coupling transmission line disposed on the dielectric material layer and configured to provide a coupling signal on the coupling transmission line in response to receiving an input signal received on the main transmission line, at least a portion of the main transmission line and the coupling transmission line disposed over at least a portion of the active semiconductor layer,
a voltage terminal disposed on the active semiconductor layer to receive a power supply voltage, the voltage terminal including a first portion disposed below the main transmission line and the coupled transmission line at a position disposed laterally to a first side of the main transmission line and the coupled transmission line in a direction parallel to a direction in which an intended signal flows through one of the main transmission line and the coupled transmission line, and a second portion disposed below the main transmission line and the coupled transmission line at a position disposed laterally to a second side of the main transmission line and the coupled transmission line in a direction parallel to a direction in which the intended signal flows through one of the main transmission line and the coupled transmission line.
2. The electromagnetic coupler assembly of claim 1, further comprising a second layer of dielectric material disposed above one of the main transmission line and the coupled transmission line and below the other of the main transmission line and the coupled transmission line.
3. The electromagnetic coupler assembly of claim 1, wherein the active semiconductor layer comprises one of N-type silicon and P-type silicon.
4. The electromagnetic coupler assembly of claim 1, wherein the voltage terminal is located on a single side of the main transmission line and the coupled transmission line.
5. The electromagnetic coupler assembly of claim 1, wherein the voltage terminal surrounds an area beneath a portion of the main transmission line and the coupled transmission line.
6. The electromagnetic coupler assembly of claim 1, wherein the active semiconductor layer is disposed under a portion of the main transmission line but not under the coupled transmission line.
7. The electromagnetic coupler assembly of claim 1, wherein the active semiconductor layer is disposed under a portion of the coupled transmission line but not under the main transmission line.
8. The electromagnetic coupler assembly of claim 1, wherein the active semiconductor layer comprises: a first portion disposed below a portion of the coupled transmission line; and a second portion electrically isolated from the first portion and disposed below a portion of the main transmission line.
9. The electromagnetic coupler assembly of claim 8, comprising a first voltage terminal in electrical communication with a first portion of the active semiconductor layer and a second voltage terminal in electrical communication with a second portion of the active semiconductor layer.
10. The electromagnetic coupler assembly of claim 1, wherein the active semiconductor layer comprises a plurality of portions electrically isolated from one another, each of the plurality of portions disposed under a different respective portion of the main transmission line and the coupled transmission line.
11. The electromagnetic coupler assembly of claim 10, wherein each of the plurality of portions of the active semiconductor layer includes a respective voltage terminal.
12. The electromagnetic coupler assembly of claim 1, wherein said active semiconductor layer comprises a doping concentration that varies along a direction perpendicular to an intended signal flow direction through one of said main transmission line and said coupled transmission line.
13. The electromagnetic coupler assembly of claim 1, wherein the active semiconductor layer comprises a doping concentration that varies along a direction parallel to an intended signal flow direction through one of the main transmission line and the coupled transmission line.
14. The electromagnetic coupler assembly of any of the preceding claims, wherein applying the supply voltage to the active semiconductor layer reduces a magnitude of a substrate effect in the electromagnetic coupler assembly as compared to a magnitude of the substrate effect in the electromagnetic coupler when the supply voltage is not applied to the active semiconductor layer.
15. A packaged module, comprising:
an electromagnetic coupler assembly, the electromagnetic coupler assembly comprising:
a silicon-on-insulator (SOI) wafer comprising a handle wafer having an oxide layer disposed on a first surface thereof,
an active semiconductor layer disposed on the oxide layer,
a dielectric material layer disposed on the active semiconductor layer,
a main transmission line disposed on the dielectric material layer, an
A coupling transmission line disposed on the dielectric material layer and configured to provide a coupled signal on the coupling transmission line in response to receiving an input signal received on the main transmission line, at least a portion of the main transmission line and the coupling transmission line being disposed over at least a portion of the active semiconductor layer,
a voltage terminal disposed on the active semiconductor layer to receive a power supply voltage, the voltage terminal including a first portion disposed below the main transmission line and the coupled transmission line at a position disposed laterally to a first side of the main transmission line and the coupled transmission line in a direction parallel to a direction in which an intended signal flows through one of the main transmission line and the coupled transmission line, and a second portion disposed below the main transmission line and the coupled transmission line at a position disposed laterally to a second side of the main transmission line and the coupled transmission line in a direction parallel to a direction in which the intended signal flows through one of the main transmission line and the coupled transmission line.
16. An electronic device comprising the packaged module of claim 15.
17. A wireless communication device comprising the encapsulation module of claim 15.
18. A method of manufacturing an electromagnetic coupler assembly, comprising:
depositing a layer of dielectric material on an upper surface of an active semiconductor of a silicon-on-insulator (SOI) wafer, the wafer comprising the active semiconductor layer, a buried oxide layer disposed below the active semiconductor layer, and a handle wafer disposed below the buried oxide layer;
forming an electrical contact to the active semiconductor layer;
forming a main transmission line over the layer of dielectric material; and
forming a coupled transmission line over the layer of dielectric material, the coupled transmission line configured to provide a coupled signal on the coupled transmission line in response to receiving an input signal received on the main transmission line, at least a portion of one of the main transmission line and the coupled transmission line being formed over at least a portion of the active semiconductor layer,
the electrical contact includes a first portion disposed below the main transmission line and the coupled transmission line at a location disposed transverse to a first side of the main transmission line and the coupled transmission line in a direction parallel to a direction of expected signal flow through one of the main transmission line and the coupled transmission line, and a second portion disposed below the main transmission line and the coupled transmission line at a location disposed transverse to a second side of the main transmission line and the coupled transmission line in a direction parallel to a direction of expected signal flow through one of the main transmission line and the coupled transmission line.
19. The method of claim 18 wherein the main transmission line and the coupled transmission line are both formed in contact with an upper surface of the layer of dielectric material.
20. The method as recited in claim 18, further comprising:
forming one of the main transmission line and the coupling transmission line in contact with an upper surface of the dielectric material layer;
forming a second layer of dielectric material over the layer of dielectric material; and
the other of the main transmission line and the coupling transmission line is formed on an upper surface of the second dielectric material layer.
21. The method of claim 18, wherein one of the main transmission line and the coupled transmission line is formed over at least a portion of the active semiconductor layer and the other of the main transmission line and the coupled transmission line is not formed over at least a portion of the active semiconductor layer.
22. The method of claim 18, wherein the main transmission line and the coupling transmission line are both formed over at least a portion of the active semiconductor layer.
23. The method of claim 18, further comprising removing at least a lower portion of the handle wafer.
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US20170287854A1 (en) 2017-10-05

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