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CN109119514B - A kind of preparation method of light-emitting diode epitaxial wafer and light-emitting diode epitaxial wafer - Google Patents

A kind of preparation method of light-emitting diode epitaxial wafer and light-emitting diode epitaxial wafer Download PDF

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CN109119514B
CN109119514B CN201810730032.5A CN201810730032A CN109119514B CN 109119514 B CN109119514 B CN 109119514B CN 201810730032 A CN201810730032 A CN 201810730032A CN 109119514 B CN109119514 B CN 109119514B
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葛永晖
郭炳磊
王群
吕蒙普
胡加辉
李鹏
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HC Semitek Zhejiang Co Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01Manufacture or treatment
    • H10H20/011Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/013Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
    • H10H20/0133Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials
    • H10H20/01335Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials the light-emitting regions comprising nitride materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
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    • H10H20/811Bodies having quantum effect structures or superlattices, e.g. tunnel junctions
    • H10H20/812Bodies having quantum effect structures or superlattices, e.g. tunnel junctions within the light-emitting regions, e.g. having quantum confinement structures
    • HELECTRICITY
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    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
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    • H10H20/80Constructional details
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    • H10H20/816Bodies having carrier transport control structures, e.g. highly-doped semiconductor layers or current-blocking structures
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    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
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    • H10H20/817Bodies characterised by the crystal structures or orientations, e.g. polycrystalline, amorphous or porous
    • HELECTRICITY
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    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/81Bodies
    • H10H20/822Materials of the light-emitting regions
    • H10H20/824Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP
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Abstract

本发明公开了一种发光二极管外延片的制备方法及发光二极管外延片,属于半导体技术领域。制备方法包括:采用化学气相沉积技术在衬底上依次生长缓冲层、N型半导体层、有源层、P型半导体层和接触层,所述接触层为P型掺杂的氮化物;对所述接触层的表面进行电子辐照,增加所述接触层中的氮空位。本发明通过对接触层的表面进行电子辐照,改变接触层晶体的微观结构,影响接触层内缺陷的形态和数量,在不改变氮元素比例的情况下产生较多的氮空位,增加接触层中的氮空位,促进P型掺杂剂的并入,提高掺杂元素并入的有效性,改变由于重掺杂导致的高杂质状态,提高载流子的迁移率,改善电极与接触层的电学接触,降低串联电阻,提高整个发光二极管的光效。

Figure 201810730032

The invention discloses a preparation method of a light-emitting diode epitaxial wafer and a light-emitting diode epitaxial wafer, belonging to the technical field of semiconductors. The preparation method includes: using chemical vapor deposition technology to sequentially grow a buffer layer, an N-type semiconductor layer, an active layer, a P-type semiconductor layer and a contact layer on a substrate, and the contact layer is a P-type doped nitride; The surface of the contact layer is irradiated with electrons to increase nitrogen vacancies in the contact layer. By irradiating the surface of the contact layer with electrons, the invention changes the microstructure of the crystal of the contact layer, affects the form and quantity of defects in the contact layer, generates more nitrogen vacancies without changing the ratio of nitrogen elements, and increases the contact layer. The nitrogen vacancies in the P-type dopant promote the incorporation of P-type dopants, improve the effectiveness of the incorporation of doping elements, change the high impurity state caused by heavy doping, improve the mobility of carriers, and improve the electrode and contact layer. The electrical contact reduces the series resistance and improves the light efficiency of the entire LED.

Figure 201810730032

Description

一种发光二极管外延片的制备方法及发光二极管外延片A kind of preparation method of light-emitting diode epitaxial wafer and light-emitting diode epitaxial wafer

技术领域technical field

本发明涉及半导体技术领域,特别涉及一种发光二极管外延片的制备方法及发光二极管外延片。The invention relates to the technical field of semiconductors, in particular to a preparation method of a light emitting diode epitaxial wafer and a light emitting diode epitaxial wafer.

背景技术Background technique

发光二极管(英文:Light Emitting Diode,简称:LED)是一种能发光的半导体电子元件。LED因具有节能环保、可靠性高、使用寿命长等优点而受到广泛的关注,近年来在背光源和显示屏领域大放异彩,并且开始向民用照明市场进军。对于民用照明来说,光效和使用寿命是主要的衡量标准,因此增加LED的发光效率和提高LED的抗静电能力对于LED的广泛应用显得尤为关键。Light Emitting Diode (English: Light Emitting Diode, LED for short) is a semiconductor electronic component that can emit light. LEDs have attracted widespread attention due to their advantages of energy saving, environmental protection, high reliability, and long service life. For civil lighting, light efficiency and service life are the main criteria, so increasing the luminous efficiency of LEDs and improving the antistatic ability of LEDs are particularly critical for the wide application of LEDs.

外延片是LED制备过程中的初级成品。现有的LED外延片包括衬底、缓冲层、N型半导体层、有源层和P型半导体层,缓冲层、N型半导体层、有源层和P型半导体层依次层叠在衬底上。P型半导体层用于提供进行复合发光的空穴,N型半导体层用于提供进行复合发光的电子,有源层用于进行电子和空穴的辐射复合发光,衬底用于为外延材料提供生长表面;衬底的材料通常选择蓝宝石,N型半导体层等的材料通常选择氮化镓,蓝宝石和氮化镓为异质材料,两者之间存在较大的晶格失配,缓冲层用于缓解衬底和N型半导体层之间的晶格失配。另外,为了实现与芯片工艺中的电极之间形成良好的欧姆接触,通常会在P型半导体层上设置重掺杂的接触层。Epitaxial wafers are the primary finished products in the LED fabrication process. The existing LED epitaxial wafer includes a substrate, a buffer layer, an N-type semiconductor layer, an active layer and a P-type semiconductor layer, and the buffer layer, the N-type semiconductor layer, the active layer and the P-type semiconductor layer are sequentially stacked on the substrate. The P-type semiconductor layer is used to provide holes for recombination emission, the N-type semiconductor layer is used to provide electrons for recombination emission, the active layer is used for radiative recombination emission of electrons and holes, and the substrate is used to provide epitaxial materials Growth surface; The material of the substrate is usually sapphire, and the material of the N-type semiconductor layer is usually gallium nitride. Sapphire and gallium nitride are heterogeneous materials, and there is a large lattice mismatch between the two. It is used to alleviate the lattice mismatch between the substrate and the N-type semiconductor layer. In addition, in order to form a good ohmic contact with the electrodes in the chip process, a heavily doped contact layer is usually provided on the P-type semiconductor layer.

在实现本发明的过程中,发明人发现现有技术至少存在以下问题:In the process of realizing the present invention, the inventor found that the prior art has at least the following problems:

蓝宝石和氮化镓之间晶格失配产生的应力和缺陷会随着外延生长而延伸到接触层,加上接触层为重掺杂,因此接触层中的缺陷浓度很高,高浓度的缺陷会束缚载流子的迁移,造成LED的发光效率较低。The stress and defects caused by the lattice mismatch between sapphire and gallium nitride will extend to the contact layer with epitaxial growth, and the contact layer is heavily doped, so the defect concentration in the contact layer is very high, and the high concentration of defects The migration of carriers will be bound, resulting in low luminous efficiency of LED.

发明内容SUMMARY OF THE INVENTION

本发明实施例提供了一种发光二极管外延片的制备方法及其发光二极管外延片,能够解决现有技术接触层内高浓度的缺陷会束缚载流子的迁移、造成LED的发光效率较低的问题。所述技术方案如下:The embodiments of the present invention provide a preparation method of a light-emitting diode epitaxial wafer and a light-emitting diode epitaxial wafer, which can solve the problem that high-concentration defects in the contact layer in the prior art will constrain the migration of carriers and cause low luminous efficiency of LEDs. question. The technical solution is as follows:

一方面,本发明实施例提供了一种发光二极管外延片的制备方法,所述制备方法包括:On the one hand, an embodiment of the present invention provides a method for preparing a light-emitting diode epitaxial wafer, and the preparation method includes:

采用化学气相沉积技术在衬底上依次生长缓冲层、N型半导体层、有源层、P型半导体层和接触层,所述接触层为P型掺杂的氮化物;A buffer layer, an N-type semiconductor layer, an active layer, a P-type semiconductor layer and a contact layer are sequentially grown on the substrate by chemical vapor deposition technology, and the contact layer is a P-type doped nitride;

对所述接触层的表面进行电子辐照,增加所述接触层中的氮空位。The surface of the contact layer is irradiated with electrons to increase nitrogen vacancies in the contact layer.

可选地,电子辐照的辐射剂量为1016/cm2~1022/cm2Optionally, the radiation dose of electron irradiation is 10 16 /cm 2 to 10 22 /cm 2 .

可选地,所述对所述接触层的表面进行电子辐照,增加所述接触中的氮空位,包括:Optionally, performing electron irradiation on the surface of the contact layer to increase nitrogen vacancies in the contact includes:

采用透射电子显微镜提供的电子束作为光源,照射所述接触层的表面。The surface of the contact layer is irradiated with an electron beam provided by a transmission electron microscope as a light source.

优选地,所述电子束的直径为8μm~30μm。Preferably, the diameter of the electron beam is 8 μm˜30 μm.

可选地,所述制备方法还包括:Optionally, the preparation method also includes:

在所述对所述接触层的表面进行电子辐照之后,对所述接触层进行退火处理。After the electron irradiation of the surface of the contact layer, the contact layer is annealed.

优选地,退火处理的温度为700℃~900℃。Preferably, the temperature of the annealing treatment is 700°C to 900°C.

优选地,所述接触层在进行退火处理时处于氮气气氛中。Preferably, the contact layer is in a nitrogen atmosphere during the annealing process.

更优选地,所述氮气气氛的真空度为10-8Torr~10-6Torr。More preferably, the vacuum degree of the nitrogen atmosphere is 10 -8 Torr to 10 -6 Torr.

优选地,退火处理的时长为15min~50min。Preferably, the duration of the annealing treatment is 15min-50min.

另一方面,本发明实施例提供了一种发光二极管外延片,所述发光二极管外延片包括衬底、缓冲层、N型半导体层、有源层、P型半导体层和接触层,所述缓冲层、所述N型半导体层、所述有源层、所述P型半导体层和所述接触层依次层叠在所述衬底上,所述接触层的表面为经过电子辐照处理的表面。On the other hand, an embodiment of the present invention provides a light-emitting diode epitaxial wafer, the light-emitting diode epitaxial wafer includes a substrate, a buffer layer, an N-type semiconductor layer, an active layer, a P-type semiconductor layer, and a contact layer, and the buffer layer layer, the N-type semiconductor layer, the active layer, the P-type semiconductor layer and the contact layer are sequentially stacked on the substrate, and the surface of the contact layer is a surface treated by electron irradiation.

本发明实施例提供的技术方案带来的有益效果是:The beneficial effects brought by the technical solutions provided in the embodiments of the present invention are:

通过对接触层的表面进行电子辐照,改变接触层晶体的微观结构,影响接触层内缺陷的形态和数量,在不改变氮元素比例的情况下产生较多的氮空位,增加接触层中的氮空位,促进P型掺杂剂的并入,提高掺杂元素并入的有效性,改变由于重掺杂导致的高杂质状态,提高载流子的迁移率,改善电极与接触层的电学接触,降低串联电阻,提高整个发光二极管的光效。By irradiating the surface of the contact layer with electrons, the microstructure of the crystal of the contact layer is changed, the shape and quantity of defects in the contact layer are affected, and more nitrogen vacancies are generated without changing the proportion of nitrogen elements, increasing the amount of nitrogen in the contact layer. Nitrogen vacancies, promote the incorporation of P-type dopants, improve the effectiveness of the incorporation of doping elements, change the high impurity state due to heavy doping, improve the mobility of carriers, and improve the electrical contact between the electrode and the contact layer , reduce the series resistance and improve the light efficiency of the entire LED.

附图说明Description of drawings

为了更清楚地说明本发明实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。In order to illustrate the technical solutions in the embodiments of the present invention more clearly, the following briefly introduces the accompanying drawings used in the description of the embodiments. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can also be obtained from these drawings without creative effort.

图1是本发明实施例提供的一种发光二极管外延片的制备方法的流程图;1 is a flowchart of a method for preparing a light-emitting diode epitaxial wafer provided by an embodiment of the present invention;

图2是本发明实施例提供的一种发光二极管外延片的结构示意图。FIG. 2 is a schematic structural diagram of a light emitting diode epitaxial wafer provided by an embodiment of the present invention.

具体实施方式Detailed ways

为使本发明的目的、技术方案和优点更加清楚,下面将结合附图对本发明实施方式作进一步地详细描述。In order to make the objectives, technical solutions and advantages of the present invention clearer, the embodiments of the present invention will be further described in detail below with reference to the accompanying drawings.

本发明实施例提供了一种发光二极管外延片的制备方法,图1为本发明实施例提供的一种发光二极管外延片的制备方法的流程图,参见图1,该制备方法包括:An embodiment of the present invention provides a method for preparing a light-emitting diode epitaxial wafer. FIG. 1 is a flowchart of a method for preparing a light-emitting diode epitaxial wafer according to an embodiment of the present invention. Referring to FIG. 1 , the preparation method includes:

步骤101:采用化学气相沉积技术在衬底上依次生长缓冲层、N型半导体层、有源层、P型半导体层和接触层,接触层为P型掺杂的氮化物。Step 101: A buffer layer, an N-type semiconductor layer, an active layer, a P-type semiconductor layer and a contact layer are sequentially grown on the substrate by chemical vapor deposition technology, and the contact layer is a P-type doped nitride.

具体地,该步骤101可以包括:Specifically, this step 101 may include:

控制温度为400℃~600℃(优选为500℃),压力为400torr~600torr(优选为500torr),在衬底上生长厚度为15nm~35nm(优选为25nm)的缓冲层;The temperature is controlled to be 400°C to 600°C (preferably 500°C), the pressure is 400torr to 600torr (preferably 500torr), and a buffer layer with a thickness of 15nm to 35nm (preferably 25nm) is grown on the substrate;

控制温度为1000℃~1200℃(优选为1100℃),压力为400Torr~600Torr(优选为500torr),持续时间为5分钟~10分钟(优选为8分钟),对缓冲层进行原位退火处理;The control temperature is 1000°C to 1200°C (preferably 1100°C), the pressure is 400Torr to 600 Torr (preferably 500torr), the duration is 5 minutes to 10 minutes (preferably 8 minutes), and the buffer layer is annealed in-situ;

控制温度为1000℃~1200℃(优选为1100℃),压力为100torr~500torr(优选为300torr),在缓冲层上生长厚度为1μm~5μm(优选为3μm)的N型半导体层,N型半导体层中N型掺杂剂的掺杂浓度为1018cm-3~1019cm-3(优选为5*1018cm-3);The temperature is controlled to be 1000°C to 1200°C (preferably 1100°C), the pressure is 100torr to 500torr (preferably 300torr), and an N-type semiconductor layer with a thickness of 1 μm to 5 μm (preferably 3 μm) is grown on the buffer layer. The doping concentration of the N-type dopant in the layer is 10 18 cm -3 to 10 19 cm -3 (preferably 5*10 18 cm -3 );

控制压力为100torr~500torr(优选为300torr),在N型半导体层上生长有源层,有源层包括交替生长的多个量子阱和多个量子垒;量子阱的数量和量子垒的数量相同,量子垒的数量为5个~15个(优选为10个);量子阱的厚度为2.5nm~3.5nm(优选为3nm),量子阱的生长温度为720℃~829℃(优选为770℃);量子垒的厚度为9nm~20nm(优选为15nm),量子垒的生长温度为850℃~959℃(优选为900℃);The control pressure is 100torr to 500torr (preferably 300torr), and the active layer is grown on the N-type semiconductor layer, and the active layer includes multiple quantum wells and multiple quantum barriers grown alternately; the number of quantum wells is the same as the number of quantum barriers , the number of quantum barriers is 5 to 15 (preferably 10); the thickness of the quantum well is 2.5 nm to 3.5 nm (preferably 3 nm), and the growth temperature of the quantum well is 720 ° C to 829 ° C (preferably 770 ° C ); the thickness of the quantum barrier is 9nm to 20nm (preferably 15nm), and the growth temperature of the quantum barrier is 850°C to 959°C (preferably 900°C);

控制温度为850℃~1080℃(优选为960℃),压力为100torr~300torr(优选为200torr),在有源层上生长厚度为100nm~800nm(优选为450nm)的P型半导体层,P型半导体层中P型掺杂剂的掺杂浓度为1018cm-3~1019cm-3(优选为5*1018cm-3);Control the temperature to be 850°C to 1080°C (preferably 960°C), the pressure to be 100torr to 300torr (preferably 200torr), and to grow a P-type semiconductor layer with a thickness of 100nm to 800nm (preferably 450nm) on the active layer, P-type The doping concentration of the P-type dopant in the semiconductor layer is 10 18 cm -3 to 10 19 cm -3 (preferably 5*10 18 cm -3 );

控制温度为850℃~1050℃(优选为950℃),压力为100torr~300torr(优选为200torr),在P型半导体层上生长厚度为5nm~300nm(优选为150nm)的接触层。The temperature is controlled to be 850°C to 1050°C (preferably 950°C), the pressure is 100torr to 300torr (preferably 200torr), and a contact layer with a thickness of 5nm to 300nm (preferably 150nm) is grown on the P-type semiconductor layer.

具体地,衬底的材料可以采用[0001]晶向的蓝宝石,缓冲层的材料可以采用氮化镓(GaN)。N型半导体层的材料可以采用N型掺杂的氮化镓。量子阱的材料可以采用氮化铟镓(InGaN),量子垒的材料可以采用氮化镓。P型半导体层的材料可以采用P型掺杂的氮化镓。P型接触层的材料可以采用P型掺杂的氮化铟镓。Specifically, the material of the substrate can be sapphire with a [0001] crystal orientation, and the material of the buffer layer can be gallium nitride (GaN). The material of the N-type semiconductor layer can be N-type doped gallium nitride. The material of the quantum well can be indium gallium nitride (InGaN), and the material of the quantum barrier can be gallium nitride. The material of the P-type semiconductor layer can be P-type doped gallium nitride. The material of the P-type contact layer can be P-type doped indium gallium nitride.

可选地,在步骤101之前,该制备方法还可以包括:Optionally, before step 101, the preparation method may further include:

控制温度为1000℃~1200℃(优选为1100℃),在氢气气氛中对衬底进行1分钟~10分钟(优选为8分钟)的退火处理;The temperature is controlled to be 1000°C to 1200°C (preferably 1100°C), and the substrate is annealed for 1 minute to 10 minutes (preferably 8 minutes) in a hydrogen atmosphere;

对衬底进行氮化处理。The substrate is nitrided.

采用上述步骤对衬底的表面进行清洗,避免杂质掺入外延片中,影响整体的晶体质量,降低LED的发光效率。The above steps are used to clean the surface of the substrate to avoid doping impurities into the epitaxial wafer, affecting the overall crystal quality and reducing the luminous efficiency of the LED.

可选地,在缓冲层上生长N型半导体层之前,该制备方法还可以包括:Optionally, before growing the N-type semiconductor layer on the buffer layer, the preparation method may further include:

控制温度为1000℃~1100℃(优选为1050℃),压力为100torr~500torr(优选为300torr),在缓冲层上生长厚度为1μm~5μm(优选为3μm)的未掺杂氮化镓层。The temperature is controlled to be 1000°C to 1100°C (preferably 1050°C), the pressure is 100torr to 500torr (preferably 300torr), and an undoped gallium nitride layer with a thickness of 1 μm to 5 μm (preferably 3 μm) is grown on the buffer layer.

相应地,N型半导体层生长在未掺杂氮化镓层上。Accordingly, the N-type semiconductor layer is grown on the undoped gallium nitride layer.

利用未掺杂氮化镓层缓解衬底和N型半导体层之间的晶格失配。The lattice mismatch between the substrate and the N-type semiconductor layer is alleviated by using the undoped gallium nitride layer.

在具体实现时,缓冲层为首先在衬底上低温生长的一层较薄的氮化镓,因此也称为低温缓冲层。再在低温缓冲层进行氮化镓的纵向生长,会形成多个相互独立的三维岛状结构,称为三维成核层;然后在所有三维岛状结构上和各个三维岛状结构之间进行氮化镓的横向生长,形成二维平面结构,称为二维恢复层;最后在二维生长层上高温生长一层较厚的氮化镓,称为高温缓冲层。本实施例中将三维成核层、二维恢复层和高温缓冲层统称为未掺杂氮化镓层。In a specific implementation, the buffer layer is a thin layer of gallium nitride that is first grown on the substrate at a low temperature, so it is also called a low temperature buffer layer. Then, the longitudinal growth of gallium nitride in the low temperature buffer layer will form multiple independent three-dimensional island structures, which are called three-dimensional nucleation layers; then nitrogen is carried out on and between all three-dimensional island structures. The lateral growth of gallium nitride forms a two-dimensional planar structure, which is called a two-dimensional recovery layer; finally, a thicker layer of gallium nitride is grown on the two-dimensional growth layer at high temperature, which is called a high-temperature buffer layer. In this embodiment, the three-dimensional nucleation layer, the two-dimensional recovery layer and the high temperature buffer layer are collectively referred to as the undoped gallium nitride layer.

可选地,在N型半导体层上生长有源层之前,该制备方法还可以包括:Optionally, before growing the active layer on the N-type semiconductor layer, the preparation method may further include:

控制温度为800℃~1100℃(优选为950℃),压力为100torr~500torr(优选为300torr),在N型半导体层上生长厚度为50nm~500nm(优选为100nm)的应力释放层。The temperature is controlled to be 800°C to 1100°C (preferably 950°C), the pressure is controlled to be 100torr to 500torr (preferably 300torr), and a stress release layer with a thickness of 50nm to 500nm (preferably 100nm) is grown on the N-type semiconductor layer.

相应地,有源层生长在应力释放层上。Accordingly, the active layer is grown on the stress release layer.

具体地,应力释放层的材料可以采用镓铟铝氮(AlInGaN),可以有效释放蓝宝石和氮化镓晶格失配产生的应力,改善外延片的晶体质量,提高LED的发光效率。Specifically, the material of the stress release layer can be gallium indium aluminum nitride (AlInGaN), which can effectively release the stress caused by the lattice mismatch between sapphire and gallium nitride, improve the crystal quality of the epitaxial wafer, and improve the luminous efficiency of the LED.

优选地,铝组分的摩尔含量可以小于0.2,铟组分的摩尔含量可以小于0.05,避免造成不良影响。Preferably, the molar content of the aluminum component may be less than 0.2, and the molar content of the indium component may be less than 0.05 to avoid adverse effects.

可选地,在有源层上生长P型半导体层之前,该制备方法还可以包括:Optionally, before growing the P-type semiconductor layer on the active layer, the preparation method may further include:

控制温度为850℃~1080℃(优选为960℃),压力为200torr~500torr(优选为350torr),在有源层上生长厚度为50nm~150nm(优选为100nm)的电子阻挡层。The temperature is controlled to be 850°C to 1080°C (preferably 960°C), the pressure is 200torr to 500torr (preferably 350torr), and an electron blocking layer with a thickness of 50nm to 150nm (preferably 100nm) is grown on the active layer.

相应地,P型半导体层生长在电子阻挡层上。Accordingly, the P-type semiconductor layer is grown on the electron blocking layer.

具体地,电子阻挡层的材料可以采用P型掺杂的氮化铝镓(AlGaN),如AlyGa1-yN,0.1<y<0.5。Specifically, the material of the electron blocking layer can be P-type doped aluminum gallium nitride (AlGaN), such as AlyGa1 -yN , 0.1<y<0.5.

步骤102:对接触层的表面进行电子辐照,增加接触层中的氮空位。Step 102 : irradiating the surface of the contact layer with electrons to increase nitrogen vacancies in the contact layer.

在本实施例中,电子辐照(英文:Electron irradiation)是采用高能电子束照射材料,引起晶体原子位移,改善材料性能。In this embodiment, electron irradiation (English: Electron irradiation) uses high-energy electron beams to irradiate the material to cause displacement of crystal atoms and improve the properties of the material.

本发明实施例通过对接触层的表面进行电子辐照,改变接触层晶体的微观结构,影响接触层内缺陷的形态和数量,在不改变氮元素比例的情况下产生较多的氮空位,增加接触层中的氮空位,促进P型掺杂剂的并入,提高掺杂元素并入的有效性,改变由于重掺杂导致的高杂质状态,提高载流子的迁移率,改善电极与接触层的电学接触,降低串联电阻,提高整个发光二极管的光效。In the embodiment of the present invention, by irradiating the surface of the contact layer with electrons, the microstructure of the crystal of the contact layer is changed, the shape and quantity of defects in the contact layer are affected, and more nitrogen vacancies are generated without changing the proportion of nitrogen elements, increasing the Nitrogen vacancies in the contact layer promote the incorporation of P-type dopants, improve the effectiveness of the incorporation of doping elements, change the high impurity state due to heavy doping, improve the mobility of carriers, and improve the electrode and contact The electrical contact of the layers reduces the series resistance and improves the light efficiency of the entire light-emitting diode.

可选地,电子辐照的辐射剂量可以为1016/cm2~1022/cm2,优选为1019/cm2Alternatively, the radiation dose of electron irradiation may be 10 16 /cm 2 to 10 22 /cm 2 , preferably 10 19 /cm 2 .

如果电子辐照的辐射剂量小于1016/cm2,则可能由于电子辐照的辐射剂量太少而无法有效增加接触层中的氮空位,发光二极管的光效提升效果不明显;如果电子辐照的辐射剂量大于1022/cm2,则可能由于电辐照的辐射剂量太多而影响到接触层晶体的主体结构,反而降低发光二极管的光效。If the radiation dose of electron irradiation is less than 10 16 /cm 2 , the nitrogen vacancies in the contact layer may not be effectively increased due to the fact that the radiation dose of electron irradiation is too small, and the light efficiency improvement effect of the light-emitting diode is not obvious; If the radiation dose is greater than 10 22 /cm 2 , the main structure of the crystal of the contact layer may be affected due to too much radiation dose of electrical irradiation, and the light efficiency of the light-emitting diode will be reduced instead.

其中,辐射剂量为电子辐照表面单位面积辐射的电子总数。Among them, the radiation dose is the total number of electrons radiated per unit area of the electron-irradiated surface.

可选地,电子辐照时接触层所处环境的温度可以为20℃~150℃,优选为85℃。Optionally, the temperature of the environment in which the contact layer is irradiated may be 20°C to 150°C, preferably 85°C.

可选地,电子辐照时接触层所处环境的压力可以为5Torr~50Torr,如28Torr。Optionally, the pressure of the environment where the contact layer is placed during electron irradiation may be 5 Torr to 50 Torr, such as 28 Torr.

可选地,该步骤102可以包括:Optionally, this step 102 may include:

采用透射电子显微镜(英文:Transmission Electron Microscope,简称TEM)提供的电子束作为光源,照射接触层的表面。An electron beam provided by a transmission electron microscope (English: Transmission Electron Microscope, TEM for short) is used as a light source to illuminate the surface of the contact layer.

直接采用现有设备进行电子辐照,实现上更为简单方便。Directly using existing equipment for electron irradiation is simpler and more convenient to implement.

具体地,透射电子显微镜可以包括电子枪、聚光镜、样品室、物镜、中间镜、透射镜等。其中,电子枪(英文:electronic gun)用于发射电子,由阴极(英文:cathode)、栅极(英文:guid)、阳极(英文:anode)组成。Specifically, a transmission electron microscope may include an electron gun, a condenser lens, a sample chamber, an objective lens, an intermediate mirror, a transmission mirror, and the like. Among them, the electron gun (English: electronic gun) is used to emit electrons, and is composed of a cathode (English: cathode), a grid (English: guid), and an anode (English: anode).

阴极是产生自由电子的源头。在TEM中通常由加热灯丝(英文:filament)兼做阴极,灯丝的材料可以采用钨或者六硼化镧。当几安培的加热电流流过灯丝时,基于场致电子发射或者热电子发射机制,灯丝开始发射出自由电子。在一定的范围内,灯丝发射出来的自由电子量与加热电流强度呈正比。The cathode is the source of free electrons. In TEM, a heating filament (English: filament) is usually used as a cathode, and the material of the filament can be tungsten or lanthanum hexaboride. When a heating current of several amperes flows through the filament, the filament begins to emit free electrons based on the field electron emission or thermionic emission mechanism. Within a certain range, the amount of free electrons emitted by the filament is proportional to the heating current intensity.

阳极为一中心有空的金属圆筒。阳极处于阴极下方。当阳极上加有数十千伏或者上百千伏的加速电压时,将对阴极受热发射出来的自由电子产生强烈的引力作用,并使之从杂乱无章的状态变为有序的定向运动,同时把自由电子加速到一定的运动速度,形成一股束流射向阳极靶面。凡在轴心运动的电子束流,将穿过阳极中心的圆孔射出电子枪外,成为照射样品的光源。The anode is a metal cylinder with an empty center. The anode is below the cathode. When an accelerating voltage of tens of kilovolts or hundreds of kilovolts is applied to the anode, it will have a strong gravitational effect on the free electrons emitted by the heating of the cathode, and make them change from a disordered state to an orderly directional movement, and at the same time Accelerate the free electrons to a certain speed to form a beam to the target surface of the anode. The electron beam current moving in the axis will be shot out of the electron gun through the circular hole in the center of the anode and become the light source for illuminating the sample.

栅极位于阴极和阳极之间,靠近灯丝顶端。栅极为形似帽状的金属物,中心有一小孔供电子束通过。栅极上加有0~1000V的负电压(对阴极而言),这个负电压(称为栅偏压)能使电子束产生向中心轴汇聚的作用,同时对灯丝上自由电子的发射量也有一定的调控抑制作用。The grid is located between the cathode and anode, near the top of the filament. The grid is a cap-shaped metal object with a small hole in the center for the electron beam to pass through. A negative voltage of 0 to 1000V is applied to the grid (for the cathode), this negative voltage (called grid bias) can make the electron beam converge to the central axis, and at the same time, it also has a negative effect on the emission of free electrons on the filament. certain regulatory inhibition.

透射电子显微镜工作时,在灯丝电源的作用下,电流流过灯丝阴极,使灯丝发热。当灯丝发热达到2500℃以上时,灯丝产生自由电子,产生的自由电子逸出灯丝的表面。同时加速电压使阳极的表面聚集了密集的正电荷,形成了一个强大的正电场。在这个正电场的作用下,自由电子飞出了电子枪外。另外,调节栅偏压的大小可以控制电子束流量的大小。When the transmission electron microscope is working, under the action of the filament power supply, the current flows through the filament cathode, causing the filament to heat up. When the heating of the filament reaches above 2500°C, the filament generates free electrons, and the generated free electrons escape from the surface of the filament. At the same time, the accelerating voltage makes the surface of the anode gather dense positive charges, forming a strong positive electric field. Under the action of this positive electric field, free electrons fly out of the electron gun. In addition, adjusting the magnitude of the grid bias voltage can control the magnitude of the electron beam flux.

在实际应用中,可以采用200千电子伏特(英文:kilo electron volt,简称:keV)的TEM提供的电子束作为光源。进一步地,TEM的电源可以采用高达10万伏-30万伏的高压源。通过控制TEM中阴极的加热电流、TEM中阳极的加速电压、TEM中栅极的栅偏压、以及电子辐照的时长,实现电子辐照的辐射剂量为1016/cm2~1022/cm2In practical applications, an electron beam provided by a TEM of 200 kiloelectron volts (English: kilo electron volt, keV for short) can be used as a light source. Further, the power source of the TEM can use a high voltage source of up to 100,000 volts to 300,000 volts. By controlling the heating current of the cathode in the TEM, the accelerating voltage of the anode in the TEM, the grid bias voltage of the grid in the TEM, and the duration of the electron irradiation, the radiation dose of the electron irradiation is 10 16 /cm 2 -10 22 /cm 2 .

优选地,电子束的直径可以为8μm~30μm,优选为19μm。Preferably, the diameter of the electron beam may be 8 μm˜30 μm, preferably 19 μm.

如果电子束的直径小于8μm,则可能由于电子束的直径太小而导致电子束过于集中,进而对接触层的主体结构造成破坏,影响LED的发光效率;如果电子束的直径大于30μm,则可能由于电子束的直径太大而造成电子束过于分散,无法有效增加接触层中的氮空位,发光二极管的光效提升效果不明显。If the diameter of the electron beam is less than 8μm, the electron beam may be too concentrated because the diameter of the electron beam is too small, which will damage the main structure of the contact layer and affect the luminous efficiency of the LED; if the diameter of the electron beam is greater than 30μm, it may be Because the diameter of the electron beam is too large, the electron beam is too scattered, and the nitrogen vacancies in the contact layer cannot be effectively increased, and the light efficiency improvement effect of the light emitting diode is not obvious.

步骤103:对接触层进行退火处理。该步骤103为可选步骤。Step 103: Perform annealing treatment on the contact layer. This step 103 is an optional step.

通过退火处理消除部分缺陷和杂质态。Partial defects and impurity states are eliminated by annealing treatment.

可选地,退火处理的温度可以为700℃~900℃,实现效果较好。Optionally, the temperature of the annealing treatment may be 700° C.˜900° C., which achieves a better effect.

可选地,接触层在进行退火处理时可以处于氮气气氛中,实现效果较好。Optionally, the contact layer may be in a nitrogen atmosphere during the annealing treatment, which achieves a better effect.

优选地,氮气气氛的真空度可以为10-8Torr~10-6Torr,实现效果较好。Preferably, the vacuum degree of the nitrogen atmosphere can be 10 -8 Torr to 10 -6 Torr, which is better to achieve.

可选地,退火处理的时长可以为15min~50min,实现效果较好。Optionally, the duration of the annealing treatment may be 15 min to 50 min, which achieves a better effect.

需要说明的是,在上述步骤之后,会先将温度降低至500℃~900℃(优选为800℃),在氮气气氛中对外延片进行5分钟~15分钟(优选为10分钟)的退火处理,然后再将外延片的温度降低至室温,结束外延工艺生长。It should be noted that, after the above steps, the temperature is first lowered to 500°C to 900°C (preferably 800°C), and the epitaxial wafer is annealed for 5 minutes to 15 minutes (preferably 10 minutes) in a nitrogen atmosphere , and then the temperature of the epitaxial wafer is lowered to room temperature to end the growth of the epitaxial process.

控制温度、压力均是指控制生长外延片的反应腔中的温度、压力,如型号为VeecoK465i C4的金属有机化合物化学气相沉淀(英文:Metal Organic Chemical VaporDeposition,简称:MOCVD)设备中的温度、压力。实现时以高纯氢气、或者高纯氮气、或者氢气和氮气的混合气体作为载气,高纯氨气作为氮源,三甲基镓或三乙基镓作为镓源,三甲基铟作为铟源,三甲基铝作为铝源,硅烷作为N型掺杂剂,二茂镁作为P型掺杂剂。Controlling temperature and pressure refers to controlling the temperature and pressure in the reaction chamber for growing epitaxial wafers. . High-purity hydrogen, or high-purity nitrogen, or a mixture of hydrogen and nitrogen is used as carrier gas, high-purity ammonia is used as nitrogen source, trimethylgallium or triethylgallium is used as gallium source, and trimethylindium is used as indium source, trimethylaluminum as the aluminum source, silane as the N-type dopant, and MgO as the P-type dopant.

图1所示的制备方法的一种具体实现方式可以包括:A specific implementation of the preparation method shown in Figure 1 may include:

步骤201:控制温度为500℃,压力为500torr,在衬底上生长厚度为25nm的缓冲层。Step 201 : control the temperature to be 500° C. and the pressure to be 500 torr, and grow a buffer layer with a thickness of 25 nm on the substrate.

步骤202:控制温度为1100℃,压力为500torr,持续时间为8分钟,对缓冲层进行原位退火处理。Step 202 : control the temperature to be 1100° C., the pressure to be 500 torr, and the duration to be 8 minutes, and perform in-situ annealing treatment on the buffer layer.

步骤203:控制温度为1100℃,压力为300torr,在缓冲层上生长厚度为3μm的N型半导体层,N型半导体层中N型掺杂剂的掺杂浓度为5*1018cm-3Step 203 : controlling the temperature to 1100° C. and the pressure to 300 torr, growing an N-type semiconductor layer with a thickness of 3 μm on the buffer layer, and the doping concentration of the N-type dopant in the N-type semiconductor layer is 5*10 18 cm −3 .

步骤204:控制压力为300torr,在N型半导体层上生长有源层,有源层包括交替生长的10个量子阱和10个量子垒;量子阱的厚度为3nm,量子阱的生长温度为770℃;量子垒的厚度为15nm,量子垒的生长温度为900℃。Step 204 : the control pressure is 300torr, and the active layer is grown on the N-type semiconductor layer. The active layer includes 10 quantum wells and 10 quantum barriers grown alternately; the thickness of the quantum wells is 3nm, and the growth temperature of the quantum wells is 770 ℃; the thickness of the quantum barrier is 15nm, and the growth temperature of the quantum barrier is 900℃.

步骤205:控制温度为960℃,压力为200torr,在有源层上生长厚度为450nm的P型半导体层,P型半导体层中P型掺杂剂的掺杂浓度为5*1018cm-3Step 205 : control the temperature to be 960° C. and the pressure to be 200 torr, and grow a P-type semiconductor layer with a thickness of 450 nm on the active layer. The doping concentration of the P-type dopant in the P-type semiconductor layer is 5*10 18 cm −3 .

步骤206:控制温度为950℃,压力为200torr,在P型半导体层上生长厚度为150nm的接触层。Step 206 : control the temperature to be 950° C. and the pressure to be 200 torr, and grow a contact layer with a thickness of 150 nm on the P-type semiconductor layer.

步骤207:对接触层的表面进行电子辐照,增加接触层中的氮空位,电子辐照的辐射剂量为1016/cm2Step 207 : irradiating the surface of the contact layer with electrons to increase nitrogen vacancies in the contact layer, and the radiation dose of the electron irradiation is 10 16 /cm 2 .

将得到的外延片制成芯片,与没有进行电子辐照相比,芯片的光效提高了3%~5%。The obtained epitaxial wafer is made into a chip, and the light efficiency of the chip is improved by 3% to 5% compared with that without electron irradiation.

图1所示的制备方法的另一种具体实现方式可以包括:Another specific implementation of the preparation method shown in Figure 1 may include:

步骤301:控制温度为500℃,压力为500torr,在衬底上生长厚度为25nm的缓冲层。Step 301 : control the temperature to be 500° C. and the pressure to be 500 torr, and grow a buffer layer with a thickness of 25 nm on the substrate.

步骤302:控制温度为1100℃,压力为500torr,持续时间为8分钟,对缓冲层进行原位退火处理。Step 302 : control the temperature to be 1100° C., the pressure to be 500 torr, and the duration to be 8 minutes, and perform in-situ annealing treatment on the buffer layer.

步骤303:控制温度为1100℃,压力为300torr,在缓冲层上生长厚度为3μm的N型半导体层,N型半导体层中N型掺杂剂的掺杂浓度为5*1018cm-3Step 303 : control the temperature to be 1100° C. and the pressure to be 300 torr, grow an N-type semiconductor layer with a thickness of 3 μm on the buffer layer, and the doping concentration of the N-type dopant in the N-type semiconductor layer is 5*10 18 cm −3 .

步骤304:控制压力为300torr,在N型半导体层上生长有源层,有源层包括交替生长的10个量子阱和10个量子垒;量子阱的厚度为3nm,量子阱的生长温度为770℃;量子垒的厚度为15nm,量子垒的生长温度为900℃。Step 304 : the control pressure is 300torr, and the active layer is grown on the N-type semiconductor layer, and the active layer includes 10 quantum wells and 10 quantum barriers grown alternately; the thickness of the quantum wells is 3nm, and the growth temperature of the quantum wells is 770 ℃; the thickness of the quantum barrier is 15nm, and the growth temperature of the quantum barrier is 900℃.

步骤305:控制温度为960℃,压力为200torr,在有源层上生长厚度为450nm的P型半导体层,P型半导体层中P型掺杂剂的掺杂浓度为5*1018cm-3Step 305 : controlling the temperature to be 960° C. and the pressure of 200 torr, growing a P-type semiconductor layer with a thickness of 450 nm on the active layer, and the doping concentration of the P-type dopant in the P-type semiconductor layer is 5*10 18 cm −3 .

步骤306:控制温度为950℃,压力为200torr,在P型半导体层上生长厚度为150nm的接触层。Step 306 : control the temperature to be 950° C. and the pressure to be 200 torr, and grow a contact layer with a thickness of 150 nm on the P-type semiconductor layer.

步骤307:对接触层的表面进行电子辐照,增加接触层中的氮空位,电子辐照的辐射剂量为1019/cm2Step 307 : irradiating the surface of the contact layer with electrons to increase nitrogen vacancies in the contact layer, and the radiation dose of the electron irradiation is 10 19 /cm 2 .

将得到的外延片制成芯片,与没有进行电子辐照相比,芯片的光效提高了4%~7%。The obtained epitaxial wafer is made into a chip, and the light efficiency of the chip is increased by 4% to 7% compared with that without electron irradiation.

图1所示的制备方法的又一种具体实现方式可以包括:Another specific implementation of the preparation method shown in Figure 1 may include:

步骤401:控制温度为500℃,压力为500torr,在衬底上生长厚度为25nm的缓冲层。Step 401 : control the temperature to be 500° C. and the pressure to be 500 torr, and grow a buffer layer with a thickness of 25 nm on the substrate.

步骤402:控制温度为1100℃,压力为500torr,持续时间为8分钟,对缓冲层进行原位退火处理。Step 402 : control the temperature to be 1100° C., the pressure to be 500 torr, and the duration to be 8 minutes, and perform in-situ annealing treatment on the buffer layer.

步骤403:控制温度为1100℃,压力为300torr,在缓冲层上生长厚度为3μm的N型半导体层,N型半导体层中N型掺杂剂的掺杂浓度为5*1018cm-3Step 403 : control the temperature to 1100° C. and the pressure to 300 torr, grow an N-type semiconductor layer with a thickness of 3 μm on the buffer layer, and the doping concentration of the N-type dopant in the N-type semiconductor layer is 5*10 18 cm −3 .

步骤404:控制压力为300torr,在N型半导体层上生长有源层,有源层包括交替生长的10个量子阱和10个量子垒;量子阱的厚度为3nm,量子阱的生长温度为770℃;量子垒的厚度为15nm,量子垒的生长温度为900℃。Step 404: control the pressure to 300torr, grow an active layer on the N-type semiconductor layer, the active layer includes 10 quantum wells and 10 quantum barriers grown alternately; the thickness of the quantum wells is 3nm, and the growth temperature of the quantum wells is 770 ℃; the thickness of the quantum barrier is 15nm, and the growth temperature of the quantum barrier is 900℃.

步骤405:控制温度为960℃,压力为200torr,在有源层上生长厚度为450nm的P型半导体层,P型半导体层中P型掺杂剂的掺杂浓度为5*1018cm-3Step 405 : control the temperature to be 960° C. and the pressure to be 200 torr, and grow a P-type semiconductor layer with a thickness of 450 nm on the active layer. The doping concentration of the P-type dopant in the P-type semiconductor layer is 5*10 18 cm −3 .

步骤406:控制温度为950℃,压力为200torr,在P型半导体层上生长厚度为150nm的接触层。Step 406 : control the temperature to be 950° C. and the pressure to be 200 torr, and grow a contact layer with a thickness of 150 nm on the P-type semiconductor layer.

步骤407:对接触层的表面进行电子辐照,增加接触层中的氮空位,电子辐照的辐射剂量为1022/cm2Step 407 : irradiating the surface of the contact layer with electrons to increase nitrogen vacancies in the contact layer, and the radiation dose of the electron irradiation is 10 22 /cm 2 .

将得到的外延片制成芯片,与没有进行电子辐照相比,芯片的光效提高了2%~4%。The obtained epitaxial wafer is made into a chip, and the light efficiency of the chip is increased by 2% to 4% compared with that without electron irradiation.

本发明实施例提供了一种发光二极管外延片,适用于采用图1所示的制备方法制备而成。图2为本发明实施例提供的一种发光二极管外延片的结构示意图,参见图2,该发光二极管外延片该发光二极管外延片包括衬底10、缓冲层20、N型半导体层30、有源层40、P型半导体层50和接触层60,缓冲层20、N型半导体层30、有源层40、P型半导体层50和接触层60依次层叠在衬底10上。The embodiment of the present invention provides a light-emitting diode epitaxial wafer, which is suitable for being prepared by the preparation method shown in FIG. 1 . 2 is a schematic structural diagram of a light-emitting diode epitaxial wafer provided by an embodiment of the present invention. Referring to FIG. 2, the light-emitting diode epitaxial wafer includes a substrate 10, a buffer layer 20, an N-type semiconductor layer 30, an active Layer 40 , P-type semiconductor layer 50 and contact layer 60 , buffer layer 20 , N-type semiconductor layer 30 , active layer 40 , P-type semiconductor layer 50 and contact layer 60 are sequentially stacked on substrate 10 .

在本实施例中,接触层60的表面为经过电子辐照处理的表面。In this embodiment, the surface of the contact layer 60 is a surface treated by electron irradiation.

具体地,衬底10的材料可以采用蓝宝石。缓冲层20的材料可以采用氮化镓(GaN)。N型半导体层30的材料可以采用N型掺杂的氮化镓。有源层40可以包括多个量子阱和多个量子垒,多个量子阱和多个量子垒交替层叠设置;量子阱的材料可以采用氮化铟镓(InGaN),量子垒的材料可以采用氮化镓。P型半导体层50的材料可以采用P型掺杂的氮化镓。接触层60的材料可以采用P型掺杂的氮化铟镓。Specifically, the material of the substrate 10 can be sapphire. The material of the buffer layer 20 may be gallium nitride (GaN). The material of the N-type semiconductor layer 30 can be N-type doped gallium nitride. The active layer 40 may include multiple quantum wells and multiple quantum barriers, and multiple quantum wells and multiple quantum barriers are alternately stacked; the material of the quantum wells may be indium gallium nitride (InGaN), and the material of the quantum barriers may be nitrogen gallium. The material of the P-type semiconductor layer 50 may be P-type doped gallium nitride. The material of the contact layer 60 can be P-type doped indium gallium nitride.

更具体地,缓冲层20的厚度可以为15nm~35nm(优选为25nm)。N型半导体层30的厚度可以为1μm~5μm(优选为3μm),N型半导体层30中N型掺杂剂的掺杂浓度为1018cm-3~1019cm-3(优选为5*1018cm-3)。量子阱的数量和量子垒的数量相同,量子垒的数量可以为5个~15个(优选为10个);量子阱的厚度可以为2.5nm~3.5nm(优选为3nm),量子垒的厚度可以为9nm~20nm(优选为15nm)。P型半导体层60的厚度可以为100nm~800nm(优选为450nm),P型半导体层50中P型掺杂剂的掺杂浓度为1018cm-3~1019cm-3(优选为5*1018cm-3)。接触层60的厚度可以为5nm~300nm(优选为150nm)。More specifically, the thickness of the buffer layer 20 may be 15 nm to 35 nm (preferably 25 nm). The thickness of the N-type semiconductor layer 30 may be 1 μm˜5 μm (preferably 3 μm), and the doping concentration of the N-type dopant in the N-type semiconductor layer 30 is 10 18 cm −3 ˜10 19 cm −3 (preferably 5* 10 18 cm -3 ). The number of quantum wells is the same as the number of quantum barriers, and the number of quantum barriers can be 5 to 15 (preferably 10); the thickness of the quantum wells can be 2.5 nm to 3.5 nm (preferably 3 nm), and the thickness of the quantum barriers It may be 9 nm to 20 nm (preferably 15 nm). The thickness of the P-type semiconductor layer 60 may be 100 nm to 800 nm (preferably 450 nm), and the doping concentration of the P-type dopant in the P-type semiconductor layer 50 is 10 18 cm −3 to 10 19 cm −3 (preferably 5* 10 18 cm -3 ). The thickness of the contact layer 60 may be 5 nm to 300 nm (preferably 150 nm).

可选地,如图2所示,该发光二极管外延片还可以包括未掺杂氮化镓层70,未掺杂氮化镓层70设置在缓冲层20和N型半导体层30之间,以缓解衬底和N型半导体层之间的晶格失配。Optionally, as shown in FIG. 2 , the light-emitting diode epitaxial wafer may further include an undoped gallium nitride layer 70 , and the undoped gallium nitride layer 70 is disposed between the buffer layer 20 and the N-type semiconductor layer 30 to The lattice mismatch between the substrate and the N-type semiconductor layer is alleviated.

具体地,未掺杂氮化镓层70的厚度可以为1μm~5μm(优选为3μm)。Specifically, the thickness of the undoped gallium nitride layer 70 may be 1 μm˜5 μm (preferably 3 μm).

可选地,如图2所示,该发光二极管外延片还可以包括应力释放层80,应力释放层80设置在N型半导体层30和有源层40之间,以释放蓝宝石和氮化镓晶格失配产生的应力。Optionally, as shown in FIG. 2 , the light emitting diode epitaxial wafer may further include a stress release layer 80, and the stress release layer 80 is disposed between the N-type semiconductor layer 30 and the active layer 40 to release the sapphire and gallium nitride crystals. stress due to lattice mismatch.

具体地,应力释放层80的材料可以采用镓铟铝氮(AlInGaN);其中,铝组分的摩尔含量可以小于0.2,铟组分的摩尔含量可以小于0.05;应力释放层80的厚度可以为50nm~500nm(优选为100nm)。Specifically, the material of the stress release layer 80 may be gallium indium aluminum nitride (AlInGaN); the molar content of the aluminum component may be less than 0.2, and the molar content of the indium component may be less than 0.05; the thickness of the stress release layer 80 may be 50 nm ~500nm (preferably 100nm).

可选地,如图2所示,该发光二极管外延片还可以包括电子阻挡层90,电子阻挡层90设置在有源层40和P型半导体层50之间,以避免电子跃迁到P型半导体层中与空穴进行非辐射复合而降低LED的发光效率。Optionally, as shown in FIG. 2 , the light emitting diode epitaxial wafer may further include an electron blocking layer 90 , and the electron blocking layer 90 is disposed between the active layer 40 and the P-type semiconductor layer 50 to prevent electrons from transitioning to the P-type semiconductor layer. The non-radiative recombination with holes in the layer reduces the luminous efficiency of the LED.

具体地,电子阻挡层90的材料可以采用P型掺杂的氮化铝镓(AlGaN),如AlyGa1-yN,0.1<y<0.5;电子阻挡层90的厚度可以为50nm~150nm(优选为100nm)。Specifically, the material of the electron blocking layer 90 can be P-type doped aluminum gallium nitride (AlGaN), such as AlyGa1 -yN , 0.1<y<0.5; the thickness of the electron blocking layer 90 can be 50nm˜150nm (preferably 100 nm).

以上所述仅为本发明的较佳实施例,并不用以限制本发明,凡在本发明的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。The above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included in the protection of the present invention. within the range.

Claims (8)

1. A preparation method of a light emitting diode epitaxial wafer is characterized by comprising the following steps:
growing a buffer layer, an N-type semiconductor layer, an active layer, a P-type semiconductor layer and a contact layer on a substrate in sequence by adopting a chemical vapor deposition technology, wherein the contact layer is P-type doped nitride;
performing electron irradiation on the surface of the contact layer to increase nitrogen vacancies in the contact layer; the electron irradiation is to irradiate the material by adopting a high-energy electron beam, the electron beam is provided by a transmission electron microscope with 200 kilo-electron volts, and the power supply voltage of the transmission electron microscope is 10-30 kilo-volts; increasing nitrogen vacancies in the contact layer for facilitating incorporation of the P-type dopant;
and annealing the contact layer.
2. The production method according to claim 1, wherein the electron irradiation is performed at a radiation dose of 1016/cm2~1022/cm2
3. The production method according to claim 1 or 2, wherein the diameter of the electron beam is 8 μm to 30 μm.
4. The production method according to claim 1 or 2, wherein the temperature of the annealing treatment is 700 ℃ to 900 ℃.
5. The production method according to claim 1 or 2, characterized in that the contact layer is in a nitrogen atmosphere when the annealing treatment is performed.
6. The production method according to claim 5, wherein the nitrogen atmosphere has a degree of vacuum of 10-8Torr~10-6Torr。
7. The production method according to claim 1 or 2, wherein the duration of the annealing treatment is 15 to 50 min.
8. The light-emitting diode epitaxial wafer comprises a substrate, a buffer layer, an N-type semiconductor layer, an active layer, a P-type semiconductor layer and a contact layer, wherein the buffer layer, the N-type semiconductor layer, the active layer, the P-type semiconductor layer and the contact layer are sequentially laminated on the substrate; the electron irradiation is to irradiate the material by adopting a high-energy electron beam, the electron beam is provided by a transmission electron microscope with 200 kilo-electron volts, and the power supply voltage of the transmission electron microscope is 10-30 kilo-volts; increasing nitrogen vacancies in the contact layer for facilitating incorporation of the P-type dopant.
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