CN108963006A - A kind of solar battery and preparation method thereof and cell piece and photovoltaic module based on it - Google Patents

Abstract

The invention discloses a solar cell, a preparation method thereof, and a solar cell and a photovoltaic module based on the solar cell. The emitter on the silicon substrate of the solar cell is set as several independent emitters, and there are predetermined gaps between the edges of the adjacent emitters. The set spacing; the front electrode pattern and the back electrode pattern of the solar cell are set as several independent electrode patterns, and each emitter corresponds to an independent front electrode pattern and back electrode pattern. When slicing the solar cell of the present invention, the solar cell is cut along the part between the edges of adjacent emitters, which can prevent the solar cell from causing damage to the pn junction during the slicing process, causing the performance of the solar cell to attenuate, and the electrode after slicing Residual slurry and metal powder in the slicing process contaminate the incision, leading to edge leakage and short circuit; making the stress of the incision smaller, reducing cell fragments or cracks caused by stress release during slicing, and improving slicing yield and component reliability .

Description

A kind of solar cell and its preparation method and cell sheet and photovoltaic module based on it

technical field

The invention belongs to the technical field of crystalline silicon solar cells, and in particular relates to a solar cell, a preparation method thereof, and a solar cell and a photovoltaic module based thereon.

Background technique

A solar cell is a photoelectric device that uses the photovoltaic effect to directly convert light energy into electrical energy. According to the matrix material used to manufacture solar cells, it can generally be divided into silicon-based solar cells, compound solar cells, thin-film solar cells, organic solar cells, nano-solar cells, and the like. At present, silicon-based solar cell technology is the most mature and has been commercially produced on a large scale, accounting for more than 85% of the solar cell market.

A general crystalline silicon solar cell consists of a silicon substrate, an emitter, a light-trapping structure on the emitter surface, a passivation anti-reflection structure on the emitter surface, a passivation structure on the back of the silicon substrate, a front electrode, and a back electrode. The front electrode generally includes a main grid and a sub-gate perpendicular to each other, and the main grid and the sub-gate are mainly formed by printing and sintering paste containing silver. The back electrode generally includes a back silver electrode and a back aluminum corresponding to the front main grid. . The positive electrode pattern and the back electrode pattern generally maintain a blank area of about 0.5-1.0 mm from the edge of the silicon wafer. In order to reduce the consumption of silver paste, the busbars are generally segmented or hollowed out.

The technical scheme of prior art one:

The small cell units used to prepare half-cell modules or shingled modules are cut from complete cells, and the slicing methods include laser cutting, mechanical cutting, or laser cutting first and then mechanical splitting. The preparation process of the cut complete battery sheet is exactly the same as that of the battery sheet used in conventional components. The entire battery slice belongs to a battery cell. The front and back electrode patterns are also consistent with conventional components, that is, the main grid of the front electrode remains continuous, and the aluminum back field on the back also remains continuous and complete.

The scheme of prior art 2:

The small cell units used to prepare half-cell modules or shingled modules are cut from complete cells, and the slicing methods include laser cutting, mechanical cutting, or laser cutting first and then mechanical splitting. The preparation process of the cut complete battery sheet is exactly the same as that of the battery sheet used in conventional components. The entire battery slice belongs to a battery cell. Different from the prior art 1, the design of the front and back electrodes of the prior art 2 has been changed, that is, the front busbar remains disconnected at the slicing position, and correspondingly, the corresponding position on the back remains hollowed out and not covered with aluminum paste.

There are following disadvantages in prior art one and two:

In the sliced battery made in prior art 1, the back of the battery is covered with aluminum paste. During high-temperature sintering, aluminum and silicon eutectic. In the later cooling process, because the thermal expansion coefficient of aluminum is higher than that of silicon, the Stress builds up inside the cell, causing the cell to warp. During the slicing process, stress release occurs at the fracture site, and the damage caused by cutting will grow along with the stress release, and then extend to the inside of the battery. Therefore, the sliced battery produced according to the prior art is prone to fragments and cracks in the subsequent slicing and packaging processes. Moreover, during the slicing process of the prior art, the fracture is easily polluted by the silver powder on the front and the aluminum powder on the back, which may cause edge leakage at the slightest, and short-circuit the electrodes at the worst, resulting in a decrease in power output.

The second prior art prevents the front silver powder and the back aluminum powder from polluting the fracture. Moreover, the slicing position is not covered by aluminum paste, which also reduces the fragmentation rate and hidden crack rate caused by stress release during the cutting process. However, the sliced cells used in the prior art 1 and the prior art 2 are all complete single battery units, that is, the sliced cells used in the prior art 1 and the prior art 2 both contain only one pn junction. In the cutting process, the original complete pn junction is cut into several pn junction units, and the pn junction is the core structure of the solar cell, once it is destroyed, it will inevitably cause the attenuation of device performance, so prior art one and prior art Second, it will still cause the power output of the sliced battery to attenuate, and the yield rate is low.

Contents of the invention

In order to solve the problems existing in the prior art, the object of the present invention is to provide a solar cell.

A solar cell, wherein the emitters on the silicon substrate of the solar cell are set as several independent emitters, and there is a predetermined distance between the edges of adjacent emitters;

The front electrode pattern of the solar cell is set as several independent front electrode patterns, and each emitter corresponds to an independent front electrode pattern;

The back electrode pattern of the solar cell is set as several independent back electrode patterns, and each emitter corresponds to an independent back electrode pattern.

Preferably, the distance between the edges of adjacent emitters is 0.5 mm to 4 mm. Preferably, the front electrode pattern includes a main grid and a sub-gate connected to the main grid, and the back electrode pattern includes a rear aluminum paste region and a rear silver electrode.

Preferably, the front electrode pattern of the solar cell is separated in a pn junction-free region, and the back electrode pattern is separated in a pn junction-free region.

Preferably, the direction of the pn junction-free region of the solar cell is perpendicular to or parallel to the direction of the main grid.

Preferably, the solar cell is a monocrystalline silicon solar cell or a polycrystalline silicon solar cell.

The purpose of the present invention is also to provide a battery sheet.

A cell sheet, which is cut from the above solar cell along the area between the edges of adjacent emitters.

The purpose of the present invention is also to provide a photovoltaic module.

A photovoltaic component, the solar cell of the photovoltaic component is made of the above battery sheet.

Preferably, the photovoltaic module is a half-cut module or a shingled module.

The object of the present invention is also to provide a method for preparing a solar cell.

A kind of preparation method of solar cell, its process is as follows:

Prepare several independent emitters on one surface of the silicon substrate with a textured light-trapping structure, and there is a preset distance between the edges of adjacent emitters;

preparing a passivation layer on the surface of the silicon substrate prepared with an emitter;

Prepare the electrode pattern again. When preparing the electrode pattern, prepare an independent front electrode pattern on the surface of the passivation layer corresponding to each emitter; prepare an independent front electrode pattern on the other surface of the silicon substrate corresponding to each emitter. electrode pattern on the back.

Preferably, the emitter is prepared by high-temperature diffusion or ion implantation.

Compared with the prior art, the present invention has the following beneficial effects:

The solar cell of the present invention sets the emitter as several independent emitters, and there is a preset distance between the edges of adjacent emitters. When the solar cell is sliced, along the Partially cutting the solar cell can avoid the damage of the solar cell to the pn junction during the slicing process, thereby avoiding the performance attenuation of the solar cell caused by the damage of the pn junction; and because the front electrode pattern of the solar cell is set as several independent Front electrode pattern, each emitter corresponds to an independent front electrode pattern, the back electrode pattern of the solar cell is set to several independent back electrode patterns, and each emitter corresponds to an independent back electrode pattern, so slicing is also avoided The risk of edge leakage and short circuit caused by the residual slurry of the rear electrode and the metal powder contamination in the slicing process; it also makes the stress of the slit smaller, reducing the cell fragments or cracks caused by the stress release during the slicing process, and improving the slicing process. Yield and component reliability.

The battery sheet of the present invention is formed by cutting the solar cell of the present invention along the region between the edges of adjacent emitters, so the pn junction of the battery sheet is complete without damage, and the damage of the solar cell sheet due to the damage of the pn junction can be avoided. The power output is attenuated.

The solar cell of the photovoltaic module of the present invention is made of the battery sheet of the present invention. From the beneficial effect of the battery sheet of the present invention, it can be seen that the solar module of the present invention has high reliability and higher power output than the existing photovoltaic module.

From the beneficial effect of the solar cell of the present invention, it can be seen that the solar cell prepared by the preparation method of the present invention can avoid too much damage to the pn junction when cutting, thereby avoiding the performance attenuation of the solar cell caused by the damage of the pn junction; The risk of edge leakage and short circuit caused by residual electrode slurry after slicing and metal powder contamination in the slicing process; also makes the stress of the slit smaller, reducing cell fragments or cracks caused by stress release during slicing, and improving Slicing yield and component reliability.

Description of drawings

Fig. 1 is a cross-sectional view of an existing solar cell structure;

Fig. 2 is a cross-sectional view of the structure of a half-cut sliced battery prepared in the embodiment of the present invention;

Figure 3 is the front electrode pattern of the half-sliced battery prepared in the embodiment of the present invention (the position of the incision is vertical to the front busbar);

Figure 4 is the electrode pattern on the back of the half-sliced battery prepared in the embodiment of the present invention (the position of the incision is vertical to the front busbar);

Fig. 5 is the front electrode pattern of the half slice battery prepared by the embodiment of the present invention (the position of the incision is parallel to the front main grid);

Figure 6 is the electrode pattern on the back of the half-sliced battery prepared in the embodiment of the present invention (the position of the incision is parallel to the front busbar);

Fig. 7 is a cross-sectional view of a fifth slice battery structure prepared in the embodiment of the present invention;

Fig. 8 is a schematic diagram of the front mask layer in the process of preparing one-fifth sliced battery according to the embodiment of the present invention.

Among them, 1-passivation layer, 2-emitter, 3-silicon substrate, 4-aluminum back surface, 5-notch position, 6-silicon chip edge, 7-front electrode sub-gate, 8-front electrode main grid, 9- Frame of front electrode pattern, 11-edge covered by aluminum paste on the back, 12-covered area by aluminum paste, 13-silver electrode on the back, 14-mask layer.

Detailed ways

The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

Referring to Fig. 2 and Fig. 7, the emitter on the silicon substrate 3 of the solar cell of the present invention is set as several independent emitters 2, and there is a preset distance between the edges of adjacent emitters 2;

Referring to Figure 3 and Figure 5 again, the front electrode pattern of the solar cell is set to several independent front electrode patterns, each emitter 2 corresponds to an independent front electrode pattern, and the independent front electrode pattern is a complete front electrode pattern;

Referring to Fig. 4 and Fig. 6 again, the back electrode pattern of the solar cell is set as several independent back electrode patterns, and each emitter 2 corresponds to an independent back electrode pattern, and the independent back electrode pattern is a complete back electrode pattern.

As a preferred embodiment of the present invention, there is a pattern-free area between adjacent front electrode patterns, and this pattern-free area is the region corresponding to the front side of the solar cell without a pn junction region (that is, the front electrode figure of the solar cell is in the absence of a pn junction region). The pn junction area is separated), and the pattern-free area is used as the incision position 5 on the front side of the solar cell;

There is a pattern-free area between adjacent back electrode patterns, and the pattern-free region is the region corresponding to the pn junction region of the solar cell at the back of the solar cell (that is, the back electrode pattern is separated from the pn junction region), and the pattern-free region As the cutout position 5 on the back of the solar cell.

As a preferred embodiment of the present invention, the distance between the edges of adjacent emitters 2 is 0.5 millimeters to 4 millimeters, and there is no pattern area between adjacent front electrode patterns and no pattern area between adjacent back electrode patterns. The pattern area has a width of 0.5 mm to 4 mm.

3 and 5, as a preferred embodiment of the present invention, the front electrode pattern includes a main grid and a sub-gate connected to the main grid, and the back electrode pattern includes a rear aluminum paste region and a rear silver electrode.

Referring to FIG. 3 and FIG. 4 , as a preferred embodiment of the present invention, the disconnection direction of the pn junction of the solar cell is perpendicular to the main gate direction.

Referring to FIG. 5 and FIG. 6 , as a preferred embodiment of the present invention, the disconnection direction of the pn junction of the solar cell is parallel to the direction of the busbar.

Referring to Figures 2 to 8, the solar cell of the present invention can be made into 2, 3, 4, 5 or 6 battery units on a single silicon substrate 3 according to the design requirements of the components, and the solar energy can be cut accordingly. Into 2, 3, 4, 5 or 6 cells, etc.

As a preferred embodiment of the present invention, the solar cell is a monocrystalline silicon solar cell or a polycrystalline silicon solar cell.

The cell sheet provided by the present invention is formed by cutting the above solar cell along the area between the edges of adjacent emitters.

The solar cell of the photovoltaic module provided by the present invention is made of the above cell sheet.

As a preferred embodiment of the present invention, the photovoltaic module is a half-cut module or a shingled module.

The preparation method of solar cell provided by the invention, its process is as follows:

Prepare several independent emitters 2 on one surface of the silicon substrate 3 with a textured light-trapping structure, and there is a preset distance between the edges of adjacent emitters 2;

Prepare a passivation layer 1 on the surface of the silicon substrate prepared with the emitter 2;

Prepare the electrode pattern again, when preparing the electrode pattern, prepare an independent front electrode pattern on the surface of the passivation layer 1 corresponding to each emitter 2; on the other surface of the silicon substrate 3, correspond to each emitter 2 area to prepare independent back electrode patterns.

As a preferred embodiment of the present invention, the silicon substrate 3 forms a textured light-trapping structure by chemical etching.

As a preferred embodiment of the present invention, the electrode pattern is prepared by screen printing.

As a preferred embodiment of the present invention, electrode patterns are prepared by electroplating.

As a preferred embodiment of the present invention, the electrode pattern is prepared by inkjet printing.

As a preferred embodiment of the present invention, when preparing the emitter 2, it is prepared by high-temperature diffusion.

As a preferred embodiment of the present invention, when preparing the emitter 2, it is prepared by ion implantation.

The present invention prepares the emitter 2, and when forming a pn junction, it is not limited to the two preparation methods of high-temperature diffusion and ion implantation.

Example 1

The process of preparing solar cells in this embodiment is as follows:

(1) Texturing: Put the P-type monocrystalline silicon wafer of M2 size in potassium hydroxide alkali solution for anisotropic etching to form a pyramidal light-trapping structure;

(2) Diffusion: place the textured P-type monocrystalline silicon wafer in a tubular diffusion furnace, and perform high-temperature diffusion in a POCl ₃ gas atmosphere. After the diffusion is completed, a complete pn junction will be formed;

(3) Etching: Coat the surface of the diffused P-type single crystal silicon wafer with a layer of paraffin, and leave a blank area with a width of about 4 mm in the middle of the P-type single crystal silicon wafer without paraffin. The single crystal silicon wafer is etched in a chain cleaning tank to remove the side junction and back junction formed during the diffusion process and the pn junction in the paraffin-free area on the surface;

(4) Cleaning: Place the P-type monocrystalline silicon wafer coated with paraffin after etching in an aqueous paraffin cleaning solution for cleaning, remove the paraffin coating on the surface, and remove the phosphorus-containing silicon dioxide layer (PSG) on the surface ;

(5) PECVD coating: place the etched silicon wafer in a tube furnace, and coat the side with the pn junction to form a passivation film 1;

(6) Metallization: The front electrode screen pattern is designed according to Figure 3, and the back electrode screen pattern is designed according to Figure 4. After screen printing and high-temperature sintering, a half sliced battery is formed, and the section of the battery structure is shown in Figure 2.

Example 2

The process of preparing solar cells in this embodiment is as follows:

(1) Texturing: Put the P-type monocrystalline silicon wafer of M2 size in sodium hydroxide alkali solution for anisotropic etching to form a pyramidal light-trapping structure;

(2) Diffusion: place the textured P-type monocrystalline silicon wafer in a tubular diffusion furnace, and perform high-temperature diffusion in a POCl ₃ gas atmosphere. After the diffusion is completed, a complete pn junction will be formed;

(3) Etching: Coat the surface of the diffused P-type single crystal silicon wafer with a layer of paraffin, and leave a blank area with a width of about 4 mm in the middle of the P-type single crystal silicon wafer without paraffin. The single crystal silicon wafer is etched in a chain cleaning tank to remove the side junction and back junction formed during the diffusion process and the pn junction in the paraffin-free area on the surface;

(4) Cleaning: Place the P-type monocrystalline silicon wafer coated with paraffin after etching in an aqueous paraffin cleaning solution for cleaning, remove the paraffin coating on the surface, and remove the phosphorus-containing silicon dioxide layer (PSG) on the surface ;

(5) PECVD coating: place the etched silicon wafer in a plate furnace for coating, and coat the side with the pn junction to form a passivation film 1;

(6) Metallization: The front electrode screen pattern is designed according to Figure 5, and the back electrode screen pattern is designed according to Figure 6. After screen printing and high-temperature sintering, a half sliced battery is formed, and the section of the battery structure is shown in Figure 2.

As a preferred embodiment of the present invention, in Example 1 and Example 2, silicon oxide is used as a mask layer during high-temperature diffusion to form a pn junction, and two complete independent pn units are formed on a single silicon substrate.

Example 3:

(1) Texturing: Put the M2 size P-type single crystal silicon wafer in potassium hydroxide alkali solution for anisotropic etching to form a pyramidal light-trapping structure;

(2) Diffusion: place the textured P-type monocrystalline silicon wafer in a tubular diffusion furnace, and perform high-temperature diffusion in a POCl ₃ gas atmosphere. After the diffusion is completed, a complete pn junction will be formed;

(3) Laser removal of the pn junction: use laser to remove the pn junction with a width of about 4mm in the middle of the silicon wafer, so that the complete single pn junction after diffusion becomes two small pn junctions;

(4) Etching: place the P-type single crystal silicon wafer after laser dejunction in a chain cleaning tank for etching to remove the edge junction and back junction formed during the diffusion process and the PSG on the surface;

(5) PECVD coating: place the etched silicon wafer in a plate furnace for coating, and coat the side with the pn junction to form a passivation film 1;

(6) Metallization: The front electrode screen pattern is designed according to Figure 5, and the back electrode screen pattern is designed according to Figure 6. After screen printing and high-temperature sintering, a half sliced battery is formed, and the section of the battery structure is shown in Figure 2.

Example 4:

(1) Texturing: Put M2 size P-type monocrystalline silicon wafers in sodium hydroxide lye for anisotropic etching to form a pyramidal light-trapping structure;

(2) Diffusion: place the textured P-type monocrystalline silicon wafer in a tubular diffusion furnace, and perform high-temperature diffusion in a POCl ₃ gas atmosphere. After the diffusion is completed, a complete pn junction will be formed;

(3) Laser removal of the pn junction: use laser to remove the pn junction with a width of about 4mm in the middle of the P-type single crystal silicon wafer, so that the complete single pn junction after diffusion becomes two small pn junctions;

(4) Etching: place the P-type single crystal silicon wafer after laser dejunction in a chain cleaning tank for etching to remove the edge junction and back junction formed during the diffusion process and the PSG on the surface;

(5) PECVD coating: place the etched silicon wafer in a plate furnace for coating, and coat the side with the pn junction to form a passivation film 1;

(6) Metallization: The front electrode screen pattern is designed according to Figure 3, and the back electrode screen pattern is designed according to Figure 4. After screen printing and high-temperature sintering, a half sliced battery is formed, and the section of the battery structure is shown in Figure 2.

Example 5:

(1) Texturing: Put the M2 size P-type single crystal silicon wafer in potassium hydroxide alkali solution for anisotropic etching to form a pyramidal light-trapping structure;

(2) Ion implantation: Place the P-type monocrystalline silicon wafer after texturing in an ion implanter for ion implantation. During ion implantation, a graphite plate with a width of about 4 mm is used to block the middle of the P-type monocrystalline silicon wafer. After the implantation is completed, two independent pn junctions separated from the middle of the P-type single crystal silicon wafer will be formed, as shown in Figure 2;

(3) Etching: place the cleaned and diffused P-type single crystal silicon wafer in a chain cleaning tank for etching to remove the side junctions and back junctions formed during the diffusion process and the PSG on the surface;

(4) PECVD coating: place the etched silicon wafer in a tube furnace for coating, and coat the side with the pn junction to form a passivation film 1;

(5) Metallization: The front electrode screen pattern is designed according to Figure 3, and the back electrode screen pattern is designed according to Figure 4. After screen printing and high-temperature sintering, a half sliced battery is formed, and the section of the battery structure is shown in Figure 2.

Embodiment 6:

(1) Texturing: Put M2 size P-type monocrystalline silicon wafers in sodium hydroxide lye for anisotropic etching to form a pyramidal light-trapping structure;

(2) Ion implantation: Place the P-type monocrystalline silicon wafer after texturing in an ion implanter for ion implantation. During ion implantation, a graphite plate with a width of about 4 mm is used to block the middle of the P-type monocrystalline silicon wafer. After the implantation is completed, two independent pn junctions separated from the middle of the P-type single crystal silicon wafer will be formed, as shown in Figure 2;

(3) Etching: place the cleaned and diffused P-type single crystal silicon wafer in a chain cleaning tank for etching to remove the side junctions and back junctions formed during the diffusion process and the PSG on the surface;

(4) PECVD coating: place the etched silicon wafer in a plate furnace for coating, and coat the side with the pn junction to form a passivation film 1;

(5) Metallization: The screen pattern of the front electrode is designed according to Figure 5, and the screen pattern of the back electrode is designed according to Figure 6. After screen printing and high-temperature sintering, a half sliced battery is formed, and the section of the battery structure is shown in Figure 2.

Embodiment 7:

(1) Texturing: Put the M2 size P-type single crystal silicon wafer in potassium hydroxide alkali solution for anisotropic etching to form a pyramidal light-trapping structure;

(2) Ion implantation: Place the P-type monocrystalline silicon wafer after texturing in an ion implanter for ion implantation. During ion implantation, as shown in Figure 8, a graphite plate is used as a mask on the surface of the P-type monocrystalline silicon wafer. The film layer, after the injection is completed, will form 5 independent pn junctions with the mask layer as the dividing line, as shown in Figure 7;

(3) Etching: place the cleaned and diffused P-type single crystal silicon wafer in a chain cleaning tank for etching to remove the side junctions and back junctions formed during the diffusion process and the PSG on the surface;

(4) PECVD coating: place the etched silicon wafer in a tube furnace for coating, and coat the side with the pn junction to form a passivation film 1;

(5) Metallization: The electrode layout adopts 5 busbar designs. Similar to Embodiment 1 to Embodiment 6, where the pn junction is disconnected, there is no front electrode and back aluminum paste covering. Finally, one-fifth sliced battery is formed after screen printing and high-temperature sintering, and the section of the battery structure is shown in Figure 7 .

Embodiment 8:

(1) Texturing: Put M2 size P-type monocrystalline silicon wafers in sodium hydroxide lye for anisotropic etching to form a pyramidal light-trapping structure;

(2) Ion implantation: Place the P-type monocrystalline silicon wafer after texturing in an ion implanter for ion implantation. During ion implantation, as shown in Figure 8, a graphite plate is used as a mask on the surface of the P-type monocrystalline silicon wafer. The film layer, after the injection is completed, will form 5 independent pn junctions with the mask layer as the dividing line, as shown in Figure 7;

(3) Etching: place the cleaned and diffused silicon wafer in a chain cleaning tank for etching to remove the side junctions and back junctions formed during the diffusion process and the PSG on the surface;

(4) PECVD coating: place the etched silicon wafer in a plate furnace for coating, and coat the side with the pn junction to form a passivation film 1;

(5) Metallization: The electrode layout adopts 5 busbar designs. Similar to Embodiment 1 to Embodiment 6, where the pn junction is disconnected, there is no front electrode and back aluminum paste covering. Finally, one-fifth sliced battery is formed after screen printing and high-temperature sintering, and the section of the battery structure is shown in Figure 7 .

Claims (10)

1. a kind of solar battery, which is characterized in that the emitter on the silicon substrate (3) of the solar battery is set as several A independent emitter (2) has preset spacing between the edge of adjacent emitter (2)；

The front electrode figure of the solar battery is set as several independent front electrode figures, and each emitter (2) is right Answer independent front electrode figure at one；

The rear electrode figure of the solar battery is set as several independent rear electrode figures, and each emitter (2) is right Answer independent rear electrode figure at one.

2. solar battery according to claim 1, which is characterized in that between the edge of adjacent emitter (2) Away from being 0.5 millimeter to 4 millimeters.

3. solar battery according to claim 1, which is characterized in that the front electrode figure of the solar battery is in nothing Pn-junction region separates, and rear electrode figure separates in no pn-junction region.

4. solar battery according to claim 1, which is characterized in that the solar battery without pn-junction region direction It is perpendicular or parallel with main grid direction.

5. solar battery according to claim 1, which is characterized in that the solar battery is mono-crystalline silicon solar electricity Pond or polysilicon solar cell.

6. a kind of cell piece, which is characterized in that the cell piece is the solar battery as described in claim 1-5 any one Single chip architecture made of region cutting between the edge of adjacent emitter.

7. a kind of photovoltaic module, which is characterized in that the solar battery of the photovoltaic module is by battery as claimed in claim 6 Laminated batteries made of piece.

8. photovoltaic module according to claim 7, which is characterized in that the photovoltaic module is half component or imbrication group Part.

9. a kind of preparation method of solar battery, which is characterized in that preparation process is as follows:

Several independent emitters (2), adjacent hair are prepared on a surface of the silicon substrate (3) with flannelette light trapping structure There is preset spacing between the edge of emitter-base bandgap grading (2)；

Passivation layer (1) is prepared on the silicon substrate surface for being prepared with emitter (2)；

Electrode pattern is prepared again, when preparing electrode pattern, the area corresponding with each emitter (2) on the surface of passivation layer (1) Domain prepares independent front electrode figure；The region system corresponding with each emitter (2) on another surface of silicon substrate (3) Standby independent rear electrode figure.

10. the preparation method of solar battery according to claim 9, which is characterized in that when preparing emitter (2), adopt It is prepared with the mode of High temperature diffusion or ion implanting.