CN108684142B - Link and server - Google Patents
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- CN108684142B CN108684142B CN201810669887.1A CN201810669887A CN108684142B CN 108684142 B CN108684142 B CN 108684142B CN 201810669887 A CN201810669887 A CN 201810669887A CN 108684142 B CN108684142 B CN 108684142B
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
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Abstract
本申请公开了一种链路，包括：第一走线；第二走线；设于第一走线与第二走线之间的过孔；与第一走线和过孔均相连的第一过渡区走线；与第二走线和过孔均相连的第二过渡区走线；第一过渡区走线与第二过渡区走线预设有用于提高所述链路阻抗连续性的预设阻抗值。由此可见，在过孔与两侧的第一走线与第二走线之间设置第一过渡区走线与第二过渡区走线，第一过渡区走线与第二过渡区走线又均设置预设阻抗值，通过为过渡区走线设置最优的阻抗值，即可改变过孔处的阻抗特性，进而优化链路整体的阻抗值，因此在无需调整反焊盘的情况下，即可方便的实现提高链路阻抗连续性，提高信号传输质量。本申请还提供了一种服务器，同样可以解决上述技术问题。
The present application discloses a link, comprising: a first wiring; a second wiring; a via hole arranged between the first wiring and the second wiring; a first wiring connected to both the first wiring and the via hole A transition area trace; a second transition area trace connected to both the second trace and the via hole; the first transition area trace and the second transition area trace are preset with a function for improving the impedance continuity of the link Preset impedance value. It can be seen that the first transition area trace and the second transition area trace are set between the via hole and the first trace and the second trace on both sides, and the first transition area trace and the second transition area trace are set. The preset impedance value is also set. By setting the optimal impedance value for the transition area trace, the impedance characteristics at the via hole can be changed, thereby optimizing the overall impedance value of the link. Therefore, there is no need to adjust the anti-pad. , it can be easily realized to improve the continuity of the link impedance and improve the quality of signal transmission. The present application also provides a server, which can also solve the above technical problems.
Description
Technical Field
The present invention relates to the technical field of servers, and more particularly, to a link and a server.
Background
With the continuous development of computer technology, the phenomenon of high-speed interconnection is playing a leading role among many factors that determine the performance of a system. In high speed link design, each module is optimized to avoid some unforeseeable problems.
In the process of designing a high-speed signal link of a server system, the optimization design of the link impedance is particularly important, and if the link impedance is crossed continuously, signal reflection and link loss are caused, so that the signal transmission quality is influenced, and even the design is failed.
In the link design, the via is an important factor affecting the impedance continuity of the link, and at high frequency, the via may additionally exhibit parasitic capacitance and parasitic inductance, which makes the via become an impedance discontinuity point.
In high speed link designs, the current approach to impedance discontinuity at the via is to change the impedance characteristics at the via by changing the size of the anti-pad. Although the design idea can change the impedance at the via hole and reduce the impedance discontinuity of the whole circuit, the sizes of the required anti-bonding pads are different due to the fact that the lengths of different via holes and the lengths of stubs are different, the manufacturing process of the board card is complex, and the cost is increased. On the other hand, in the routing dense area under the chip, there is not enough space to adjust the size of the anti-pad, so that the impedance at the via hole cannot be reduced.
Therefore, how to optimize the impedance at the via hole is an urgent problem to be solved by those skilled in the art.
Disclosure of Invention
The invention aims to provide a link and a server to solve the problem of how to optimize impedance at a through hole.
In order to achieve the above purpose, the embodiment of the present invention provides the following technical solutions:
a link, comprising:
a first wire;
a second routing;
the through hole is formed between the first routing line and the second routing line;
the first transition area routing is connected with the first routing and the via hole;
the second transition area routing is connected with the second routing and the via hole;
the first transition area routing and the second transition area routing are preset with preset impedance values used for improving the impedance continuity of the link.
Wherein the first trace comprises:
the breakout routing is connected with the sending end; and the main mainboard wire is connected with the breakout wire.
Wherein the second trace comprises:
and the receiving end wire is connected with the receiving end.
The first transition area wire and the second transition area wire are preset with preset impedance values for improving the continuity of the link impedance, and the method includes:
the first transition area routing is preset with a first preset impedance value;
and a second preset impedance value is preset for the second transition area routing.
Wherein the first impedance value is the same as the second impedance value.
Wherein the preset impedance value comprises:
determining an impedance value meeting a first preset rule in the candidate transition area routing impedance values of the target number; the first preset rule is that the difference value between the maximum value and the minimum value of the impedance value of the via hole is minimum; the via hole impedance value is an impedance value corresponding to the via hole obtained by simulating the alternative transition area routing impedance value.
Wherein the preset impedance value comprises:
determining an impedance value meeting a second preset rule in the candidate transition area wiring impedance values of the target number; the second preset rule is that the difference value between the impedance value of the via hole and the impedance value of a target point before or after the via hole is minimum; and the target point impedance value is an impedance value corresponding to a preset point obtained by simulating by using the alternative transition area routing impedance value.
Wherein the impedance values include:
and determining an impedance value in the alternative transition area routing impedance value by using the first preset rule and the second preset rule.
The technical problem is not solved, and the application also provides a server comprising the link.
According to the above scheme, the link provided by the present application includes: a first wire; a second routing; the through hole is formed between the first routing line and the second routing line; the first transition area routing is connected with the first routing and the via hole; the second transition area routing is connected with the second routing and the via hole; the first transition area routing and the second transition area routing are preset with preset impedance values used for improving the impedance continuity of the link.
Therefore, according to the link provided by the application, the first transition area wiring and the second transition area wiring are respectively arranged between the via hole and the first wiring and the second wiring on two sides, the first transition area wiring and the second transition area wiring are both provided with preset impedance values, the impedance characteristic of the via hole can be changed by setting the most impedance value for the transition area wiring, and further the overall impedance value of the link is optimized, so that the link impedance continuity can be conveniently improved without adjusting an anti-pad, and the signal transmission quality is improved. The application also provides a server which can solve the technical problem.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic diagram of a link structure according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a specific link structure according to an embodiment of the present invention;
fig. 3 is a simulation diagram of a first link TDR according to the embodiment of the present invention;
fig. 4 is a diagram illustrating a TDR simulation of a second link according to the embodiment of the present invention;
FIG. 5 is a TDR simulation diagram of a specific link according to an embodiment of the present invention;
fig. 6 is a diagram illustrating another exemplary TDR simulation of a link according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The embodiment of the invention discloses a link and a server, aiming at solving the problem of how to optimize the impedance at a through hole.
Referring to fig. 1, a link provided in the embodiment of the present invention specifically includes:
a first trace 1; a second trace 2; the through hole 3 is arranged between the first wire 1 and the second wire 2; a first transition area wire 4 connected with the first wire 1 and the via hole 3; a second transition area wire 5 connected to both the second wire 2 and the via hole 3; the first transition area wire 4 and the second transition area wire 5 are preset with preset impedance values for improving the continuity of the link impedance.
In this scheme, on the basis of original link, add transition district and walk the line, set up first transition district between via hole 3 and the first line 1 of original link and walk line 4 promptly, walk between via hole 3 and the second and set up second transition district and walk line 5.
It should be noted that the first trace and the second trace are traces on both sides of the via hole 3 in the original link, respectively, in the present scheme, the transition region trace is disposed on both sides of the via hole, and the trace directly connected to the via hole in the original link is connected to the transition region trace on one end of the via hole, respectively.
For example, the original lines are:
a first routing: the system comprises break kout wires connected with a sending end and main board main wires connected with the break kout wires;
the main board routing is connected with the via hole;
the other side of the via hole is connected with a second wire, such as a receiving end wire connected with a receiving end.
In the scheme, transition areas are arranged on two sides of the via hole for wiring, namely, referring to fig. 2, a specific link structure in the scheme is as follows: the device comprises a sending end 6, a break kout wire 7 connected with the sending end 6, a main board main wire 8 connected with the break kout wire 7, a first transition area wire 4, a via hole 3, a second transition area wire 5, a receiving end wire 10 connected with a receiving end 9 and the receiving end 9.
It should be noted that the first transition area trace 4 and the second transition area trace 5 are both provided with preset impedance values, the preset impedance values are the most impedance values screened out from a plurality of impedance values by using the first preset rule and/or the second preset rule, and the impedance of the via hole passing through the transition area trace can be changed by the preset impedance values, so that the impedance continuity is improved.
Therefore, according to the link provided by the embodiment of the application, the first transition area wiring 4 and the second transition area wiring 5 are respectively arranged between the via hole 3 and the first wiring and the second wiring on the two sides, the first transition area wiring 4 and the second transition area wiring 5 are both provided with the preset impedance values, the impedance characteristic of the via hole 3 can be changed by setting the optimal impedance value for the transition area wiring, and then the overall impedance value of the link is optimized, so that the link impedance continuity can be conveniently improved without adjusting the anti-bonding pad, and the signal transmission quality is improved.
A specific link provided in the embodiments of the present application is described below, and a specific link described below and the embodiments described above may be referred to each other. Different from the above embodiments, the preset impedance value in the above embodiments is further defined and explained in the embodiments of the present application, and other structural contents are substantially the same as those in the above embodiments, and reference may be specifically made to the above embodiments, which are not described herein again.
In this embodiment, the preset impedance value includes:
determining an impedance value meeting a first preset rule in the candidate transition area routing impedance values of the target number; the first preset rule is that the difference value between the maximum value and the minimum value of the impedance of the via hole is minimum; the via hole impedance value is an impedance value corresponding to the via hole obtained by simulating the alternative transition area routing impedance value.
The preset impedance value may also include:
determining an impedance value meeting a second preset rule in the candidate transition area wiring impedance values of the target number; the second preset rule is that the difference value between the impedance value of the via hole and the impedance value of a target point before or after the via hole is minimum; and the target point impedance value is an impedance value corresponding to a preset point obtained by simulating by using the alternative transition area routing impedance value.
The preset impedance value may also include:
and determining an impedance value in the alternative transition area routing impedance value by using the first preset rule and the second preset rule.
In this embodiment, the preset impedance value may be determined according to a first preset rule, a second preset rule, or a combination of the first preset rule and the second preset rule.
It should be noted that the first transition area routing may be preset with a first preset impedance value; the second transition area routing is preset with a second preset impedance value. The two preset impedance values can be respectively screened, and because the influence of the wires before and after the via hole on the impedance is basically the same, the operation is avoided to be complex as the optimization, only one preset impedance value needs to be determined, and the first transition area wire and the second transition area wire are both set to be the value.
In one particular embodiment, the link comprises:
the optical transceiver comprises a transmitting end, a breakout trace L1 connected with the transmitting end, a main board main trace L2 connected with the breakout trace L1, a first transition area trace A1, a via hole, a second transition area trace A2, a receiving end trace L3 connected with a receiving end, and the receiving end.
In order to compare the impedance characteristics of the link before and after improvement conveniently, the total wiring length of the link is kept unchanged in simulation, namely the total wiring length of the link provided by the scheme is the same as that of the original link. Specific trace lengths are shown in table 1.
TABLE 1
| L1/INCH | L2/INCH | A1/INCH | A2/INCH | L3/INCH | |
| Original circuit | 0.5 | 8 | Is free of | Is free of | 2 |
| This application circuit | 0.5 | 7.95 | 0.05 | 0.05 | 1.95 |
In order to highlight the influence of the transition region wiring on the link impedance, only the link at the through hole and the adjacent area is focused during simulation, and the influence of the receiving end package on the link is ignored.
Firstly, simulating the situation that the wiring impedance of the transition area is greater than that of the main wiring area, setting the impedance of the main wiring area to be 85ohm, and setting the impedances of the wirings of the transition area to be 87ohm, 90ohm, 93ohm and 95ohm respectively, wherein the simulation result is shown in fig. 3.
The via hole in the original design has obvious impedance rise, when the wiring impedance of the improved transition area is larger than that of the main wiring of the link, the impedance discontinuity point moves forward, and meanwhile, the impedance rise is more serious, so that the impedance discontinuity is further aggravated, and the link performance is influenced.
When the transition area wiring impedance is smaller than the main wiring area impedance, the transition area wiring impedance is set to 83ohm, 80ohm, 77ohm, 75ohm, 70ohm, 65ohm respectively. The simulation results are shown in fig. 4. Along with the reduction of the wiring impedance of the transition region, the impedance rising amplitude at the through hole is reduced, and the impedance continuity at the through hole is optimized. However, when the impedance of the transition region is too low, the creep in this region is reduced, which in turn deteriorates the overall link impedance.
When the impedance of the transition area is smaller than the impedance of the main wiring area, in order to quantitatively measure the influence of the impedance of the transition area on the link, the difference value between the highest impedance and the lowest impedance at the position of the via hole of the link is calculated, the larger the difference value is, the more violent the impedance change is, and the poorer the continuity of the impedance of the link is, otherwise, the smaller the difference value is, the gentler the impedance change is, and the better the continuity of the impedance of the link is.
That is to say, in the present solution, the 6 impedance values of the transition area trace smaller than the impedance of the main trace area are used as the impedance values of the alternative transition area trace, and first, the impedance value meeting a first preset rule is determined in the impedance values, where the first preset rule is that the difference between the maximum value and the minimum value of the impedance value of the via hole is the minimum. The impedance value of the via hole is the impedance value corresponding to the via hole obtained by simulating the routing impedance value of the alternative transition area.
Referring to fig. 5, which shows a magnified view of a portion of the link and the measured values of the impedances, m1 to m14 are the 14 impedance values at the vias, respectively, and TDR is time domain reflectometry. Referring to table 2, the table shows the difference of the via impedance values corresponding to the different transition region trace impedance values.
TABLE 2
Therefore, as the wiring impedance of the transition area becomes smaller, the impedance difference value at the position of the via hole tends to become smaller and then increase, and the time difference value is the smallest when the wiring impedance value of the transition area is 70ohm value and 75ohm value.
In order to further determine the transition area routing impedance value with a better effect, that is, determine the preset impedance value with a better effect, the optimal impedance value needs to be determined in the above result, that is, the impedance value determined by using the first preset rule is within a range of 70ohm value and 75ohm value.
In the scheme, another measure is taken to measure the impedance at the via hole relative to the impedance change value of the routing area before the via hole, if the deviation from the original impedance value is smaller, the impedance continuity is better, that is, a target point is determined before or after the via hole, and the impedance value is determined, the impedance value meeting a second preset rule is determined in the routing impedance values of the candidate transition areas of the target number (that is, 6), and the second preset rule is that the difference between the impedance value of the via hole and the impedance value of the target point before or after the via hole is minimum.
Referring to fig. 6, when the transition zone trace impedance value is 75ohm, the maximum and minimum impedances at the via are 91.779ohm and 89.934ohm respectively, and the maximum difference is 0.993ohm between the impedance value of the trace before the via 90.927 ohm; when the transition zone trace is 710 ohms, the maximum and minimum impedance values at the via are 90.898 ohms and 89.209 ohms, respectively, and the maximum difference is 1.718 ohms with the impedance value of the pre-gap trace of 90.927 ohms. Therefore, in this embodiment, 75 ohms with a smaller difference is selected.
Therefore, the impedance at the via in the high-speed link is a discontinuous impedance point, in the embodiment of the application, the impedance value at the via is low, the impedance value of the via can be changed by adjusting the impedance values of the wires in the transition areas before and after the via, so that the impedance characteristic of the whole link is changed, and when the impedance value of the wires in the transition areas is greater than the impedance of the main wire area, the impedance increase amplitude value at the via is increased, so that the impedance continuity of the link is further influenced; when the impedance value of the wiring in the transition area is smaller than the impedance value of the main line area, the impedance rise amplitude value at the through hole is reduced, but if the impedance of the wiring in the transition area is too small, the impedance variation at the through hole is increased, and the impedance continuity is also reduced.
The following describes a server provided in an embodiment of the present application, where the server includes a link provided in any one of the above embodiments. Because the link in the embodiment can realize that the impedance of the via hole can be changed by setting the most impedance value for the wiring of the transition area, the overall impedance value of the link is further improved, the impedance continuity of the link is conveniently improved, and the signal transmission quality is improved, the server provided by the embodiment of the application can also achieve the technical effects.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (8)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810669887.1A CN108684142B (en) | 2018-06-26 | 2018-06-26 | Link and server |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810669887.1A CN108684142B (en) | 2018-06-26 | 2018-06-26 | Link and server |
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| Publication Number | Publication Date |
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| CN108684142A CN108684142A (en) | 2018-10-19 |
| CN108684142B true CN108684142B (en) | 2021-04-20 |
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| CN201810669887.1A Active CN108684142B (en) | 2018-06-26 | 2018-06-26 | Link and server |
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Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102511110A (en) * | 2010-05-12 | 2012-06-20 | 联发科技股份有限公司 | Circuit device with signal line switching assembly |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104219870A (en) * | 2013-06-04 | 2014-12-17 | 鸿富锦精密工业（深圳）有限公司 | Printed circuit board |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102511110A (en) * | 2010-05-12 | 2012-06-20 | 联发科技股份有限公司 | Circuit device with signal line switching assembly |
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