CN108683354A - A kind of pulse frequency modulated convertor circuit - Google Patents

Abstract

The present invention is a pulse frequency modulation converter circuit, the anode of the power supply E is connected to the drains of field effect transistors K1 and K3; the source of K1 is connected to the anode of diode VD1; the terminal of capacitor C1 is connected to the cathode of VD1 and the anode of diode VD2; the cathode of diode VD3 is connected to the anode of diode VD4 and The lower end of C1; the drain of FET K2 is connected to the cathode of VD2; the cathode of VD4 is connected to the drain of FET K4; the source of K3 is connected to the anode of VD3; the sources of K2 and K4 are connected to the cathode of diode VD and the left end of inductor L; the right end of L is connected to the original transformer T The upper end of the side; the lower end of the primary side of T is connected to the anode of VD and the negative pole of E; the gate of K1-K4 is connected to the drive signal; the output of the secondary side of T is connected to the AC side of the rectifier bridge; the positive output terminal of the rectifier bridge is connected to the upper end of capacitor C2-C3, transistors V1 and V3 Collector; V1 emitter is connected to triode V2 collector, capacitor C4 upper end and load RL upper end; V3 emitter is connected to C4 lower end, triode V4 collector and RL lower end; V4 and V2 emitters are connected to C2‑C3 lower end and rectifier bridge negative polarity Output terminal; the base of V1-V4 is connected to the control signal.

Description

A Pulse Frequency Modulation Converter Circuit

technical field

The invention relates to a pulse frequency modulation converter circuit and method, in particular, the output waveform is a standard sine wave; the output power is adjustable within a certain range of the required frequency band and load impedance, and the frequency of the sine wave is adjustable, and the waveform distortion is relatively low. low circuits and methods.

Background technique

In the existing technology, the traditional PWM technology uses voltage chopping to work. For medium and high power output waveforms, it is difficult to filter high-order harmonics by passive filtering. The circuit efficiency of voltage chopping is low, and the control Poor performance and lack of protection for the power switch tube, therefore, it becomes a problem that must be solved to develop a technology that has good controllability, the power switch tube works in a soft switching state, and the output power is adjustable.

Contents of the invention

The purpose of the present invention is to address the above problems, to propose a pulse frequency modulation converter circuit and a corresponding method, so that the main switching device of the circuit works in a soft switching state, the digital signal is directly controlled, the main power device is not damaged, and the circuit efficiency is high. The waveform has high fidelity to solve the problems of the prior art.

The pulse frequency modulation converter circuit proposed by the present invention is composed of resistors, capacitors, diodes, triodes, field effect transistors and transformers, and is characterized in that the positive pole of the power supply E, the drain of the field effect transistor K1 and the drain of the field effect transistor K3 are connected The source of the field effect transistor K1 is connected to the anode of the diode VD1; the upper end of the energy storage capacitor C1, the cathode of the diode VD1 is connected to the anode of the diode VD2; the cathode of the diode VD3, the anode of the diode VD4 are connected to the lower end of the energy storage capacitor C1; the drain of the field effect transistor K2 is connected to the The cathode of diode VD2 is connected; the cathode of diode VD4 is connected to the drain of FET K4; the source of FET K3 is connected to the anode of diode VD3; the source of FET K2, the source of FET K4, the cathode of diode VD and the left end of flat inductor L are connected ; The right end of the smoothing inductor L is connected to the upper end of the primary side of the transformer T; the lower end of the primary side of the transformer T, the anode of the diode VD is connected to the negative pole of the power supply E, and then grounded; the gates of the field effect transistors K1-K4 are connected to the corresponding drive signals G1-G4; The side output is connected to the AC side of the rectifier bridge; the positive output terminal of the rectifier bridge, the upper end of the filter capacitor C2, the upper end of the filter capacitor C3, the collector of the triode V1 and the collector of the triode V3 are connected; the emitter of the triode V1, the collector of the triode V2, and the upper end of the filter capacitor C4 Connected to the upper end of the load RL; the emitter of the triode V3, the lower end of the filter capacitor C4, the collector of the triode V4 and the lower end of the load RL; the emitter of the triode V4, the emitter of the triode V2, the lower end of the filter capacitor C2, the lower end of the filter capacitor C3 and the negative polarity of the rectifier bridge The output terminals are connected to the ground; the bases of the triodes V1-V4 are connected to the corresponding control signals G5-G8.

In the circuit, field effect transistors K1-K4 are main circuit power switch transistors, all of which are high-speed field effect transistors, and triodes V1-V4 are triodes with relatively high characteristic frequency.

Transistors V1-V4 constitute an inverter (inverting) circuit.

A pulse frequency modulation conversion method, which is characterized in that a high-power high-speed field effect transistor is used to construct the main circuit of the system, a control circuit is constructed by using DSP control, and the digital signal directly controls the power main switching device and the inverter (inverting) circuit. The circuit structure adopted is as follows:

The positive pole of the power supply E, the drain of the field effect transistor K1 is connected to the drain of the field effect transistor K3; the source of the field effect transistor K1 is connected to the anode of the diode VD1; the upper end of the energy storage capacitor C1, the cathode of the diode VD1 is connected to the anode of the diode VD2; the cathode of the diode VD3, The anode of the diode VD4 is connected to the lower end of the energy storage capacitor C1; the drain of the FET K2 is connected to the cathode of the diode VD2; the cathode of the diode VD4 is connected to the drain of the FET K4; the source of the FET K3 is connected to the anode of the diode VD3; the source of the FET K2 Pole, field effect tube K4 source, diode VD cathode and the left end of the flat wave inductor L are connected; the right end of the smooth wave inductor L is connected to the upper end of the primary side of the transformer T; the lower end of the primary side of the transformer T, the anode of the diode VD is connected to the negative pole of the power supply E and then grounded; the field effect The gates of the tubes K1-K4 are connected to the corresponding drive signals G1-G4; the secondary output of the transformer is connected to the AC side of the rectifier bridge; the positive output terminal of the rectifier bridge, the upper end of the filter capacitor C2, the upper end of the filter capacitor C3, the collector of the triode V1 and the triode V3 The collector is connected; the emitter of triode V1, the collector of triode V2, the upper end of filter capacitor C4 are connected with the upper end of load RL; the emitter of triode V3, the lower end of filter capacitor C4, the collector of triode V4 are connected with the lower end of load RL; The V2 emitter, the lower end of the filter capacitor C2, the lower end of the filter capacitor C3 and the negative output end of the rectifier bridge are connected to ground; the bases of the triodes V1-V4 are connected to the corresponding control signals G5-G8.

Working process of the present invention can be described as:

By controlling the number of times the power switch tube of the main circuit is turned on and off, a fixed value of load power is obtained, different power values are output at the output end, the power supply voltage E and the capacity of the energy storage capacitor C1 are changed, and the chopping bridge of the main circuit is choppered. Any value in the frequency value can adjust the power obtained by the load; fix the energy storage capacitor value C1 and the power supply voltage E, change the chopping frequency value, and obtain the corresponding output power of different values related to the frequency change of the driving signal. Within a pulse cycle, the number of pulses in the pulse cycle is controlled by the control program. Each pulse makes the power switch tube in the main circuit turn off and on once, and a fixed value of power is obtained for each on-off. The main circuit stores energy when it is turned on, releases energy when it is turned off, and obtains the corresponding load energy. The difference in the number of pulses in the pulse cycle changes the on-off frequency of the switch tube, so that the load can obtain the required power, and the PWM pulse is generated by DSP. The driving signal makes the power switch tube turn on or off, so that the chopping frequency presents a sinusoidal law. After the sinusoidal energy storage is superimposed, the inverter bridge is alternately turned on and transmitted to the load, thereby synthesizing a sine wave at the load.

Compared with the traditional PWM converter circuit, the circuit of the present invention has the advantages that all the main switching devices work in the soft switching state and can be directly controlled by digital signals, and the output short circuit of the power circuit does not damage the main power devices. efficient. The output waveform is a standard sine wave; the output power is adjustable within the required frequency band and load impedance range, and the waveform distortion is low.

Description of drawings

Fig. 1 is the circuit diagram of the present invention.

Detailed ways

The implementation process and beneficial effects of the present invention will be further described below in conjunction with the accompanying drawings.

The calculation of parameters such as field effect transistor, triode, diode specification, capacitance and resistance of the circuit of the present invention is completely the same as that of the prior art, which is a mature technology so no further discussion will be made.

As shown in Figure 1, field effect transistors K1, K2, K3, and K4 are power switch tubes for the main loop, capacitor C1 is the energy storage capacitor for the main loop, inductor L is a smoothing inductor, capacitors C2, C3, and C4 are filter capacitors, and the triode V1, V2, V3, and V4 form an inverter (inversion) circuit. The specific implementation is as follows:

The anode of the power supply E, the drain of the field effect transistor K1 and the drain of the field effect transistor K3 are connected. The anode of the source diode VD1 of the field effect transistor K1 is connected. The upper end of the energy storage capacitor C1 is connected to the cathode of the diode VD1 and the anode of the diode VD2. The cathode of the diode VD3, the anode of the diode VD4, and the lower end of the energy storage capacitor C1 are connected. The drain of the field effect transistor K2 is connected to the cathode of the diode VD2. The cathode of the diode VD4 is connected to the drain of the field effect transistor K4. The anode of the source diode VD3 of the field effect transistor K3 is connected. The source of the field effect transistor K2, the source of the field effect transistor K4, the cathode of the diode VD, and the left end of the smoothing inductor L are connected. The right end of the smoothing inductor L is connected to the upper end of the primary side of the transformer T. The lower end of the primary side of the transformer T, the anode of the diode VD, and the negative pole of the power supply E are connected and grounded. The gates of field effect transistors K1, K2, K3, K4 are connected with corresponding driving signals G1, G2, G3, G4. The secondary output of the transformer is connected to the AC side of the rectifier bridge, the positive output terminal of the rectifier bridge, the upper end of the filter capacitor C2, the upper end of the filter capacitor C3, the collector of the triode V1, and the collector of the triode V3 are connected. The emitter of the triode V1, the collector of the triode V2, the upper end of the filter capacitor C4, and the upper end of the load RL are connected. The emitter of the triode V3, the lower end of the filter capacitor C4, the collector of the triode V4, and the lower end of the load RL are connected. The emitter of the triode V4, the emitter of the triode V2, the lower end of the filter capacitor C2, the lower end of the filter capacitor C3, and the negative output end of the rectifier bridge are connected to ground. The bases of the transistors V1, V2, V3, V4 are connected to corresponding control signals G5, G6, G7, G8.

The actual measurement shows that the present invention uses a high-power sliding rheostat with a rated current of 2A and an adjustable resistance value (0~100 ohms) as the load, and the load obtains a standard sine wave, and the difference in the number of pulses in the adjustment pulse cycle (drive frequency) makes the switching tube The on-off frequency of the load changes, that is, the chopping frequency changes, so that the power obtained by the load can be adjusted within a certain range, and the sine wave frequency can be adjusted within a certain range.

Claims (4)

1. A pulse frequency modulation converter circuit is made up of a resistor, a capacitor, a diode, a triode, a field effect tube and a transformer, and is characterized in that the positive pole of the power supply E, the drain of the field effect tube K1 and the drain of the field effect tube K3 are connected; The source of the effect transistor K1 is connected to the anode of the diode VD1; the upper end of the energy storage capacitor C1, the cathode of the diode VD1 is connected to the anode of the diode VD2; the cathode of the diode VD3, the anode of the diode VD4 are connected to the lower end of the energy storage capacitor C1; the drain of the field effect transistor K2 is connected to the diode VD2 The cathode is connected; the cathode of the diode VD4 is connected to the drain of the FET K4; the source of the FET K3 is connected to the anode of the diode VD3; the source of the FET K2, the source of the FET K4, the cathode of the diode VD and the left end of the flat inductor L are connected; The right end of the wave inductor L is connected to the upper end of the primary side of the transformer T; the lower end of the primary side of the transformer T, the anode of the diode VD is connected to the negative pole of the power supply E and then grounded; the gates of the field effect transistors K1-K4 are connected to the corresponding drive signals G1-G4; the output of the secondary side of the transformer Connected to the AC side of the rectifier bridge; the positive output terminal of the rectifier bridge, the upper end of the filter capacitor C2, the upper end of the filter capacitor C3, the collector of the transistor V1 and the collector of the transistor V3 are connected; the emitter of the transistor V1, the collector of the transistor V2, the upper end of the filter capacitor C4 and the load The upper end of RL is connected; the emitter of triode V3, the lower end of filter capacitor C4, the collector of triode V4 are connected with the lower end of load RL; the emitter of triode V4, the emitter of triode V2, the lower end of filter capacitor C2, the lower end of filter capacitor C3 and the negative output end of the rectifier bridge connected to the ground; the bases of the triodes V1-V4 are connected to the corresponding control signals G5-G8. 2. According to the described pulse frequency modulation converter circuit of claim 1, it is characterized in that the field effect transistors K1-K4 in the circuit are main circuit power switch tubes, all of which are high-speed field effect transistors, and the transistors V1-V4 are characteristic frequency transistors. 3. The pulse frequency modulation converter circuit according to claim 1, characterized in that the triodes V1-V4 form an inverter inverter circuit. 4. A pulse frequency modulation conversion method, which is characterized in that the main circuit of the system is constructed by using a high-power high-speed field effect transistor, and the control circuit is constructed by using DSP control, and the digital signal directly controls the power main switching device and the inverter (inversion) The circuit, the circuit structure is: the positive pole of the power supply E, the drain of the field effect transistor K1 is connected to the drain of the field effect transistor K3; the source of the field effect transistor K1 is connected to the anode of the diode VD1; the upper end of the energy storage capacitor C1, the cathode of the diode VD1 and the anode of the diode VD2 connected; the cathode of diode VD3, the anode of diode VD4 are connected to the lower end of energy storage capacitor C1; the drain of FET K2 is connected to the cathode of diode VD2; the cathode of diode VD4 is connected to the drain of FET K4; the source of FET K3 is connected to the anode of diode VD3 The source of FET K2, the source of FET K4, the cathode of diode VD and the left end of smoothing inductor L are connected; the right end of smoothing inductor L is connected to the upper end of the primary side of transformer T; the lower end of the primary side of transformer T, the anode of diode VD and the negative electrode of power supply E Connected to ground; gates of FETs K1-K4 are connected to corresponding drive signals G1-G4; transformer secondary output is connected to rectifier bridge AC side; rectifier bridge positive output terminal, upper end of filter capacitor C2, upper end of filter capacitor C3, triode The collector of V1 is connected to the collector of triode V3; the emitter of triode V1, the collector of triode V2, the upper end of filter capacitor C4 are connected to the upper end of load RL; the emitter of triode V3, the lower end of filter capacitor C4, the collector of triode V4 are connected to the lower end of load RL; Transistor V4 emitter, triode V2 emitter, filter capacitor C2 lower end, filter capacitor C3 lower end and rectifier bridge negative output end are connected to ground; triode V1-V4 bases are connected to corresponding control signals G5-G8.