CN108584863B - MEMS device and method of manufacturing the same - Google Patents
MEMS device and method of manufacturing the same Download PDFInfo
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- CN108584863B CN108584863B CN201810362535.1A CN201810362535A CN108584863B CN 108584863 B CN108584863 B CN 108584863B CN 201810362535 A CN201810362535 A CN 201810362535A CN 108584863 B CN108584863 B CN 108584863B
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- 238000004519 manufacturing process Methods 0.000 title claims description 16
- 239000000758 substrate Substances 0.000 claims abstract description 21
- 239000003990 capacitor Substances 0.000 claims abstract description 17
- 238000002161 passivation Methods 0.000 claims description 32
- 230000000149 penetrating effect Effects 0.000 claims description 3
- 238000000034 method Methods 0.000 description 30
- 238000005530 etching Methods 0.000 description 14
- 238000000206 photolithography Methods 0.000 description 12
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 11
- 239000000463 material Substances 0.000 description 11
- 229910052710 silicon Inorganic materials 0.000 description 11
- 239000010703 silicon Substances 0.000 description 11
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 7
- 238000005260 corrosion Methods 0.000 description 6
- 230000007797 corrosion Effects 0.000 description 6
- 230000035945 sensitivity Effects 0.000 description 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 5
- 229920005591 polysilicon Polymers 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 229910018125 Al-Si Inorganic materials 0.000 description 1
- 229910018520 Al—Si Inorganic materials 0.000 description 1
- 229910018885 Pt—Au Inorganic materials 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- CSDREXVUYHZDNP-UHFFFAOYSA-N alumanylidynesilicon Chemical compound [Al].[Si] CSDREXVUYHZDNP-UHFFFAOYSA-N 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000005236 sound signal Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/02—Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00134—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems comprising flexible or deformable structures
- B81C1/00182—Arrangements of deformable or non-deformable structures, e.g. membrane and cavity for use in a transducer
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2201/00—Specific applications of microelectromechanical systems
- B81B2201/02—Sensors
- B81B2201/0257—Microphones or microspeakers
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Micromachines (AREA)
Abstract
Disclosed is a MEMS device, comprising: a substrate having a first cavity; a first sacrificial layer on the substrate; the first vibrating diaphragm layer is positioned on the first sacrificial layer, and at least one part of the first vibrating diaphragm layer is supported by the first sacrificial layer; the second sacrificial layer is positioned on the first vibrating diaphragm layer; a back electrode plate layer on the second sacrificial layer, at least a portion of the back electrode plate layer being supported by the second sacrificial layer such that the back electrode plate layer and the first diaphragm layer form a first capacitor; the third sacrificial layer is positioned on the back electrode plate layer; and the second vibrating diaphragm layer is positioned on the third sacrificial layer, and at least one part of the second vibrating diaphragm layer is supported by the third sacrificial layer, so that the second vibrating diaphragm layer and the back electrode plate layer form a second capacitor. By placing the back electrode plate layer between the first vibrating diaphragm layer and the second vibrating diaphragm layer, the pollution of the external environment to the back electrode plate layer can be reduced, and the formed two variable capacitors form a differential capacitance structure, so that the performance of the MEMS device is improved.
Description
Technical Field
The invention relates to the technical field of MEMS devices, in particular to a MEMS micro-silicon microphone structure and a manufacturing method thereof.
Background
In recent years, MEMS micro-silicon microphones have been rapidly developed and widely used in consumer electronics such as smart phones, notebook computers, bluetooth headsets, and smart speakers. The MEMS micro-silicon microphone mainly comprises an MEMS chip and an IC chip, and the MEMS chip is used for converting sound signals into electric signals. The capacitance type micro-silicon microphone is formed by a rigid perforated back plate and an elastic vibrating diaphragm, when external sound pressure acts on the vibrating diaphragm to cause vibration of the vibrating diaphragm, the capacitance of the vibrating diaphragm is changed, and then the potential between the vibrating diaphragm and the back plate is changed, so that the conversion of sound pressure signals and electric signals is realized.
Currently, a capacitance type silicon microphone mostly adopts a vibrating diaphragm and a back plate structure to form a variable capacitance, and the sensitivity and the signal-to-noise ratio of the variable capacitance are limited. With the rapid development of consumer products such as high-end mobile phones and intelligent sound boxes, a high-sensitivity and low-noise silicon microphone is urgently needed in the market. U.S. patent nos. US20110075865A1 and US9503823B2, respectively, provide a dual-backplate silicon microphone based on MEMS technology, by disposing an elastic diaphragm between two perforated backplates, thereby forming two variable capacitances, greatly improving the sensitivity and signal-to-noise ratio of the silicon microphone. However, two back plates in the dual-back plate microphone have penetrating sound holes and are exposed outside the MEMS chip, so that the back plates are extremely easy to be polluted by fine dust, moisture and other external environments, such as electric leakage caused by connection of the back plates and the diaphragm, adhesion of the diaphragm and the back plates, and the like, which affect the reliability of the silicon microphone.
Disclosure of Invention
The invention aims to provide a MEMS device and a manufacturing method thereof, wherein the back electrode plate layer is arranged between the first vibrating film layer and the second vibrating film layer, so that the pollution of the external environment to the back electrode plate layer can be reduced, and the formed two variable capacitors form a differential capacitance structure, thereby improving the performance of the MEMS device.
According to an aspect of the present invention, there is provided a MEMS device comprising: a substrate having a first cavity; a first sacrificial layer on the substrate, wherein the first sacrificial layer is provided with a second cavity; a first diaphragm layer on the first sacrificial layer, at least a portion of the first diaphragm layer being supported by the first sacrificial layer; the second sacrificial layer is positioned on the first vibrating diaphragm layer and is provided with a third cavity; a back electrode plate layer on the second sacrificial layer, at least a portion of the back electrode plate layer being supported by the second sacrificial layer such that the back electrode plate layer and the first diaphragm layer form a first capacitor; the third sacrificial layer is positioned on the back electrode plate layer and is provided with a fourth cavity; and a second diaphragm layer on the third sacrificial layer, at least a portion of the second diaphragm layer being supported by the third sacrificial layer such that the second diaphragm layer and the back plate layer form a second capacitor, wherein the MEMS device further comprises a plurality of stop layers for defining a lateral dimension of at least one of the second to fourth cavities.
Preferably, the first diaphragm layer includes a first opening such that the second cavity communicates with the third cavity.
Preferably, the second diaphragm layer includes a second opening, so that the fourth cavity communicates with the external environment.
Preferably, the back plate layer includes a third opening such that the third cavity communicates with the fourth cavity.
Preferably, the plurality of stop layers include: the first stopping layer is positioned on the inner wall of the second cavity, and the first stopping layer is used as a hard mask to form the second cavity; the second stopping layer is positioned on the inner wall of the third cavity, and the second stopping layer is used as a hard mask to form the third cavity; and the third stopping layer is positioned on the inner wall of the fourth cavity, and the third stopping layer is used as a hard mask to form the fourth cavity.
Preferably, the first stop layer and the first diaphragm layer surround the second cavity, the second stop layer and the back plate layer surround the third cavity, and the third stop layer and the second diaphragm layer surround the fourth cavity.
Preferably, the first, second and third stop layers are aligned with each other along a direction perpendicular to the main plane.
Preferably, the method further comprises: and the passivation layer at least covers the surface of the third sacrificial layer and a part of the surface of the second vibrating film layer adjacent to the third sacrificial layer.
Preferably, the method further comprises: and the anti-adhesion layer is positioned on the inner wall of at least one of the first cavity, the second cavity, the third cavity and the fourth cavity.
Preferably, the method further comprises: a first conductive path passing through the passivation layer, the third sacrificial layer, the second sacrificial layer, and the first diaphragm layer from top to bottom; a second conductive path through the passivation layer and the third sacrificial layer from top to bottom to the back plate layer; and a third conductive path passing through the passivation layer from top to bottom to the second diaphragm layer.
According to another aspect of the present invention, there is provided a method of manufacturing a MEMS device, comprising: sequentially forming a first sacrificial layer, a first vibrating film layer, a second sacrificial layer, a back electrode plate layer, a third sacrificial layer and a second vibrating film layer on a substrate; forming a first cavity in the substrate; forming a second cavity in the first sacrificial layer via the first cavity, the first cavity and the second cavity communicating with each other, at least a portion of the first diaphragm layer being supported by the first sacrificial layer; forming a third cavity in the second sacrificial layer, at least a portion of the back-electrode plate layer being supported by the second sacrificial layer such that the back-electrode plate layer and the first diaphragm layer form a first capacitor; and forming a fourth cavity in the third sacrificial layer, at least a portion of the second diaphragm layer being supported by the third sacrificial layer such that the back plate layer and the second diaphragm layer form a second capacitor, wherein the method of manufacturing further comprises forming a plurality of stop layers for defining a lateral dimension of at least one of the second to fourth cavities.
Preferably, the method further comprises: a first opening is formed in the first diaphragm layer, and in the step of forming the third cavity, an etchant etches the second sacrificial layer from the second cavity through the first opening.
Preferably, the method further comprises: a second opening is formed in the second diaphragm layer, and an etchant etches the third sacrificial layer through the second opening in the step of forming the fourth cavity.
Preferably, the method further comprises: a third opening is formed in the back plate layer such that the third cavity communicates with the fourth cavity.
Preferably, the step of forming the plurality of stop layers includes: forming the first stop layer in the first sacrificial layer between the steps of forming the first sacrificial layer and the first diaphragm layer; forming the second stop layer in the second sacrificial layer between the steps of forming the second sacrificial layer and the back plate layer; and forming the third stop layer in the third sacrificial layer between the steps of forming the third sacrificial layer and the second diaphragm layer.
Preferably, the first stop layer and the first diaphragm layer surround the second cavity, the second stop layer and the back plate layer surround the third cavity, and the third stop layer and the second diaphragm layer surround the fourth cavity.
Preferably, the first, second and third stop layers are aligned with each other along a direction perpendicular to the main plane.
Preferably, after forming the second diaphragm layer, the method further includes: and forming a passivation layer which at least covers the surface of the third sacrificial layer and a part of the surface of the second vibrating film layer adjacent to the third sacrificial layer.
Preferably, after the step of forming the fourth cavity, the method further comprises: an anti-adhesion layer is formed, the anti-adhesion layer being located on an inner wall of at least one of the first cavity, the second cavity, the third cavity, and the fourth cavity.
Preferably, after the step of forming the second diaphragm layer, the method further includes: forming a first conductive channel from top to bottom through the passivation layer, the third sacrificial layer, the second sacrificial layer and reaching the first diaphragm layer; forming a second conductive channel, sequentially penetrating through the passivation layer and the third sacrificial layer from top to bottom, and reaching the back electrode plate layer; and forming a third conductive channel from top to bottom through the passivation layer to the second diaphragm layer.
According to the MEMS device provided by the embodiment of the invention, the back electrode plate layer is arranged between the first vibrating diaphragm layer and the second vibrating diaphragm layer, so that the pollution of the external environment to the back electrode plate layer can be reduced; and the differential capacitor structure formed by the two variable capacitors can not only improve the sensitivity of the MEMS device, but also improve the signal-to-noise ratio of the MEMS device.
The first stop layer, the second stop layer and the third stop layer which are respectively positioned in the first sacrificial layer, the second sacrificial layer and the third sacrificial layer are used as hard masks to form the second cavity, the third cavity and the fourth cavity, so that the transverse corrosion depth is effectively controlled, the parasitic capacitance at two sides of the capacitive silicon microphone can be reduced, and the sensitivity and the reliability of the microphone are improved.
Through forming anti-adhesion layer between substrate and first vibrating diaphragm layer, between first vibrating diaphragm layer and the back polar plate layer, back polar plate layer and second vibrating diaphragm layer, first stop layer, second stop layer, third stop layer and passivation layer's all exposed surfaces, anti-adhesion layer is the material that has hydrophobicity and low surface adhesion, under the prerequisite that does not influence MEMS device performance, can strengthen the protection to the MEMS device.
Drawings
The above and other objects, features and advantages of the present invention will become more apparent from the following description of embodiments of the present invention with reference to the accompanying drawings, in which:
FIG. 1 illustrates a cross-sectional view of a MEMS device according to an embodiment of the invention;
Fig. 2a to 2m show cross-sectional views corresponding to respective steps in a method of manufacturing a MEMS device according to an embodiment of the present invention.
Detailed Description
The invention will be described in more detail below with reference to the accompanying drawings. Like elements are denoted by like reference numerals throughout the various figures. For clarity, the various features of the drawings are not drawn to scale. Furthermore, some well-known portions may not be shown. The semiconductor structure obtained after several steps may be depicted in one figure for simplicity.
It will be understood that when a layer, an area, or a structure of a device is described as being "on" or "over" another layer, another area, it can be referred to as being directly on the other layer, another area, or further layers or areas can be included between the other layer, another area, etc. And if the device is flipped, the one layer, one region, will be "under" or "beneath" the other layer, another region.
If, for the purposes of describing a situation directly on top of another layer, another region, the expression "a directly on top of B" or "a directly on top of B and adjoining it" will be used herein. In the present application, "a is directly in B" means that a is in B and a is directly adjacent to B, instead of a being in the doped region formed in B.
Numerous specific details of the invention, such as device structures, materials, dimensions, processing techniques and technologies, are set forth in the following description in order to provide a thorough understanding of the invention. However, as will be understood by those skilled in the art, the present invention may be practiced without these specific details.
The MEMS device of the embodiment of the invention is mainly used for microphones.
Fig. 1 shows a cross-sectional view of a MEMS device according to an embodiment of the invention.
Referring to fig. 1, a substrate 100 has a first cavity 101 therein. The first sacrificial layer 201 is positioned on the substrate 100, the first sacrificial layer 201 has a second cavity 204 therein, the second cavity 204 may correspond to the first cavity 101, and the first cavity 101 and the second cavity 204 communicate with each other. The first diaphragm layer 301 is located on the first sacrificial layer 201, at least a portion of the first diaphragm layer 301 is supported by the first sacrificial layer 201, the first diaphragm layer 301 includes a first opening 302, the first opening 302 located in the middle of the first diaphragm layer 301 may serve as an acoustic hole, and the first openings 302 located on both sides may serve as release holes. The second sacrificial layer 401 is located on the first diaphragm layer 301, the second sacrificial layer 401 has a third cavity 404 therein, the third cavity 404 corresponds to the first cavity 101 and the second cavity 204, and the second cavity 204 and the third cavity 404 are communicated through the first opening 302. The back plate layer 501 is located on the second sacrificial layer 401, at least a portion of the back plate layer 501 being supported by the second sacrificial layer 401 such that the back plate layer 501 forms a first capacitor with the first diaphragm layer 301. The back pole plate layer 501 includes a plurality of third openings 502, the third openings 502 being located within the third cavity 404. A third sacrificial layer 601 is located on the back plate layer 501, a fourth cavity 604 is provided in the third sacrificial layer 601, the fourth cavity 604 corresponds to the first cavity 101, the second cavity 204, and the third cavity 404, and the third opening 502 communicates the third cavity 404 with the fourth cavity 604. The second diaphragm layer 701 is located on the third sacrificial layer 601, at least a portion of the second diaphragm layer 701 is supported by the third sacrificial layer 601, so that the back electrode plate layer 501 and the second diaphragm layer 701 form a second capacitor, the second diaphragm layer 701 includes a second opening 702, the second opening 702 located in the middle of the second diaphragm layer 701 may serve as an acoustic hole, and the second openings 702 located on two sides may serve as release holes.
The passivation layer 801 covers at least a surface of the third sacrificial layer 601 and a portion of a surface of the second diaphragm layer 701 adjacent to the third sacrificial layer 601; specifically, the passivation layer 801 is located on the upper surface of the third sacrificial layer 601, the side surface of the second diaphragm layer 701, and at least part of the upper surface of the second diaphragm layer 701.
The anti-adhesion layer 802 is located on an inner wall of at least one of the first cavity 101, the second cavity 204, the third cavity 404, and the fourth cavity 604; specifically, the anti-adhesion layer 802 is located between the substrate 100 and the first diaphragm layer 301, between the first diaphragm layer 301 and the back plate layer 501, between the back plate layer 501 and the second diaphragm layer 701, the first stop layer 203, the second stop layer 403, the third stop layer 603, and the passivation layer 801 on all exposed surfaces.
The inner wall of the second cavity 204 is provided with a first stop layer 203, the first stop layer 203 is located between the substrate 100 and the first diaphragm layer 301, the second cavity 204 is spaced from the first stop layer 203, and the first stop layer 203 is used as a hard mask to form the second cavity 204. The second stop layer 403 is disposed on the inner wall of the third cavity 404, the second stop layer 403 is located between the first diaphragm layer 301 and the back plate layer 501, the third cavity 404 is spaced from the second stop layer 403, and the second stop layer 403 is used as a hard mask to form the third cavity 404. The inner wall of the fourth cavity 604 is provided with a third stop layer 603, the third stop layer 603 is located between the back electrode plate layer 501 and the second diaphragm layer 701, the fourth cavity 604 is spaced from the third stop layer 603, and the third stop layer 603 is used as a hard mask to form a fourth cavity 604. The first stop layer 203 and the first diaphragm layer 301 define a second cavity 204, the second stop layer 403 and the back plate layer 501 define a third cavity 404, and the third stop layer 603 and the second diaphragm layer 701 define a fourth cavity 604. Preferably, the first stop layer 203, the second stop layer 403 and the third stop 603 layer are aligned with each other along a direction perpendicular to the main plane.
The MEMS device of the present embodiment further comprises a first conductive via 304, a second conductive via 503, and a third conductive via 704. The first conductive path 304 passes through the passivation layer 801, the third sacrificial layer 601, the second sacrificial layer 401 from top to bottom to reach the first diaphragm layer 301; specifically, one end of the first conductive channel 304 reaches the upper surface of the first diaphragm layer 301, and passes through the second sacrificial layer 401, the third sacrificial layer 601, the passivation layer 801, and the anti-adhesion layer 802, so that the other end of the first conductive channel 304 is exposed. The second conductive via 503 passes through the passivation layer 801 and the third sacrificial layer 601 sequentially from top to bottom to the back electrode plate layer 501; specifically, one end of the second conductive via 503 reaches the upper surface of the back plate layer 501, passes through the third sacrificial layer 601, the passivation layer 801, and the anti-adhesion layer 802, so that the other end of the second conductive via 503 is exposed. The third conductive path 704 passes through the passivation layer 801 from top to bottom to the second diaphragm layer 701; specifically, one end of the third conductive path 704 reaches the upper surface of the second diaphragm layer 701, and passes through the passivation layer 801 and the anti-adhesion layer 802, so that the other end of the third conductive path 704 is exposed.
According to the MEMS device provided by the embodiment of the invention, the back electrode plate layer 501 is arranged between the first diaphragm layer 301 and the second diaphragm layer 701, so that the pollution of the external environment to the back electrode plate layer 501 can be reduced, and the performance of the MEMS device is improved; and the formed two variable capacitors form a differential capacitance structure, so that not only can the sensitivity of the MEMS device be improved, but also the signal-to-noise ratio of the MEMS device can be improved.
By using the first stop layer 203, the second stop layer 403 and the third stop layer 603 in the first sacrificial layer 201, the second sacrificial layer 401 and the third sacrificial layer 601 as hard masks, respectively, the second cavity 204, the third cavity 404 and the fourth cavity 604 are formed, so that the lateral corrosion depth is effectively controlled, the parasitic capacitance at two sides of the capacitive silicon microphone can be reduced, and the sensitivity and the reliability of the microphone are improved.
By forming the adhesion preventing layer 802 between the substrate 100 and the first diaphragm layer 301, between the first diaphragm layer 301 and the back electrode plate layer 501, between the back electrode plate layer 501 and all exposed surfaces of the second diaphragm layer 701, the first stop layer 203, the second stop layer 403, the third stop layer 603, and the passivation layer 801, the adhesion preventing layer 802 is a material having hydrophobicity and low surface adhesion, and protection of the MEMS device can be enhanced without affecting the performance of the MEMS device.
Fig. 2a to 2m show cross-sectional views corresponding to respective steps in a method of manufacturing a MEMS device according to an embodiment of the present invention.
As shown in fig. 2a, a first sacrificial layer 201 is formed on a substrate 100 by a thermal oxidation, low pressure chemical vapor deposition, or plasma enhanced chemical vapor deposition method. The first sacrificial layer 201 may be a silicon oxide layer and may have a thickness of 0.5 to 2 μm. The first sacrificial layer 201 is subjected to photolithography and etching, and a first via 202 is formed in the first sacrificial layer 201, and the first via 202 may be located away from the center of the first sacrificial layer 201.
Subsequently, as shown in fig. 2b, the first via 202 is deposited, forming a first stop layer 203. The deposition method may be a low pressure chemical vapor deposition method, a plasma enhanced chemical vapor deposition method, or the like. The material deposited may be silicon nitride, or other suitable corrosion resistant material. The upper surface of the first stop layer 203 is then parallel to the upper surface of the first sacrificial layer 201 by photolithography or etching.
Subsequently, as shown in fig. 2c, a first diaphragm layer 301 is formed on the first stop layer 203 and at least part of the first sacrificial layer 201 by low pressure chemical vapor deposition. The side edge of the first diaphragm layer 301 may not reach the side edge of the first sacrificial layer 201, so that an upper surface of the first sacrificial layer 201 near the side edge is at least partially exposed. The first diaphragm layer 301 may be formed of doped polysilicon. The first diaphragm layer 301 is patterned to form a first opening 302 through photolithography and etching processes, the first opening 302 located in the middle of the first diaphragm layer 301 may serve as an acoustic hole, and the first openings 302 located at both sides may serve as release holes. The first diaphragm layer 301 may be a polysilicon layer, and the thickness thereof may be 0.3-1.0 um.
Subsequently, as shown in fig. 2d, a second sacrificial layer 401 is formed on the upper surface of the first diaphragm layer 301, the side of the first diaphragm layer 301, and the exposed upper surface of the first sacrificial layer 201 using a Low Pressure Chemical Vapor Deposition (LPCVD) or a Plasma Enhanced Chemical Vapor Deposition (PECVD) method. The second sacrificial layer 401 is then subjected to photolithography or etching, and a second through hole 402 is formed in the second sacrificial layer 401, where the second through hole 402 may be located outside the first opening 302 of the first diaphragm layer 301 and above the first diaphragm layer 301, and preferably, the second through hole 402 corresponds to the first through hole 202 of the first sacrificial layer 201. The second sacrificial layer 401 may be a silicon oxide layer, and its thickness may be 1.0 to 4.0 μm.
Subsequently, as shown in fig. 2e, the second via 402 is deposited, forming a second stop layer 403, preferably the second stop layer 403 corresponds to the first stop layer 203. The deposition method may be a low pressure chemical vapor deposition method, a plasma enhanced chemical vapor deposition method, or the like. The material deposited may be silicon nitride, or other suitable corrosion resistant material. The upper surface of the second stop layer 403 is then parallel to the upper surface of the second sacrificial layer 401 by means of photolithography or etching.
Subsequently, as shown in fig. 2f, a back-plate layer 501 is formed on the second stop layer 403 and at least part of the second sacrificial layer 401 by means of low pressure chemical vapor deposition. Then patterned by photolithography and etching processes to form third openings 502, and third openings 502 may be acoustic holes. The side edges of the back-electrode plate layer 501 may not reach the side edges of the second sacrificial layer 401, such that the upper surface of the second sacrificial layer 401 near the side edges is at least partially exposed, preferably one side edge of the back-electrode plate layer 501 corresponds to one side edge of the first diaphragm layer 301, and the other side edge of the back-electrode plate layer 501 does not reach the other side edge of the first diaphragm layer 301. The back plate layer 501 may be a doped polysilicon layer, which may have a thickness of 1.0-3.0 um.
Subsequently, as shown in fig. 2g, a third sacrificial layer 601 is formed on the upper surface of the back plate layer 501, the side of the back plate layer 501 and the exposed upper surface of the second sacrificial layer 401 using a Low Pressure Chemical Vapor Deposition (LPCVD) or a Plasma Enhanced Chemical Vapor Deposition (PECVD) method. The third sacrificial layer 601 is subjected to photolithography or etching, and a third through hole 602 is formed in the third sacrificial layer 601, and the second through hole 402 may be located outside the first opening 302 of the first diaphragm layer 301 and above the back electrode layer 501, preferably, the third through hole 602 corresponds to the second through hole 402 of the second sacrificial layer 401 and the first through hole 202 of the first sacrificial layer 201. The second sacrificial layer 401 may be a silicon oxide layer, and its thickness may be 1.0 to 4.0 μm.
Subsequently, as shown in fig. 2h, a third via 602 is deposited, forming a third stop layer 603, preferably the third stop layer 603 corresponds to the first stop layer 203, the second stop layer 403. The deposition method may be a low pressure chemical vapor deposition method, a plasma enhanced chemical vapor deposition method, or the like. The material deposited may be silicon nitride, or other suitable corrosion resistant material. The upper surface of the third stop layer 603 is then parallel to the upper surface of the third sacrificial layer 601 by photolithography or etching.
Subsequently, as shown in fig. 2i, a second diaphragm layer 701 is formed on the third stop layer 603 and at least a portion of the third sacrificial layer 601 by low pressure chemical vapor deposition. The side edge of the second diaphragm layer 701 may not reach the side edge of the third sacrificial layer 601 such that an upper surface of the third sacrificial layer 601 near the side edge is at least partially exposed, specifically, one side edge of the second diaphragm layer 701 does not reach the side edge of the third sacrificial layer 601, and the other side edge of the second diaphragm layer 701 does not reach the other side edge of the back electrode plate layer 501. The second diaphragm layer 701 may be formed of doped polysilicon. The second diaphragm layer 701 is patterned to form a second opening 702 through photolithography and etching processes, the second opening 702 located in the middle of the second diaphragm layer 701 may serve as an acoustic hole, and the second openings 702 located at both sides may serve as release holes. The second openings 702 are located between the third vias 602, i.e. the second openings 702 are located between the third stop layers 603. Preferably, the second opening 702 corresponds to the first opening 302. The first diaphragm layer 301 may be a polysilicon layer, and the thickness thereof may be 0.3-1.0 um.
Subsequently, as shown in fig. 2j, the first channel of the second diaphragm layer 701 and the second channel of the back plate layer 501 are formed by photolithography and etching of the second sacrificial layer 401 and the third sacrificial layer 601, respectively. One end of the first channel reaches the upper surface of the first diaphragm layer 301, and passes through the second sacrificial layer 401 and the third sacrificial layer 601, so that at least part of the upper surface of the first diaphragm layer 301 is exposed. One end of the second channel reaches the upper surface of the back plate layer 501, passing through the third sacrificial layer 601, so that at least part of the upper surface of the back plate layer 501 is exposed.
Then, by photolithography and etching, a first conductive channel 304 is formed in the first channel, a second conductive channel 503 is formed in the second channel, and a third conductive channel 704 is formed on the upper surface of the second diaphragm layer 701, respectively. One end of the first conductive channel 304 reaches the upper surface of the first diaphragm layer 301, and passes through the second sacrificial layer 401 and the third sacrificial layer 601, so that the other end of the first conductive channel 304 is exposed. One end of the second conductive via 503 reaches the upper surface of the back plate layer 501, and passes through the third sacrificial layer 601, so that the other end of the second conductive via 503 is exposed. One end of the third conductive channel 704 reaches to be located on the upper surface of the second diaphragm layer 701, and the other end is exposed. The material forming the first conductive via 304, the second conductive via 503, and the third conductive via 704 may be metal such as Au or Al, alloy such as Cr-Au or Ti-Pt-Au, pure aluminum Al, aluminum silicon, or Ti-TiN-Al-Si mixture, or the like, and the height thereof may be 0.5 to 2um.
Subsequently, as shown in fig. 2k, a passivation layer 801 is formed on the third sacrificial layer 601, a side surface of the second diaphragm layer 701, and at least a portion of an upper surface of the second diaphragm layer 701 using a Plasma Enhanced Chemical Vapor Deposition (PECVD) method, and in particular, the passivation layer 801 is located outside the second opening 702 of the second diaphragm layer 701. The upper surface of the passivation layer 801 has a height lower than the first conductive via 304, the second conductive via 503, and the third conductive via 704. Passivation layer 801 may be a corrosion resistant material such as silicon nitride.
Subsequently, as shown in fig. 2l, a chemical mechanical polishing CMP or thinning process is performed on the lower surface of the substrate 100 so that the thickness of the substrate 100 is appropriate. The lower surface of the substrate 100 is then etched by double sided photolithography and etching until the first sacrificial layer 201 is formed, forming the first cavity 101. The first cavity 101 is located within the first stop layer 203.
Subsequently, as shown in fig. 2m, by means of selective wet etching with hydrofluoric acid or buffered oxide etching solution (Buffered Oxide Etch, BOE), the first sacrificial layer 201 is etched first through the first cavity 101 with the first stop layer 203 as a hard mask, forming a second cavity 204; etching the second sacrificial layer 401 through the first opening 302 of the first diaphragm layer 301 using the second stop layer 403 as a hard mask to form a third cavity 404; the third stop layer 603 is used as a hard mask, and the third sacrificial layer 601 is etched through the second opening 702 of the second diaphragm layer 701 to form a fourth cavity 604, thereby completing the release of the structure.
Subsequently, as shown in fig. 1, an anti-adhesion layer 802 is formed on the inner wall of at least one of the first cavity 101, the second cavity 204, the third cavity 404, and the fourth cavity 604; specifically, an anti-adhesion layer 802 is formed between the substrate 100 and the first diaphragm layer 301, between the first diaphragm layer 301 and the back plate layer 501, between the back plate layer 501 and the second diaphragm layer 701, the first stop layer 203, the second stop layer 403, the third stop layer 603, and all exposed surfaces of the passivation layer 801. The anti-adhesion layer 802 is preferably a thin SAM organic film or an atomic layer deposited aluminum oxide having a thickness of 1-10 nm, which does not affect the subsequent product routing, etc., and forms the anti-adhesion layer 802 of the MEMS device of the embodiment of the present invention due to the hydrophobicity and low surface adhesion of the SAM organic film or aluminum oxide.
It should be noted that in this document relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
In accordance with embodiments of the present invention, as described above, these embodiments are not exhaustive of all details, nor are they intended to limit the invention to the precise embodiments disclosed. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention and various modifications as are suited to the particular use contemplated. The invention is limited only by the claims and the full scope and equivalents thereof.
Claims (15)
1. A MEMS device, comprising:
a substrate having a first cavity;
a first sacrificial layer on the substrate, wherein the first sacrificial layer is provided with a second cavity;
A first diaphragm layer on the first sacrificial layer, at least a portion of the first diaphragm layer being supported by the first sacrificial layer;
the second sacrificial layer is positioned on the first vibrating diaphragm layer and is provided with a third cavity;
A back electrode plate layer on the second sacrificial layer, at least a portion of the back electrode plate layer being supported by the second sacrificial layer such that the back electrode plate layer and the first diaphragm layer form a first capacitor;
the third sacrificial layer is positioned on the back electrode plate layer and is provided with a fourth cavity;
A second diaphragm layer on the third sacrificial layer, at least a portion of the second diaphragm layer being supported by the third sacrificial layer such that the second diaphragm layer and the back plate layer form a second capacitor,
Wherein the MEMS device further comprises a plurality of stop layers for defining a lateral dimension of at least one of the second to fourth cavities, the plurality of stop layers comprising:
The first stopping layer is positioned on the inner wall of the second cavity, and the second cavity is defined by the first stopping layer and the first vibrating diaphragm layer;
A second stop layer positioned on an inner wall of the third cavity, the second stop layer and the back plate layer defining the third cavity;
A third stop layer positioned on an inner wall of the fourth cavity, the third stop layer and the second diaphragm layer defining the fourth cavity;
The first, second and third stop layers are aligned with each other along a direction perpendicular to the principal plane.
2. The MEMS device of claim 1, wherein the first diaphragm layer comprises a first opening such that the second cavity communicates with the third cavity.
3. The MEMS device of claim 1, wherein the second diaphragm layer comprises a second opening such that the fourth cavity is in communication with an external environment.
4. The MEMS device of claim 1, wherein the back plate layer comprises a third opening such that the third cavity communicates with the fourth cavity.
5. The MEMS device of claim 1, wherein the second cavity is formed with the first stop layer as a hard mask;
Forming the third cavity by taking the second stop layer as a hard mask;
and forming the fourth cavity by taking the third stop layer as a hard mask.
6. The MEMS device of claim 1, further comprising: and the passivation layer at least covers the surface of the third sacrificial layer and a part of the surface of the second vibrating film layer adjacent to the third sacrificial layer.
7. The MEMS device of claim 1, further comprising:
And the anti-adhesion layer is positioned on the inner wall of at least one of the first cavity, the second cavity, the third cavity and the fourth cavity.
8. The MEMS device of claim 6, further comprising:
A first conductive path passing through the passivation layer, the third sacrificial layer, the second sacrificial layer, and the first diaphragm layer from top to bottom;
A second conductive path through the passivation layer and the third sacrificial layer from top to bottom to the back plate layer; and
And a third conductive channel passes through the passivation layer from top to bottom to reach the second vibrating film layer.
9. A method of manufacturing a MEMS device, comprising:
Sequentially forming a first sacrificial layer, a first vibrating film layer, a second sacrificial layer, a back electrode plate layer, a third sacrificial layer and a second vibrating film layer on a substrate;
Forming a first cavity in the substrate;
forming a second cavity in the first sacrificial layer via the first cavity, the first cavity and the second cavity communicating with each other, at least a portion of the first diaphragm layer being supported by the first sacrificial layer;
Forming a third cavity in the second sacrificial layer, at least a portion of the back-electrode plate layer being supported by the second sacrificial layer such that the back-electrode plate layer and the first diaphragm layer form a first capacitor; and
Forming a fourth cavity in the third sacrificial layer, at least a portion of the second diaphragm layer being supported by the third sacrificial layer such that the back plate layer and the second diaphragm layer form a second capacitor,
Wherein the manufacturing method further comprises forming a plurality of stop layers for defining a lateral dimension of at least one of the second to fourth cavities, the forming the plurality of stop layers comprising:
Forming a first stop layer in the first sacrificial layer between the steps of forming the first sacrificial layer and the first diaphragm layer;
forming a second stop layer in the second sacrificial layer between the steps of forming the second sacrificial layer and the back plate layer; and
Forming a third stop layer in the third sacrificial layer between the steps of forming the third sacrificial layer and the second diaphragm layer;
The first stop layer and the first diaphragm layer define the second cavity, the second stop layer and the back plate layer define the third cavity, and the third stop layer and the second diaphragm layer define the fourth cavity; the first, second and third stop layers are aligned with each other along a direction perpendicular to the principal plane.
10. The manufacturing method according to claim 9, further comprising: a first opening is formed in the first diaphragm layer, and in the step of forming the third cavity, an etchant etches the second sacrificial layer from the second cavity through the first opening.
11. The manufacturing method according to claim 9, further comprising: a second opening is formed in the second diaphragm layer, and an etchant etches the third sacrificial layer through the second opening in the step of forming the fourth cavity.
12. The manufacturing method according to claim 9, further comprising: a third opening is formed in the back plate layer such that the third cavity communicates with the fourth cavity.
13. The manufacturing method according to claim 9, wherein after forming the second diaphragm layer, further comprising: and forming a passivation layer which at least covers the surface of the third sacrificial layer and a part of the surface of the second vibrating film layer adjacent to the third sacrificial layer.
14. The manufacturing method according to claim 9, wherein after the step of forming the fourth cavity, further comprising: an anti-adhesion layer is formed, the anti-adhesion layer being located on an inner wall of at least one of the first cavity, the second cavity, the third cavity, and the fourth cavity.
15. The manufacturing method according to claim 13, wherein after the step of forming the second diaphragm layer, further comprising:
Forming a first conductive channel from top to bottom through the passivation layer, the third sacrificial layer, the second sacrificial layer and reaching the first diaphragm layer;
Forming a second conductive channel, sequentially penetrating through the passivation layer and the third sacrificial layer from top to bottom, and reaching the back electrode plate layer; and
And forming a third conductive channel from top to bottom through the passivation layer to the second diaphragm layer.
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| CN110012409A (en) * | 2018-12-31 | 2019-07-12 | 瑞声科技(新加坡)有限公司 | MEMS microphone manufacturing method |
| CN109905833B (en) * | 2018-12-31 | 2021-04-20 | 瑞声科技(新加坡)有限公司 | MEMS microphone manufacturing method |
| CN111434604B (en) * | 2019-01-14 | 2023-06-06 | 联华电子股份有限公司 | Micro-electromechanical system structure and manufacturing method thereof |
| CN111924794B (en) * | 2019-05-13 | 2024-06-04 | 无锡华润上华科技有限公司 | Micro-electromechanical system device |
| CN110868681B (en) * | 2019-11-29 | 2021-09-14 | 绍兴中芯集成电路制造股份有限公司 | MEMS microphone warpage compensation method and MEMS microphone wafer |
| CN110958548A (en) | 2019-12-02 | 2020-04-03 | 杭州士兰集成电路有限公司 | MEMS microphone and manufacturing method thereof |
| CN111885473B (en) * | 2020-06-24 | 2021-11-16 | 歌尔微电子有限公司 | Capacitive micro-electro-mechanical system microphone, microphone monomer and electronic equipment |
| CN112499576B (en) * | 2020-11-18 | 2024-05-03 | 苏州敏芯微电子技术股份有限公司 | MEMS device and method of manufacturing the same |
| CN213694144U (en) * | 2020-12-25 | 2021-07-13 | 歌尔微电子有限公司 | MEMS sensor chips, microphones and electronics |
| CN112866886B (en) * | 2021-04-23 | 2021-08-24 | 瑶芯微电子科技(上海)有限公司 | MEMS microphone structure and manufacturing method thereof |
| CN113660592B (en) * | 2021-08-17 | 2024-03-29 | 杭州士兰微电子股份有限公司 | MEMS device and preparation method thereof |
| CN215935099U (en) * | 2021-10-15 | 2022-03-01 | 苏州敏芯微电子技术股份有限公司 | Micro-electromechanical structure and micro-electromechanical system (MEMS) microphone thereof |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103369452A (en) * | 2013-07-23 | 2013-10-23 | 上海集成电路研发中心有限公司 | Preparation method of capacitive-type silicon microphone |
| CN104254046A (en) * | 2013-06-28 | 2014-12-31 | 英飞凌科技股份有限公司 | MEMS microphone with low pressure region between diaphragm and counter electrode |
| CN208429863U (en) * | 2018-04-20 | 2019-01-25 | 杭州士兰集成电路有限公司 | MEMS device |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100941893B1 (en) * | 2007-12-10 | 2010-02-16 | (주) 알에프세미 | Capacitor Silicon MEMS Microphones |
| CN103281659B (en) * | 2013-05-03 | 2015-12-23 | 歌尔声学股份有限公司 | MEMS microphone and preparation method thereof |
| US20150060955A1 (en) * | 2013-09-03 | 2015-03-05 | Windtop Technology Corp. | Integrated mems microphone with mechanical electrical isolation |
| CN105578369A (en) * | 2014-10-17 | 2016-05-11 | 中芯国际集成电路制造(上海)有限公司 | MEMS (Micro Electro Mechanical System) microphone, preparation method thereof and electronic device |
| CN105992113B (en) * | 2015-02-03 | 2019-07-26 | 中芯国际集成电路制造(上海)有限公司 | A kind of MEMS device and preparation method thereof, electronic device |
| CN104902415A (en) * | 2015-05-29 | 2015-09-09 | 歌尔声学股份有限公司 | Differential capacitive MEMS (Micro-Electro-Mechanical System) microphone |
| CN107835477B (en) * | 2017-11-24 | 2020-03-17 | 歌尔股份有限公司 | MEMS microphone |
-
2018
- 2018-04-20 CN CN201810362535.1A patent/CN108584863B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104254046A (en) * | 2013-06-28 | 2014-12-31 | 英飞凌科技股份有限公司 | MEMS microphone with low pressure region between diaphragm and counter electrode |
| CN103369452A (en) * | 2013-07-23 | 2013-10-23 | 上海集成电路研发中心有限公司 | Preparation method of capacitive-type silicon microphone |
| CN208429863U (en) * | 2018-04-20 | 2019-01-25 | 杭州士兰集成电路有限公司 | MEMS device |
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