CN108539015A - A kind of preparation method of resistive structural unit - Google Patents
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Abstract
本发明提供了一种阻变结构单元的制备方法。该方法在阻变层表面选择一定区域，在该区域与底电极之间通电进行预处理，对阻变层表面除该区域以外的区域表面进行绝缘处理，使阻变层中特定局域的氧元素变成氧气逸出至空气中，增加氧空位数量，同时在阻变层的处理表面留下倒锥型的凹坑，制备顶电极后，可获得倒圆锥形的电极，从而形成有利于氧空位纳米导电丝形成的垂直通道，使氧空位纳米导电丝形成的位置和数量固定，实现阻变结构单元中量子电导特性的可控性与提高阻变结构单元中量子电导稳定性的目的。
The invention provides a preparation method of a resistive switching structural unit. In this method, a certain area is selected on the surface of the resistive layer, pretreatment is carried out between the area and the bottom electrode, and the surface of the area other than this area is insulated, so that the specific localized oxygen in the resistive layer The element turns into oxygen and escapes into the air, increasing the number of oxygen vacancies, and leaving inverted conical pits on the treated surface of the resistive layer. After preparing the top electrode, an inverted conical electrode can be obtained, thereby forming a favorable oxygen The vertical channel formed by the vacancy nanoconductive filaments fixes the position and quantity of the oxygen vacancy nanoconductive filaments, and realizes the controllability of the quantum conductance characteristics in the resistive structural unit and improves the stability of the quantum conductance in the resistive structural unit.
Description
技术领域technical field
本发明涉及纳米技术、信息存储技术及人工智能领域，尤其是利用量子电导做多值存储，逻辑器件，仿生器件。The invention relates to the fields of nanotechnology, information storage technology and artificial intelligence, especially the use of quantum conductance for multi-value storage, logic devices and bionic devices.
背景技术Background technique
存储器是信息记录的载体，在半导体器件中发挥重要的作用。随着大数据时代的来临，全球信息量呈指数式增长，存储器的重要性更加突出。现有技术主要是通过缩减器件尺寸来增加芯片的集成密度和存储容量，随着尺寸缩小到10纳米级别，摩尔定律开始遭遇越来越严重的挑战，如：发热、功耗以及工艺难度等一系列问题，以及冯诺依曼瓶颈问题。Memory is the carrier of information recording and plays an important role in semiconductor devices. With the advent of the era of big data, the amount of global information is increasing exponentially, and the importance of memory is even more prominent. The existing technology mainly increases the integration density and storage capacity of the chip by reducing the size of the device. As the size shrinks to 10 nanometers, Moore's Law begins to encounter more and more serious challenges, such as heat generation, power consumption, and process difficulty. series of problems, and the von Neumann bottleneck problem.
阻变存储器是一种新兴的信息技术，具有结构简单、微缩性好、操作速度快、功耗低、与CMOS工艺兼容等诸多优点，在国际半导体技术路线图中被明确列为最值得优先发展的新型存储技术之一。更重要的一个方面，阻变存储器存储的结构单元为简单的“顶电极/阻变层/底电极”三明治结构，中间层具有电阻转变性质，在阳极与阴极之间调控施加电压可以使存储单元的电阻在高低阻值切换。在电压作用下，大多数阻变结构单元在阻变过程中会通过离子迁移和电化学过程形成连通阳极和阴极的纳米导电通道，本文中将该纳米导电通道称为“纳米导电丝”。该纳米导电丝可以简化看作准一维电子体系，其电导特性与丝的尺寸尤其是最小直径密切相关。在导电丝连通或断开的临界状态所形成的纳米点接触结构的特征尺寸与介质中的电子自由程相当，电子沿导电丝的弹道传输行为不受散射作用，进而呈现一系列以G0为单位的量子化电导特性。量子电导特性能够带来更加丰富的电学性质，不仅可以在不改变尺寸的前提下有效地提高器件存储密度，还有助于开发多功能、低功耗的新原理信息器件，从而解决摩尔定律极限和冯诺依曼瓶颈所带来的种种难题。Resistive variable memory is an emerging information technology, which has many advantages such as simple structure, good miniaturization, fast operation speed, low power consumption, and compatibility with CMOS technology. It is clearly listed as the most worthy of priority development in the international semiconductor technology roadmap. One of the new storage technologies. In a more important aspect, the structural unit stored in the resistive variable memory is a simple "top electrode/resistive layer/bottom electrode" sandwich structure. The resistor is switched between high and low resistance. Under the action of voltage, most resistive switching structural units will form nano-conductive channels connecting the anode and cathode through ion migration and electrochemical processes during the resistive switching process. This nano-conductive channel is called "nano conductive filament" in this paper. The nano-conductive filament can be simplified as a quasi-one-dimensional electronic system, and its electrical conductivity is closely related to the size of the filament, especially the smallest diameter. The characteristic size of the nano-point contact structure formed in the critical state of conductive filament connection or disconnection is equivalent to the free path of electrons in the medium, and the ballistic transport behavior of electrons along the conductive filament is not affected by scattering, and then presents a series of G 0 Quantized conductance properties of the unit. Quantum conductance properties can bring more abundant electrical properties, which can not only effectively increase the storage density of devices without changing the size, but also help to develop new principle information devices with multiple functions and low power consumption, thus solving the limit of Moore's Law and the problems caused by the von Neumann bottleneck.
但是，当前阻变结构单元的量子化电导的可控性与抗疲劳性差，很难进行实际应用。However, the controllability and fatigue resistance of the quantized conductance of the current resistance-switching structural unit are poor, and it is difficult for practical application.
发明内容Contents of the invention
本发明的技术目的是提供一种阻变结构单元的制备方法，利用该方法制得的阻变结构单元的量子电导具有高的可控性与稳定性。The technical purpose of the present invention is to provide a method for preparing a resistive switching structural unit, and the quantum conductance of the resistive switching structural unit prepared by the method has high controllability and stability.
为了实现上述技术目的，本发明提供的技术方案为：一种阻变结构单元的制备方法，该阻变结构单元具有三层结构，自下往上依次为底电极层、阻变层与顶电极层，所述阻变层具有电致电阻转变特性，其特征是：如图2所示，包括如下制备过程：In order to achieve the above technical purpose, the technical solution provided by the present invention is: a preparation method of a resistive switching structural unit, the resistive switching structural unit has a three-layer structure, and the bottom electrode layer, the resistive switching layer and the top electrode are sequentially arranged from bottom to top. layer, the resistive layer has electro-resistance switching characteristics, and is characterized in that: as shown in Figure 2, it includes the following preparation process:
在阻变层表面选择一定区域A的过程；The process of selecting a certain area A on the surface of the resistive layer;
在区域A与底电极之间施加预电压进行预处理，使区域A形成凹坑的过程；The process of applying a pre-voltage between the area A and the bottom electrode for pretreatment to form pits in the area A;
阻变层表面除区域A以外的区域表面进行绝缘处理的过程；以及，The process of insulating the surface of the resistive switch layer except the area A; and,
在阻变层表面制备顶电极，所述凹坑被顶电极材料填充的过程。The top electrode is prepared on the surface of the resistive variable layer, and the pit is filled with the top electrode material.
所述区域A的形状不限，可以是圆形、椭圆形、方形等。作为优选，所述区域A的最大直径为100nm-500um范围。The shape of the region A is not limited, and may be a circle, an ellipse, a square, and the like. Preferably, the maximum diameter of the region A is in the range of 100nm-500um.
作为优选，采用导电探针在区域A与底电极之间施加预电压。作为进一步优选，所述导电探针的针尖直径为1nm-200nm。Preferably, a conductive probe is used to apply a pre-voltage between the region A and the bottom electrode. As a further preference, the tip diameter of the conductive probe is 1nm-200nm.
作为优选，制备顶电极后，去除位于阻变层表面除区域A以外的绝缘部分的顶电极。Preferably, after the top electrode is prepared, the top electrode located on the insulating part of the surface of the resistive layer except the region A is removed.
所述底电极具有导电性，其材料优选是惰性电极材料，例如Pt、Au、W等中的一种或者几种。The bottom electrode is conductive, and its material is preferably an inert electrode material, such as one or more of Pt, Au, W, and the like.
作为优选，所述底电极的厚度为50纳米～100纳米。Preferably, the bottom electrode has a thickness of 50 nanometers to 100 nanometers.
所述阻变层具有电致电阻转变特性，作为优选，采用高介电常数的阻变材料，例如HfO2、Ta2O5、W2O3、ZrO2、ZnO、TiO2、SiO2、Al2O3、NiO等中的一种或者几种。The resistive layer has electro-resistance switching characteristics. Preferably, a resistive material with a high dielectric constant, such as HfO 2 , Ta 2 O 5 , W 2 O 3 , ZrO 2 , ZnO, TiO 2 , SiO 2 , One or more of Al 2 O 3 , NiO, etc.
作为优选，所述阻变层的厚度为5纳米～15纳米。Preferably, the thickness of the resistive layer is 5 nm to 15 nm.
所述顶电极具有导电性，其材料优选是惰性电极材料，例如Pt、Au、W等中的一种或者几种。The top electrode is conductive, and its material is preferably an inert electrode material, such as one or more of Pt, Au, W, and the like.
作为优选，所述顶电极的厚度为50纳米～100纳米。Preferably, the thickness of the top electrode is 50 nanometers to 100 nanometers.
作为一种实现方式，利用甩胶机，光刻仪对阻变层表面进行甩胶、光刻、显影处理，得到所述区域A，阻变层表面除区域A以外的区域表面为光刻胶，因此呈绝缘状。作为优选，制备顶电极后，将制得的阻变结构单元进行去光刻胶处理，使位于光刻胶表面的顶电极也被去除。As an implementation method, the surface of the resistance variable layer is treated with glue removal, photolithography, and development by using a glue rejection machine and a photolithography instrument to obtain the region A, and the surface of the resistance variable layer except region A is photoresist. , so it is insulating. Preferably, after the top electrode is prepared, the resistive switching structural unit is subjected to photoresist removal treatment, so that the top electrode located on the surface of the photoresist is also removed.
与现有技术相比，本发明在底电极层、阻变层与顶电极层构成的三层结构阻变结构单元的制备过程中，在阻变层表面选择一定的区域A，在该区域与底电极之间通电进行预处理，而对阻变层表面除区域A以外的区域表面进行绝缘处理，带来如下技术效果：Compared with the prior art, the present invention selects a certain region A on the surface of the resistive layer during the preparation process of the three-layer resistive structural unit composed of the bottom electrode layer, the resistive layer and the top electrode layer, and the The bottom electrodes are energized for pretreatment, and the surface of the resistive layer is insulated except for area A, which brings the following technical effects:
(1)从预处理过程看，在该特定区域的阻变层和底电极之间加电，可使该阻变层加电区域中氧元素变成氧气逸出至空气，从而使该区域氧空位增多，形成一个利于氧空位纳米导电丝形成的垂直通道；(1) From the perspective of the pretreatment process, applying electricity between the resistive layer and the bottom electrode in this specific region can make the oxygen element in the electrified region of the resistive layer change into oxygen and escape to the air, thereby making the oxygen in this region The vacancies increase, forming a vertical channel that is conducive to the formation of oxygen vacancy nano-conductive filaments;
(2)从阻变层结构和电极形状看，加电预处理后，在该区域A处形成凹坑，呈倒锥形，在顶电极生长过程中会将该凹坑填满，形成倒锥形的电极，一方面该倒锥形电极区域会有电场增强效应，另一方面该区域A处的阻变层薄膜厚度会减少，因此能够有效提高该阻变结构单元的电阻转变特性；(2) From the structure of the resistive layer and the shape of the electrode, after power-on pretreatment, a pit is formed in the area A, which is in the shape of an inverted cone. During the growth process of the top electrode, the pit will be filled to form an inverted cone Shaped electrode, on the one hand, the inverted tapered electrode region will have an electric field enhancement effect, and on the other hand, the thickness of the resistive layer at region A will be reduced, so the resistance transition characteristics of the resistive structural unit can be effectively improved;
(3)阻变层表面除区域A以外的区域表面进行绝缘处理，因此该阻变结构单元的顶电极与底电极之间施加电压时，在阻变层表面，导电通道被限制在该区域A，由于上述(1)与(2)，纳米导电丝进一步被限制在该倒锥形的凹坑，从而能够使氧空位纳米导电丝形成的位置和数量固定，实现阻变结构单元中量子电导特性的可控性与提高阻变结构单元中量子电导稳定性的目的；(3) The surface of the resistive switch layer except the region A is insulated. Therefore, when a voltage is applied between the top electrode and the bottom electrode of the resistive switch structure unit, the conductive channel is limited to the region A on the surface of the resistive switch layer. , due to the above (1) and (2), the nano conductive filaments are further confined in the inverted cone-shaped pit, so that the position and number of oxygen vacancy nano conductive filaments can be fixed, and the quantum conductance characteristics in the resistive structural unit can be realized The controllability and the purpose of improving the stability of quantum conductance in the resistive structural unit;
(4)通过调控预处理电压值与预处理次数可以调节所述空位的深度与宽度，因此进一步增强了对阻变结构单元的量子电导特性的调控；作为优选，调控所述凹坑的截面积小于1um2；作为优选，调控所述凹坑的深度是所述阻变层厚度的5％-40％，进一步优选为10％-30％，更优选为15％-25％。(4) The depth and width of the vacancy can be adjusted by regulating the pretreatment voltage value and the number of pretreatment times, thus further enhancing the regulation of the quantum conductance characteristics of the resistive structural unit; as a preference, regulating the cross-sectional area of the pit less than 1um 2 ; preferably, the depth of the pit is adjusted to be 5%-40% of the thickness of the resistive layer, more preferably 10%-30%, more preferably 15%-25%.
因此，利用本发明的制备方法制得的阻变结构单元具有高度可控量子电导特性和良好的稳定性，使量子电导效应真正应用于多值存储、多值逻辑及神经模拟领域并使其实现产业化。Therefore, the resistive structural unit prepared by the preparation method of the present invention has highly controllable quantum conductance characteristics and good stability, so that the quantum conductance effect can be truly applied in the fields of multi-valued storage, multi-valued logic and neural simulation and realized industrialization.
附图说明Description of drawings
图1是本发明中阻变结构单元的结构示意图；Fig. 1 is the structural representation of resistive switching structural unit in the present invention;
图2是本发明实施例1中预处理后的阻变层表面形貌图；Fig. 2 is the surface topography diagram of the resistive layer after pretreatment in Example 1 of the present invention;
图3是本发明实施例1中预处理后的凹坑区域起伏高度图；Fig. 3 is the undulation height map of the pit area after pretreatment in embodiment 1 of the present invention;
图4是本发明处理器件和未处理器件初始化过程电压-电流对比图；Fig. 4 is a voltage-current comparison diagram of the initialization process of the processed device and the unprocessed device of the present invention;
图5是本发明实施例1中阻变循环图；Fig. 5 is a resistance switching cycle diagram in Example 1 of the present invention;
图6是本发明对比实施例1中的阻变结构单元的量子化电导的稳定性测试结果图；Fig. 6 is a graph showing the stability test results of the quantized conductance of the resistive structural unit in Comparative Example 1 of the present invention;
图7是本发明实施例1中的阻变结构单元的量子化电导的稳定性测试结果图。Fig. 7 is a graph showing the stability test results of the quantized conductance of the resistive switching structural unit in Example 1 of the present invention.
具体实施方式Detailed ways
以下结合附图与实施例对本发明作进一步详细描述，需要指出的是，以下所述实施例旨在便于对本发明的理解，而不对其起任何限定作用。The present invention will be described in further detail below in conjunction with the accompanying drawings and embodiments. It should be noted that the following embodiments are intended to facilitate the understanding of the present invention, but do not limit it in any way.
对比实施例1：Comparative Example 1:
本实施例中，阻变结构单元的制备工艺如下：In this embodiment, the preparation process of the resistive structural unit is as follows:
(1)底电极采用厚度为50nm的Pt导电基片；使用磁控溅射在底电极上生长厚度为8nm的氧化铪(HfO2)作为阻变层；(1) The bottom electrode adopts a Pt conductive substrate with a thickness of 50 nm; use magnetron sputtering to grow hafnium oxide (HfO 2 ) with a thickness of 8 nm on the bottom electrode as a resistive layer;
(2)在阻变层表面采用电子束蒸发生长50纳米的Pt作为顶电极。(2) Electron beam evaporation is used to grow 50nm Pt on the surface of the resistive switch layer as the top electrode.
对上述制得的阻变结构单元的顶电极与底电极之间施加电压，如图4所示，得到该阻变结构单元的电阻转变需要4V，当操作电压小于4V时，阻变结构单元不会发生高低阻态转变。Apply a voltage between the top electrode and the bottom electrode of the resistive structural unit prepared above, as shown in Figure 4, the resistance transition of the resistive structural unit requires 4V. A high-to-low resistance state transition occurs.
在电压作用下，该阻变结构单元可形成纳米导电丝，呈现量子化电导特性。利用B1500A半导体分析仪测试该阻变结构单元量子化电导的稳定性能，即，在该阻变结构单元的顶电极与底电极之间施加电压多次测试该阻变结构单元的量子化电导值，每次测试时，测试点与施加电压不变。结果如图6所示，显示，多次测试中该阻变结构单元的量子化电导值出现高低变化，即该阻变结构单元的量子化电导呈现不稳定性。Under the action of voltage, the resistive structural unit can form nano-conductive filaments, exhibiting quantized conductance characteristics. Use the B1500A semiconductor analyzer to test the stability of the quantized conductance of the resistive structural unit, that is, apply a voltage between the top electrode and the bottom electrode of the resistive structural unit to test the quantized conductance value of the resistive structural unit for many times, For each test, the test point and the applied voltage remain unchanged. The results are shown in FIG. 6 , which shows that the quantized conductance value of the resistive structural unit varies from high to low during multiple tests, that is, the quantized conductance of the resistive structural unit is unstable.
实施例1：Example 1:
本实施例中，阻变结构单元的制备工艺如下：In this embodiment, the preparation process of the resistive structural unit is as follows:
(1)底电极采用厚度为50nm的Pt导电基片；使用磁控溅射在底电极上生长厚度为8nm的氧化铪(HfO2)作为阻变层；(1) The bottom electrode adopts a Pt conductive substrate with a thickness of 50 nm; use magnetron sputtering to grow hafnium oxide (HfO 2 ) with a thickness of 8 nm on the bottom electrode as a resistive layer;
(2)利用光刻仪，甩胶并显影，对阻变层表面进行光刻处理，得到直径为50um的圆点图案；采用直径为10nm的导电探针，在该圆点区域进行加电预处理，本是实施例中，利用原子力显微镜中的C-AFM模式进行加电预处理，施加6V的扫描电压，扫描次数10次，阻变层表面形成凹坑。(2) Use a photolithography instrument to remove the glue and develop it, and perform photolithography treatment on the surface of the resistive layer to obtain a dot pattern with a diameter of 50um; use a conductive probe with a diameter of 10nm to pre-energize the dot area. Processing, this is the embodiment, using the C-AFM mode in the atomic force microscope for power-on pretreatment, applying a scanning voltage of 6V, and scanning times 10 times, pits are formed on the surface of the resistive layer.
将上述预处理后的阻变层表面的形貌图如图2所示。从图2中可以看出，预处理后在阻变层表面的圆点区域形成凹坑。图3所示是该凹坑区域的起伏高度图，显示该凹坑呈倒圆锥形，其高度为1.6纳米。The topography of the surface of the resistive layer after the above pretreatment is shown in FIG. 2 . It can be seen from FIG. 2 that pits are formed in the dot area on the surface of the resistive layer after pretreatment. FIG. 3 is a diagram of the undulation height of the pit area, which shows that the pit is in the shape of an inverted cone with a height of 1.6 nanometers.
(3)在经步骤(3)处理后的阻变层表面采用电子束蒸发生长50纳米的Pt作为顶电极。(3) Electron beam evaporation is used to grow 50 nm Pt on the surface of the resistive layer treated in step (3) as the top electrode.
(4)光刻胶胶去除工艺：将制备好的器件放置去胶剂中超声去胶。(4) Photoresist removal process: the prepared device is placed in the adhesive remover for ultrasonic removal.
对上述制得的阻变结构单元的该圆点区域顶电极与底电极之间施加电压，如图4、5所示，得到该阻变结构单元在±1.5V下电阻即发生转变，可发生高低阻态转变。Apply a voltage between the top electrode and the bottom electrode in the dot area of the resistive structural unit prepared above, as shown in Figures 4 and 5, it is obtained that the resistance of the resistive structural unit changes at ±1.5V, and can occur High and low resistance state transitions.
在电压作用下，该阻变结构单元可形成纳米导电丝，呈现量子化电导特性。利用B1500A半导体分析仪测试该阻变结构单元量子化电导的稳定性能，即，在该阻变结构单元的顶电极与底电极之间施加电压多次测试该阻变结构单元的量子化电导值，每次测试时，测试点与施加电压不变。结果如图7所示，显示，多次测试中该阻变结构单元的量子化电导值基本一致，即该阻变结构单元的量子化电导呈现稳定性。Under the action of voltage, the resistive structural unit can form nano-conductive filaments, exhibiting quantized conductance characteristics. Use the B1500A semiconductor analyzer to test the stability of the quantized conductance of the resistive structural unit, that is, apply a voltage between the top electrode and the bottom electrode of the resistive structural unit to test the quantized conductance value of the resistive structural unit multiple times, For each test, the test point and the applied voltage remain unchanged. The results are shown in FIG. 7 , which shows that the quantized conductance values of the resistive structural unit are basically consistent in multiple tests, that is, the quantized conductance of the resistive structural unit exhibits stability.
实施例2：Example 2:
本实施例中，阻变结构单元的制备工艺与实施例1基本相同，所不同的是再步骤(2)中，利用原子力显微镜中的C-AFM模式进行加电预处理，施加6V的扫描电压，扫描次数2次。In this example, the preparation process of the resistive structural unit is basically the same as in Example 1, except that in step (2), the C-AFM mode in the atomic force microscope is used for power-on pretreatment, and a scanning voltage of 6V is applied. , the number of scans is 2 times.
与实施例1类似，在阻变层表面形成凹坑，该凹坑呈倒圆锥形，其高度为0.7纳米。Similar to Example 1, pits were formed on the surface of the resistive layer, and the pits were in the shape of an inverted cone with a height of 0.7 nm.
利用B1500A半导体分析仪测试该阻变结构单元量子化电导的稳定性能，其结果类似实施例1中所示，经多次测试该阻变结构单元的量子化电导值基本一致，即该阻变结构单元的量子化电导呈现稳定性。The B1500A semiconductor analyzer is used to test the stability of the quantized conductance of the resistive structural unit. The results are similar to those shown in Example 1. After repeated tests, the quantized conductance values of the resistive structural unit are basically the same, that is, the resistive structural unit The quantized conductance of the cell exhibits stability.
实施例3：Example 3:
本实施例中，阻变结构单元的制备工艺与实施例1基本相同，所不同的是再步骤(2)中，利用原子力显微镜中的C-AFM模式进行加电预处理，施加6V的扫描电压，扫描次数20次。In this example, the preparation process of the resistive structural unit is basically the same as in Example 1, except that in step (2), the C-AFM mode in the atomic force microscope is used for power-on pretreatment, and a scanning voltage of 6V is applied. , the number of scans is 20 times.
与实施例1类似，在阻变层表面形成凹坑，该凹坑呈倒圆锥形，其高度为1.9纳米。Similar to Example 1, pits were formed on the surface of the resistive layer, and the pits were in the shape of an inverted cone with a height of 1.9 nanometers.
利用B1500A半导体分析仪测试该阻变结构单元量子化电导的稳定性能，其结果类似实施例1中所示，经多次测试该阻变结构单元的量子化电导值基本一致，即该阻变结构单元的量子化电导呈现稳定性。The B1500A semiconductor analyzer is used to test the stability of the quantized conductance of the resistive structural unit. The results are similar to those shown in Example 1. After repeated tests, the quantized conductance values of the resistive structural unit are basically the same, that is, the resistive structural unit The quantized conductance of the cell exhibits stability.
实施例4：Example 4:
本实施例中，阻变结构单元的制备工艺与实施例1基本相同，所不同的是再步骤(2)中，利用原子力显微镜中的C-AFM模式进行加电预处理，施加5V的扫描电压，扫描次数2次。In this example, the preparation process of the resistive structural unit is basically the same as in Example 1, the difference is that in step (2), the C-AFM mode in the atomic force microscope is used for power-on pretreatment, and a scanning voltage of 5V is applied. , the number of scans is 2 times.
与实施例1类似，在阻变层表面形成凹坑，该凹坑呈倒圆锥形，其高度为0.5纳米。Similar to Example 1, pits are formed on the surface of the resistive layer, and the pits are in the shape of an inverted cone with a height of 0.5 nm.
利用B1500A半导体分析仪测试该阻变结构单元量子化电导的稳定性能，其结果类似实施例1中所示，经多次测试该阻变结构单元的量子化电导值基本一致，即该阻变结构单元的量子化电导呈现稳定性。The B1500A semiconductor analyzer is used to test the stability of the quantized conductance of the resistive structural unit. The results are similar to those shown in Example 1. After repeated tests, the quantized conductance values of the resistive structural unit are basically the same, that is, the resistive structural unit The quantized conductance of the cell exhibits stability.
以上所述的实施例对本发明的技术方案进行了详细说明，应理解的是以上所述仅为本发明的具体实施例，并不用于限制本发明，凡在本发明的原则范围内所做的任何修改、补充或类似方式替代等，均应包含在本发明的保护范围之内。The embodiments described above have described the technical solutions of the present invention in detail. It should be understood that the above descriptions are only specific embodiments of the present invention, and are not intended to limit the present invention. All done within the principle scope of the present invention Any modification, supplement or substitution in a similar manner shall be included within the protection scope of the present invention.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102623631A (en) * | 2011-01-27 | 2012-08-01 | 中国科学院微电子研究所 | Resistive random access memory unit, memory and preparation method |
| US8895953B1 (en) * | 2011-07-15 | 2014-11-25 | Adesto Technologies Corporation | Programmable memory elements, devices and methods having physically localized structure |
| WO2015088555A1 (en) * | 2013-12-13 | 2015-06-18 | Hewlett-Packard Development Company, L.P. | V-shape resistive memory element |
| CN106299106A (en) * | 2015-05-25 | 2017-01-04 | 中国科学院苏州纳米技术与纳米仿生研究所 | Promote method and the application thereof of resistance-variable storing device stability |
| US20170155044A1 (en) * | 2015-11-27 | 2017-06-01 | Korea Institute Of Science And Technology | Nonvolatile resistance random access memory device with low and reliable operating voltage and long-term stability and fabrication method thereof |
| CN107895757A (en) * | 2017-11-02 | 2018-04-10 | 中国科学院宁波材料技术与工程研究所 | A kind of nano dot contact of quantum conductance controlled properties |
-
2018
- 2018-05-08 CN CN201810430005.6A patent/CN108539015A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102623631A (en) * | 2011-01-27 | 2012-08-01 | 中国科学院微电子研究所 | Resistive random access memory unit, memory and preparation method |
| US8895953B1 (en) * | 2011-07-15 | 2014-11-25 | Adesto Technologies Corporation | Programmable memory elements, devices and methods having physically localized structure |
| WO2015088555A1 (en) * | 2013-12-13 | 2015-06-18 | Hewlett-Packard Development Company, L.P. | V-shape resistive memory element |
| CN106299106A (en) * | 2015-05-25 | 2017-01-04 | 中国科学院苏州纳米技术与纳米仿生研究所 | Promote method and the application thereof of resistance-variable storing device stability |
| US20170155044A1 (en) * | 2015-11-27 | 2017-06-01 | Korea Institute Of Science And Technology | Nonvolatile resistance random access memory device with low and reliable operating voltage and long-term stability and fabrication method thereof |
| KR20170062197A (en) * | 2015-11-27 | 2017-06-07 | 한국과학기술연구원 | nonvolatile resistance random access memory device with low and reliable operating voltage and long term stability and fabrication method thereof |
| CN107895757A (en) * | 2017-11-02 | 2018-04-10 | 中国科学院宁波材料技术与工程研究所 | A kind of nano dot contact of quantum conductance controlled properties |
Non-Patent Citations (2)
| Title |
|---|
| CELANO U , GOUX L , DE GRAEVE R , ET AL: "Imaging the Three-Dimensional Conductive Channel in Filamentary-Based Oxide Resistive Switching Memory", 《NANO LETTERS》 * |
| SEOL, D., JESSE, S., PARK, S.-J., LEE, W., KALININ, S. V., & KIM: "Nanosculpting of complex oxides by massive ionic transfer", 《NANOTECHNOLOGY》 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109950394A (en) * | 2019-03-29 | 2019-06-28 | 河南大学 | Method for realizing quantum conductance effect of resistive memory in non-electrical formation process |
| CN109950394B (en) * | 2019-03-29 | 2020-05-15 | 河南大学 | Method for realizing quantum conductance effect of resistive memory in non-electrical formation process |
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