CN108445952A - A kind of non-resistance reference voltage generating circuit applied in passive label - Google Patents
A kind of non-resistance reference voltage generating circuit applied in passive label Download PDFInfo
- Publication number
- CN108445952A CN108445952A CN201810463628.3A CN201810463628A CN108445952A CN 108445952 A CN108445952 A CN 108445952A CN 201810463628 A CN201810463628 A CN 201810463628A CN 108445952 A CN108445952 A CN 108445952A
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- China
- Prior art keywords
- drain electrode
- reference voltage
- grid
- passive label
- voltage generating
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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- 239000004065 semiconductor Substances 0.000 claims description 23
- 238000005516 engineering process Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000005611 electricity Effects 0.000 description 2
- 238000010248 power generation Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is DC
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is DC
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/567—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Control Of Electrical Variables (AREA)
Abstract
The present invention relates to passive label technical field more particularly to a kind of non-resistance reference voltage generating circuits applied in passive label.A kind of non-resistance reference voltage generating circuit applied in passive label provided by the invention, including start-up circuit and reference voltage core circuit.Present invention efficiently solves big, of high cost, stability the is poor problems of reference voltage generating circuit chip area in the prior art, are improved on traditional architecture basics, have higher output stability and lower cost.
Description
Technical field
The present invention relates to passive label technical field more particularly to a kind of non-resistance bases applied in passive label
Quasi- voltage generation circuit.
Background technology
Passive label technology is one of important technology of Internet of Things, and ultra-high-frequency passive tag chip passes through the whole of radio-frequency front-end
Stream device converts radio frequency energy to DC power supply power supply, and therefore, the reference voltage source in AFE(analog front end) has to very high
Stability and anti-interference ability.Since resistance increases the chip area of circuit in traditional reference voltage generating circuit, simultaneously
Manufacturing cost is increased, and stability is poor.Based on this, the present invention provides a kind of non-resistance bases applied in passive label
Quasi- voltage generation circuit.
Invention content
The purpose of the present invention is to solve reference voltage generating circuit chip areas in passive label in the prior art greatly,
Problem of high cost, stability is poor provides a kind of non-resistance reference voltage generating circuit applied in passive label.
The present invention provides a kind of non-resistance reference voltage generating circuits applied in passive label, including start-up circuit
With reference voltage core circuit；The start-up circuit includes metal-oxide-semiconductor M10, M11, M12, and the reference voltage core circuit includes
The source electrode of metal-oxide-semiconductor M1, M2, M3, M4, M5, M6, M7, M8, M9, metal-oxide-semiconductor M10 connect supply voltage VDD, the grid of drain electrode connection M12
The grid of pole and M11, the drain electrode of M11, source electrode are connected and are grounded, the grounded drain of M12；The source electrode of M1, M2 are all connected with power supply electricity
VDD, grid is pressed to be connected and connect the drain electrode of the grid of M10, the source electrode of M12, the grid of M8 and M2；The source electrode of M3, M4 connect respectively
The drain electrode of M1, M2 are connect, the grid of M3, M4 are connected and connect the drain electrode of M4 and the drain electrode of M6；The drain electrode of the drain electrode connection M3 of M5 is simultaneously
Connect the grid of M5, M6, the source electrode ground connection of M5；The drain electrode of the drain electrode connection M6 of M7, the grid of M7, M9 are connected and connect the leakage of M9
The drain electrode of pole and M8, the source grounding of M7, M9；The drain electrode of source electrode connection the supply voltage VDD, M8 of M8 are reference voltage
The output end of VREF.Described metal-oxide-semiconductor M1, M2, M3, M4, M8, M10, M12 are PMOS tube, described metal-oxide-semiconductor M5, M6, M7, M9, M11
For NMOS tube.
The present invention also provides a kind of passive label devices including said reference power generation circuit.
A kind of non-resistance reference voltage generating circuit applied in passive label provided by the present invention, efficiently solves
Big, of high cost, stability the is poor problem of reference voltage generating circuit chip area in the prior art, in traditional reference voltage
It is improved on generation circuit architecture basics, there is higher output stability and lower production cost.
Description of the drawings
Fig. 1 is a kind of non-resistance reference voltage generating circuit structural representation applied in passive label provided by the invention
Figure.
Fig. 2 be the output voltage provided by the invention applied to the non-resistance reference voltage generating circuit in passive label with
Temperature variation curve.
Specific implementation mode
The present invention provides a kind of non-resistance reference voltage generating circuits applied in passive label, to make the present invention's
Object, technical solution and advantage are clearer, clear, the embodiment that develops simultaneously referring to the drawings to the present invention further specifically
It is bright.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, it is not intended to limit the present invention.
As shown in fig. 1, a kind of non-resistance reference voltage generating circuit applied in passive label, including start-up circuit and
Reference voltage core circuit；The start-up circuit includes metal-oxide-semiconductor M10, M11, M12, and the reference voltage core circuit includes MOS
The source electrode of pipe M1, M2, M3, M4, M5, M6, M7, M8, M9, metal-oxide-semiconductor M10 connect supply voltage VDD, the grid of drain electrode connection M12
With the grid of M11, the drain electrode of M11, source electrode are connected and are grounded, the grounded drain of M12；The source electrode of M1, M2 are all connected with supply voltage
VDD, grid are connected and connect the drain electrode of the grid of M10, the source electrode of M12, the grid of M8 and M2；The source electrode of M3, M4 are separately connected
The grid of the drain electrode of M1, M2, M3, M4 is connected and connects the drain electrode of M4 and the drain electrode of M6；The drain electrode of M5 connects drain electrode and the company of M3
Connect the grid of M5, M6, the source electrode ground connection of M5；The drain electrode of the drain electrode connection M6 of M7, the grid of M7, M9 are connected and connect the drain electrode of M9
With the drain electrode of M8, the source grounding of M7, M9；The drain electrode of source electrode connection the supply voltage VDD, M8 of M8 are reference voltage V REF
Output end.Described metal-oxide-semiconductor M1, M2, M3, M4, M8, M10, M12 are PMOS tube, and described metal-oxide-semiconductor M5, M6, M7, M9, M11 are
NMOS tube.
In foregoing circuit, metal-oxide-semiconductor M1, M2 and M3, M4 constitute current mirror structure each other respectively, metal-oxide-semiconductor M1's and M2
Breadth length ratio is identical, and metal-oxide-semiconductor M8 is used for the electric current of mirror image M1, and metal-oxide-semiconductor M5, M6, M7 are used to generate the electricity being inversely proportional with absolute temperature
Stream, metal-oxide-semiconductor M10, M11, M12 constitute start-up circuit, and when circuit start, supply voltage VDD is gradually increasing by 0, start
When metal-oxide-semiconductor M11 grid voltages be zero, the grid voltage of metal-oxide-semiconductor M12 is equal to supply voltage VDD, and M12 is in the conduction state, and draws
The grid voltage of low metal-oxide-semiconductor M1, M2, promote metal-oxide-semiconductor M1, M2 to be connected, and reference voltage core circuit progresses into normal work
State, meanwhile, the drain current of M10 gradually increases and the grid voltage of M11 is made to gradually rise, to make metal-oxide-semiconductor M12 into entering the GATT
Closed state, entire circuit complete start-up course.Breadth length ratio by the way that M2, M5, M6 and M8 is rationally arranged can be obtained close to zero temperature
Spend the electric current of coefficient.
The present invention also provides a kind of passive label devices including said reference power generation circuit.
Reference power supply generation circuit provided by the invention is non-resistance structure, reduces the chip area of circuit, and reduce
Production cost, while the stability of output voltage is preferable.Fig. 2 is the non-resistance provided by the invention applied in passive label
The output voltage of reference voltage generating circuit varies with temperature curve, the results show that when supply voltage VDD is equal to 1.8V, temperature
Variation range is spent from minus 50 degree to 150 degree, and the variation of output voltage is only 4.48mV, compares existing reference voltage generating circuit
With more apparent advantage.
It should be understood that the application of the present invention is not limited to the above for those of ordinary skills can
With improvement or transformation based on the above description, all these modifications and variations should all belong to the guarantor of appended claims of the present invention
Protect range.
Claims (2)
1. a kind of non-resistance reference voltage generating circuit applied in passive label, which is characterized in that including start-up circuit and
Reference voltage core circuit；The start-up circuit includes metal-oxide-semiconductor M10, M11, M12, and the reference voltage core circuit includes MOS
The source electrode of pipe M1, M2, M3, M4, M5, M6, M7, M8, M9, metal-oxide-semiconductor M10 connect supply voltage VDD, the grid of drain electrode connection M12
With the grid of M11, the drain electrode of M11, source electrode are connected and are grounded, the grounded drain of M12；The source electrode of M1, M2 are all connected with supply voltage
VDD, grid are connected and connect the drain electrode of the grid of M10, the source electrode of M12, the grid of M8 and M2；The source electrode of M3, M4 are separately connected
The grid of the drain electrode of M1, M2, M3, M4 is connected and connects the drain electrode of M4 and the drain electrode of M6；The drain electrode of M5 connects drain electrode and the company of M3
Connect the grid of M5, M6, the source electrode ground connection of M5；The drain electrode of the drain electrode connection M6 of M7, the grid of M7, M9 are connected and connect the drain electrode of M9
With the drain electrode of M8, the source grounding of M7, M9；The drain electrode of source electrode connection the supply voltage VDD, M8 of M8 are reference voltage V REF
Output end；Described metal-oxide-semiconductor M1, M2, M3, M4, M8, M10, M12 are PMOS tube, and described metal-oxide-semiconductor M5, M6, M7, M9, M11 are
NMOS tube.
2. a kind of passive label device, which is characterized in that include above-mentioned non-resistance reference voltage generating circuit in described device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810463628.3A CN108445952A (en) | 2018-05-15 | 2018-05-15 | A kind of non-resistance reference voltage generating circuit applied in passive label |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810463628.3A CN108445952A (en) | 2018-05-15 | 2018-05-15 | A kind of non-resistance reference voltage generating circuit applied in passive label |
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| CN108445952A true CN108445952A (en) | 2018-08-24 |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102651082A (en) * | 2012-04-09 | 2012-08-29 | 卓捷创芯科技（深圳）有限公司 | Bandgap reference self-starting circuit and passive radio frequency identification label |
| CN107390767A (en) * | 2017-08-02 | 2017-11-24 | 东南大学 | A kind of full MOS voltage-references of wide temperature with temperature-compensating |
| CN107526386A (en) * | 2017-08-28 | 2017-12-29 | 天津大学 | Reference voltage source with high PSRR |
| CN106843358B (en) * | 2017-03-21 | 2018-02-16 | 桂林电子科技大学 | A kind of high PSRR whole CMOS reference voltage source |
| CN107797601A (en) * | 2016-09-06 | 2018-03-13 | 电子科技大学 | A kind of design of the reference voltage source of the full metal-oxide-semiconductor of low-power consumption subthreshold value |
-
2018
- 2018-05-15 CN CN201810463628.3A patent/CN108445952A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102651082A (en) * | 2012-04-09 | 2012-08-29 | 卓捷创芯科技（深圳）有限公司 | Bandgap reference self-starting circuit and passive radio frequency identification label |
| CN107797601A (en) * | 2016-09-06 | 2018-03-13 | 电子科技大学 | A kind of design of the reference voltage source of the full metal-oxide-semiconductor of low-power consumption subthreshold value |
| CN106843358B (en) * | 2017-03-21 | 2018-02-16 | 桂林电子科技大学 | A kind of high PSRR whole CMOS reference voltage source |
| CN107390767A (en) * | 2017-08-02 | 2017-11-24 | 东南大学 | A kind of full MOS voltage-references of wide temperature with temperature-compensating |
| CN107526386A (en) * | 2017-08-28 | 2017-12-29 | 天津大学 | Reference voltage source with high PSRR |
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Application publication date: 20180824 |
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