CN108281369A - A kind of processing system of semiconductor substrate - Google Patents
A kind of processing system of semiconductor substrate Download PDFInfo
- Publication number
- CN108281369A CN108281369A CN201810099849.7A CN201810099849A CN108281369A CN 108281369 A CN108281369 A CN 108281369A CN 201810099849 A CN201810099849 A CN 201810099849A CN 108281369 A CN108281369 A CN 108281369A
- Authority
- CN
- China
- Prior art keywords
- stress
- region
- gaas
- accurate
- larger
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000012545 processing Methods 0.000 title claims abstract description 21
- 239000004065 semiconductor Substances 0.000 title abstract description 14
- 239000000758 substrate Substances 0.000 title abstract description 12
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims abstract description 41
- 238000000137 annealing Methods 0.000 claims abstract description 28
- 238000012806 monitoring device Methods 0.000 claims abstract description 18
- 238000009826 distribution Methods 0.000 claims abstract description 16
- 238000000034 method Methods 0.000 claims description 32
- 238000012360 testing method Methods 0.000 claims description 15
- 238000005224 laser annealing Methods 0.000 claims description 7
- 238000002017 high-resolution X-ray diffraction Methods 0.000 claims description 5
- 238000012544 monitoring process Methods 0.000 claims description 5
- 238000001514 detection method Methods 0.000 claims 2
- 238000005067 remediation Methods 0.000 abstract description 2
- 235000012431 wafers Nutrition 0.000 description 12
- 238000010586 diagram Methods 0.000 description 3
- 150000001875 compounds Chemical class 0.000 description 2
- 238000003672 processing method Methods 0.000 description 2
- 238000013461 design Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000009418 renovation Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67098—Apparatus for thermal treatment
- H01L21/67115—Apparatus for thermal treatment mainly by radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67253—Process monitoring, e.g. flow or thickness monitoring
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Analysing Materials By The Use Of Radiation (AREA)
Abstract
The present invention provides a kind of processing system of semiconductor substrate, the stress of GaAs chips can quick and precisely be measured and precisely made annealing treatment, the integrated stress that handled GaAs chips can be quickly obtained by the first quick monitor for stress is distributed and is marked, pass through the accurate monitoring device of the second stress, obtain the larger accurate stress value in region of stress, according to measured stress value, is annealed using laser anneal device for stress large area, improve the stress distribution of chip；The present invention has the characteristics that easy to operate, dependable performance, remediation efficiency are high.
Description
Technical field
The present invention relates to a kind of processing systems of semiconductor substrate, the particularly processing system the present invention relates to GaAs substrates
System.
Background technology
GaAs (GaAs) is one of most important, widest semi-conducting material of purposes and mesh in compound semiconductor
Before study most ripe, the maximum compound semiconductor materials of output.It is non-uniform such as to there is stress distribution in GaAs chips
Phenomenon can generate significant impact to the quality of the component prepared by the chip.And in existing GaAs wafer manufactures link
Stress monitoring technique there is a problem of it is inefficient, especially for more accurately assessing wafer stress value and targetedly
The operating efficiency for formulating corresponding annealing renovation technique is not high, can not adapt to the control of product quality of extensive wafer fabrication processes
It is required that.
Invention content
The technical problem to be solved by the present invention is to design and provide a kind of can quick and precisely measure answering for GaAs chips
Power and the processing system precisely made annealing treatment.The present invention has the characteristics that easy to operate, dependable performance, remediation efficiency are high.
The technical solution of the processing system of semiconductor substrate of the present invention is：A kind of GaAs wafer processing process is provided,
Including object handling workbench, for putting processed GaAs chips；It is tested using the first quick monitor for stress test
One or more GaAs chips distribution situations of chip are tried, and picture record is carried out to test structure, first are quickly answered by this
Power monitoring device can quickly obtain the integrated stress distribution of handled GaAs chips.If tested GaAs wafer stress distribution
Uniformly, then next group sample is tested；Such as tested GaAs wafer stress is unevenly distributed, then marks the non-uniform region of stress distribution
101, i.e., the larger region 101 of stress is obtained by the first quick monitor for stress, it is described to be labeled to obtain 101 area pair of region
It should only one of those or several regions, area distributions be smaller for entire chip area.
The accurate monitoring device of second stress, which only needs the region 101 larger to stress to be monitored, and enough obtains
Obtain the accurate stress value of institute's search coverage；
Exact annealing process device, the exact annealing process device are laser anneal device, which can be to specific
The larger region 101 of stress carry out position accurately annealing process handled, and according to the accurate stress of pending area
It is worth situation, accurately controls laser annealing technique energy density and annealing time, to reduce the stress value of corresponding region, improves brilliant
The quality of piece.
A kind of GaAs wafer processings are provided, including, will disposition work be placed on by processing one or more GaAs chips
Make on platform；It is characterized in that, being distributed using the tested one or more GaAs chips of the first quick monitor for stress test
Situation, and test result is recorded, handled GaAs can quickly be obtained by the first quick monitor for stress
The integrated stress of chip is distributed；
If tested GaAs wafer stress is evenly distributed, next group sample is tested；Such as tested GaAs wafer stress distribution
It is uneven, then mark in the chip the non-uniform region of stress distribution 101；
Using the accurate monitoring device of the second stress to chip carry out stress test, the accurate monitoring device only need to stress compared with
Big region 101 is monitored, and is reached and obtained the accurate stress value of institute's search coverage；
Chip is made annealing treatment using exact annealing process device, the exact annealing process device is laser anneal device, should
Laser anneal device can be larger to specific stress region 101 carry out position accurately annealing process handle, and according to
The accurate stress value situation of pending area, accurately controls laser annealing technique energy density and annealing time, to reduce
The stress value of corresponding region improves the quality of chip.
First quick monitor for stress described in the technical solution of the processing system of semiconductor substrate of the present invention is
Scanned infrared polarizes stress monitoring instrument, and the accurate monitoring device of the second stress is high-resolution x-ray diffraction tester.
Description of the drawings
Fig. 1 is a kind of structural schematic diagram of the processing system of semiconductor substrate provided by the invention；
Fig. 2 is a kind of flow diagram of the processing method of semiconductor substrate provided by the invention；
Fig. 3 be in a kind of processing method of semiconductor substrate provided by the invention quickly monitor for stress to GaAs wafers
Stress test schematic diagram；
Specific implementation mode
Schematic show that the structure of processing system of the semiconductor substrate of one embodiment of the present of invention is shown in Fig. 1
It is intended to, which there is chip to house platform 11, for putting processed GaAs chips；
First quick monitor for stress (12), the first quick monitor for stress are scanned infrared polariscope stress
Monitor；
The accurate monitoring device of second stress (13), the accurate monitoring device of the second stress is high-resolution x-ray diffraction
Tester enough obtains the accurate stress value of institute's search coverage；
Exact annealing process device (14), the exact annealing process device are laser anneal device, can be larger to specific stress
Region carry out position accurately annealing process handle, to reduce the stress value of corresponding region, improve the quality of chip.
In fig. 2 schematic the show one embodiment of the present of invention semiconductor substrate process flow signal
Figure, specifically includes：
Step 1 will be placed on chip by processing one or more GaAs chips and house on platform 11；It is quickly answered using first
The tested one or more GaAs chips distribution situations of power monitoring device test, and test result is recorded, by this
First quick monitor for stress can quickly obtain the integrated stress distribution of handled GaAs chips；
Step 2 judges the test result of step 1, if tested GaAs wafer stress is evenly distributed, tests
Next group sample；
Step 3, such as tested GaAs wafer stress is unevenly distributed, such as attached non-uniform stress shown in Fig. 3 point is presented
Cloth state then marks the non-uniform region 101 of stress distribution, and the accurate monitoring device of the second stress is sent to be monitored；
Step 4, using the accurate monitoring device of the second stress, which only needs the region 101 larger to stress to carry out
Monitoring, the accurate monitoring device of the second stress is high-resolution x-ray diffraction measuring stress instrument, and can obtain institute's detecting area
The stress test result of the accurate stress value in domain, 101 center of region being marked is:εxx=+181 × 10-5,εyy=-
130.7×10-5,εzz=+36.0 × 10-5,εxy=+68.6 × 10-5,εxz=+32 × 10-5,εyz=+48 × 10-5,|εr-εt|
=360.2 × 10-5；
Step 5, exact annealing process device, the exact annealing process device are laser anneal device, which can
The region 101 larger to specific stress carries out position, and accurately annealing process is handled, and according to the accurate of pending area
Stress value situation, accurately control laser annealing technique energy density and annealing time, the quilt after laser annealing technique
The stress test result at 101 center of region of mark is:εxx=-24.8 × 10-5,εyy=-20.4 × 10-5,εzz=+24.6 ×
10-5,εxy=-26.4 × 10-5,εxz=-1.3 × 10-5,εyz=-2.3-5,|εr-εt|=53.3 × 10-5；It can be seen that chip
Quality be significantly improved.
Show and looked familiar above the basic principles, main features and the advantages of the invention, for this field skill
For art personnel, it is clear that invention is not limited to the details of the above exemplary embodiments, and without departing substantially from the present invention spirit or
In the case of essential characteristic, the present invention can be realized in other specific forms.Therefore in all respects, military camp will be real
Apply example and regard exemplary as, and be non-limiting, the scope of the present invention by appended claims rather than above description
Book limits, it is intended that including all changes that come within the meaning and range of equivalency of the claims in the present invention
It is interior.Any reference numeral in claim should not be considered as and be limited the claims involved.
In addition, it should be understood that although this specification is described in terms of embodiments, but not each way of example is modern
It contains an independent technical solution, this description of the specification is merely for the sake of clarity, and those skilled in the art answer
When considering the specification as a whole, the technical solutions in the various embodiments may also be suitably combined, forms people in the art
The other embodiment that member is appreciated that.
Claims (6)
1. a kind of GaAs wafer processing process, including,
Object handling workbench, for putting processed GaAs chips；
It is brilliant can quickly to obtain handled GaAs by the first quick monitor for stress for first quick monitor for stress
The integrated stress of piece is distributed；The larger region of middle stress to GaAs chips is demarcated, that is, passes through the first quick stress monitoring
Device obtains the larger region 101 of stress；
The accurate monitoring device of second stress, the monitoring device region 101 larger to stress are monitored, and are reached acquisition and detected
The accurate stress value in region；
Exact annealing process device, the exact annealing process device are laser anneal device, which can be to specifically answering
The larger region of power carries out position, and accurately annealing process is handled, and according to the accurate stress value situation of pending area,
Laser annealing technique energy density and annealing time are accurately controlled, to reduce the stress value of corresponding region, improves the matter of chip
Amount.
2. GaAs wafer processing process according to claim 1, the first quick monitor for stress is scanned infrared
Polarised light stress monitoring instrument, the accurate monitoring device of the second stress are high-resolution x-ray diffraction measuring stress instruments.
3. GaAs wafer processing process according to claim 1, the larger region 101 of the stress value is according to actual detection
As a result it obtains, there are one or more area distributions.
4. a kind of GaAs wafer processings, including, it will be placed on disposing task platform by processing one or more GaAs chips；
It is characterized in that, using the tested one or more GaAs chips distribution situations of the first quick monitor for stress test, and
Test result is recorded, the whole of handled GaAs chips can quickly be obtained by the first quick monitor for stress
Body stress is distributed；
If tested GaAs wafer stress is evenly distributed, next group sample is tested；Such as tested GaAs wafer stress is unevenly distributed
It is even, then mark in the chip the non-uniform region of stress distribution 101；
Stress test is carried out to chip using the accurate monitoring device of the second stress, which only needs larger to stress
Region 101 is monitored, and is reached and obtained the accurate stress value of institute's search coverage；
Chip is made annealing treatment using exact annealing process device, the exact annealing process device is laser anneal device, the laser
Annealing device can be larger to specific stress region 101 carry out position accurately annealing process handled, and according to waiting locating
The accurate stress value situation for managing region, accurately controls laser annealing technique energy density and annealing time, corresponding to reduce
The stress value in region improves the quality of chip.
5. GaAs wafer processings according to claim 4, the first quick monitor for stress is scanned infrared
Polarised light stress monitoring instrument, the accurate monitoring device of the second stress are high-resolution x-ray diffraction measuring stress instruments.
6. GaAs wafer processings according to claim 4, the larger region 101 of the stress value is according to actual detection
As a result it obtains, there are one or more area distributions.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810099849.7A CN108281369B (en) | 2018-02-01 | 2018-02-01 | Semiconductor substrate processing system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810099849.7A CN108281369B (en) | 2018-02-01 | 2018-02-01 | Semiconductor substrate processing system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108281369A true CN108281369A (en) | 2018-07-13 |
| CN108281369B CN108281369B (en) | 2024-04-09 |
Family
ID=62807317
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810099849.7A Active CN108281369B (en) | 2018-02-01 | 2018-02-01 | Semiconductor substrate processing system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108281369B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111281391A (en) * | 2020-03-02 | 2020-06-16 | 重庆嵘安医疗器材有限公司 | Static and dynamic balance measuring method and system |
| CN113906542A (en) * | 2021-08-30 | 2022-01-07 | 长江存储科技有限责任公司 | Wafer stress control using backside film deposition and laser annealing |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10270315A (en) * | 1997-03-24 | 1998-10-09 | Mitsubishi Electric Corp | Manufacture of x-ray mask and x-mask |
| US20050066739A1 (en) * | 2003-09-26 | 2005-03-31 | Lam Research Corporation | Method and apparatus for wafer mechanical stress monitoring and wafer thermal stress monitoring |
| JP2007033223A (en) * | 2005-07-27 | 2007-02-08 | Nippon Electric Glass Co Ltd | Measuring method of stress and stress measuring system |
| JP2009168562A (en) * | 2008-01-15 | 2009-07-30 | Fujitsu Ltd | Stress evaluation method using Raman spectroscopy and semiconductor device manufacturing method |
| CN207852625U (en) * | 2018-02-01 | 2018-09-11 | 北京派克贸易有限责任公司 | A kind of processing system of semiconductor substrate |
-
2018
- 2018-02-01 CN CN201810099849.7A patent/CN108281369B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10270315A (en) * | 1997-03-24 | 1998-10-09 | Mitsubishi Electric Corp | Manufacture of x-ray mask and x-mask |
| US20050066739A1 (en) * | 2003-09-26 | 2005-03-31 | Lam Research Corporation | Method and apparatus for wafer mechanical stress monitoring and wafer thermal stress monitoring |
| JP2007033223A (en) * | 2005-07-27 | 2007-02-08 | Nippon Electric Glass Co Ltd | Measuring method of stress and stress measuring system |
| JP2009168562A (en) * | 2008-01-15 | 2009-07-30 | Fujitsu Ltd | Stress evaluation method using Raman spectroscopy and semiconductor device manufacturing method |
| CN207852625U (en) * | 2018-02-01 | 2018-09-11 | 北京派克贸易有限责任公司 | A kind of processing system of semiconductor substrate |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111281391A (en) * | 2020-03-02 | 2020-06-16 | 重庆嵘安医疗器材有限公司 | Static and dynamic balance measuring method and system |
| CN113906542A (en) * | 2021-08-30 | 2022-01-07 | 长江存储科技有限责任公司 | Wafer stress control using backside film deposition and laser annealing |
| US11842911B2 (en) | 2021-08-30 | 2023-12-12 | Yangtze Memory Technologies Co., Ltd. | Wafer stress control using backside film deposition and laser anneal |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108281369B (en) | 2024-04-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Wagner | Failure analysis of integrated circuits: tools and techniques | |
| CN207852625U (en) | A kind of processing system of semiconductor substrate | |
| CN108281369A (en) | A kind of processing system of semiconductor substrate | |
| US11402426B2 (en) | Inductive testing probe apparatus for testing semiconductor die and related systems and methods | |
| DE19827202A1 (en) | Rapid and reliable nondestructive detection and characterization of crystal defects in single crystal semiconductor material, e.g. silicon rods or wafers | |
| US11551980B2 (en) | Dynamic amelioration of misregistration measurement | |
| US7623982B2 (en) | Method of testing an electronic circuit and apparatus thereof | |
| JPS6111465B2 (en) | ||
| US6734697B1 (en) | Die location on ungrounded wafer for back-side emission microscopy | |
| US6842021B1 (en) | System and method for detecting location of a defective electrical connection within an integrated circuit | |
| JPH03136261A (en) | Measurement of direct current-voltage characteristic of semiconductor device | |
| US7126145B2 (en) | Frame transfer prober | |
| TW201029100A (en) | Chip sorter with prompt chip pre-position and optical examining process thereof | |
| US20230305057A1 (en) | Wafer level electron beam prober | |
| CN112683859B (en) | A composition quantitative analysis method, test system and storage medium | |
| Bullis | Methods of Measurement for Semiconductor Materials, Process Control, and Devices. Quarterly Report, October 1 to December 31, 1970 | |
| JP2519064B2 (en) | Parametric inspection method for semiconductor devices | |
| Lai et al. | Location techniques of failure analysis ESD damage in electronic component | |
| Allen et al. | Use and function of TXRF (total reflection x-ray fluorescence) for routine in fab metallic monitoring | |
| Bullis | Methods of Measurement for Semiconductor Materials, Process Control, and Devices: Quarterly Report. January 1-March 31, 1973 | |
| JP6232129B2 (en) | Wafer prober system capable of wafer surface inspection | |
| Masteika et al. | Automatic Maszara testing jig | |
| JP2001077164A (en) | Defect tester of wafer | |
| Pau et al. | Inspection of Integrated Circuits and Gate Arrays | |
| Cwirko et al. | Technique of low-frequency noise versus temperature for identification of deep-level defects in semiconductor materials |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| TA01 | Transfer of patent application right | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20211021 Address after: Room 602, unit 5, building 6, zone 2, Ruihai Jiayuan community, Xihongmen Town, Daxing District, Beijing 100162 Applicant after: Zhao Zhongyang Address before: 100000 No. 9, Dongzhimen South Street, Dongcheng District, Beijing Applicant before: BEIJING PAIKE TRADING Co.,Ltd. |
|
| GR01 | Patent grant | ||
| GR01 | Patent grant |