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CN108172179B - Power management circuit - Google Patents

Power management circuit Download PDF

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Publication number
CN108172179B
CN108172179B CN201711341434.8A CN201711341434A CN108172179B CN 108172179 B CN108172179 B CN 108172179B CN 201711341434 A CN201711341434 A CN 201711341434A CN 108172179 B CN108172179 B CN 108172179B
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voltage
circuit
resistor
power management
module
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CN108172179A (en
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田申
卢佳惠
吕青柏
魏玉娜
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InfoVision Optoelectronics Kunshan Co Ltd
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InfoVision Optoelectronics Kunshan Co Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0257Reduction of after-image effects
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02Details of power systems and of start or stop of display operation
    • G09G2330/021Power management, e.g. power saving

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The utility model discloses a power management circuit sets up in the display, and the display still includes grid drive circuit, source drive circuit and pixel array, and power management circuit includes: the display device comprises a judging module, an output module and a control module, wherein the judging module receives power supply voltage and backlight voltage and judges whether the display is in normal open/close or in a voltage drop test according to the power supply voltage and the backlight voltage, the output module is used for outputting an enabling signal under the control of the judging module, the input end of the control module is connected with the judging module, the output end of the control module is connected with a grid driving circuit to provide a trigger signal, when the trigger signal is effective, the grid driving circuit resets a pixel array, and when the trigger signal is invalid, the control module aims at the power supply voltage and the display is subjected to the voltage drop test. The efficiency of the voltage drop test can be improved, and the elimination of shutdown ghost shadow of the display cannot be influenced.

Description

Power management circuit
Technical Field
The invention relates to the field of power management circuits, in particular to a power management circuit of a display.
Background
A Liquid Crystal Display (LCD) is a Display device that changes the light transmittance of a light source by utilizing the phenomenon that the alignment direction of Liquid Crystal molecules changes under the action of an electric field. Liquid crystal displays have been widely used in display terminals such as mobile phones and large-sized display panels such as flat panel televisions due to their advantages of good display quality, small size, and low power consumption.
The conventional liquid crystal display mainly includes a display panel and a printed circuit board for providing various operation signals to the display panel. The display panel comprises a plurality of pixel units arranged in an array, each pixel unit comprises a first thin film transistor and a pixel electrode, the grid electrode of the first thin film transistor is connected with a grid electrode driving circuit through a grid line, the source electrode of the first thin film transistor is connected with a source electrode driving circuit through a source line, and the drain electrode of the first thin film transistor is connected with the pixel electrode. The grid driving circuit is used for scanning a plurality of grid lines in sequence to enable the first thin film transistors in corresponding rows to be conducted; the source driving circuit is used for applying gray scale voltage corresponding to display data on the pixel electrode when the first thin film transistor is conducted.
The printed circuit board is integrated with a power management circuit which is used for providing working voltage for the grid driving circuit and the source driving circuit.
The existing liquid crystal display can be subjected to a voltage drop test before leaving a factory, namely, the power supply voltage of the liquid crystal display is reduced and then increased, and the working state of the liquid crystal display at this stage is observed. Fig. 1 shows a schematic diagram of the voltage sag test principle. As shown in FIG. 1, the voltage drop test requires that the display displays normally during the time period t1, the display displays abnormally during the time period t2, and the display displays normally during the time period t 3.
Fig. 2 shows a schematic diagram of a prior art power management circuit.
As shown in fig. 2, the prior art power management circuit 100 includes a voltage acquisition module 110, a determination module 120, and an output module 130. The voltage collecting module 110 is configured to transmit the power voltage VDD to the determining module 120, and the determining module 120 compares the power voltage VDD with a threshold voltage and outputs a comparison result through the output module 130. When the power voltage VDD is reduced to be lower than the threshold voltage of the determination module, preferably, the threshold voltage of the determination module 120 is 2.4V, and the determination module 120 outputs a low level signal to the XON pin of the gate driving circuit on the display panel through the output module 130, triggering the XON function of the gate driving circuit, and the charges in the display panel are neutralized.
The XON function means that after the XON pin of the gate driving circuit receives a start signal, the gate driving circuit outputs a high level signal to all the scanning lines on the display panel, turns on all the thin film transistors on the display panel, and neutralizes positive and negative charges in the display panel.
Preferably, the output module 130 includes a turn-on module 131 and a first switch T1, the turn-on module 131 is connected to a control terminal of the first switch T1, a first path terminal of the first switch T1 is grounded, and a second path terminal is connected to an XON pin of the gate driving circuit. When the power voltage VDD is smaller than the threshold voltage of the determining module 120, the determining module 120 outputs a turn-on signal to the turn-on module 131, turns on the first switch transistor T1, and pulls down the potential of the XON pin of the gate driving circuit to trigger the XON function of the gate driving circuit. Preferably, the first switch transistor T1 is an NMOS transistor or a PMOS transistor.
When the power management circuit 100 in the prior art performs a voltage drop test, the determining module 120 triggers the XON function of the gate driving circuit when detecting that the power voltage VDD drops, and when the power voltage VDD is increased again, the display screen is abnormal. The threshold voltage of a judgment module of the power management circuit is reduced by replacing the power management chip, or after the power supply voltage reduction test is completed each time, the display is restarted and then the power supply voltage increase test is carried out. The power management chip is replaced, and the threshold voltage of the power management circuit judgment module is reduced to influence the elimination of shutdown ghost shadow of the display during normal use. And after the test for reducing the power supply voltage is carried out each time, the display is restarted and then the test for increasing the power supply voltage is carried out, so that a lot of human resources can be wasted, the test cost is improved, and the test efficiency is reduced.
Disclosure of Invention
In view of the above, an object of the present invention is to provide a power management circuit, which can improve the efficiency of a power supply drop test and eliminate the shutdown ghost when the display is normally shut down.
The invention provides a power management circuit, which is arranged in a display, and the display also comprises a grid driving circuit, a source driving circuit and a pixel array; the power management circuit includes: the judging module receives power supply voltage and backlight voltage, the backlight voltage and the power supply voltage are mutually independent, and the judging module judges whether the display is in a normal open/shutdown mode or a voltage drop test mode according to the received power supply voltage and the received backlight voltage; the input end of the control module is connected with the judging module, the output end of the control module is connected with the grid driving circuit to provide a trigger signal, and the grid driving circuit conducts all the thin film transistors of the pixel array according to the level state of the trigger signal; and the control end of the output module is connected with the judging module, and the output end of the output module is connected with the grid driving circuit and the source driving circuit and is used for outputting an enabling signal under the control of the judging module, wherein the enabling signal is used as the working voltage of the grid driving circuit and the source driving circuit.
Preferably, the judging module includes: the output end of the comparator is connected with the control end of the output module to provide a first switching signal, and the output module generates an enabling signal according to the first switching signal and the power supply voltage; a first voltage division circuit for dividing the backlight voltage to obtain a reference voltage; and a second voltage division circuit for dividing the backlight voltage to obtain a supply voltage.
Preferably, the first voltage division circuit includes a first resistor and a second resistor connected between the backlight voltage input terminal and ground, and a common node of the first resistor and the second resistor provides the reference voltage.
Preferably, the second voltage division circuit includes a third resistor and a fourth resistor connected between the backlight voltage input terminal and ground, and a common node of the third resistor and the fourth resistor provides the supply voltage.
Preferably, the first voltage dividing circuit and the second voltage dividing circuit are composed of a first voltage stabilizer and a second voltage stabilizer respectively connected between the backlight voltage and the comparator, and both the first voltage stabilizer and the second voltage stabilizer are low dropout linear voltage regulators.
Preferably, the judging module further comprises a ground resistor connected between the output end of the comparator and the ground.
Preferably, the output module includes: a control end of the first switch tube is connected with an output end of the comparator, a first path end receives power voltage, and a second path end outputs an enable signal; and the pull-down resistor is connected between the second path end of the first switching tube and the ground.
Preferably, in the output module, the first switch tube is a P-channel transistor.
Preferably, the control module comprises: a first path end of the second switch tube receives the reference voltage, and a second path end of the second switch tube provides a trigger signal; the third voltage division circuit is used for dividing the reference voltage to obtain a second switching signal, and the control end of the second switching tube receives the second switching signal; and a ninth resistor and a tenth resistor connected between the power supply voltage and the ground, wherein a common node of the ninth resistor and the tenth resistor is connected with the second path end of the second switch tube.
Preferably, the third voltage dividing circuit includes seventh and eighth resistors connected between the reference voltage and ground, and a common node of the seventh and eighth resistors provides the second switching signal.
The power management circuit provided by the invention judges whether the display is in a normal open/close mode or a voltage drop test mode through the judging module, and then controls the opening and closing of the XON function of the grid driving circuit on the display panel through the control module. And when the voltage drop test is carried out, the XON function of the grid driving circuit is closed, and when the voltage drop test is normally shut down, the XON function of the grid driving circuit is opened. The efficiency of the voltage drop test can be improved, and the elimination of shutdown ghost shadow of the display cannot be influenced.
Drawings
The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings.
Fig. 1 shows a schematic diagram of a voltage sag test.
Fig. 2 shows a schematic diagram of a prior art power management circuit.
Fig. 3 shows a schematic diagram of a power management circuit according to an embodiment of the invention.
Fig. 4 shows a circuit schematic of a power management circuit according to a first embodiment of the invention.
Fig. 5 shows a circuit schematic of a power management circuit according to a second embodiment of the invention.
Fig. 6 is a timing diagram illustrating the power management circuit according to an embodiment of the present invention.
Fig. 7 is a timing diagram illustrating a voltage sag test performed by the power management circuit according to the embodiment of the invention.
Detailed Description
The invention will be described in more detail below with reference to the accompanying drawings. Like elements in the various figures are denoted by like reference numerals. For purposes of clarity, the various features in the drawings are not necessarily drawn to scale. Moreover, certain well-known elements may not be shown in the figures.
In the following description, numerous specific details of the invention, such as structure, materials, dimensions, processing techniques and techniques of components, are set forth in order to provide a more thorough understanding of the invention. However, as will be understood by those skilled in the art, the present invention may be practiced without these specific details.
Fig. 3 shows a schematic diagram of a power management circuit according to an embodiment of the invention.
As shown in fig. 3, the power management circuit 200 of the embodiment of the invention includes a determining module 210, an output module 220, and a control module 230. The determining module 210 receives a power voltage VDD and a backlight voltage VLED, where the backlight voltage VLED is independent of the power voltage VDD, and determines whether the display is in a voltage drop test or a normal shutdown stage according to voltage values of the power voltage VDD and the backlight voltage VLED. The output module 220 has a control terminal connected to the determining module 210, and an output terminal connected to a gate driving circuit and a source driving circuit (not shown) on the display panel, and is used to output an enable signal EN under the control of the determining module 210, where the enable signal EN is a working voltage of the gate driving circuit and the source driving circuit. The control module 230 is connected to an XON pin of a gate driving circuit (not shown), and provides a trigger signal to the XON pin of the gate driving circuit, and when the display is in a normal power-off state and the trigger signal is valid, the gate driving circuit starts an XON function, provides a high-level signal to the scan line on the display panel, and turns on all thin film transistors on the display panel. When the display is in a voltage drop test, the trigger signal is invalid, and the XON function of the grid driving circuit is closed.
Fig. 4 shows a circuit schematic of a power management circuit according to a first embodiment of the invention.
As shown in fig. 4, the determining module 210 includes a comparator U2 for comparing a reference voltage with a power voltage VDD to obtain a first switching signal under the action of a power supply voltage, a non-inverting input terminal of the comparator U2 receives the reference voltage, an inverting input terminal of the comparator U2 receives the power voltage VDD, an output terminal of the comparator U2 is connected to a control terminal of the output module 220 to provide the first switching signal, and the output module 220 generates the enable signal EN according to the first switching signal and the power voltage VDD. Preferably, the determining module 210 further includes a first voltage dividing circuit 211 and a second voltage dividing circuit 212, the first voltage dividing circuit 211 is configured to divide the backlight voltage VLED by the first voltage dividing circuit 211 to obtain a reference voltage for the comparator U2, and the second voltage dividing circuit 212 is configured to divide the backlight voltage VLED by the second voltage dividing circuit 212 to obtain a supply voltage for the comparator U2 to provide a working voltage. The first voltage divider 211 includes a first resistor R1 and a second resistor R2 connected between the input terminal of the backlight voltage VLED and ground, and a common node of the first resistor R1 and the second resistor R2 provides a reference voltage. The second voltage divider circuit 212 includes a third resistor R3 and a fourth resistor R4 connected between the input terminal of the backlight voltage VLED and ground, and a common node of the third resistor R3 and the fourth resistor R4 provides a supply voltage. The determining module 210 further includes a ground resistor R6 connected to the output terminal of the comparator U2.
The output module 220 includes a first switch Q1, a control terminal of the first switch Q1 is connected to an output terminal of the comparator U2, a first path terminal of the first switch Q1 receives a power voltage VDD, and a second path terminal of the first switch Q1 outputs an enable signal EN. The output module 220 further includes a pull-down resistor R5, wherein one end of the pull-down resistor R5 is connected to the second path terminal of the first switch Q1, and the other end is grounded.
The control module 230 includes a second switch Q2 and a third voltage dividing circuit 231. The first path end of the second switch tube Q2 receives the reference voltage, and the second path end provides the trigger signal. The third voltage dividing circuit 231 includes a seventh resistor R7 and an eighth resistor R8 connected between the reference voltage and the ground, a common node of the seventh resistor R7 and the eighth resistor R8 provides a second switching signal, and a control terminal of the second switching transistor Q2 receives the second switching signal. The control module 230 further includes a ninth resistor R9 and a tenth resistor R10 connected between the power voltage VDD and ground, and a common node between the ninth resistor R9 and the tenth resistor R10 is connected to the second path terminal of the second switch transistor Q2.
Fig. 5 shows a circuit schematic of a power management circuit according to a second embodiment of the invention.
As shown in fig. 5, in a preferred embodiment of the present invention, the first and second voltage dividing circuits 211 and 212 may be implemented by first and second regulators LDO1 and 2 connected between the backlight voltage and the comparator, respectively. The first regulator LDO1 converts the backlight voltage VLED into a reference voltage, and the second regulator LDO2 converts the backlight voltage VLED into a supply voltage. The first and second LDO1 and 2 are Low Dropout linear regulators (Low drop out regulators), have a wide input voltage range and a stable output voltage, and do not affect the circuit stability when the backlight voltage VLED fluctuates. For example, the backlight voltage VLED is in the range of 5V to 21V, and the output voltage obtained after passing through the low dropout linear stabilizer can be stabilized to 3.3V.
The types of the first switch transistor Q1 and the second switch transistor Q2 can be determined by those skilled in the art according to specific situations, and the first switch transistor Q1 and the second switch transistor Q2 are PMOS transistors, which will be described in detail below.
Fig. 6 is a timing diagram illustrating the power management circuit according to an embodiment of the present invention.
In the conventional display, the backlight voltage VLED rises after the power voltage VDD at the power-on stage; the backlight voltage VLED drops before the supply voltage VDD during the shutdown phase, as shown in fig. 5. t1 represents a display power-on stage, t3 represents a display power-off stage, at which the backlight voltage VLED is invalid, as can be seen from fig. 6 and fig. 5, a voltage difference between the first node a and the second node B is smaller than a threshold voltage of the second switching tube Q2, the second switching tube Q2 is turned off, the trigger signal varies with the power voltage VDD, and when the power voltage VDD decreases to a low level signal, the XON function of the gate driving circuit is turned on. t2 represents a normal display stage of the display, when the backlight voltage VLED is active, the voltage difference between the first node a and the second node B is greater than the threshold voltage of the second switch Q2, the second switch Q2 is turned on, the control module 230 outputs the voltage of the first node a to the XON pin of the gate driving circuit, and the trigger signal is inactive. In the time periods t1, t2 and t3, the power voltage VDD is always greater than the reference voltage, the comparator U2 outputs a low level signal, the first switch tube Q1 is turned on, the output module 220 outputs the power voltage VDD as the working voltage of the driving circuit, and the enable signal EN is equal to the power voltage VDD.
Fig. 7 is a timing diagram illustrating a voltage sag test performed by the power management circuit according to the embodiment of the invention.
As shown in fig. 7, during the voltage drop test, the backlight voltage VLED is not changed, the power voltage VDD is first decreased and then increased, at this time, as shown in fig. 4 and 5, the voltage difference between the first node a and the second node B in the control module 230 is always greater than the threshold voltage of the second switching tube Q2, the second switching tube Q2 is turned on, the control module 230 outputs the voltage of the first node a to the XON pin of the gate driving circuit, and the trigger signal is invalid. In addition, in the time periods t4 and t6, the power voltage VDD is greater than the reference voltage, the comparator U2 outputs a low level signal, the first switch Q1 is turned on, the output module 220 outputs the power voltage VDD as the operating voltage of the driving circuit, and the enable signal EN is equal to the power voltage VDD. In the time period t5, the power voltage VDD is less than the reference voltage, the comparator U2 outputs a high level signal, the first switching tube Q1 is turned off, the pull-down resistor R5 pulls down the potential of the enable signal EN, and the output module 220 outputs a low level signal.
In summary, the power management circuit provided by the invention determines whether the display is in a normal open/shut-down state or a voltage drop test through the determination module, and then controls the on/off of the XON function of the gate driving circuit on the display panel through the control module. When the voltage drop test is carried out, the XON function of the grid driving circuit is closed, and when the grid driving circuit is normally turned on/off, the XON function of the grid driving circuit is turned on. The efficiency of the voltage drop test can be improved, and the elimination of shutdown ghost shadow of the display cannot be influenced.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
While embodiments in accordance with the invention have been described above, these embodiments are not intended to be exhaustive or to limit the invention to the precise embodiments described. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated. The invention is limited only by the claims and their full scope and equivalents.

Claims (10)

1. The utility model provides a power management circuit, power management circuit sets up in the display, the display still includes grid drive circuit, source drive circuit and pixel array, its characterized in that, power management circuit includes:
the judging module is used for receiving a power supply voltage and a backlight voltage, wherein the power supply voltage and the backlight voltage are mutually independent, and the judging module judges whether the display is in a normal open/close state or a voltage drop test mode according to the power supply voltage and the backlight voltage;
the input end of the control module is connected with the judging module, the output end of the control module is connected with the grid driving circuit to provide a trigger signal, and the grid driving circuit is used for conducting all the thin film transistors of the pixel array when the trigger signal is effective; and
an output module, a control end of which is connected with the judging module, an output end of which is connected with the grid driving circuit and the source driving circuit, and is used for outputting an enabling signal under the control of the judging module, wherein the enabling signal is used as the working voltage of the grid driving circuit and the source driving circuit,
the control module is used for providing invalid trigger signals when the display is in a voltage drop test mode.
2. The power management circuit of claim 1, wherein the determining module comprises:
a comparator, a positive phase input end of which receives a reference voltage, a negative phase input end of which receives the power supply voltage, and is used for obtaining a first switching signal by comparing the reference voltage with the power supply voltage under the action of a power supply voltage, an output end of the comparator is connected with a control end of the output module to provide the first switching signal, and the output module generates the enable signal according to the first switching signal and the power supply voltage;
a first voltage dividing circuit for dividing the backlight voltage to obtain the reference voltage; and
and the second voltage division circuit is used for dividing the backlight voltage to obtain the power supply voltage.
3. The power management circuit of claim 2,
the first voltage division circuit comprises a first resistor and a second resistor which are connected between the backlight voltage input end and the ground, and a common node of the first resistor and the second resistor provides the reference voltage.
4. The power management circuit of claim 2,
the second voltage division circuit comprises a third resistor and a fourth resistor which are connected between the backlight voltage input end and the ground, and a common node of the third resistor and the fourth resistor provides the power supply voltage.
5. The power management circuit of claim 2, wherein the first voltage divider circuit and the second voltage divider circuit are respectively composed of a first voltage regulator and a second voltage regulator connected between the backlight voltage and the comparator, and the first voltage regulator and the second voltage regulator are both low dropout linear voltage regulators.
6. The power management circuit of claim 2, wherein the determining module further comprises a ground resistor connected between the comparator output and ground.
7. The power management circuit of claim 2, wherein the output module comprises:
a control end of the first switch tube is connected with an output end of the comparator, a first path end of the first switch tube receives the power supply voltage, and a second path end of the first switch tube outputs the enable signal; and
and the pull-down resistor is connected between the second path end of the first switching tube and the ground.
8. The power management circuit of claim 7, wherein in the output module, the first switch is a P-channel transistor.
9. The power management circuit of claim 2, wherein the control module comprises:
a first path end of the second switch tube receives the reference voltage, and a second path end of the second switch tube provides the trigger signal;
the third voltage division circuit is used for dividing the reference voltage to obtain a second switching signal, and the control end of the second switching tube receives the second switching signal; and
and a ninth resistor and a tenth resistor connected between the power supply voltage and the ground, wherein a common node of the ninth resistor and the tenth resistor is connected with the second path end of the second switching tube.
10. The power management circuit of claim 9, wherein the third voltage divider circuit comprises seventh and eighth resistors connected between the reference voltage and ground, a common node of the seventh and eighth resistors providing the second switching signal.
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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012022160A (en) * 2010-07-15 2012-02-02 Sharp Corp Liquid crystal display device and display control method
CN104537998A (en) * 2015-01-06 2015-04-22 友达光电股份有限公司 A control circuit for a liquid crystal display device and a control method thereof
WO2015072402A1 (en) * 2013-11-15 2015-05-21 シャープ株式会社 Liquid crystal display device and method for driving same
CN204558001U (en) * 2015-04-16 2015-08-12 昆山龙腾光电有限公司 Power-off ghost shadow eliminates circuit and gate driver circuit
CN106057151A (en) * 2016-07-19 2016-10-26 昆山龙腾光电有限公司 Display device, liquid crystal display and method of eliminating ghost
CN106531116A (en) * 2017-01-05 2017-03-22 京东方科技集团股份有限公司 Starting method of shut-down residual shadow elimination and starting circuit thereof, power supply IC and display apparatus
KR20170135555A (en) * 2016-05-31 2017-12-08 엘지디스플레이 주식회사 Method for improving afterimage of liquid crystal display device

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012022160A (en) * 2010-07-15 2012-02-02 Sharp Corp Liquid crystal display device and display control method
WO2015072402A1 (en) * 2013-11-15 2015-05-21 シャープ株式会社 Liquid crystal display device and method for driving same
CN104537998A (en) * 2015-01-06 2015-04-22 友达光电股份有限公司 A control circuit for a liquid crystal display device and a control method thereof
CN204558001U (en) * 2015-04-16 2015-08-12 昆山龙腾光电有限公司 Power-off ghost shadow eliminates circuit and gate driver circuit
KR20170135555A (en) * 2016-05-31 2017-12-08 엘지디스플레이 주식회사 Method for improving afterimage of liquid crystal display device
CN106057151A (en) * 2016-07-19 2016-10-26 昆山龙腾光电有限公司 Display device, liquid crystal display and method of eliminating ghost
CN106531116A (en) * 2017-01-05 2017-03-22 京东方科技集团股份有限公司 Starting method of shut-down residual shadow elimination and starting circuit thereof, power supply IC and display apparatus

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