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CN108106747B - Temperature sensor based on capacitance-to-digital converter - Google Patents

Temperature sensor based on capacitance-to-digital converter Download PDF

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Publication number
CN108106747B
CN108106747B CN201711365478.4A CN201711365478A CN108106747B CN 108106747 B CN108106747 B CN 108106747B CN 201711365478 A CN201711365478 A CN 201711365478A CN 108106747 B CN108106747 B CN 108106747B
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mos switch
switch tube
signal
capacitor
circuit
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CN108106747A (en
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黎冰
马林发
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Shenzhen University
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Shenzhen University
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
    • G01K7/00—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements
    • G01K7/01—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using semiconducting elements having PN junctions
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
    • G01K2219/00—Thermometers with dedicated analog to digital converters

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  • General Physics & Mathematics (AREA)
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Abstract

The invention belongs to the technical field of sensors, and provides a temperature sensor based on a capacitance-to-digital converter. The temperature sensor includes: for generating from temperature variation a first temperature change signal second temperature variation signal and third temperature a sensor front-end circuit for varying the signal; is connected with the front-end circuit of the sensor, a CDC readout circuit for generating a digital code from the first temperature change signal and the second temperature change signal with the third temperature change signal; and the CDC the readout circuitry is connected to the circuit board, for carrying out the digital code an output digital processing circuit; the invention can effectively solve the existing temperature transmission the structure of the CDC read-out circuit in the sensor is too complex, low practicality and temperature the detection error is large.

Description

Temperature sensor based on capacitance-to-digital converter
Technical Field
The invention belongs to the technical field of sensors, and particularly relates to a temperature sensor based on a capacitance-to-digital converter.
Background
With the rapid development of modern electronic technology, various electronic products gradually tend to be portable and miniaturized, and temperature sensors based on modern CMOS (Complementary Metal Oxide Semiconductor ) technology are increasingly and widely used due to their strong compatibility; in the related art, a CDC (Capacitance-to-Digital-Converter) readout circuit converts a temperature variation detected by a temperature sensor circuit into a recognizable Digital code, and then the Digital code is subjected to subsequent Digital processing to directly obtain a temperature value of an external environment, thereby realizing direct measurement of an environmental temperature.
Thus, the prior art has at least the following problems: the existing CDC readout circuit combines a switched capacitor technology and an oversampling modulation technology to read a temperature signal, a count value proportional to temperature can be obtained only by processing the temperature signal through a current mirror circuit, an oscillator circuit and a counting circuit, the whole temperature detection process is excessively complicated in operation, the structure of the CDC readout circuit is excessively complex, the circuit implementation difficulty is high, the temperature value can be obtained only after the temperature signal is calibrated by the existing temperature sensor, and the temperature detection error is increased.
Disclosure of Invention
The invention provides a temperature sensor based on a capacitance-to-digital converter, and aims to solve the problems that a CDC reading circuit structure is too complex and difficult to realize and a temperature sensor has larger detection error in the prior art.
A first aspect of the present invention provides a capacitive-to-digital converter based temperature sensor comprising:
a sensor front-end circuit for generating a first temperature change signal, a second temperature change signal, and a third temperature change signal according to the temperature change amount;
the CDC reading circuit is connected with the front-end circuit of the sensor and used for generating a digital code according to the first temperature change signal and the second temperature change signal and the third temperature change signal; and
And the digital processing circuit is connected with the CDC reading circuit and is used for outputting the digital codes.
Further, the CDC readout circuit includes:
the signal input end of the switch capacitor module is connected with the front end circuit of the sensor and is used for eliminating offset errors;
the transconductance amplifying module is connected with the signal output end of the switch capacitor module and used for amplifying the voltage ratio signal generated by the switch capacitor module; and
The input end is connected with the transconductance amplifying module and is used for generating a one-bit quantization module of the digital code according to the voltage ratio signal.
Further, the switched capacitor module includes:
the first capacitance integration unit is connected with the front-end circuit of the sensor and used for generating a first charging charge according to the first temperature change signal and a first clock signal;
the second capacitance integration unit is connected with the front-end circuit of the sensor and used for generating second charging charges according to the first temperature change signal and a second clock signal;
the capacitive feedback unit is connected with the front-end circuit of the sensor and used for adjusting the ratio of the first charging charge to the second charging charge according to the second temperature change signal, the third temperature change signal and a third clock signal; and
the drain electrode of the first MOS switch tube is connected with the first capacitance integration unit, the second capacitance integration unit and the capacitance feedback unit, the grid electrode of the first MOS switch tube is connected with a fourth clock signal, and the source electrode of the first MOS switch tube is the signal output end of the switch capacitance module.
Further, the first capacitance integration unit includes: the second MOS switch tube, the third MOS switch tube and the first trimming capacitor;
the drain electrode of the second MOS switch tube is connected with the front end circuit of the sensor, the source electrode of the second MOS switch tube and the drain electrode of the third MOS switch tube are connected with the first end of the first trimming capacitor, the source electrode of the third MOS switch tube is connected to a common mode level, and the second end of the first trimming capacitor is the output end of the first capacitor integration unit;
the grid electrode of the second MOS switch tube and the grid electrode of the third MOS switch tube are connected with the first clock signal.
Further, the second capacitance integration unit includes: the fourth MOS switch tube, the fifth MOS switch tube and the second trimming capacitor;
the drain electrode of the fourth MOS switch tube is connected with the front end circuit of the sensor, the source electrode of the fourth MOS switch tube and the drain electrode of the fifth MOS switch tube are connected with the first end of the second trimming capacitor, the source electrode of the fifth MOS switch tube is connected to a common mode level, and the second end of the second trimming capacitor is the output end of the second capacitor integration unit;
and the grid electrode of the fourth MOS switch tube and the grid electrode of the fifth MOS switch tube are connected with the second clock signal.
Further, the capacitive feedback unit includes: a sixth MOS switch tube, a seventh MOS switch tube, an eighth MOS switch tube and a third capacitor;
the drain electrode of the sixth MOS switch tube and the drain electrode of the seventh MOS switch tube are connected with the front end circuit of the sensor, the source electrode of the sixth MOS switch tube and the source electrode of the seventh MOS switch tube are connected with the first end of the third capacitor, the source electrode of the eighth MOS switch tube is connected to a common mode level, and the second end of the third capacitor and the drain electrode of the eighth MOS switch tube are output ends of the capacitor feedback unit;
and the grid electrode of the sixth MOS switch tube, the grid electrode of the seventh MOS switch tube and the grid electrode of the eighth MOS switch tube are connected with a third clock signal.
Further, the transconductance amplifying module includes: a fourth capacitor and a transconductance amplifier;
the first end of the fourth capacitor and the reverse input end of the transconductance amplifier are connected with the signal output end of the switch capacitor module, the homodromous input end of the transconductance amplifier is connected to a common mode level, the second end of the fourth capacitor is connected with the output end of the transconductance amplifier, and the output end of the transconductance amplifier is the output end of the transconductance amplifier module.
Further, the one-bit quantization module comprises a comparator and a latch;
the same-direction input end of the comparator is connected with the transconductance amplification module, the reverse input end of the comparator is connected to the common mode level, the output end of the comparator is connected with the data signal input end of the latch, the forward output end and the reverse output end of the latch are signal output ends of the CDC readout circuit, and the clock signal input end of the latch is connected with a fifth clock signal.
Further, the sensor front-end circuit includes: a first current bias loop, a second current bias loop, a third current bias loop,
an output operational amplifier for amplifying a voltage difference between the first current bias loop and the second current bias loop;
an adder for outputting a sum of a voltage signal of the third current bias loop and a voltage signal of the output end of the operational amplifier;
the output end of the operational amplifier and the output end of the adder are the output ends of the sensor front-end circuit.
Further, the first current bias loop includes: a first current source and a first bipolar transistor;
the second current bias loop includes: a second current source and a second bipolar transistor;
the third current bias loop includes: a third current source and a third bipolar transistor;
wherein the first current source is connected between a power source and an emitter of the first bipolar transistor, the second current source is connected between a power source and an emitter of the second bipolar transistor, the third current source is connected between a power source and an emitter of the third bipolar transistor, a base of the first bipolar transistor, a collector of the first bipolar transistor, a base of the second bipolar transistor, a collector of the second bipolar transistor, a base of the third bipolar transistor, and a collector of the third bipolar transistor are grounded;
the non-inverting input end of the operational amplifier is connected with the emitter of the second bipolar transistor, the inverting input end of the operational amplifier is connected with the emitter of the first bipolar transistor, the first input end of the adder is connected with the emitter of the third bipolar transistor, and the second input end of the adder is connected with the output end of the operational amplifier.
Compared with the prior art, the invention has the following beneficial technical effects: in the temperature sensor, the CDC readout circuit directly generates the digital code corresponding to the temperature variation according to the first temperature variation signal, the second temperature variation signal and the third temperature variation signal output by the front-end circuit of the sensor, the digital code can be directly used as the input of the digital processing circuit, and the digital code does not need to be subjected to signal multiplication and conversion processing, so that the accuracy of temperature detection is improved, the structure of the CDC readout circuit is simplified, and the practicability is high; therefore, the problems that the CDC readout circuit in the prior art is complex in structure and has larger error in temperature change detection are effectively solved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a temperature sensor based on a capacitive-to-digital converter according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a CDC readout circuit according to an embodiment of the present invention;
FIG. 3 is a circuit block diagram of a CDC readout circuit provided by an embodiment of the present invention;
FIG. 4 is a circuit configuration diagram of a front-end circuit of a sensor according to an embodiment of the present invention;
fig. 5 is a signal waveform diagram of a clock signal according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
Fig. 1 shows a schematic structural diagram of a temperature sensor based on a capacitive-to-digital converter according to an embodiment of the present invention, and for convenience of explanation, only the portions related to the embodiment of the present invention are shown, which are described in detail below:
as shown in fig. 1, the temperature sensor 10 includes a sensor front-end circuit 101, a CDC readout circuit 102, and a digital processing circuit 103.
The sensor front-end circuit 101 detects an external temperature variation amount, and the sensor front-end circuit 101 generates a first temperature variation signal, a second temperature variation signal, and a third temperature variation signal according to the temperature variation amount; the CDC readout circuit 102 is connected to the sensor front-end circuit 101, and the CDC readout circuit 102 generates a digital code according to the first temperature change signal, the second temperature change signal and the third temperature change signal, where the digital code corresponds to the temperature change, that is, the temperature change of the external environment can be directly reflected by the digital code; the digital processing circuit 103 is connected to the CDC readout circuit 102, and the digital processing circuit 103 outputs the digital code.
Specifically, the digital processing circuit 103 can output the digital code after a series of processes such as displaying, encoding, optimizing the digital code, so that the user can accurately know the change amount of the external environment temperature in real time through the temperature sensor 10.
Specifically, fig. 2 shows a schematic structural diagram of the CDC readout circuit 102 according to an embodiment of the present invention, which is described in detail below:
as shown in fig. 2, the CDC readout circuit 102 includes a switched capacitor module 1021, a transconductance amplifier module 1022, and a one-bit quantization module 1023.
The signal input terminal of the switched capacitor module 1021 is connected to the sensor front-end circuit 101, and the switched capacitor module 1021 can eliminate offset errors, wherein the offset errors are nonlinear error charges caused by clock feedthrough and charge injection when the MOS switch tube in the CDC readout circuit 102 is closed or opened.
The transconductance amplification module 1022 is connected to the signal output end of the switched capacitor module 1021, and when the switched capacitor module 1021 generates a voltage ratio signal, the transconductance amplification module 1022 performs power amplification on the voltage ratio signal so as to avoid energy loss of the voltage ratio signal in the transmission process; the input end of the one-bit quantization module 1023 is connected with the transconductance amplification module 1022, and the transconductance amplification module 1022 generates a digital code according to the voltage ratio signal, so that high-precision temperature change can be obtained through the digital code, and detection errors of the temperature sensor 10 are reduced.
Specifically, fig. 3 shows a circuit configuration diagram of the CDC readout circuit 102 according to an embodiment of the present invention, which is described in detail below:
as shown in fig. 3, the switched capacitor module 1021 includes a first capacitor integration unit 301, a second capacitor integration unit 302, a capacitor feedback unit 303, and a first MOS switch Q1.
The first capacitance integration unit 301 is connected to the sensor front-end circuit 101, and the first capacitance integration unit 301 is configured to generate a first temperature change signal V BG Generating a first charge by a first clock signal; the second capacitance integration unit 302 is connected with the sensor front-end circuit 101, and the second capacitance integration unit 302 is used for generating a first temperature change signal V according to the first temperature change signal BG And generating a second charge from the second clock signal; since the phase of the first clock signal is not the same as the phase of the second clock signal, the amounts of charge of the first and second charge generated thereby are not the same, and thus a corresponding nonlinear error charge is formed in the CDC readout circuit 102.
The capacitance feedback unit 303 is connected to the sensor front-end circuit 101, and the capacitance feedback unit 303 changes the signal V according to the second temperature BE1 Third temperature variation signal V BE2 And the third clock signal adjusts the first charge and the second charge; the drain electrode of the first MOS switch Q1 is connected to the first capacitance integrating unit 301, the second capacitance integrating unit 302, and the capacitance feedback unit 303, where the gate electrode of the first MOS switch Q1 is connected to the fourth clock signal, and the source electrode of the first MOS switch Q1 is the output end of the switch capacitance module 1021, so that nonlinear error charges caused by imbalance between the first charge and the second charge are effectively eliminated through a feedback loop formed by the capacitance feedback unit 303 and the first MOS switch Q1.
The first capacitance integrating unit 301 includes a second MOS switch tube Q2, a third MOS switch tube Q3 and a first trimming capacitor C Tref The method comprises the steps of carrying out a first treatment on the surface of the The drain electrode of the second MOS switch tube Q2 is connected with the sensor front-end circuit 101, the source electrode of the second MOS switch tube Q2, the drain electrode of the third MOS switch tube Q3 and the first trimming capacitor C Tref The source of the third MOS switch tube Q3 is connected to the common mode level V cm First trimming capacitor C Tref The second terminal of the first capacitance integration unit 301.
The grid electrode of the second MOS switch tube Q2 and the grid electrode of the third MOS switch tube Q3 are connected with a first clock signal; when the first clock signal is input to the gate of the second MOS switch tube Q2When the gate of the third MOS switch transistor Q3 and the electrode are connected to each other, the second MOS switch transistor Q2 and the third MOS switch transistor Q3 are turned on or off according to the first clock signal, thereby completing the first trimming capacitor C in the first capacitor integrating unit 301 Tref Is a charging and discharging process of (a).
Wherein the second capacitive integration unit 302 comprises: fourth MOS switch tube Q4, fifth MOS switch tube Q5 and second trimming capacitor C Toff The method comprises the steps of carrying out a first treatment on the surface of the The drain electrode of the fourth MOS switch tube Q4 is connected with the sensor front-end circuit 101, the source electrode of the fourth MOS switch tube Q4, the drain electrode of the fifth MOS switch tube Q5 and the second trimming capacitor C Toff The source of the fifth MOS switch transistor Q5 is connected to the common mode level V cm A second trimming capacitor C Toff The second terminal of the second capacitor integration unit 302;
the grid electrode of the fourth MOS switch tube Q4 and the grid electrode of the fifth MOS switch tube Q5 are connected with the second clock signal; the fourth MOS switch tube Q4 and the fifth MOS switch tube Q5 can be controlled to be turned on or turned off through the second clock signal, so that the second trimming capacitor C in the second capacitor integration unit 302 is realized Toff Is a charging and discharging process of (a).
Wherein the capacitance feedback unit 303 includes a sixth MOS switch transistor Q6, a seventh MOS switch transistor Q7, an eighth MOS switch transistor Q8, and a third capacitance C T 。
The drain of the sixth MOS switch transistor Q6 and the drain of the seventh MOS switch transistor Q7 are connected with the sensor front-end circuit 101, and the source of the sixth MOS switch transistor Q6 and the source of the seventh MOS switch transistor Q7 are connected with the third capacitor C T The source of the eighth MOS switch transistor Q8 is connected to the common mode level V cm Third capacitor C T The second terminal of the (d) and the drain of the eighth MOS switch Q8 are the output terminals of the capacitive feedback unit 303.
The grid electrode of the sixth MOS switch tube Q6, the grid electrode of the seventh MOS switch tube Q7 and the grid electrode of the eighth MOS switch tube Q8 are connected with a third clock signal; specifically, the sixth MOS switch Q6, the seventh MOS switch Q7, and the eighth MOS switch Q8 may be turned on or off by the third clock signal, so as to balance the imbalance error between the first charge and the second charge.
The transconductance amplifying module 1022 includes a fourth capacitor C f A transconductance amplifier OTA; fourth capacitor C f The first end of the transconductance amplifier OTA and the reverse input end of the transconductance amplifier OTA are connected with the signal output end of the switched capacitor module 1021, and the homodromous input end of the transconductance amplifier OTA is connected with the common mode level V cm Fourth capacitor C f And the second end of the transconductance amplifier OTA is connected with the output end of the transconductance amplifier OTA, and the output end of the transconductance amplifier OTA is the output end of the transconductance amplifier module 1022.
Specifically, the transconductance amplifier OTA can convert the input differential voltage into an output current, and when a voltage difference signal exists between the same-direction input end and the reverse input end of the transconductance amplifier OTA, the transconductance amplifier OTA can convert and amplify the voltage difference signal to output a current signal, so that signal conversion and output are realized.
The one-bit quantization module 1023 includes a comparator Cmp and a latch DFF; the same-directional input end of the comparator Cmp is connected with the transconductance amplification module 1022, and the reverse input end of the comparator Cmp is connected with the common-mode level V cm The output end of the comparator Cmp is connected with the data signal input end D of the latch DFF, the forward output end Q and the reverse output end Q of the latch DFF are signal output ends of the CDC readout circuit 102, and the clock signal input end C of the latch DFF is connected with a fifth clock signal; wherein the fifth clock signal is used to drive the latch DFF action.
The first clock signal, the second clock signal, the third clock signal, the fourth clock signal, and the fifth clock signal are generated by the clock signal generating circuit and output to the above-mentioned respective MOS switch transistors, such as the first MOS switch transistor Q1 and the second MOS switch transistor Q2, so as to control the MOS switch transistors to be turned on or off.
The first trimming capacitor C Tref And a second trimming capacitor C Toff In particular circuit applications, the capacitance of the capacitor itself can be varied by trimming the distance, relative position or area between the plates of the capacitor, and when the capacitance is varied, the capacitor flows through the first trimming capacitor C Tref The charge of the two polar plates and the charge flowing through the second trimming capacitor C Toff The charge of the bipolar plates and thus the operating current in the CDC sensing circuit 102 may also change.
Specifically, fig. 4 shows a circuit structure diagram of a sensor front-end circuit 101 according to an embodiment of the present invention, which is described in detail below:
as shown in fig. 4, the sensor front-end circuit 101 includes a first current bias loop 1011, a second current bias loop 1012, a third current bias loop 1013, an operational amplifier OP1, and an adder Add.
Wherein the operational amplifier OP1 amplifies and outputs a voltage difference between the first current bias circuit 1011 and the second current bias circuit 1012; specifically, since the operation currents in the first current bias circuit 1011 and the second current bias circuit 1012 are different, a voltage difference exists between the output voltage in the first current bias circuit 1011 and the output voltage in the second current bias circuit 1012, and the operational amplifier OP1 amplifies and outputs the voltage difference; the adder Add can output the sum of the voltage signal of the third current bias loop 1013 and the voltage signal of the output terminal of the operational amplifier OP 1; the output end of the operational amplifier OP1 and the output end of the adder Add are the output ends of the sensor front-end circuit 101, and are used for outputting a temperature change signal.
Wherein, the first current bias circuit 1011 includes: first current source I 1 A first bipolar transistor BJT1; the second current bias loop 1012 includes: second current source I 2 A second bipolar transistor BJT2; the third current bias loop 1013 includes: third current source I 3 And a third bipolar transistor BJT3.
Specifically, a first current source I 1 A second current source I connected between the power supply Vcc and the emitter of the first bipolar transistor BJT1 2 A third current source I connected between the power supply Vcc and the emitter of the second bipolar transistor BJT2 3 The base of the first bipolar transistor BJT1, the collector of the first bipolar transistor BJT1, the base of the second bipolar transistor BJT2, the second bipolar transistor BJT are connected between the power supply Vcc and the emitter of the third bipolar transistor BJT32, the base of the third bipolar transistor BJT3 and the collector of the third bipolar transistor BJT3 are grounded.
The non-inverting input end of the operational amplifier OP1 is connected with the emitter of the second bipolar transistor BJT2, the inverting input end of the operational amplifier OP1 is connected with the emitter of the first bipolar transistor BJT1, the first input end of the adder Add is connected with the emitter of the third bipolar transistor BJT3, and the second input end of the adder Add is connected with the output end of the operational amplifier OP 1; wherein the input signal of the first input end of the adder Add is the voltage V between the emitter and collector of the third bipolar transistor BJT3 BE When the first current source I 1 And a second current source I 2 When the output currents are different, the potential difference between the emitter of the first bipolar transistor BJT1 and the emitter of the second bipolar transistor BJT2 is not equal, and the potential difference DeltaV between the emitter of the first bipolar transistor BJT1 and the emitter of the second bipolar transistor BJT2 BE That is, the voltage difference between the output voltage in the first current bias circuit 1011 and the output voltage in the second current bias circuit 1012 is as described above, and the corresponding temperature change signal is outputted through the amplification processing of the operational amplifier OP1 although the voltage difference is small; therefore, the temperature sensor 10 can detect a very small amount of temperature change, and the accuracy and sensitivity for temperature detection are improved.
For better explanation of the present embodiment, the following describes the operation principle of the temperature sensor 10 by way of a specific example:
in connection with the circuit configuration of the sensor front-end circuit 101 shown in fig. 4, the base-emitter voltage of the respective bipolar transistor, or the forward voltage of the PN junction diode, has a negative temperature coefficient, i.e. the voltage V between the emitter and collector of the third bipolar transistor BJT3 BE Is a negative temperature coefficient voltage. If a first current source I 1 And a third current source I 3 The magnitude relation between the running currents of (a) is as follows:
I 1 ＝I 3 ；
wherein the second current source I 2 In (3) operation ofCurrent and first current source I 1 The magnitude relation between the running currents of (a) is as follows:
I 2 ＝ρ·I 1 ；
where ρ is a constant and is predetermined.
From the above two equations, it can be seen that if the first bipolar transistor BJT1 and the second bipolar transistor BJT2 operate at unequal current densities, the difference in base-emitter voltages of the two bipolar transistors is proportional to absolute temperature, and accordingly, the potential difference DeltaV between the emitter of the first bipolar transistor BJT1 and the emitter of the second bipolar transistor BJT2 BE Proportional to temperature; if the voltage amplification factor of the operational amplifier OP1 is alpha, the output voltage V of the adder Add BG The method comprises the following steps:
V BG ＝V BE +αΔV BE ；
the output voltage V of the adder Add is made by adjusting the voltage amplification factor alpha of the operational amplifier OP1 BG Kept constant, i.e. the output voltage V of adder Add BG Is not changed with the change of temperature.
Setting upAccording to the above derivation procedure, V BG Is a voltage value which does not change with temperature change, and DeltaV BE Proportional to temperature, μ is proportional to temperature; finally, the output temperature value D of the temperature sensor 10 can be accurately obtained through a formula out Wherein the formula is:
D out ＝A·μ+B
in the above formula, a and B are the multiplication factor of the temperature sensor 10 and the offset factor of the temperature sensor 10, respectively.
Therefore, as can be seen from the above specific example of the operation of the sensor front-end circuit 101, the sensor front-end circuit 101 uses a bandgap reference voltage source circuit, that is, a temperature change signal which is in a functional relation with temperature is obtained through a plurality of bipolar transistors and current bias devices, and the sensor front-end circuit 101 converts the external temperature change amount into the temperature change signal, so that accurate measurement of temperature is realized; thereby effectively overcoming the problem that the prior art can not obtain the temperature change signal with high precision in real time.
When the sensor front-end circuit 101 generates the first temperature change signal V BG Second temperature variation signal V BE1 Third temperature variation signal V BE2 And transmits the temperature signal to the CDC readout circuit 102, where the CDC readout circuit 102 can generate corresponding digital codes in real time according to the temperature change signals, and the specific steps are as follows:
if the gate of the first MOS switch tube Q1 is connected with the fourth clock signalThe third clock signal for controlling the on or off of each MOS switch in the capacitive feedback unit 303 may be subdivided into: />And +.>Wherein the grid electrode of the sixth MOS switch tube Q6 is connected with a third clock signal>Gate of seventh MOS switch transistor Q7 is connected +.>The grid electrode of the eighth MOS switch tube Q8 is connected with a third clock signal->Wherein figure 5 shows +.> And +.>Is a signal waveform diagram of (a);
further, the second clock signal for controlling the on or off of each MOS switch tube in the second capacitance integrating unit 302 may be subdivided into:and +.>Wherein the grid electrode of the fourth MOS switch tube Q4 is connected with a second clock signal>The grid electrode of the fifth MOS switch tube Q5 is connected with a second clock signal->And->
Further, the first clock signal for controlling the on or off of each MOS switch tube in the first capacitance integration unit 301 may be subdivided into:and +.>Wherein the grid electrode of the second MOS switch tube Q2 is connected with the first clock signal +.>The third MOS switch transistor Q3 is connected with the first clock signal +>And:
in the above formula, Y is the output signal of the positive output terminal Q of the latch DFF,is the inverted output of the latch DFF +.>Wherein Y->Representing signal Y and signal->A logical and operation between them, similarly, +.>Indicating signal->And signal->Logical AND operations between the signals, wherein "+" in the above formula represents logical OR operations between the signals; the clock signal input terminal C of the latch DFF is connected with the fifth clock signal +.>Wherein->Due to the positive output Q of the latch DFFAnd a reverse output->Y and +.>As the output signal of the CDC readout circuit 102, the output signal of the latch DFF is used as the control signals of the first MOS switch transistor Q1 and the third MOS switch transistor Q3, thereby forming a closed-loop feedback control loop and improving the stability of the CDC readout circuit 102.
Because the drain electrode of the second MOS switch tube Q2 is connected with the first temperature change signal V BG The drain electrode of the fourth MOS switch tube Q4 is connected with the first temperature change signal V BG The drain electrode of the sixth MOS switch tube Q6 is connected with the second temperature change signal V BE1 The drain electrode of the seventh MOS switch tube Q7 is connected with the third temperature change signal V BE2 Wherein V is BE1 V is the voltage between the emitter and collector of the first bipolar transistor BJT1 in the sensor front-end circuit 101 BE2 V is the voltage between the emitter and collector of the second bipolar transistor BJT2 in the sensor front-end circuit 101 BE1 And V is equal to BE2 Voltage difference DeltaV between BE ＝V BE2 -V BE1 The voltage difference DeltaV BE Is used for giving the third capacitance C T Charging, in the process, the fourth capacitor C f As feedback and integrating capacitance, so that the first trimming capacitance C Tref And a second trimming capacitor C Toff Flow to fourth capacitor C f The charge of (2) tends to 0; if this is done in N clock signal cycles, without clock feedthrough and charge injection, it is made available by the charge conservation theorem:
NC T (V BE1 -V BE2 )-NC Toff V BG -nC Tref V BG ＝0
in the above, N is N clock signal periodsThe output signal Y of the positive output terminal Q of the internal latch DFF is the number of high levels,and->Multiplication factor and imbalance factor, D out The output temperature value of the temperature sensor 10 is given by: degrees celsius; it can be seen from the above that by adjusting +.>And->Varying the size of the multiplication factor and the imbalance factor.
If the CDC read-out circuit 102 has a clock feedthrough and charge injection, the above formula of charge conservation becomes:
NC T (V BE1 -V BE2 )-NC Toff V BG -nC Tref V BG +NQ Err,cf +NQ Err,cj ＝0
in the above, NQ Err,cf And NQ Err,cj Error charges due to clock feedthrough and charge injection, respectively.
At this time, the output temperature value D of the temperature sensor 10 out The method comprises the following steps:
in the above-mentioned method, the step of,representing misalignment errors caused by clock feedthrough and charge injection. When the temperature sensor 10 is detecting the outside temperature, the sensor is not in contact with NQ Err,cf And NQ Err,cj Is unchanged, the offset error caused by clock feedthrough and charge injection is a fixed value, by proper adjustment/>The offset error is cancelled out by the ratio of (2).
In combination with the above application example, in the temperature sensor provided by the embodiment of the invention, the front-end circuit of the sensor accurately converts the temperature variation into the temperature variation signal, the CDC readout circuit generates the digital code according to the temperature variation signal, and the digital code can be directly used as the input of the digital processing circuit without other multiplication and transformation operations, so that the detection precision of the temperature detector on the temperature is improved; meanwhile, a switch capacitor module in the CDC readout circuit can directly eliminate nonlinear offset errors in the circuit, other calibration technologies are not needed, the phenomenon of unbalanced error charge of the MOS switch tube when the MOS switch tube is turned on or turned off can be avoided by adjusting capacitance values of the first trimming capacitor and the second trimming capacitor, the circuit structure of the CDC readout circuit is simplified, and the practicability is higher; therefore, the defects that the temperature sensor in the prior art is low in temperature detection precision, the structure of the CDC reading circuit is too complex, and the practicability is low are effectively overcome.
It should be noted that in this document relational terms such as first and second are used solely to distinguish one entity from another entity without necessarily requiring or implying any actual such relationship or order between such entities. And the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a product or structure that comprises a list of elements is inherent to the element. Without further limitation, an element defined by the statement "comprising … …" or "comprising … …" does not exclude the presence of additional elements in a process, method, article or terminal device comprising the element. Further, herein, "greater than," "less than," "exceeding," and the like are understood to not include the present number; "above", "below", "within" and the like are understood to include this number.
The foregoing description of the preferred embodiments of the invention is not intended to be limiting, but rather is intended to cover all modifications, equivalents, and alternatives falling within the spirit and principles of the invention.

Claims (8)

1. A capacitive-to-digital converter based temperature sensor, comprising:
a sensor front-end circuit for generating a first temperature change signal, a second temperature change signal, and a third temperature change signal according to the temperature change amount;
the CDC reading circuit is connected with the front-end circuit of the sensor and used for generating a digital code according to the first temperature change signal and the second temperature change signal and the third temperature change signal; and
The digital processing circuit is connected with the CDC readout circuit and is used for outputting the digital codes;
the CDC readout circuit includes:
the signal input end of the switch capacitor module is connected with the front end circuit of the sensor and is used for eliminating offset errors;
the transconductance amplifying module is connected with the signal output end of the switch capacitor module and used for amplifying the voltage ratio signal generated by the switch capacitor module; and
The input end is connected with the transconductance amplifying module and is used for generating a one-bit quantization module of the digital code according to the voltage ratio signal;
the switched capacitor module includes:
the first capacitance integration unit is connected with the front-end circuit of the sensor and used for generating a first charging charge according to the first temperature change signal and a first clock signal;
the second capacitance integration unit is connected with the front-end circuit of the sensor and used for generating second charging charges according to the first temperature change signal and the second clock signal, and the charge amounts of the first charging charges and the second charging charges are different;
the capacitive feedback unit is connected with the front-end circuit of the sensor and used for adjusting the ratio of the first charging charge to the second charging charge according to the second temperature change signal, the third temperature change signal and a third clock signal; and
the drain electrode of the first MOS switch tube is connected with the first capacitance integration unit, the second capacitance integration unit and the capacitance feedback unit, the grid electrode of the first MOS switch tube is connected with a fourth clock signal, and the source electrode of the first MOS switch tube is the signal output end of the switch capacitance module.
2. The temperature sensor of claim 1, wherein the first capacitive integration unit comprises: the second MOS switch tube, the third MOS switch tube and the first trimming capacitor;
the drain electrode of the second MOS switch tube is connected with the front end circuit of the sensor, the source electrode of the second MOS switch tube and the drain electrode of the third MOS switch tube are connected with the first end of the first trimming capacitor, the source electrode of the third MOS switch tube is connected to a common mode level, and the second end of the first trimming capacitor is the output end of the first capacitor integration unit;
the grid electrode of the second MOS switch tube and the grid electrode of the third MOS switch tube are connected with the first clock signal.
3. The temperature sensor of claim 1, wherein the second capacitive integration unit comprises: the fourth MOS switch tube, the fifth MOS switch tube and the second trimming capacitor;
the drain electrode of the fourth MOS switch tube is connected with the front end circuit of the sensor, the source electrode of the fourth MOS switch tube and the drain electrode of the fifth MOS switch tube are connected with the first end of the second trimming capacitor, the source electrode of the fifth MOS switch tube is connected to a common mode level, and the second end of the second trimming capacitor is the output end of the second capacitor integration unit;
and the grid electrode of the fourth MOS switch tube and the grid electrode of the fifth MOS switch tube are connected with the second clock signal.
4. The temperature sensor of claim 1, wherein the capacitive feedback unit comprises: a sixth MOS switch tube, a seventh MOS switch tube, an eighth MOS switch tube and a third capacitor;
the drain electrode of the sixth MOS switch tube and the drain electrode of the seventh MOS switch tube are connected with the front end circuit of the sensor, the source electrode of the sixth MOS switch tube and the source electrode of the seventh MOS switch tube are connected with the first end of the third capacitor, the source electrode of the eighth MOS switch tube is connected to a common mode level, and the second end of the third capacitor and the drain electrode of the eighth MOS switch tube are output ends of the capacitor feedback unit;
and the grid electrode of the sixth MOS switch tube, the grid electrode of the seventh MOS switch tube and the grid electrode of the eighth MOS switch tube are connected with a third clock signal.
5. The temperature sensor of claim 1, wherein the transconductance amplification module comprises: a fourth capacitor and a transconductance amplifier;
the first end of the fourth capacitor and the reverse input end of the transconductance amplifier are connected with the signal output end of the switch capacitor module, the homodromous input end of the transconductance amplifier is connected to a common mode level, the second end of the fourth capacitor is connected with the output end of the transconductance amplifier, and the output end of the transconductance amplifier is the output end of the transconductance amplifier module.
6. The temperature sensor of claim 1, wherein the one-bit quantization module comprises a comparator and a latch;
the same-direction input end of the comparator is connected with the transconductance amplification module, the reverse input end of the comparator is connected to the common mode level, the output end of the comparator is connected with the data signal input end of the latch, the forward output end and the reverse output end of the latch are signal output ends of the CDC readout circuit, and the clock signal input end of the latch is connected with a fifth clock signal.
7. The temperature sensor of any one of claims 1-6, wherein the sensor front-end circuit comprises: a first current bias loop, a second current bias loop, a third current bias loop,
an output operational amplifier for amplifying a voltage difference between the first current bias loop and the second current bias loop;
an adder for outputting a sum of a voltage signal of the third current bias loop and a voltage signal of the output end of the operational amplifier;
the output end of the operational amplifier and the output end of the adder are the output ends of the sensor front-end circuit.
8. The temperature sensor of claim 7, wherein the first current bias loop comprises: a first current source and a first bipolar transistor;
the second current bias loop includes: a second current source and a second bipolar transistor;
the third current bias loop includes: a third current source and a third bipolar transistor;
wherein the first current source is connected between a power source and an emitter of the first bipolar transistor, the second current source is connected between a power source and an emitter of the second bipolar transistor, the third current source is connected between a power source and an emitter of the third bipolar transistor, a base of the first bipolar transistor, a collector of the first bipolar transistor, a base of the second bipolar transistor, a collector of the second bipolar transistor, a base of the third bipolar transistor, and a collector of the third bipolar transistor are grounded;
the non-inverting input end of the operational amplifier is connected with the emitter of the second bipolar transistor, the inverting input end of the operational amplifier is connected with the emitter of the first bipolar transistor, the first input end of the adder is connected with the emitter of the third bipolar transistor, and the second input end of the adder is connected with the output end of the operational amplifier.
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