CN108106747A - A kind of temperature sensor based on capacitive digital converter - Google Patents

Abstract

The invention belongs to the technical field of sensors and provides a temperature sensor based on a capacitance-to-digital converter. The temperature sensor includes: a sensor front-end circuit for generating a first temperature change signal, a second temperature change signal, and a third temperature change signal according to the amount of temperature change; The temperature change signal, the second temperature change signal and the CDC readout circuit for generating digital codes with the third temperature change signal; and being connected to the CDC readout circuit for digital processing of outputting the digital code Circuit; the present invention can effectively solve the problems that the structure of the CDC readout circuit in the existing temperature sensor is too complicated, the practicability is low, and the temperature detection error is relatively large.

Description

A Temperature Sensor Based on Capacitance-to-Digital Converter

technical field

The invention belongs to the technical field of sensors, in particular to a temperature sensor based on a capacitance-to-digital converter.

Background technique

With the rapid development of modern electronic technology, all kinds of electronic products are gradually becoming portable and miniaturized. Temperature sensors based on modern CMOS (Complementary Metal Oxide Semiconductor) technology have been obtained due to their strong compatibility. In the relevant prior art, CDC (Capacitance-to-Digital-Converter, Capacitance-to-Digital Converter) readout circuit converts the temperature change detected by the temperature sensor circuit into a recognizable number code, and then the digital code can directly obtain the temperature value of the external environment through subsequent digital processing, thereby realizing the direct measurement of the ambient temperature.

Therefore, there are at least the following problems in the prior art: the existing CDC readout circuit combines switched capacitor technology and oversampling modulation technology to read the temperature signal, and needs to process the temperature signal through a current mirror circuit, an oscillator circuit and a counting circuit The count value proportional to the temperature can be obtained, the operation of the whole temperature detection process is too cumbersome, the CDC readout circuit structure is too complicated, the circuit implementation is difficult, and the existing temperature sensor needs to calibrate the temperature signal to obtain the temperature value. Increased temperature detection error.

Contents of the invention

The invention provides a temperature sensor based on a capacitance-to-digital converter, aiming to solve the problems in the prior art that the structure of a CDC readout circuit is too complicated, difficult to implement, and the temperature sensor has a relatively large detection error.

The first aspect of the present invention provides a temperature sensor based on a capacitance-to-digital converter, including:

A sensor front-end circuit for generating a first temperature change signal, a second temperature change signal, and a third temperature change signal according to the amount of temperature change;

Connected to the front-end circuit of the sensor, a CDC readout circuit for generating a digital code according to the first temperature change signal, the second temperature change signal and the third temperature change signal; and

A digital processing circuit connected to the CDC readout circuit for outputting the digital code.

Further, the CDC readout circuit includes:

Its signal input terminal is connected to the front-end circuit of the sensor, and is used to eliminate the switched capacitor module of the offset error;

A transconductance amplification module connected to the signal output terminal of the switched capacitor module for amplifying the voltage ratio signal generated by the switched capacitor module; and

The input end is connected with the transconductance amplification module, and is used for generating a one-bit quantization module of digital code according to the voltage ratio signal.

Further, the switched capacitor module includes:

connected to the sensor front-end circuit, and used to generate a first capacitance integration unit of a first charging charge according to the first temperature change signal and a first clock signal;

connected to the sensor front-end circuit, and used to generate a second capacitance integration unit of a second charging charge according to the first temperature change signal and a second clock signal;

A capacitive feedback unit connected to the sensor front-end circuit for adjusting the ratio of the first charging charge to the second charging charge according to the second temperature change signal, the third temperature change signal and the third clock signal ;as well as

A first MOS switch tube, the drain of the first MOS switch tube is connected to the first capacitance integration unit, the second capacitance integration unit and the capacitance feedback unit, and the gate of the first MOS switch tube Connected to the fourth clock signal, the source of the first MOS switch tube is the signal output terminal of the switched capacitor module.

Further, the first capacitance integration unit includes: a second MOS switch, a third MOS switch, and a first trimming capacitor;

The drain of the second MOS switch is connected to the front-end circuit of the sensor, the source of the second MOS switch and the drain of the third MOS switch are connected to the first end of the first trimming capacitor connected, the source of the third MOS switch tube is connected to the common mode level, and the second end of the first trimming capacitor is the output end of the first capacitance integration unit;

Wherein the gate of the second MOS switch and the gate of the third MOS switch are connected to the first clock signal.

Further, the second capacitance integration unit includes: a fourth MOS switch, a fifth MOS switch, and a second trimming capacitor;

The drain of the fourth MOS switch is connected to the front-end circuit of the sensor, the source of the fourth MOS switch, the drain of the fifth MOS switch and the first end of the second trimming capacitor connected, the source of the fifth MOS switch tube is connected to the common mode level, and the second end of the second trimming capacitor is the output end of the second capacitance integration unit;

The gate of the fourth MOS switch and the gate of the fifth MOS switch are connected to the second clock signal.

Further, the capacitive feedback unit includes: a sixth MOS switch, a seventh MOS switch, an eighth MOS switch, and a third capacitor;

The drain of the sixth MOS switch and the drain of the seventh MOS switch are connected to the front-end circuit of the sensor, and the source of the sixth MOS switch and the source of the seventh MOS switch connected to the first terminal of the third capacitor, the source of the eighth MOS switch tube is connected to the common mode level, the second terminal of the third capacitor and the drain of the eighth MOS switch tube are connected to the The output end of the capacitive feedback unit;

The gate of the sixth MOS switch, the gate of the seventh MOS switch, and the gate of the eighth MOS switch are connected to the third clock signal.

Further, the transconductance amplification module includes: a fourth capacitor and a transconductance amplifier;

The first terminal of the fourth capacitor and the inverting input terminal of the transconductance amplifier are connected to the signal output terminal of the switched capacitor module, and the non-inverting input terminal of the transconductance amplifier is connected to a common mode level, so The second end of the fourth capacitor is connected to the output end of the transconductance amplifier, and the output end of the transconductance amplifier is the output end of the transconductance amplification module.

Further, the one-bit quantization module includes a comparator and a latch;

The non-inverting input of the comparator is connected to the transconductance amplification module, the inverting input of the comparator is connected to the common mode level, and the output of the comparator is connected to the data signal of the latch The input terminal is connected, the positive output terminal and the negative output terminal of the latch are the signal output terminals of the CDC readout circuit, and the clock signal input terminal of the latch is connected to the fifth clock signal.

Further, the sensor front-end circuit includes: a first current bias loop, a second current bias loop, a third current bias loop, and,

an operational amplifier for amplifying the voltage difference between the first current bias loop and the second current bias loop;

an adder for outputting the sum of the voltage signal of the third current bias loop and the voltage signal at the output terminal of the operational amplifier;

Wherein the output terminal of the operational amplifier and the output terminal of the adder are the output terminals of the front-end circuit of the sensor.

Further, the first current bias loop includes: a first current source and a first bipolar transistor;

The second current bias loop includes: a second current source and a second bipolar transistor;

The third current bias loop includes: a third current source and a third bipolar transistor;

Wherein the first current source is connected between the power supply and the emitter of the first bipolar transistor, the second current source is connected between the power supply and the emitter of the second bipolar transistor, and the first current source is connected between the power supply and the emitter of the second bipolar transistor. Three current sources are connected between the power supply and the emitter of the third bipolar transistor, the base of the first bipolar transistor, the collector of the first bipolar transistor, the the base, the collector of the second bipolar transistor, the base of the third bipolar transistor, and the collector of the third bipolar transistor are grounded;

The non-inverting input of the operational amplifier is connected to the emitter of the second bipolar transistor, the inverting input of the operational amplifier is connected to the emitter of the first bipolar transistor, and the first of the adder The input terminal is connected to the emitter of the third bipolar transistor, and the second input terminal of the adder is connected to the output terminal of the operational amplifier.

Compared with the prior art, the beneficial technical effect of the present invention is: in the above temperature sensor, the CDC readout circuit directly generates the first temperature change signal, the second temperature change signal and the third temperature change signal The digital code corresponding to the temperature change is obtained, and the digital code can be directly used as the input of the digital processing circuit, and there is no need to perform signal multiplication and conversion processing on the digital code, which improves the accuracy of temperature detection and simplifies the CDC. The structure of the readout circuit has strong practicability; thereby effectively solving the problems in the prior art that the structure of the CDC readout circuit is complicated and there is a large error in temperature change detection.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings that need to be used in the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention. For those skilled in the art, other drawings can also be obtained based on these drawings without any creative effort.

Fig. 1 is a schematic structural diagram of a temperature sensor based on a capacitance-to-digital converter provided by an embodiment of the present invention;

2 is a schematic structural diagram of a CDC readout circuit provided by an embodiment of the present invention;

Fig. 3 is a circuit structure diagram of a CDC readout circuit provided by an embodiment of the present invention;

Fig. 4 is a circuit structure diagram of a sensor front-end circuit provided by an embodiment of the present invention;

FIG. 5 is a signal waveform diagram of a clock signal provided by an embodiment of the present invention.

Detailed ways

In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

Figure 1 shows a schematic structural diagram of a temperature sensor based on a capacitance-to-digital converter provided by an embodiment of the present invention. For ease of description, only the parts related to the embodiment of the present invention are shown, and the details are as follows:

As shown in FIG. 1 , the temperature sensor 10 includes a sensor front-end circuit 101 , a CDC readout circuit 102 and a digital processing circuit 103 .

The sensor front-end circuit 101 detects the temperature change of the outside world, and the sensor front-end circuit 101 generates a first temperature change signal, a second temperature change signal, and a third temperature change signal according to the temperature change; the CDC readout circuit 102 and the sensor front-end circuit 101 connected, the CDC readout circuit 102 generates a digital code according to the first temperature change signal, the second temperature change signal and the third temperature change signal, and the digital code corresponds to the temperature change, that is, the digital code can directly reflect The temperature variation of the external environment; the digital processing circuit 103 is connected with the CDC readout circuit 102, and the digital processing circuit 103 outputs the digital code.

Specifically, the digital processing circuit 103 can realize a series of processing such as display, encoding, and optimization of the digital code, and then output the digital code, so that the user can accurately understand the amount of change in the external environment temperature in real time through the temperature sensor 10 .

Specifically, FIG. 2 shows a schematic structural diagram of the CDC readout circuit 102 provided by the embodiment of the present invention, which is described in detail as follows:

As shown in Figure 2, the CDC readout circuit 102 includes a switched capacitor module 1021, a transconductance amplification module 1022, and a one-bit quantization module 1023.

The signal input terminal of the switched capacitor module 1021 is connected to the sensor front-end circuit 101, and the switched capacitor module 1021 can eliminate the offset error, wherein the offset error refers to the MOS switch tube in the CDC readout circuit 102 being closed or disconnected due to Non-linear error charges due to clock feedthrough and charge injection.

The transconductance amplification module 1022 is connected to the signal output end of the switched capacitor module 1021. When the switched capacitor module 1021 generates a voltage ratio signal, the transconductance amplification module 1022 amplifies the power of the voltage ratio signal, so as to avoid the voltage ratio signal from being transmitted during transmission. The energy loss in; the input end of one bit quantization module 1023 is connected with transconductance amplification module 1022, and transconductance amplification module 1022 generates digital code according to this voltage ratio signal, thereby can obtain the temperature change of high precision by this digital code, reduce The detection error of the temperature sensor 10 is reduced.

Specifically, FIG. 3 shows a circuit structure diagram of the CDC readout circuit 102 provided by the embodiment of the present invention, which is described in detail as follows:

As shown in FIG. 3 , the switched capacitor module 1021 includes a first capacitance integration unit 301 , a second capacitance integration unit 302 , a capacitance feedback unit 303 and a first MOS switch Q1 .

The first capacitance integration unit 301 is connected with the sensor front-end circuit 101, and the first capacitance integration unit 301 generates the first charging charge according to the first temperature change signal V _BG and the first clock signal; the second capacitance integration unit 302 is connected with the sensor front-end circuit 101 , the second capacitance integration unit 302 generates a second charging charge according to the first temperature change signal V _BG and the second clock signal; since the phase of the first clock signal is not the same as the phase of the second clock signal, the resulting The charge amounts of the first charging charge and the second charging charge are not the same, so a corresponding non-linear error charge is formed in the CDC readout circuit 102 .

The capacitance feedback unit 303 is connected to the sensor front-end circuit 101, and the capacitance feedback unit 303 adjusts the first charging charge and the second charging charge according to the second temperature change signal V _BE1 , the third temperature change signal V _BE2 and the third clock signal; the first MOS The drain of the switching tube Q1 is connected to the first capacitance integration unit 301, the second capacitance integration unit 302, and the capacitance feedback unit 303, wherein the gate of the first MOS switching tube Q1 is connected to the fourth clock signal, and the gate of the first MOS switching tube Q1 The source is the output terminal of the switched capacitor module 1021, so that the feedback loop formed by the capacitor feedback unit 303 and the first MOS switch Q1 effectively eliminates the nonlinearity caused by the imbalance between the first charged charge and the second charged charge error charge.

Wherein the first capacitance integration unit 301 includes a second MOS switch tube Q2, a third MOS switch tube Q3, and a first trimming capacitor C _Tref ; the drain of the second MOS switch tube Q2 is connected to the sensor front-end circuit 101, and the second MOS switch tube Q2 The source of Q2 and the drain of the third MOS switch Q3 are connected to the first end of the first trimming capacitor C _Tref , the source of the third MOS switch Q3 is connected to the common mode level V _cm , and the first trimming capacitor C The second terminal of _Tref is the output terminal of the first capacitance integration unit 301 .

Wherein the gate of the second MOS switch Q2 and the gate of the third MOS switch Q3 are connected to the first clock signal; when the first clock signal is input to the gate of the second MOS switch Q2 and the gate of the third MOS switch Q3 When the gate is turned on, the second MOS switch Q2 and the third MOS switch Q3 are turned on or off according to the first clock signal, thus completing the charging and discharging process of the first trimming capacitor C _Tref in the first capacitance integration unit 301 .

Wherein the second capacitance integration unit 302 includes: a fourth MOS switch tube Q4, a fifth MOS switch tube Q5, and a second trimming capacitor C _Toff ; the drain of the fourth MOS switch tube Q4 is connected to the sensor front-end circuit 101, and the fourth MOS switch tube Q5 The source of the tube Q4 and the drain of the fifth MOS switch tube Q5 are connected to the first end of the second trimming capacitor C _Toff , the source of the fifth MOS switch Q5 is connected to the common mode level V _cm , and the second trimming capacitor The second end of C _Toff is the output end of the second capacitance integration unit 302;

The gate of the fourth MOS switch Q4 and the gate of the fifth MOS switch Q5 are connected to the second clock signal; the second clock signal can control the fourth MOS switch Q4 and the fifth MOS switch Q5 to conduct is turned on or off, so as to realize the charging and discharging process of the second trimming capacitor C _Toff in the second capacitance integration unit 302 .

The capacitive feedback unit 303 includes a sixth MOS switch Q6 , a seventh MOS switch Q7 , an eighth MOS switch Q8 and a third capacitor C _T .

The drain of the sixth MOS switch Q6 and the drain of the seventh MOS switch Q7 are connected to the sensor front-end circuit 101, and the source of the sixth MOS switch Q6 and the source of the seventh MOS switch Q7 are connected to the third capacitor C The first end of _T is connected, the source of the eighth MOS switch Q8 is connected to the common mode level V _cm , the second end of the third capacitor _CT and the drain of the eighth MOS switch Q8 are the output of the capacitance feedback unit 303 end.

The gate of the sixth MOS switch Q6, the gate of the seventh MOS switch Q7, and the gate of the eighth MOS switch Q8 are connected to the third clock signal; specifically, the sixth MOS switch can be realized through the third clock signal. The transistor Q6, the seventh MOS switch transistor Q7, and the eighth MOS switch transistor Q8 are turned on or off to balance the unbalanced error between the above-mentioned first charging charge and the second charging charge.

Transconductance amplifying module 1022 comprises the 4th electric capacity C _f and transconductance amplifier OTA; The first end of the 4th electric capacity C _f and the reverse input terminal of transconductance amplifier OTA are connected with the signal output terminal of switched capacitor module 1021, transconductance amplifier The same input terminal of OTA is connected to the common mode level V _cm , the second terminal of the fourth capacitor C _f is connected to the output terminal of the transconductance amplifier OTA, and the output terminal of the transconductance amplifier OTA is the output terminal of the transconductance amplification module 1022 .

Specifically, the transconductance amplifier OTA can convert the input differential voltage into an output current. When there is a voltage difference signal at the same input terminal and the reverse input terminal of the transconductance amplifier OTA, the transconductance amplifier OTA can pass the voltage difference signal through Convert and amplify to output the current signal to realize the conversion and output of the signal.

A quantization module 1023 includes a comparator Cmp and a latch DFF; the same input terminal of the comparator Cmp is connected to the transconductance amplification module 1022, and the inverting input terminal of the comparator Cmp is connected to the common mode level V _cm , the comparator The output end of Cmp is connected with the data signal input end D of the latch DFF, and the positive output end Q and the reverse output end Q of the latch DFF are the signal output ends of the CDC readout circuit 102, and the clock of the latch DFF The signal input terminal C is connected to the fifth clock signal; wherein the fifth clock signal is used to drive the action of the latch DFF.

It should be noted that the first clock signal, the second clock signal, the third clock signal, the fourth clock signal and the fifth clock signal are generated by a clock signal generation circuit and output to each of the above-mentioned MOS switch tubes, such as the first MOS The switching tube Q1, the second MOS switching tube Q2, etc., so as to control these MOS switching tubes to be turned on or off.

It should be noted that the capacitance of the first trimming capacitor C _Tref and the second trimming capacitor C _Toff can be adjusted. In a specific circuit application, the distance, relative position or area between the two plates of the capacitor can be changed. When the capacitance changes, the charge flowing through the two plates of the first trimming capacitor C _Tref and the charge flowing through the two plates of the second trimming capacitor C _Toff will also change, so that the CDC readout circuit 102 The operating current will also change accordingly.

Specifically, FIG. 4 shows a circuit structure diagram of the sensor front-end circuit 101 provided by the embodiment of the present invention, which is described in detail as follows:

As shown in FIG. 4 , the sensor front-end circuit 101 includes a first current bias loop 1011 , a second current bias loop 1012 , a third current bias loop 1013 , an operational amplifier OP1 and an adder Add.

The operational amplifier OP1 amplifies and outputs the voltage difference between the first current bias loop 1011 and the second current bias loop 1012; specifically, due to the The operating currents are different, so there is a voltage difference between the output voltage in the first current bias loop 1011 and the output voltage in the second current bias loop 1012, and the operational amplifier OP1 amplifies and outputs the voltage difference; the adder Add can output The sum of the voltage signal of the third current bias loop 1013 and the voltage signal of the output terminal of the operational amplifier OP1; wherein the output terminal of the operational amplifier OP1 and the output terminal of the adder Add are the output terminals of the sensor front-end circuit 101 for outputting temperature change signals.

Wherein, the first current bias loop 1011 includes: the first current source _I1 and the first bipolar transistor BJT1; the second current bias loop 1012 includes: the second current source _I2 and the second bipolar transistor BJT2; the third The current bias loop 1013 includes: a third current source _I3 and a third bipolar transistor BJT3.

Specifically, the first current source _I1 is connected between the power supply Vcc and the emitter of the first bipolar transistor BJT1, and the second current source _I2 is connected between the power supply Vcc and the emitter of the second bipolar transistor BJT2. Three current sources _I3 are connected between the power supply Vcc and the emitter of the third bipolar transistor BJT3, the base of the first bipolar transistor BJT1, the collector of the first bipolar transistor BJT1, the base of the second bipolar transistor BJT2 The pole, the collector of the second bipolar transistor BJT2, the base of the third bipolar transistor BJT3, and the collector of the third bipolar transistor BJT3 are grounded.

The noninverting input terminal of the operational amplifier OP1 is connected to the emitter of the second bipolar transistor BJT2, the inverting input terminal of the operational amplifier OP1 is connected to the emitter of the first bipolar transistor BJT1, and the first input terminal of the adder Add is connected to the third bipolar transistor BJT1. The emitter of the bipolar transistor BJT3 is connected, and the second input of the adder Add is connected with the output of the operational amplifier OP1; wherein the input signal of the first input of the adder Add is the emitter and collector of the third bipolar transistor BJT3 The voltage V _BE between the electrodes, when the output current of the first current source _I1 is different from the output current of the second current source _I2 , the emitter of the first bipolar transistor BJT1 and the second bipolar transistor BJT2 The potential differences between the emitters are not equal, and the potential difference ΔV BE between the emitters of the first bipolar transistor BJT1 and the emitters of the second bipolar transistor BJT2 is ΔV _BE in the first current bias loop 1011 as described above The voltage difference between the output voltage and the output voltage in the second current bias loop 1012, although this potential difference is small, is amplified by the operational amplifier OP1, and then outputs a corresponding temperature change signal; therefore, the temperature sensor 10 can A very small amount of temperature change is detected, which improves the accuracy and sensitivity of temperature detection.

In order to better illustrate this embodiment, a specific example is used to illustrate the working principle of the temperature sensor 10 below:

Combined with the circuit structure diagram of the sensor front-end circuit 101 shown in FIG. 4, the base-emitter voltage of each bipolar transistor, or the forward voltage of the PN junction diode has a negative temperature coefficient, that is, the third bipolar transistor BJT3 The voltage V _BE between the emitter and collector is a negative temperature coefficient voltage. If the relationship between the operating current in the first current source _I1 and the operating current in the third current source _I3 is:

I ₁ =I ₃ ;

Wherein the size relationship between the operating current in the second current source _I2 and the operating current in the first current source _I1 is:

I ₂ = ρ·I ₁ ;

Wherein ρ is a constant and preset.

From the above two formulas, it can be known that if the first bipolar transistor BJT1 and the second bipolar transistor BJT2 work at unequal current densities, the difference between the base-emitter voltages of these two bipolar transistors and the absolute The temperature is proportional, correspondingly, the potential difference ΔV _BE between the emitter of the first bipolar transistor BJT1 and the emitter of the second bipolar transistor BJT2 is proportional to the temperature; if the voltage magnification of the operational amplifier OP1 is α, the addition The output voltage V _BG of tor Add is:

V _BG =V _BE +αΔV _BE ;

By adjusting the voltage amplification factor α of the operational amplifier OP1, the output voltage V _BG of the adder Add is kept constant, that is, the output voltage V _BG of the adder Add does not change with temperature.

set up According to the above derivation process, V _BG is a voltage value that does not change with temperature, and ΔV _BE is proportional to temperature, and μ is proportional to temperature; finally, the output temperature value D _{out of} temperature sensor 10 can be accurately obtained through the formula, Wherein said formula is:

_Dout ＝A·μ+B

In the above formula, A and B are the multiplication factor of the temperature sensor 10 and the offset factor of the temperature sensor 10 respectively.

Therefore, it can be known from the above specific examples of the operation of the sensor front-end circuit 101 that the sensor front-end circuit 101 uses a circuit based on a bandgap reference voltage source, that is, a temperature-dependent voltage is obtained through a plurality of bipolar transistors and current bias devices. For the temperature change signal, the sensor front-end circuit 101 converts the external temperature change into a temperature change signal, realizing accurate temperature measurement; thereby effectively overcoming the problem that the existing technology cannot obtain high-precision temperature change signals in real time.

When the sensor front-end circuit 101 generates the first temperature change signal V _BG , the second temperature change signal V _BE1 and the third temperature change signal V _BE2 , and transmits the temperature signal to the CDC readout circuit 102, the CDC readout circuit 102 according to These temperature change signals can generate corresponding digital codes in real time. The specific steps are as follows:

If the gate of the first MOS switch Q1 is connected to the fourth clock signal as The third clock signal for controlling the turn-on or turn-off of each MOS switch in the capacitive feedback unit 303 can be subdivided into: as well as The gate of the sixth MOS switch Q6 is connected to the third clock signal The gate of the seventh MOS switch Q7 is connected to The gate of the eighth MOS switch Q8 is connected to the third clock signal where Figure 5 shows the as well as The signal waveform diagram;

Further, the second clock signal that controls the turn-on or turn-off of each MOS switch in the second capacitance integration unit 302 can be subdivided into: as well as The gate of the fourth MOS switch Q4 is connected to the second clock signal The gate of the fifth MOS switch Q5 is connected to the second clock signal and

Further, the first clock signal that controls the turn-on or turn-off of each MOS switch in the first capacitance integration unit 301 can be subdivided into: as well as The gate of the second MOS switch Q2 is connected to the first clock signal The third MOS switch tube Q3 is connected to the first clock signal and:

In the above formula, Y is the output signal of the positive output terminal Q of the latch DFF, is the inverting output of the latch DFF The output signal, where Y Indicates the signal Y and the signal A logical AND operation between , and similarly, Indicates the signal with signal The logical "AND" operation between the above formulas, the "+" in the above formula represents the logical OR operation between the signals; it should be noted that the clock signal input terminal C of the latch DFF is connected to the fifth clock signal in Since the positive output Q of the latch DFF and the negative output is the signal output terminal of the CDC readout circuit 102, then Y and As the output signal of the CDC readout circuit 102, the output signal of the latch DFF is used as the control signal of the first MOS switch tube Q1 and the third MOS switch tube Q3 to form a closed-loop feedback control loop, which improves the CDC readout circuit. 102 stability.

Since the drain of the second MOS switch Q2 is connected to the first temperature change signal V _BG , the drain of the fourth MOS switch Q4 is connected to the first temperature change signal V _BG , and the drain of the sixth MOS switch Q6 is connected to the second temperature Change signal V _BE1 , the drain of the seventh MOS switch Q7 is connected to the third temperature change signal V _BE2 , where V _BE1 is the voltage between the emitter and collector of the first bipolar transistor BJT1 in the sensor front-end circuit 101, V _BE2 is the voltage between the emitter and collector of the second bipolar transistor BJT2 in the sensor front-end circuit 101, then the voltage difference ΔV _BE between V _BE1 and V _BE2 =V _BE2 −V _BE1 , the voltage difference ΔV _BE is It is used to charge the third capacitor C _T. During this process, the fourth capacitor C _f acts as a feedback and integral capacitor, so that the charge flowing to the fourth capacitor C _f from the first trimming capacitor C _Tref and the second trimming capacitor C _Toff tends to 0; if this process is completed within N clock signal cycles, in the absence of clock feedthrough and charge injection, the charge conservation theory can be obtained:

NC _T (V _BE1 -V _BE2 )-NC _Toff V _BG -nC _Tref V _BG ＝0

In the above formula, n is the number of the output signal Y of the positive output terminal Q of the latch DFF that is at a high level within N clock signal cycles, and Respectively multiplication factor and offset factor, D _out is the output temperature value of temperature sensor 10, and its unit is: Celsius; It can be seen from the above formula that by adjusting and Vary the magnitude of the multiplication factor and offset factor.

If the CDC readout circuit 102 has clock feedthrough and charge injection conditions, the above formula for charge conservation will become:

NC _T (V _BE1 -V _BE2 )-NC _Toff V _BG -nC _Tref V _BG +NQ _Err,cf +NQ _Err,cj ＝0

In the above formula, NQ _Err,cf and NQ _Err,cj are the error charges caused by clock feedthrough and charge injection, respectively.

At this moment, the output temperature value D _out of the temperature sensor 10 is:

In the above formula, Indicates the offset error due to clock feedthrough and charge injection. When the temperature sensor 10 is detecting the external temperature, since NQ _Err,cf and NQ _Err,cj are unchanged, the offset error caused by clock feedthrough and charge injection is a fixed value, and by properly adjusting The ratio of the offset error can be canceled out.

In combination with the above application examples, in the temperature sensor provided by the embodiment of the present invention, the sensor front-end circuit accurately converts the temperature change into a temperature change signal, and the CDC readout circuit generates a digital code according to the temperature change signal, and the digital code can be It is directly used as the input of the digital processing circuit without other multiplication and transformation operations, which improves the temperature detection accuracy of the temperature detector; at the same time, the switched capacitor module in the CDC readout circuit can directly eliminate the nonlinear offset error in the circuit, No need for other calibration techniques, by adjusting the capacitance values of the first trimmer capacitor and the second trimmer capacitor, the error charge imbalance phenomenon that occurs when the MOS switch is turned on or off can be avoided, and the circuit structure of the CDC readout circuit is simplified. The utility model has stronger practicability; thereby effectively overcoming the disadvantages in the prior art that the temperature sensor has low precision for temperature detection, the structure of the CDC readout circuit is too complicated and the practicability is low.

It should be noted that, in this article, relational terms such as first and second are only used to distinguish one entity from another, and do not necessarily require or imply any such actual relationship between these entities. relationship or sequence. Also the terms "comprises", "comprising" or any other variation thereof are intended to cover a non-exclusive inclusion such that elements inherent in a product or structure comprising a series of elements are included. Without further limitations, an element defined by the phrase "comprising..." or "comprising..." does not exclude the presence of additional elements in the process, method, article or terminal device comprising said element. In addition, in this article, "greater than", "less than", "exceeding" and so on are understood as not including the original number; "above", "below", "within" and so on are understood as including the original number.

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present invention should be included in the protection of the present invention. within range.

Claims (10)

1. a kind of temperature sensor based on capacitive digital converter, which is characterized in that including：

Believe for generating the first temperature change signal, second temperature variable signal and the 3rd temperature change according to temperature variation Number sensor front end circuit；

It is connected with the sensor front end circuit, for according to first temperature change signal, second temperature variation letter Number with the 3rd temperature change signal generation digital code CDC reading circuits；And

It is connected with the CDC reading circuits, for the digital processing circuit exported to the digital code.

2. temperature sensor according to claim 1, which is characterized in that the CDC reading circuits include：

Its signal input part is connected with the sensor front end circuit, for eliminating the switching capacity module of offset error；

It is connected with the signal output part of the switching capacity module, for the voltage ratio letter generated to the switching capacity module Number mutual conductance amplification module being amplified；And

Input terminal is connected with mutual conductance amplification module, for generating a quantization mould of digital code according to the voltage Ratio signal Block.

3. temperature sensor according to claim 1, which is characterized in that the switching capacity module includes：

It is connected with the sensor front end circuit, for according to first temperature change signal and the generation of the first clock signal First capacitance integral unit of the first charging charge；

It is connected with the sensor front end circuit, for according to first temperature change signal and second clock signal generation Second capacitance integral unit of the second charging charge；

It is connected with the sensor front end circuit, for according to the second temperature variable signal, the 3rd temperature change letter Number and the 3rd clock signal adjust the capacitive feedback unit of first charging charge and the second charging charge ratio；With And

First MOS switch pipe, the drain electrode of first MOS switch pipe and the first capacitance integral unit, second capacitance Integral unit and capacitive feedback unit connection, the grid of first MOS switch pipe connect the 4th clock signal, and described the The source electrode of one MOS switch pipe is the switching capacity module by signal output terminal.

4. temperature sensor according to claim 3, which is characterized in that the first capacitance integral unit includes：Second MOS switch pipe, the 3rd MOS switch pipe and the first trimmer；

The drain electrode of second MOS switch pipe is connected with the sensor front end circuit, the source electrode of second MOS switch pipe with And the drain electrode of the 3rd MOS switch pipe is connected with the first end of first trimmer, the source of the 3rd MOS switch pipe Pole is connected to common mode electrical level, and the second end of first trimmer is the output terminal of the first capacitance integral unit；

The grid of wherein described second MOS switch pipe and the grid of the 3rd MOS switch pipe connect first clock signal.

5. temperature sensor according to claim 3, which is characterized in that the second capacitance integral unit includes：4th MOS switch pipe, the 5th MOS switch pipe and the second trimmer；

The drain electrode of 4th MOS switch pipe is connected with the sensor front end circuit, the source electrode of the 4th MOS switch pipe, The drain electrode of 5th MOS switch pipe is connected with the first end of second trimmer, the source electrode of the 5th MOS switch pipe Common mode electrical level is connected to, the second end of second trimmer is the output terminal of the second capacitance integral unit；

The grid of 4th MOS switch pipe and the grid of the 5th MOS switch pipe connect the second clock signal.

6. temperature sensor according to claim 3, which is characterized in that the capacitive feedback unit includes：6th MOS is opened Guan Guan, the 7th MOS switch pipe, the 8th MOS switch pipe and the 3rd capacitance；

The drain electrode of 6th MOS switch pipe and the drain electrode of the 7th MOS switch pipe connect with the sensor front end circuit It connects, the source electrode of the 6th MOS switch pipe and the source electrode of the 7th MOS switch pipe and the first end of the 3rd capacitance connect It connects, the source electrode of the 8th MOS switch pipe is connected to common mode electrical level, the second end of the 3rd capacitance and the 8th MOS The drain electrode of switching tube is the output terminal of the capacitive feedback unit；

Grid, the grid of the 7th MOS switch pipe and the grid of the 8th MOS switch pipe of 6th MOS switch pipe Pole connects the 3rd clock signal.

7. temperature sensor according to claim 2, which is characterized in that the mutual conductance amplification module includes：4th capacitance And trsanscondutance amplifier；

The first end of 4th capacitance and the reverse input end of the trsanscondutance amplifier and the letter of the switching capacity module The connection of number output terminal, the noninverting input of the trsanscondutance amplifier are connected to common mode electrical level, the second end of the 4th capacitance with The output terminal connection of the trsanscondutance amplifier, the output terminal of the trsanscondutance amplifier are the output terminal of the mutual conductance amplification module.

8. temperature sensor according to claim 2, which is characterized in that a quantization modules include comparator and Latch；

The noninverting input of the comparator is connected with the mutual conductance amplification module, and the reverse input end of the comparator is connected to Common mode electrical level, the output terminal of the comparator are connected with the data signal input of the latch, the forward direction of the latch Output terminal and the signal output part that inverse output terminal is the CDC reading circuits, the clock signal input terminal of the latch connect 5th clock signal.

9. according to claim 1-8 any one of them temperature sensors, which is characterized in that the sensor front end circuit bag It includes：First current offset circuit, the second current offset circuit, the 3rd current offset circuit and,

For being amplified output to the voltage difference between the first current offset circuit and the second current offset circuit Operational amplifier；

For export the voltage signal of the voltage signal in the 3rd current offset circuit and the operational amplifier output terminal it The adder of sum；

Wherein described operational amplifier output terminal and the output that the output terminal of the adder is the sensor front end circuit End.

10. temperature sensor according to claim 9, which is characterized in that the first current offset circuit includes：First Current source and the first bipolar transistor；

The second current offset circuit includes：Second current source and the second bipolar transistor；

The 3rd current offset circuit includes：3rd current source and the 3rd bipolar transistor；

Wherein described first current source is connected between the emitter of power supply and first bipolar transistor, second electric current Source is connected between the emitter of power supply and second bipolar transistor, and the 3rd current source is connected to power supply and described the Between the emitter of three bipolar transistors, the base stage of first bipolar transistor, first bipolar transistor collector, The base stage of second bipolar transistor, the collector of second bipolar transistor, the base stage of the 3rd bipolar transistor And the grounded collector of the 3rd bipolar transistor；

The in-phase input end of the operational amplifier is connected with the emitter of second bipolar transistor, the operational amplifier Reverse input end be connected with the emitter of first bipolar transistor, the first input end of the adder and the described 3rd The emitter connection of bipolar transistor, the second input terminal of the adder are connected with the output terminal of the operational amplifier.