CN108052462B - OLED substrate identification system and method - Google Patents
OLED substrate identification system and method Download PDFInfo
- Publication number
- CN108052462B CN108052462B CN201711384209.2A CN201711384209A CN108052462B CN 108052462 B CN108052462 B CN 108052462B CN 201711384209 A CN201711384209 A CN 201711384209A CN 108052462 B CN108052462 B CN 108052462B
- Authority
- CN
- China
- Prior art keywords
- substrate
- information
- link
- configuration
- host controller
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/102—Program control for peripheral devices where the programme performs an interfacing function, e.g. device driver
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
The invention discloses an OLED substrate recognition system, which comprises: the system comprises a host controller, a serial data bus and at least one substrate, wherein the host controller, the serial data bus and the at least one substrate form a substrate link, the host controller reads substrate link information by using the serial data bus, reads substrate configuration information of the at least one substrate on the substrate link through the serial data bus according to the substrate link information, compares the substrate configuration information of each substrate with substrate configuration information preset in the host controller, and outputs a result. The embodiment of the invention provides an OLED substrate identification system and method, which can realize online identification of a link substrate for driving an OLED panel, avoid invalid test caused by mismatching of the substrate and a test program in the test process of the OLED panel and damage of the substrate or the panel to be tested caused by error test, and further improve the efficiency of panel test.
Description
Technical Field
the invention relates to the technical field of display, in particular to an OLED substrate identification system and method.
Background
In the current Organic Light-Emitting Diode (OLED) panel detection, in order to meet the requirements of generalization and modularization, a picture and time sequence generating part is usually designed as a universal host, a high-density connector is reserved as an external interface, different host programs are used according to the test requirements of different types, interface types, time sequences, electrical parameters and the like included in the OLED panel to be tested, a corresponding type ROM substrate is replaced and used to generate corresponding driving signals, and the driving signals are connected to the OLED panel to be tested through a rear-stage expansion substrate, a switching substrate and the like to perform panel test.
With the increase of the types of the OLED panels, the types of ROM substrates, expansion substrates and the like used in the current test places are more and more, and the corresponding relation between a program and the substrates is complex; the input and output connectors of the similar type of substrates have the same shape, and the internal circuits are different; the substrate model names are not very different, and sometimes only one or two characters are different.
in a detection site, when the type of the detected OLED panel is frequently switched, sometimes substrate or program misuse occurs accidentally due to various factors, so that a host program is not matched with the type of an external substrate, the main program outputs a substrate operation mode, the actually connected substrate is another substrate, an output result is unexpected, panel detection is abnormal, and sometimes even the substrate and the panel to be detected are damaged.
disclosure of Invention
in order to solve at least one of the above problems, a first aspect of the present invention provides an OLED substrate recognition system, including:
a host controller, a serial data bus and at least one substrate, the host controller, serial data bus and the at least one substrate forming a substrate link, wherein
and the host controller reads the substrate link information by using the serial data bus, reads the substrate configuration information of the at least one substrate on the substrate link through the serial data bus according to the substrate link information, compares the substrate configuration information of each substrate with the substrate configuration information preset in the host controller, and outputs a result.
further, the substrate link information includes the link number on the substrate link and the substrate model of each node on the substrate link.
further, the substrate configuration information includes configuration bit information of the substrate, which is used to identify a hardware state of the substrate, and convert a parallel identifier formed for a hardware circuit of the substrate into serial data through a serial-to-parallel conversion unit.
Further, the configuration bit information is identified by 8 bits, and the effective range is [0x01,0xFE ].
Further, the substrate configuration information further includes parameter information of the substrate, which is used to identify a software state of the substrate and is serial data stored in the substrate memory.
further, the parameter information is identified by a plurality of bytes, and if the plurality of bytes are all 0x00 or 0xFF, the parameter information is invalid.
The second aspect of the present invention provides an OLED substrate recognition method using the substrate recognition system according to any one of claims 1 to 6, comprising:
s101: the host controller reading substrate link information from the substrate link using the serial data bus;
S103: the host controller reads the substrate configuration information of the at least one substrate on the substrate link through the serial data bus according to the substrate link information, compares the substrate configuration information of each substrate with the substrate configuration information preset in the host controller, terminates identification and outputs error information if the substrate configuration information of each substrate is inconsistent with the substrate configuration information preset in the host controller, and jumps to S105 if the substrate configuration information of each substrate is inconsistent with the substrate configuration information preset in the host controller;
S105: and the at least one substrate configuration information on the substrate link is correct, and the identification is finished.
Further, the substrate link information includes the link number on the substrate link and the substrate model of each node on the substrate link.
Further, the substrate configuration information includes configuration bit information and parameter information of the substrate; the configuration bit information identifies a hardware state of the substrate; the parameter information is used for identifying the software state of the substrate; the S103 specifically includes:
s201: reading configuration bit information of the substrate in sequence according to the link levels in the substrate link information;
s203: judging whether the configuration bit information of the substrate is valid or not, if so, skipping to S205, otherwise, outputting error information, and terminating the identification;
s205: reading the parameter information of the substrate in sequence according to the link levels in the substrate link information;
S207: judging whether the parameter information of the substrate is valid, if so, skipping to S209, otherwise, outputting error information, and terminating the identification;
S209: judging whether the configuration bit information and the parameter information of the substrate are consistent with the substrate configuration information preset in the host controller or not, if so, jumping to S211, otherwise, outputting error information, and terminating the identification;
S211: and judging whether all the substrates are identified or not according to the link levels in the substrate link information, if so, skipping to S105, otherwise, skipping to S201 to continue to identify the next-level substrate.
further, after the substrates of the link level on the substrate link are all correctly identified, between S211 and S105, the method further includes:
S301: and identifying the next-stage substrate of the link stage, reading the configuration bit information of the substrate, judging whether a redundant substrate exists, outputting error information if the returned data falls within the effective range, terminating the identification, and otherwise, skipping to S105.
The invention has the following beneficial effects:
in the OLED substrate identification system, the host controller reads the substrate configuration information of at least one substrate on the substrate link by using the serial data bus and compares the substrate configuration information with the substrate configuration information preset in the host controller.
Drawings
The following describes embodiments of the present invention in further detail with reference to the accompanying drawings.
FIG. 1 shows a schematic structural diagram of an OLED substrate recognition system according to one embodiment of the present invention;
FIG. 2 shows a flow chart of an OLED substrate identification method of one embodiment of the present invention;
FIG. 3 shows a flow chart of an OLED substrate identification method according to another embodiment of the present invention;
Fig. 4 shows a flow chart of an OLED substrate identification method according to another embodiment of the present invention.
Detailed Description
In order to more clearly illustrate the invention, the invention is further described below with reference to preferred embodiments and the accompanying drawings. Similar parts in the figures are denoted by the same reference numerals. It is to be understood by persons skilled in the art that the following detailed description is illustrative and not restrictive, and is not to be taken as limiting the scope of the invention.
As shown in fig. 1, an embodiment of the present invention provides an OLED substrate recognition system, including: the system comprises a host controller, a serial data bus and at least one substrate, wherein the host controller, the serial data bus and the at least one substrate form a substrate link, the host controller reads substrate link information by using the serial data bus, reads substrate configuration information of the at least one substrate on the substrate link through the serial data bus according to the substrate link information, compares the substrate configuration information of each substrate with substrate configuration information preset in the host controller, and outputs a result.
Further, the substrate link information includes the link number on the substrate link and the substrate model of each node on the substrate link.
And the host controller reads the substrate link information by using the serial data bus, and reads out the circuit technology on the substrate link, namely the number of the substrates to be tested and the substrate model of each node on the substrate link.
And the host controller starts to identify each substrate according to the number of the substrates to be detected on the substrate link.
Further, the substrate configuration information includes configuration bit information of the substrate, which is used to identify a hardware state of the substrate, and convert a parallel identifier formed for a hardware circuit of the substrate into serial data through a serial-to-parallel conversion unit.
as shown in fig. 1, the configuration bit information is implemented by a hardware circuit. Each configuration bit is arranged and combined to correspond to a substrate model, such as a relay substrate, a relay substrate or a contact substrate. The model of the substrate can adopt a resistor network, and each configuration bit is pulled down or pulled up to be in different states of '0' or '1'. The configuration bit information is parallel hardware configuration bits, the parallel configuration bits are arranged in a network mode through a serial-parallel conversion chip and are converted into serial data, and the host controller can read the hardware identification through a serial data line. The serial-parallel conversion chip circuit is small in size, high in integration level and low in price, and can form parallel configuration bit information in one-to-one correspondence with the substrate models according to increase of the number of the substrate models.
The number of parallel configuration bits provided by this embodiment is 8, and the situation that all configuration bits are low (0x00) or all configuration bits are high (0xFF) is prohibited, so that 254 substrate models can be identified, the effective range is [0x01,0xFE ], and the substrate type distinguishing requirements in most cases can be met. If the read "hard flag" is 0x00 or 0xFF, the substrate is considered to be not connected to the serial data bus. It should be noted that the number of configuration bits in this embodiment can be flexibly increased or decreased according to the number of the types of the substrates, and those skilled in the art should understand that the description is omitted here.
As shown in fig. 1, the substrate configuration information further includes parameter information of the substrate, which is used to identify a software state of the substrate, and the parameter information is serial data stored in the substrate memory and includes a name, a test number, and function information of the substrate.
In this embodiment, the parameter information is serial data, each substrate is an independent slave device, and the host controller can read the identification information of the plurality of substrates with only a few pins. The parameter information comprises a substrate name, a substrate test number, and relevant parameters (initialization code, correction parameter, etc.) of a functional chip on the substrate, and is burned in the substrate memory when the substrate package debugging is completed.
In this embodiment, the parameter information is identified by using a plurality of bytes, and if the plurality of bytes are all 0x00 or 0xFF, the parameter information is invalid. The default "blank" data of the chip, which may be 0x00 or 0xFF, indicates that the memory chip does not store valid information, and the chip is not usable. Therefore, if all the read parameter information is 0x00 or 0xFF, it indicates that the data in the memory cell of the substrate has not been verified, and the parameter information is invalid
in this embodiment, the host controller reads the configuration bit information and the parameter information of each substrate, compares the configuration bit information and the parameter information with the predetermined substrate information in the host controller, and only if the configuration bit information and the parameter information are consistent, the current substrate to be tested is considered to be correctly identified, otherwise, the substrate is considered to be wrong, and the host cuts off signal output to give abnormal prompt information that the substrate link is not matched.
As shown in fig. 2, another embodiment of the present invention provides an OLED substrate recognition method, using the above OLED substrate recognition system, including:
S101: the host controller reading substrate link information from the substrate link using the serial data bus;
S103: the host controller reads the substrate configuration information of the at least one substrate on the substrate link through the serial data bus according to the substrate link information, compares the substrate configuration information of each substrate with the substrate configuration information preset in the host controller, terminates identification and outputs error information if the substrate configuration information of each substrate is inconsistent with the substrate configuration information preset in the host controller, and jumps to S105 if the substrate configuration information of each substrate is inconsistent with the substrate configuration information preset in the host controller;
S105: and the at least one substrate configuration information on the substrate link is correct, and the identification is finished.
Further, as shown in fig. 3, the substrate link information includes a link number on the substrate link and a substrate model of each node on the substrate link, and the substrate configuration information includes configuration bit information and parameter information of the substrate; the configuration bit information identifies a hardware state of the substrate; the parameter information is used for identifying the software state of the substrate and comprises the name, the test number and the function information of the substrate; the S103 specifically includes:
s201: reading configuration bit information of the substrate in sequence according to the link levels in the substrate link information;
S203: judging whether the configuration bit information of the substrate is valid or not, if so, skipping to S205, otherwise, outputting error information, and terminating the identification;
s205: reading the parameter information of the substrate in sequence according to the link levels in the substrate link information;
S207: judging whether the parameter information of the substrate is effective or not, if so, jumping to S209, otherwise, outputting error information, and terminating the identification;
S209: judging whether the configuration bit information and the parameter information of the substrate are consistent with the substrate configuration information preset in the host controller or not, if so, jumping to S211, otherwise, outputting error information, and terminating the identification;
S211: and judging whether all the substrates are identified or not according to the link levels in the substrate link information, if so, skipping to S105, otherwise, skipping to S201 to continue to identify the next-level substrate.
further, as shown in fig. 4, after the substrates of the link levels on the substrate link are all correctly identified, between S211 and S105, the method further includes:
S301: and identifying the next-stage substrate of the link stage, reading the configuration bit information of the substrate, judging whether a redundant substrate exists, outputting error information if the returned data falls within the effective range, terminating the identification, and otherwise, skipping to S105.
In a specific example, as shown in fig. 4, the host controller uses the serial data bus to read substrate link information from the substrate link, which respectively includes the link number and the substrate model of each node on the substrate link, that is, the number of substrates and the substrate model connected on the current substrate link.
The host controller sequentially identifies the substrates to be detected according to the information, firstly, the host controller reads the configuration bit information of the No. 1 substrate through the serial data bus, if the configuration bit information is 0x00 or 0xFF, the No. 1 substrate is considered to have an error, error information is output, and the identification is terminated. And if the configuration bit information is in the effective range, the host controller reads the parameter information of the No. 1 substrate through the serial data bus, if the parameter information is all 0x00 or 0xFF, the No. 1 substrate is considered to have errors, error information is output, and the identification is terminated. If the parameter information is in the effective range, judging whether the configuration bit information and the parameter information of the No. 1 substrate are matched or not and are consistent with the substrate information preset in the host controller, if so, judging that the No. 1 substrate is correctly identified, and the No. 1 substrate is in a normal state.
and judging whether substrates are still to be identified on the substrate links according to the link levels read by the host controller, and if so, executing the steps circularly until all the substrates with the link levels are identified. The specific identification process is the same as that described above, and is not further described herein
After the last stage of substrate is identified, in order to prevent redundant substrate connection on the substrate link, an attempt is continuously made to identify the next stage of substrate of the link stage (assuming that the current link stage is M), that is, through the serial bus, the host controller reads the configuration bit information of the M +1 th stage of substrate on the substrate link:
if the returned data is in the effective range, the redundant substrate is still connected to the substrate link in error, error information is output, and the identification is terminated. If the returned data is 0x00 or 0xFF, the subsequent stage is not connected with the redundant substrate at this time, so far, all substrate identification of the substrate link is completed, and the identification is finished.
In the above embodiment of the present invention, the host controller reads the configuration bit information and the parameter information of each substrate through the serial data bus, and compares the configuration bit information and the parameter information with the substrate information preset by the host controller, so as to automatically identify whether each functional substrate used by each node in the substrate link meets the test requirement, thereby improving the test efficiency, avoiding invalid tests, and avoiding accidental substrate damage or panel damage to be tested.
it should be understood that the above-mentioned embodiments of the present invention are only examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention, and it will be obvious to those skilled in the art that other variations or modifications may be made on the basis of the above description, and all embodiments may not be exhaustive, and all obvious variations or modifications may be included within the scope of the present invention.
Claims (8)
1. An OLED substrate recognition system, comprising: a host controller, a serial data bus and at least one substrate, the host controller, serial data bus and the at least one substrate forming a substrate link, wherein
The host controller reads the substrate link information by using the serial data bus, reads the substrate configuration information of the at least one substrate on the substrate link through the serial data bus according to the substrate link information, compares the substrate configuration information of each substrate with the substrate configuration information preset in the host controller, and outputs a result;
The substrate link information comprises the link grade on the substrate link and the substrate model of each node on the substrate link;
The substrate configuration information includes configuration bit information of the substrate.
2. the OLED substrate recognition system of claim 1, wherein the configuration bit information is used to identify a hardware state of the substrate, a parallel flag formed for a hardware circuit of the substrate, the parallel flag converted into serial data by a serial-to-parallel conversion unit.
3. The OLED substrate recognition system of claim 2, wherein the configuration bit information is identified using 8 bits, with an effective range of [0x01,0xFE ].
4. The OLED substrate recognition system of claim 2, wherein the substrate configuration information further includes parameter information of the substrate for identifying a software state of the substrate as serial data stored in the substrate memory.
5. the OLED substrate recognition system of claim 4, wherein the parameter information is identified using a plurality of bytes, and the parameter information is invalid if the plurality of bytes are all 0x00 or 0 xFF.
6. An OLED substrate identification method, characterized in that, the OLED substrate identification system of any one of claims 1-5 is used, comprising:
S101: the host controller reads substrate link information from the substrate link using the serial data bus, the substrate link information including the number of link levels on the substrate link and the substrate model of each node on the substrate link;
S103: the host controller reads the substrate configuration information of the at least one substrate on the substrate link through the serial data bus according to the substrate link information, compares the substrate configuration information of each substrate with the substrate configuration information preset in the host controller, terminates identification and outputs error information if the substrate configuration information of each substrate is inconsistent with the substrate configuration information preset in the host controller, and jumps to S105 if the substrate configuration information of each substrate is inconsistent with the substrate configuration information preset in the host controller, wherein the substrate configuration information comprises configuration bit information and parameter information of each substrate;
S105: and the substrate configuration information of each substrate on the substrate link is correct, and the identification is finished.
7. the OLED substrate recognition method of claim 6, wherein the configuration bit information identifies a hardware state of the substrate; the parameter information is used for identifying the software state of the substrate; the S103 specifically includes:
S201: reading configuration bit information of the substrate in sequence according to the link levels in the substrate link information;
S203: judging whether the configuration bit information of the substrate is valid or not, if so, skipping to S205, otherwise, outputting error information, and terminating the identification;
s205: reading the parameter information of the substrate in sequence according to the link levels in the substrate link information;
s207: judging whether the parameter information of the substrate is valid, if so, skipping to S209, otherwise, outputting error information, and terminating the identification;
S209: judging whether the configuration bit information and the parameter information of the substrate are consistent with the substrate configuration information preset in the host controller or not, if so, jumping to S211, otherwise, outputting error information, and terminating the identification;
s211: and judging whether all the substrates are identified or not according to the link levels in the substrate link information, if so, skipping to S105, otherwise, skipping to S201 to continue to identify the next-level substrate.
8. The method according to claim 7, wherein after the substrates of the link number on the substrate link are correctly identified, between S211 and S105, the method further comprises:
s301: and identifying the next-stage substrate of the link stage, reading the configuration bit information of the substrate, judging whether a redundant substrate exists, outputting error information if the returned data falls within the effective range, terminating the identification, and otherwise, skipping to S105.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201711384209.2A CN108052462B (en) | 2017-12-20 | 2017-12-20 | OLED substrate identification system and method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201711384209.2A CN108052462B (en) | 2017-12-20 | 2017-12-20 | OLED substrate identification system and method |
Publications (2)
Publication Number | Publication Date |
---|---|
CN108052462A CN108052462A (en) | 2018-05-18 |
CN108052462B true CN108052462B (en) | 2019-12-10 |
Family
ID=62130643
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201711384209.2A Active CN108052462B (en) | 2017-12-20 | 2017-12-20 | OLED substrate identification system and method |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN108052462B (en) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1877666A (en) * | 2005-06-10 | 2006-12-13 | 三星电子株式会社 | Display substrate and device and method for testing display panel with the display substrate |
CN101251565A (en) * | 2008-04-08 | 2008-08-27 | 友达光电股份有限公司 | Panel Test Circuit Structure |
CN101609635A (en) * | 2009-07-24 | 2009-12-23 | 友达光电(苏州)有限公司 | Liquid crystal panel test module and liquid crystal panel failure mode analysis method |
CN102099847A (en) * | 2008-07-23 | 2011-06-15 | 夏普株式会社 | Active matrix substrate, display device, method for inspecting the active matrix substrate, and method for inspecting the display device |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102270083B1 (en) * | 2014-10-13 | 2021-06-29 | 삼성디스플레이 주식회사 | Organic Light Emitting Display Panel and Test Method |
-
2017
- 2017-12-20 CN CN201711384209.2A patent/CN108052462B/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1877666A (en) * | 2005-06-10 | 2006-12-13 | 三星电子株式会社 | Display substrate and device and method for testing display panel with the display substrate |
CN101251565A (en) * | 2008-04-08 | 2008-08-27 | 友达光电股份有限公司 | Panel Test Circuit Structure |
CN102099847A (en) * | 2008-07-23 | 2011-06-15 | 夏普株式会社 | Active matrix substrate, display device, method for inspecting the active matrix substrate, and method for inspecting the display device |
CN101609635A (en) * | 2009-07-24 | 2009-12-23 | 友达光电(苏州)有限公司 | Liquid crystal panel test module and liquid crystal panel failure mode analysis method |
Also Published As
Publication number | Publication date |
---|---|
CN108052462A (en) | 2018-05-18 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR101924769B1 (en) | Circuit and electronic module for automatic addressing | |
CN103399254B (en) | The detection method that board is in place and device | |
CN107066746B (en) | Method for realizing PCA9555 function through CPLD based on I2C interface | |
CN101499323B (en) | Memory module | |
CN102568580A (en) | Burner with chip test function and burning method thereof | |
CN102882073A (en) | Connecting piece and connection status detection method for same | |
CN111833797A (en) | Time sequence control plate, driving device and display device | |
CN102902613B (en) | Computer system and diagnosis method thereof | |
CN110825204A (en) | Mainboard of electronic equipment and power supply information management method | |
US20110289250A1 (en) | Card adapter | |
CN108052462B (en) | OLED substrate identification system and method | |
JPWO2006019082A1 (en) | Test apparatus, configuration method, and device interface | |
CN115378419A (en) | Control circuit for fuse trimming | |
US20120054391A1 (en) | Apparatus and method for testing smnp cards | |
JP4294053B2 (en) | Test equipment | |
CN116346117B (en) | IIC port expansion circuit, transmission method, transmission system, computer equipment and medium | |
GB2585427A (en) | Printed circuit board with at least one multipole pin header, computer system and operating method | |
CN101131661A (en) | Test apparatus | |
CN100523841C (en) | Connection fault inspection between plates and socket structure forsingle plate and rear plate | |
US20110320656A1 (en) | Techniques for obtaining a serial number for a storage device | |
CN114064373A (en) | Test system, test method, test device and test equipment for USB small board | |
CN119091952B (en) | A memory testing system and a memory testing method | |
CN101770814B (en) | Flash storage device, testing method and testing system thereof | |
CN103927148B (en) | Execution device, stacking method thereof and stacking system | |
CN104704687A (en) | Control system with multiple terminal boards and method for connecting multiple terminal boards |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
CB02 | Change of applicant information | ||
CB02 | Change of applicant information |
Address after: 215000 Qingqiu Lane 8, Suzhou Industrial Park, Suzhou City, Jiangsu Province Applicant after: Suzhou Huaxing source Polytron Technologies Inc Address before: 215000 East Fang Industrial Park Building, No. 1 Huayun Road, Suzhou Park, Jiangsu Province Applicant before: Suzhou HYC Electronic Technology Co., Ltd. |
|
GR01 | Patent grant | ||
GR01 | Patent grant |