CN108010490B - Driving circuit - Google Patents
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- CN108010490B CN108010490B CN201711247294.8A CN201711247294A CN108010490B CN 108010490 B CN108010490 B CN 108010490B CN 201711247294 A CN201711247294 A CN 201711247294A CN 108010490 B CN108010490 B CN 108010490B
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- 238000010586 diagram Methods 0.000 description 12
- 229920001621 AMOLED Polymers 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 230000005669 field effect Effects 0.000 description 6
- 230000006698 induction Effects 0.000 description 6
- 230000008018 melting Effects 0.000 description 6
- 238000002844 melting Methods 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000010703 silicon Substances 0.000 description 6
- 230000003068 static effect Effects 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 4
- 239000003086 colorant Substances 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 150000002894 organic compounds Chemical class 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
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Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3266—Details of drivers for scan electrodes
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Electronic Switches (AREA)
Abstract
The embodiment of the invention discloses a drive circuit, which comprises: the first driver and the second driver are used for driving the switching power supply to be switched on or switched off in the driving circuit; a third drive for replacing the failed first drive; the second driver is connected with the first driver; first and second clock signal lines for providing clock signals to the first and second drivers; and the first repair line and the second repair line are used for connecting the third driver with the failure port of the first driver when the first driver fails. According to the embodiment of the invention, the failed driver in the driving circuit can be repaired by adding the spare driver.
Description
Technical Field
The invention relates to the technical field of electronic circuits, in particular to a driving circuit.
Background
An Active-matrix Organic Light Emitting Diode (AMOLED) is one of Organic Light Emitting Diode (OLED) technologies, and is a self-luminous display that uses multiple layers of Organic compounds to realize three colors of red, green, and blue. The practical AMOLED technology is fast, so that the AMOLED technology becomes the mainstream OLED technology at present, and compared with the common Liquid Crystal Display (LCD), the AMOLED has the characteristics of thinness, lightness, no need of a backlight source, no view angle problem, high definition, high brightness, quick response, low energy consumption, wide use temperature range, strong shock resistance, capability of realizing soft Display and the like.
And the current screens of terminal devices are developing toward being foldable or bendable, wherein the AMOLED screens have strong competitiveness in new generation displays due to their foldable property. Specifically, the foldability requires the stability of the circuit units in the screen to be good, because when the screen is bent, components such as a gate driver On Array circuit (GOA) of the driving circuit in the screen may fail, thereby causing the screen to fail to display normally.
Disclosure of Invention
Embodiments of the present invention provide a driving circuit, which can repair a failed driver in the driving circuit.
In a first aspect, an embodiment of the present invention provides a driving circuit, where the driving circuit includes:
the first driver and the second driver are used for driving the switching power supply to be switched on or switched off in the driving circuit; a third drive for replacing the failed first drive; the second driver is connected with the first driver;
first and second clock lines for providing clock signals to the first and second drivers;
and the first repair line and the second repair line are used for connecting the third driver with the failure port of the first driver when the first driver fails.
With reference to the first aspect, in a first implementation of the first aspect, the driving circuit includes a first driver, a second driver, and a third driver; a first clock line and a second clock line; a first repair line and a second repair line; the first driver, the second driver, and the third driver each have a first port, a second port, a third port, and a fourth port;
the second port of the first driver and the second port of the second driver are both connected with the first clock line, and the third port of the first driver and the third port of the second driver are both connected with the second clock line; the fourth port of the first driver is connected with the first port of the second driver;
when the driving circuit is connected with a power supply, the first clock line and the second clock line respectively provide clock signals to the first port and the fourth port of the first driver through the second port and the third port of the first driver; the first clock line and the second clock line respectively provide clock signals to a fourth port and a first port of the second driver through a second port and a third port of the second driver; current is conducted from the first port of the second driver to the fourth port of the first driver;
when the first driver fails, the first port of the first driver and the first port of the second driver are respectively connected with the second repair line and the first repair line, and the first port of the third driver and the fourth port of the third driver are respectively connected with the second repair line and the first repair line; the second port of the third driver and the third port of the third driver are respectively connected with the first clock line and the second clock line; when the power is on, the first clock line and the second clock line respectively provide clock signals to a first port and a fourth port of the third driver through a second port and a third port of the third driver; the current is transmitted from the first port of the second driver to the first repair line, and then from the first repair line to the fourth port of the third driver, and correspondingly, the first port of the third driver is transmitted to the first port of the first driver via the second repair line.
With reference to the first aspect, in a second implementation of the first aspect, the driving circuit further includes a third repair line and a fourth repair line, where the third repair line and the fourth repair line are used to replace the first clock line and the second clock line;
in the event of a failure of the first driver, the third repair line is connected to the second port of the third driver and to the first clock line, and the fourth repair line is connected to the third port of the third driver and to the second clock line;
when the driving circuit is connected with a power supply, the third repairing circuit and the fourth repairing circuit respectively provide clock signals to the first port and the fourth port of the third driver through the second port and the third port of the third driver, and the third repairing circuit and the fourth repairing circuit respectively provide clock signals to the first driver and the second driver through the first clock circuit and the second clock circuit.
With reference to the first implementation of the first aspect, in a third implementation of the first aspect, the driving circuit further includes a fourth driver, and the fourth driver is used to replace the second driver; the fourth driver has a first port, a second port, a third port, and a fourth port;
in the event of a failure of the second driver, the second and third ports of the fourth driver are connected with the first and second clock lines, respectively; a first port and a fourth port of the fourth driver are respectively connected with the second repair line and the first repair line; the first port of the second driver and the fourth port of the second driver are respectively connected with the second repair line and the first repair line;
when the driving circuit is connected with a power supply, the first clock line and the second clock line respectively provide clock signals to the fourth port and the first port of the fourth driver through the second port and the third port of the fourth driver; when the current is transmitted to the fourth port of the second driver, the current bypasses the fourth port of the second driver and is transmitted to the first repair line, and then is transmitted to the fourth port of the fourth driver by the first repair line, and correspondingly, is transmitted to the fourth port of the first driver by the first port of the fourth driver via the second repair line.
With reference to the third implementation of the first aspect, in a fourth implementation of the first aspect, the driving circuit further includes a third repair line and a fourth repair line, where the third repair line and the fourth repair line are used to replace the first clock line and the second clock line;
in the event of a failure of the second driver, the third repair line is connected to the second port of the fourth driver and to the first clock line, and the fourth repair line is connected to the third port of the fourth driver and to the second clock line;
when the driving circuit is connected with a power supply, the third repairing circuit and the fourth repairing circuit respectively provide clock signals to the fourth port and the first port of the fourth driver through the second port and the third port of the fourth driver, and the third repairing circuit and the fourth repairing circuit respectively provide clock signals to the first driver and the second driver through the first clock circuit and the second clock circuit.
With reference to the first implementation of the first aspect, in a fifth implementation of the first aspect, in case of failure of the second drive, the third drive is further configured to replace the second drive;
when the second driver fails, the first clock line and the second clock line are respectively connected with a third port of the third driver and a second port of the third driver, and the first port of the third driver and the fourth port of the fourth driver are respectively connected with the second repair line and the first repair line;
when the driving circuit is powered on, the first clock line and the second clock line respectively provide clock signals to a first port and a fourth port of the third driver through a third port of the third driver and a second port of the third driver; when the current is transmitted to the fourth port of the second driver, the current bypasses the fourth port of the second driver and is transmitted to the first repair line, and then is transmitted to the fourth port of the third driver by the first repair line, and correspondingly, is transmitted to the fourth port of the second driver by the first port of the third driver via the second repair line.
With reference to the first implementation of the first aspect, in a sixth implementation of the first aspect, the first driver, the second driver, and the third driver are arranged in a straight line to form a queue, and the first driver is adjacent to the second driver.
With reference to the sixth implementation of the first aspect, in a seventh implementation of the first aspect, the third driver is located at a head end or a tail end of the queue.
With reference to the seventh implementation of the first aspect, in an eighth implementation of the first aspect, the driving circuit further includes a fourth driver, the fourth driver is used to replace the second driver, and the fourth driver is located at a head end or a tail end of the queue.
With reference to the first aspect to the eighth implementation of the first aspect, in a ninth implementation of the first aspect, the first driver, the second driver, and the third driver are gate drivers GOAs.
According to the embodiment of the invention, if a failed driver exists in the drive circuit, the spare driver can be connected into the circuit through the first repair line and the second repair line, so that the failed driver in the drive circuit can be replaced.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic diagram of a driving circuit according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a driving circuit according to another embodiment of the present invention;
FIG. 3 is a schematic diagram of a driving circuit according to another embodiment of the present invention;
FIG. 4 is a diagram of a driving circuit according to another embodiment of the present invention;
FIG. 5 is a diagram of a driving circuit according to another embodiment of the present invention;
fig. 6 is a schematic diagram of a driving circuit according to another embodiment of the invention.
Detailed Description
The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.
It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It is also to be understood that the terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the specification of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be further understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.
As used in this specification and the appended claims, the term "if" may be interpreted contextually as "when", "upon" or "in response to a determination" or "in response to a detection". Similarly, the phrase "if it is determined" or "if a [ described condition or event ] is detected" may be interpreted contextually to mean "upon determining" or "in response to determining" or "upon detecting [ described condition or event ]" or "in response to detecting [ described condition or event ]".
Referring to fig. 1, a schematic diagram of a driving circuit according to an embodiment of the present invention is shown, where the driving circuit includes:
the first driver and the second driver are used for driving the switching power supply to be switched on or switched off in the driving circuit; a third drive for replacing the failed first drive; the second driver is connected with the first driver;
first and second clock lines for providing clock signals to the first and second drivers;
and the first repair line and the second repair line are used for connecting the third driver with the failure port of the first driver when the first driver fails.
Specifically, the driving circuit includes a first driver, a second driver, and a third driver; a first clock line and a second clock line; a first repair line and a second repair line; the first driver, the second driver and the third driver respectively comprise a first port, a second port, a third port and a fourth port;
the second port of the first driver and the second port of the second driver are both connected with a first clock line, and the third port of the first driver and the third port of the second driver are both connected with a second clock line; the fourth port of the first driver is connected with the first port of the second driver;
when the driving circuit is connected with a power supply, the first clock line and the second clock line respectively provide clock signals to the first port and the fourth port of the first driver through the second port and the third port of the first driver; the first clock line and the second clock line respectively provide clock signals to a fourth port and a first port of the second driver through a second port and a third port of the second driver; the current is transmitted to the fourth port of the first driver from the first port of the second driver;
under the condition that the first driver fails, a first port of the first driver and a first port of the second driver are respectively connected with the second repairing line and the first repairing line, and a first port of the third driver and a fourth port of the third driver are respectively connected with the second repairing line and the first repairing line; the second port of the third driver and the third port of the third driver are respectively connected with the first clock line and the second clock line; when the power is on, the first clock line and the second clock line respectively provide clock signals to the first port and the fourth port of the third driver through the second port and the third port of the third driver; the current is transmitted from the first port of the second driver to the first repair line, and then from the first repair line to the fourth port of the third driver, and correspondingly, from the first port of the third driver to the first port of the first driver via the second repair line.
It should be noted that all of the drivers included in the driving circuit include a first port, a second port, a third port, and a fourth port, where the first port is an output port, the fourth port is an input port, and the second port and the third port are clock signal input ports. The first driver and the second driver connected to each other represent two kinds of drivers in the driving circuit, respectively. For the first driver, the second port and the third port of the first driver obtain clock signals which are respectively provided for the first port and the fourth port of the first driver; for the second driver, clock signals obtained by the second port and the third port of the second driver are respectively provided to the fourth port and the first port.
In the embodiment of the present invention, when a first driver in the driving circuit fails, an electrical signal cannot normally pass through the first driver, and flows from a port where the first driver is connected to a second driver to a first repair line, and reaches an input end of a third driver via the first repair line, and then is transmitted to an output end of the first driver by a second repair line connected to an output end of the third driver, but due to the failure of the first driver, a current is transmitted to an input end of a next driver connected to an output end of the first driver, so that the failed first driver is replaced by the third driver, and thus, by implementing the embodiment of the present invention, the repair of the failed driver in the driving circuit is realized.
Optionally, the disconnection of the line in the circuit is implemented by fusing Laser Cutting, and the connection of the line in the circuit is implemented by fusing Laser Melting.
Optionally, the disconnection and the closing between the lines in the circuit are implemented by switches including controllable switching devices, such as Bipolar Junction Transistors (BJTs), Silicon Controlled Rectifiers (SCRs), Gate Turn-Off thyristors (GTOs), Power field effect transistors (Power MOSFETs, P-MOSFETs), Insulated Gate Bipolar Transistors (IGBTs), field controlled thyristors (MOS controlled thyristors, MCTs), and Static Induction Transistors (SIT).
Furthermore, the driving circuit further comprises a third repairing line and a fourth repairing line, wherein the third repairing line and the fourth repairing line are used for replacing the first clock line and the second clock line;
under the condition that the first driver fails, a third repair line is connected with a second port of the third driver and the first clock line, and a fourth repair line is connected with a third port of the third driver and the second clock line;
when the driving circuit is connected with a power supply, the third repairing circuit and the fourth repairing circuit respectively provide clock signals for the first port and the fourth port of the third driver through the second port and the third port of the third driver, and the third repairing circuit and the fourth repairing circuit respectively provide clock signals for the first driver and the second driver through the first clock circuit and the second clock circuit.
Further, the driving circuit further comprises a fourth driver, and the fourth driver is used for replacing the second driver; the fourth driver comprises a first port, a second port, a third port and a fourth port;
in case of failure of the second driver, the second port and the third port of the fourth driver are connected to the first clock line and the second clock line, respectively; a first port and a fourth port of the fourth driver are respectively connected with the second repair line and the first repair line; the first port of the second drive and the fourth port of the second drive are respectively connected with the second repair line and the first repair line;
when the driving circuit is connected with the power supply, the first clock line and the second clock line respectively provide clock signals to a fourth port and a first port of a fourth driver through a second port and a third port of the fourth driver; when the current is transmitted to the fourth port of the second drive, the current bypasses the fourth port of the second driver and is transmitted to the first repair line, and then is transmitted to the fourth port of the fourth drive through the first repair line, and correspondingly, is transmitted to the fourth port of the first drive through the second repair line by the first port of the fourth drive.
Furthermore, the driving circuit further comprises a third repairing line and a fourth repairing line, wherein the third repairing line and the fourth repairing line are used for replacing the first clock line and the second clock line;
under the condition that the second driver fails, a third repair line is connected with a second port of a fourth driver and the first clock line, and a fourth repair line is connected with a third port of the fourth driver and the second clock line;
when the driving circuit is connected with the power supply, the third repairing circuit and the fourth repairing circuit respectively provide clock signals for the fourth port and the first port of the fourth driver through the second port and the third port of the fourth driver, and the third repairing circuit and the fourth repairing circuit respectively provide clock signals for the first driver and the second driver through the first clock circuit and the second clock circuit.
Further, in the event of failure of the second drive, the third drive is also used to replace the second drive;
under the condition that the second driver fails, the first clock line and the second clock line are respectively connected with a third port of the third driver and a second port of the third driver, and a first port of the third driver and a fourth port of the fourth driver are respectively connected with a second repair line and a first repair line;
when the driving circuit is powered on, the first clock line and the second clock line respectively provide clock signals to the first port and the fourth port of the third driver through the third port of the third driver and the second port of the third driver; when the current is transmitted to the fourth port of the second drive, the current bypasses the fourth port of the second driver and is transmitted to the first repair line, and then is transmitted to the fourth port of the third drive through the first repair line, and correspondingly, is transmitted to the fourth port of the second drive through the second repair line by the first port of the third drive.
Optionally, the first driver, the second driver and the third driver are arranged in a straight line to form a queue, and the first driver is adjacent to the second driver; the third driver is positioned at the head end or the tail end of the queue; the fourth driver is positioned at the head end or the tail end of the queue; the first driver, the second driver and the third driver are gate drivers GOA.
In the embodiment of the invention, the drivers are arranged in a straight line to form a queue, and the first driver is adjacent to the second driver; the third driver is positioned at the head end or the tail end of the driver queue; the fourth driver is positioned at the head end or the tail end of the driver queue; the driver includes a gate driver GOA of the driving circuit.
Further, according to the embodiment of the present invention, the drives in the driving circuit are arranged in a straight line, wherein the third driver and the fourth driver may be located at the head end or the tail end of the driver queue, and the advantage of the head end or the tail end is that when the circuit is bent, the probability of damage to the drivers at the two ends of the driving circuit is minimized, so that the repairing efficiency can be ensured, and the present invention has very strong practicability.
Referring to fig. 2, a schematic diagram of another driving circuit provided in the embodiment of the present invention is shown, where the driving circuit includes a first driver, a second driver, and a third driver; a first clock line and a second clock line; a first repair line and a second repair line; the first driver, the second driver and the third driver respectively comprise a first port, a second port, a third port and a fourth port;
the second port of the first driver and the second port of the second driver are both connected with a first clock line, and the third port of the first driver and the third port of the second driver are both connected with a second clock line; the fourth port of the first driver is connected with the first port of the second driver;
when the driving circuit is connected with a power supply, the first clock line and the second clock line respectively provide clock signals to the first port and the fourth port of the first driver through the second port and the third port of the first driver; the first clock line and the second clock line respectively provide clock signals to a fourth port and a first port of the second driver through a second port and a third port of the second driver; the current is transmitted to the fourth port of the first driver from the first port of the second driver;
under the condition that the second driver fails, the first clock line and the second clock line are respectively connected with a third port of the third driver and a second port of the third driver, and a first port of the third driver and a fourth port of the fourth driver are respectively connected with a second repair line and a first repair line;
when the driving circuit is powered on, the first clock line and the second clock line respectively provide clock signals to the first port and the fourth port of the third driver through the third port of the third driver and the second port of the third driver; when the current is transmitted to the fourth port of the second drive, the current bypasses the fourth port of the second driver and is transmitted to the first repair line, and then is transmitted to the fourth port of the third drive through the first repair line, and correspondingly, is transmitted to the fourth port of the second drive through the second repair line by the first port of the third drive.
It should be noted that all of the drivers included in the driving circuit include a first port, a second port, a third port, and a fourth port, where the first port is an output port, the fourth port is an input port, and the second port and the third port are clock signal input ports. The first driver and the second driver connected to each other represent two kinds of drivers in the driving circuit, respectively. For the first driver, the second port and the third port of the first driver obtain clock signals which are respectively provided for the first port and the fourth port of the first driver; for the second driver, clock signals obtained by the second port and the third port of the second driver are respectively provided to the fourth port and the first port.
Optionally, the disconnection of the line in the circuit is implemented by fusing Laser Cutting, and the connection of the line in the circuit is implemented by fusing Laser Melting.
Optionally, the disconnection and the closing between the lines in the circuit are implemented by switches including controllable switching devices, such as Bipolar Junction Transistors (BJTs), Silicon Controlled Rectifiers (SCRs), Gate Turn-Off thyristors (GTOs), Power field effect transistors (Power MOSFETs, P-MOSFETs), Insulated Gate Bipolar Transistors (IGBTs), field controlled thyristors (MOS controlled thyristors, MCTs), and Static Induction Transistors (SIT).
Through the embodiment of the invention, the third driver can replace not only the failed first driver in the circuit, but also the second driver, only the connection mode of the first clock line and the second clock line with the third driver needs to be changed, when the first driver fails, the first clock line and the second clock line are respectively connected with the second port and the third port of the third driver, when the second driver fails, the first clock line and the second clock line are respectively connected with the third port and the second port of the third driver, and the clock signals obtained by the second port and the third port of the third driver are respectively used for being provided for the first port and the fourth port of the third driver, through the connection, the clock signals of the ports of the third driver and the second driver connected through the first repairing line and the second repairing line are the same, according to the embodiment of the invention, only one spare third driver is used for replacing any one driver in the driving circuit, so that the repairing efficiency of the driving circuit is further improved.
Referring to fig. 3, a schematic diagram of another driving circuit provided in the embodiment of the present invention is shown, where the driving circuit includes a first driver, a second driver, and a third driver; a first clock line and a second clock line; a first repair line and a second repair line; the first driver, the second driver and the third driver respectively comprise a first port, a second port, a third port and a fourth port; the third repair line and the fourth repair line are used for replacing the first clock line and the second clock line;
the second port of the first driver and the second port of the second driver are both connected with a first clock line, and the third port of the first driver and the third port of the second driver are both connected with a second clock line; the fourth port of the first driver is connected with the first port of the second driver;
when the driving circuit is connected with a power supply, the first clock line and the second clock line respectively provide clock signals to the first port and the fourth port of the first driver through the second port and the third port of the first driver; the first clock line and the second clock line respectively provide clock signals to a fourth port and a first port of the second driver through a second port and a third port of the second driver; the current is transmitted to the fourth port of the first driver from the first port of the second driver;
under the condition that the first driver fails, a third repair line is connected with a second port of the third driver and the first clock line, and a fourth repair line is connected with a third port of the third driver and the second clock line;
when the driving circuit is connected with a power supply, the third repairing circuit and the fourth repairing circuit respectively provide clock signals for the first port and the fourth port of the third driver through the second port and the third port of the third driver, and the third repairing circuit and the fourth repairing circuit respectively provide clock signals for the first driver and the second driver through the first clock circuit and the second clock circuit.
In the embodiment of the invention, a standby third driver is added in the drive circuit, if a first driver in the drive circuit fails, the current passes through the first repair line and the second repair line to connect the third driver into the drive circuit, so that the third driver is used for replacing the first driver, if the second driver fails, the failed second driver can be repaired by the third driver only by changing the connection mode of the first clock line, the second clock line and the third driver, and the failed driver in the drive circuit can be repaired by only adding one driver through the drive circuit, so that the repair efficiency is high and the cost is low.
Optionally, the disconnection of the line in the circuit is implemented by fusing Laser Cutting, and the connection of the line in the circuit is implemented by fusing Laser Melting.
Optionally, the disconnection and the closing between the lines in the circuit are implemented by switches including controllable switching devices, such as Bipolar Junction Transistors (BJTs), Silicon Controlled Rectifiers (SCRs), Gate Turn-Off thyristors (GTOs), Power field effect transistors (Power MOSFETs, P-MOSFETs), Insulated Gate Bipolar Transistors (IGBTs), field controlled thyristors (MOS controlled thyristors, MCTs), and Static Induction Transistors (SIT).
By implementing the driving circuit in the embodiment of the invention, if the capacitive loads on the first clock line and the second clock line in the driving circuit are large, it is also desirable that the second and third ports of the first driver, and the load capacitances on the second and third ports to which the third driver is connected, if the first driver is replaced by only the third driver, which may cause the circuit to malfunction, the driving circuit may further include a third repair line and a fourth repair line, which short-circuit the second port and the third port of the first driver and the third driver, respectively, to the third repair line and the fourth repair line, respectively, so that the port of the clock signal input of the first driver is capacitively loaded the same as the port of the clock input of the third driver, therefore, by implementing the embodiment of the invention, the restoration of the failed driver in the driving circuit is realized.
Referring to fig. 4, a schematic diagram of another driving circuit provided in the embodiment of the present invention is shown, where the driving circuit includes a first driver, a second driver, a third driver, and a fourth driver; a first clock line and a second clock line; a first repair line and a second repair line; the first driver, the second driver, the third driver and the fourth driver respectively comprise a first port, a second port, a third port and a fourth port;
the second port of the first driver and the second port of the second driver are both connected with a first clock line, and the third port of the first driver and the third port of the second driver are both connected with a second clock line; the fourth port of the first driver is connected with the first port of the second driver;
when the driving circuit is connected with a power supply, the first clock line and the second clock line respectively provide clock signals to the first port and the fourth port of the first driver through the second port and the third port of the first driver; the first clock line and the second clock line respectively provide clock signals to a fourth port and a first port of the second driver through a second port and a third port of the second driver; the current is transmitted to the fourth port of the first driver from the first port of the second driver;
in case of failure of the second driver, the second port and the third port of the fourth driver are connected to the first clock line and the second clock line, respectively; a first port and a fourth port of the fourth driver are respectively connected with the second repair line and the first repair line; the first port of the second drive and the fourth port of the second drive are respectively connected with the second repair line and the first repair line;
when the driving circuit is connected with the power supply, the first clock line and the second clock line respectively provide clock signals to a fourth port and a first port of a fourth driver through a second port and a third port of the fourth driver; when the current is transmitted to the fourth port of the second drive, the current bypasses the fourth port of the second driver and is transmitted to the first repair line, and then is transmitted to the fourth port of the fourth drive through the first repair line, and correspondingly, is transmitted to the fourth port of the first drive through the second repair line by the first port of the fourth drive.
Optionally, the disconnection of the line in the circuit is implemented by fusing Laser Cutting, and the connection of the line in the circuit is implemented by fusing Laser Melting.
Optionally, the disconnection and the closing between the lines in the circuit are implemented by switches including controllable switching devices, such as Bipolar Junction Transistors (BJTs), Silicon Controlled Rectifiers (SCRs), Gate Turn-Off thyristors (GTOs), Power field effect transistors (Power MOSFETs, P-MOSFETs), Insulated Gate Bipolar Transistors (IGBTs), field controlled thyristors (MOS controlled thyristors, MCTs), and Static Induction Transistors (SIT).
By implementing the embodiment of the present invention, the driver in the driving circuit may further include a fourth driver, and the fourth driver is also used to replace a failed component in the driving circuit, and it should be noted that the driver in the driving circuit includes more than the first driver, the second driver, the third driver, and the fourth driver mentioned in the embodiment of the present invention, and before the failed driving does not occur in the driving circuit, the connection manner between the normally operating drivers is the same as the connection manner between the first driver and the second driver. Different from the third driver, the clock signals obtained by the second port and the third port of the third driver are respectively provided to the clock signals of the output terminal and the input terminal of the third driver, the corresponding mode is consistent with that of the first driver, and the clock signals obtained by the second port and the third port of the fourth driver are respectively provided to the input terminal and the output terminal of the fourth driver, correspondingly, the corresponding mode is consistent with that of the second driver, and the corresponding mode between the adjacent drivers is opposite, so that when the second driver fails, the fourth driver can be used for replacing the second driver, and therefore by implementing the embodiment of the invention, any one driver of the drivers in the driving circuit can be repaired, and only the third driver and the fourth driver are added, the implementation mode is simple, and the repairing efficiency is high.
Referring to fig. 5, a schematic diagram of another driving circuit provided in the embodiment of the present invention is shown, where the driving circuit includes a first driver, a second driver, a third driver, and a fourth driver; a first clock line and a second clock line; a first repair line and a second repair line; the first driver, the second driver, the third driver and the fourth driver respectively comprise a first port, a second port, a third port and a fourth port; the driving circuit further comprises a third repairing line and a fourth repairing line;
the second port of the first driver and the second port of the second driver are both connected with a first clock line, and the third port of the first driver and the third port of the second driver are both connected with a second clock line; the fourth port of the first driver is connected with the first port of the second driver;
when the driving circuit is connected with a power supply, the first clock line and the second clock line respectively provide clock signals to the first port and the fourth port of the first driver through the second port and the third port of the first driver; the first clock line and the second clock line respectively provide clock signals to a fourth port and a first port of the second driver through a second port and a third port of the second driver; the current is transmitted to the fourth port of the first driver from the first port of the second driver;
under the condition that the second driver fails, a third repair line is connected with a second port of a fourth driver and the first clock line, and a fourth repair line is connected with a third port of the fourth driver and the second clock line;
when the driving circuit is connected with the power supply, the third repairing circuit and the fourth repairing circuit respectively provide clock signals for the fourth port and the first port of the fourth driver through the second port and the third port of the fourth driver, and the third repairing circuit and the fourth repairing circuit respectively provide clock signals for the first driver and the second driver through the first clock circuit and the second clock circuit.
Optionally, the disconnection of the line in the circuit is implemented by fusing Laser Cutting, and the connection of the line in the circuit is implemented by fusing Laser Melting.
Optionally, the disconnection and the closing between the lines in the circuit are implemented by switches including controllable switching devices, such as Bipolar Junction Transistors (BJTs), Silicon Controlled Rectifiers (SCRs), Gate Turn-Off thyristors (GTOs), Power field effect transistors (Power MOSFETs, P-MOSFETs), Insulated Gate Bipolar Transistors (IGBTs), field controlled thyristors (MOS controlled thyristors, MCTs), and Static Induction Transistors (SIT).
Through the embodiment of the invention, if the second driver fails in the driving circuit, the fourth driver is used for replacing the second driver, meanwhile, in order to keep the second port and the third port of the second driver, the load capacitances on the second port and the third port connected with the fourth driver are consistent, so that the second port and the third port of the second driver and the fourth driver are respectively short-circuited with the third repair line and the fourth repair line, and the port of the clock signal input of the second driver is the same as the capacitive load of the port of the clock input of the fourth driver, so that the repairing of the failed component in the driving circuit is realized through the implementation of the embodiment of the invention.
Referring to fig. 6, a schematic diagram of another driving circuit provided in the embodiment of the present invention is shown, where the driving circuit includes a first driver, a second driver, and a third driver; a first clock line and a second clock line; a first repair line, a second repair line, a third repair line, and a second repair line; the first driver, the second driver and the third driver respectively comprise a first port, a second port, a third port and a fourth port;
the second port of the first driver and the second port of the second driver are both connected with a first clock line, and the third port of the first driver and the third port of the second driver are both connected with a second clock line; the fourth port of the first driver is connected with the first port of the second driver;
when the driving circuit is connected with a power supply, the first clock line and the second clock line respectively provide clock signals to the first port and the fourth port of the first driver through the second port and the third port of the first driver; the first clock line and the second clock line respectively provide clock signals to a fourth port and a first port of the second driver through a second port and a third port of the second driver; the current is transmitted to the fourth port of the first driver from the first port of the second driver;
under the condition that the second driver fails, a third repair line and a fourth repair line are respectively connected with a third port of the third driver and a second port of the third driver; the third repair line and the fourth repair line are respectively connected with the first clock line and the second clock line; the first port of the third drive and the fourth port of the fourth drive are respectively connected with the second repair line and the first repair line;
when the driving circuit is powered on, the third repairing line and the fourth repairing line respectively provide clock signals to a first port and a fourth port of the third driver through a third port of the third driver and a second port of the third driver; the third repair line and the fourth repair line respectively provide clock signals for the first driver and the second driver through the first clock line and the second clock line; when the current is transmitted to the fourth port of the second drive, the current bypasses the fourth port of the second driver and is transmitted to the first repair line, and then is transmitted to the fourth port of the third drive through the first repair line, and correspondingly, is transmitted to the fourth port of the second drive through the second repair line by the first port of the third drive.
Optionally, the disconnection of the line in the circuit is implemented by fusing Laser Cutting, and the connection of the line in the circuit is implemented by fusing Laser Melting.
Optionally, the disconnection and the closing between the lines in the circuit are implemented by switches including controllable switching devices, such as Bipolar Junction Transistors (BJTs), Silicon Controlled Rectifiers (SCRs), Gate Turn-Off thyristors (GTOs), Power field effect transistors (Power MOSFETs, P-MOSFETs), Insulated Gate Bipolar Transistors (IGBTs), field controlled thyristors (MOS controlled thyristors, MCTs), and Static Induction Transistors (SIT).
By implementing the embodiment of the present invention, the third driver in the driving circuit can repair any failed driver in the circuit, and it should be noted that the drivers in the driving circuit include more than the first driver, the second driver, the third driver and the fourth driver mentioned in the embodiment of the present invention, and before the failed driver does not occur in the driving circuit, the connection manner between the normally operating drivers is the same as the connection manner between the first driver and the second driver. Different from the third driver, the clock signals obtained by the second port and the third port of the third driver are respectively provided to the clock signals of the output terminal and the input terminal of the third driver, the corresponding mode is consistent with that of the first driver, and the clock signals obtained by the second port and the third port of the fourth driver are respectively provided to the input terminal and the output terminal of the fourth driver, correspondingly, the corresponding mode is consistent with that of the second driver, and the corresponding mode between the adjacent drivers is opposite, so that when the second driver fails, the fourth driver can be used for replacing the second driver, and therefore by implementing the embodiment of the invention, any one driver of the drivers in the driving circuit can be repaired, and only the third driver and the fourth driver are added, the implementation mode is simple, and the repairing efficiency is high.
Claims (9)
1. A driver circuit, comprising:
the first driver and the second driver are used for driving the switching power supply to be switched on or switched off in the driving circuit; a third drive for replacing the failed first drive; the second driver is connected with the first driver; wherein the first driver, the second driver, and the third driver each have a first port, a second port, a third port, and a fourth port;
a first clock line and a second clock line for providing clock signals to the first driver and the second driver, wherein the second port of the first driver and the second port of the second driver are both connected to the first clock line, and the third port of the first driver and the third port of the second driver are both connected to the second clock line; the fourth port of the first driver is connected with the first port of the second driver;
a first repair line and a second repair line for connecting the third driver with a failed port of the first driver when the first driver fails;
when the driving circuit is connected with a power supply, the first clock line and the second clock line respectively provide clock signals to the first port and the fourth port of the first driver through the second port and the third port of the first driver; the first clock line and the second clock line respectively provide clock signals to a fourth port and a first port of the second driver through a second port and a third port of the second driver; current is conducted from the first port of the second driver to the fourth port of the first driver;
when the first driver fails, the first port of the first driver and the first port of the second driver are respectively connected with the second repair line and the first repair line, and the first port of the third driver and the fourth port of the third driver are respectively connected with the second repair line and the first repair line; the second port of the third driver and the third port of the third driver are respectively connected with the first clock line and the second clock line; when the power is on, the first clock line and the second clock line respectively provide clock signals to a first port and a fourth port of the third driver through a second port and a third port of the third driver; the current is transmitted from the first port of the second driver to the first repair line, then from the first repair line to the fourth port of the third driver, and correspondingly from the first port of the third driver to the first port of the first driver via the second repair line.
2. The driver circuit of claim 1, further comprising third and fourth repair lines for replacing the first and second clock lines;
in the event of a failure of the first driver, the third repair line is connected to the second port of the third driver and to the first clock line, and the fourth repair line is connected to the third port of the third driver and to the second clock line;
when the driving circuit is connected with a power supply, the third repairing circuit and the fourth repairing circuit respectively provide clock signals to the first port and the fourth port of the third driver through the second port and the third port of the third driver, and the third repairing circuit and the fourth repairing circuit respectively provide clock signals to the first driver and the second driver through the first clock circuit and the second clock circuit.
3. The driving circuit according to claim 1, further comprising a fourth driver for replacing the second driver; the fourth driver has a first port, a second port, a third port, and a fourth port;
in the event of a failure of the second driver, the second and third ports of the fourth driver are connected with the first and second clock lines, respectively; a first port and a fourth port of the fourth driver are respectively connected with the second repair line and the first repair line; the first port of the second driver and the fourth port of the second driver are respectively connected with the second repair line and the first repair line;
when the driving circuit is connected with a power supply, the first clock line and the second clock line respectively provide clock signals to the fourth port and the first port of the fourth driver through the second port and the third port of the fourth driver; when the current is transmitted to the fourth port of the second driver, the current bypasses the fourth port of the second driver and is transmitted to the first repair line, and then is transmitted to the fourth port of the fourth driver by the first repair line, and correspondingly is transmitted to the fourth port of the first driver by the first port of the fourth driver through the second repair line.
4. The driver circuit of claim 3, further comprising a third repair line and a fourth repair line for replacing the first clock line and the second clock line;
in the event of a failure of the second driver, the third repair line is connected to the second port of the fourth driver and to the first clock line, and the fourth repair line is connected to the third port of the fourth driver and to the second clock line;
when the driving circuit is connected with a power supply, the third repairing circuit and the fourth repairing circuit respectively provide clock signals to the fourth port and the first port of the fourth driver through the second port and the third port of the fourth driver, and the third repairing circuit and the fourth repairing circuit respectively provide clock signals to the first driver and the second driver through the first clock circuit and the second clock circuit.
5. The drive circuit of claim 3, wherein the third driver is further configured to replace the second driver in the event of a failure of the second driver;
in the event of failure of the second driver, the first clock line and the second clock line are respectively connected to a third port of the third driver and a second port of the third driver, and the first port of the third driver and the fourth port of the fourth driver are respectively connected to the second repair line and the first repair line;
when the driving circuit is powered on, the first clock line and the second clock line respectively provide clock signals to a first port and a fourth port of the third driver through a third port of the third driver and a second port of the third driver; when the current is transmitted to the fourth port of the second driver, the current bypasses the fourth port of the second driver and is transmitted to the first repair line, and then is transmitted to the fourth port of the third driver by the first repair line, and correspondingly is transmitted to the fourth port of the second driver by the first port of the third driver through the second repair line.
6. The driver circuit of claim 1, wherein the first driver, the second driver, and the third driver are arranged in a line to form a queue, the first driver being adjacent to the second driver.
7. The driver circuit of claim 6, wherein the third driver is located at a head end or a tail end of the queue.
8. The driver circuit of claim 7, further comprising a fourth driver for replacing the second driver, the fourth driver being located at a head end or a tail end of the queue.
9. The driver circuit according to any of claims 1-8, wherein the first driver, the second driver, and the third driver are gate drivers (GOAs).
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| CN201711247294.8A CN108010490B (en) | 2017-11-29 | 2017-11-29 | Driving circuit |
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| CN201711247294.8A CN108010490B (en) | 2017-11-29 | 2017-11-29 | Driving circuit |
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| CN110706667B (en) * | 2019-09-17 | 2021-06-01 | 深圳市华星光电半导体显示技术有限公司 | GOA circuit and display device |
| US12236818B2 (en) | 2022-04-29 | 2025-02-25 | Boe Intelligent Iot Technology Co., Ltd. | Display drive system and method, and display device |
| CN119851597B (en) * | 2025-03-21 | 2025-07-04 | 惠科股份有限公司 | Gate driving circuit, driving circuit of display panel and display device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101577106A (en) * | 2009-03-30 | 2009-11-11 | 上海广电光电子有限公司 | Gate line driving device and method for repairing same |
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| KR101303736B1 (en) * | 2008-07-07 | 2013-09-04 | 엘지디스플레이 주식회사 | Gate driving circuit unit for liquid crystal display device |
| CN101533621A (en) * | 2009-04-22 | 2009-09-16 | 上海广电光电子有限公司 | Method for restoring grid drive |
| TWI424401B (en) * | 2009-11-02 | 2014-01-21 | Chunghwa Picture Tubes Ltd | Display and gate driver circuit thereof |
| CN104409065A (en) * | 2014-12-18 | 2015-03-11 | 京东方科技集团股份有限公司 | Shifting register and repairing method thereof, as well as gate drive circuit and display device |
| CN105654886A (en) * | 2016-01-25 | 2016-06-08 | 重庆京东方光电科技有限公司 | Grid drive circuit, repairing method thereof and display device |
| CN105551423B (en) * | 2016-03-04 | 2018-06-29 | 京东方科技集团股份有限公司 | A kind of grid integrated drive electronics, array substrate and its restorative procedure |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101577106A (en) * | 2009-03-30 | 2009-11-11 | 上海广电光电子有限公司 | Gate line driving device and method for repairing same |
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