CN105654886A - Grid drive circuit, repairing method thereof and display device - Google Patents
Grid drive circuit, repairing method thereof and display device Download PDFInfo
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- CN105654886A CN105654886A CN201610051710.6A CN201610051710A CN105654886A CN 105654886 A CN105654886 A CN 105654886A CN 201610051710 A CN201610051710 A CN 201610051710A CN 105654886 A CN105654886 A CN 105654886A
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- 238000000034 method Methods 0.000 title claims abstract description 42
- 230000002159 abnormal effect Effects 0.000 claims abstract description 39
- 238000002844 melting Methods 0.000 claims abstract description 21
- 230000008018 melting Effects 0.000 claims abstract description 21
- 230000005856 abnormality Effects 0.000 claims description 30
- 102100040862 Dual specificity protein kinase CLK1 Human genes 0.000 description 12
- 102100040856 Dual specificity protein kinase CLK3 Human genes 0.000 description 9
- 101000749294 Homo sapiens Dual specificity protein kinase CLK1 Proteins 0.000 description 9
- 101000749304 Homo sapiens Dual specificity protein kinase CLK3 Proteins 0.000 description 9
- 102100040844 Dual specificity protein kinase CLK2 Human genes 0.000 description 7
- 101000749291 Homo sapiens Dual specificity protein kinase CLK2 Proteins 0.000 description 7
- 238000000059 patterning Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 102100040858 Dual specificity protein kinase CLK4 Human genes 0.000 description 4
- 101000749298 Homo sapiens Dual specificity protein kinase CLK4 Proteins 0.000 description 4
- 101100113690 Homo sapiens CLK1 gene Proteins 0.000 description 3
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- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
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Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
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- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
- Shift Register Type Memory (AREA)
Abstract
The invention discloses a grid drive circuit, a repairing method thereof and a display device. The grid drive circuit comprises multiple first shift registers and at least one second shift register which are connected in series; when the first shift registers are abnormal, the second shift register can replace the first shift registers to operate, and the abnormal first shift registers in the grid drive circuit are repaired and normal operation of the whole grid drive circuit can be guaranteed, so that yield of the display device can be improved; meanwhile, repairing lines electrically connected with each signal terminal of the second shift register and signal lines as well as connecting lines electrically connected with each signal terminal of each first shift register are arranged in a crossed and insulated manner, so that when the second shift register is utilized for repairing, only the repairing lines electrically connected with each signal terminal of the second shift register and the signal lines as well as connecting lines electrically connected with each signal terminal of the abnormal first shift register need to be connected in a melting manner, and an extra signal is not needed to be provided for each repairing line.
Description
Technical Field
The invention relates to the technical field of display, in particular to a gate driving circuit, a repairing method thereof and a display device.
Background
In a thin film transistor display device, a gate driving signal is generally supplied to a gate of each Thin Film Transistor (TFT) in a pixel region through a gate driving circuit. The gate driving circuit may be formed on an array substrate of the display device through an array process, i.e., a gate driver array (GOA) process of the array substrate, and this integration process may not only save cost, but also implement a design of a narrow bezel.
The gate driving circuit formed by the GOA process is composed of a plurality of shift registers connected in series, and in the signal transmission process, if a certain stage of shift register is abnormal, the whole gate driving circuit cannot work normally, so that the display device cannot work normally, and the yield of the display device is influenced.
Therefore, how to provide a method for repairing a gate driving circuit is a technical problem that needs to be solved by those skilled in the art.
Disclosure of Invention
Embodiments of the present invention provide a gate driving circuit, a repairing method thereof and a display device, so as to provide a repairing method of a gate driving circuit.
Therefore, an embodiment of the present invention provides a gate driving circuit, including a plurality of first shift registers connected in series; further comprising: at least one second shift register; each second shift register is used for replacing the first shift register with abnormity to work;
the clock signal end of each first shift register is electrically connected with the clock signal line through a first connecting line; a first repair line electrically connected with a clock signal end of each second shift register is arranged in a crossed manner with the clock signal line and is insulated from the clock signal line;
a second repair line electrically connected with the starting signal end of each second shift register and a second connecting line electrically connected with the starting signal end of each first shift register are arranged in a crossed mode and are insulated from each other;
a third repair line electrically connected with the output signal end of each second shift register and a third connecting line electrically connected with the output signal end of each first shift register are arranged in a crossed manner and are insulated from each other;
and a fourth repairing wire electrically connected with the reset signal end of each second shift register and a fourth connecting wire electrically connected with the reset signal end of each first shift register are arranged in a crossed manner and are insulated from each other.
In a possible implementation manner, in the gate driving circuit provided in the embodiment of the present invention, the first repair line and the clock signal line are disposed in different layers.
In a possible implementation manner, in the gate driving circuit provided in the embodiment of the present invention, the first repair line and the first connection line are disposed in the same layer.
In a possible implementation manner, in the gate driving circuit provided in the embodiment of the present invention, the first repair line, the first connection line, and the gate line are disposed in the same layer, and the clock signal line and the data line are disposed in the same layer; or,
the first repair line, the first connecting line and the data line are arranged on the same layer, and the clock signal line and the grid line are arranged on the same layer.
In a possible implementation manner, in the gate driving circuit provided in the embodiment of the present invention, the second repair line and the second connection line are arranged in different layers.
In a possible implementation manner, in the gate driving circuit provided in the embodiment of the present invention, the third repair line and the third connection line are disposed in different layers.
In a possible implementation manner, in the gate driving circuit provided in the embodiment of the present invention, the fourth repair line and the fourth connection line are disposed in different layers.
In a possible implementation manner, in the gate driving circuit provided in the embodiment of the present invention, the second repair line, the third repair line, and the fourth repair line are disposed in the same layer.
In a possible implementation manner, in the gate driving circuit provided in the embodiment of the present invention, the second connection line, the third connection line, and the fourth connection line are disposed in the same layer.
In a possible implementation manner, in the gate driving circuit provided in the embodiment of the present invention, the second repair line, the third repair line, and the fourth repair line are all disposed on the same layer as the gate line, and the second connection line, the third connection line, and the fourth connection line are all disposed on the same layer as the data line; or,
the second repairing line, the third repairing line and the fourth repairing line are all arranged on the same layer with the data line, and the second connecting line, the third connecting line and the fourth connecting line are all arranged on the same layer with the grid line.
In a possible implementation manner, in the gate driving circuit provided in the embodiment of the present invention, each of the second shift registers is located at a side of the first shift register of the first stage, which is far away from the first shift register of the second stage; or,
each second shift register is positioned at one side of the last stage of the first shift register, which is far away from the first shift register of the penultimate stage; or,
and a part of the second shift registers are positioned on one side of the first shift register of the first stage, which is far away from the first shift register of the second stage, and the rest of the second shift registers are positioned on one side of the first shift register of the last stage, which is far away from the first shift register of the penultimate stage.
In a possible implementation manner, in the gate driving circuit provided in the embodiment of the present invention, the number of the second shift registers located on a side of the first shift register of the first stage away from the first shift register of the second stage is equal to the number of the second shift registers located on a side of the first shift register of the last stage away from the first shift register of the second last stage;
dividing each second shift register into two groups, wherein the second shift registers in each group are different from each other, and the two second shift registers in each group are respectively positioned on one side of the first shift register of the first stage, which is far away from the first shift register of the second stage, and one side of the first shift register of the last stage, which is far away from the first shift register of the penultimate stage;
two second shift registers in each group share one second repairing line, one third repairing line and one fourth repairing line.
An embodiment of the present invention further provides a display device, including: the embodiment of the invention provides the gate driving circuit.
The embodiment of the invention also provides a method for repairing the gate drive circuit, which comprises the following steps:
when the first shift register is abnormal, a first repair line of a second shift register is connected with a clock signal line connected with a first connecting line of the first shift register with the abnormality in a melting way, and the connection between a clock signal end of the first shift register with the abnormality and the first connecting line is disconnected;
connecting a second repair line of the second shift register with a second connecting line of the first shift register with abnormality in a melting manner, and disconnecting a starting signal end of the first shift register with abnormality from the second connecting line;
connecting a third repair line of the second shift register with a third connecting line of the first shift register with abnormality in a melting manner, and disconnecting an output signal end of the first shift register with abnormality from the third connecting line;
and connecting a fourth repairing line of the second shift register with a fourth connecting line of the first shift register with abnormality in a melting way, and disconnecting the reset signal end of the first shift register with abnormality from the fourth connecting line.
In a possible implementation manner, in the repair method provided in the embodiment of the present invention, when two second shift registers sharing a same second repair line, a same third repair line, and a same fourth repair line are selected to repair two first shift registers, respectively, the method further includes:
disconnecting a second repair line common to the two second shift registers at a location between two melt points on the second repair line;
disconnecting a third repair line common to the two second shift registers at a location between two melt points on the third repair line;
a fourth repair line common to the two second shift registers is disconnected at a location between two melt points on the fourth repair line.
In a possible implementation manner, in the repair method provided in the embodiment of the present invention, the method further includes:
when the abnormal first shift register is positioned at the upper half part of the display panel, a second shift register positioned at one side of the first-stage first shift register, which is far away from the second-stage first shift register, is selected for repairing;
and when the abnormal first shift register is positioned at the lower half part of the display panel, selecting a second shift register positioned at one side of the last stage of first shift register, which is far away from the penultimate stage of first shift register, for repairing.
The invention discloses a grid driving circuit, a repairing method thereof and a display device, wherein the grid driving circuit comprises a plurality of first shift registers and at least one second shift register which are connected in series; when the first shift register is abnormal, the second shift register can replace the abnormal first shift register to work, so that the normal work of the whole grid driving circuit can be ensured by repairing the abnormal first shift register in the grid driving circuit, and the yield of the display device can be improved; in addition, the repair lines electrically connected to the signal terminals of the second shift register and the signal lines and the connecting lines electrically connected to the signal terminals of the first shift register are arranged in a cross-insulated manner, so that when repairing is performed by using the second shift register, the repair lines electrically connected to the signal terminals of the second shift register and the signal lines and the connecting lines electrically connected to the signal terminals of the first shift register of the abnormal stage are simply connected in a melting manner, and signals do not need to be additionally provided for the repair lines.
Drawings
Fig. 1 is a schematic structural diagram of a gate driving circuit according to an embodiment of the invention;
FIG. 2 is a schematic diagram of a conventional shift register;
fig. 3 is a second schematic structural diagram of a gate driving circuit according to an embodiment of the invention;
fig. 4 is a flowchart illustrating a repairing method of a gate driving circuit according to an embodiment of the invention;
FIG. 5 is a schematic diagram of the gate driving circuit shown in FIG. 1 after being repaired;
fig. 6 is a second flowchart of a repairing method of a gate driving circuit according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of the gate driving circuit shown in fig. 3 after being repaired.
Detailed Description
The following describes in detail specific embodiments of a gate driving circuit, a repairing method thereof, and a display device according to embodiments of the present invention with reference to the accompanying drawings.
The gate driving circuit provided by the embodiment of the invention, as shown in fig. 1, includes a plurality of first shift registers Stage1, Stage2 … … Stage n connected in series; further comprising: at least one second shift register (one second shift register stage1 is shown in FIG. 1); each second shift register is used for replacing the abnormal first shift register to work;
the clock signal end of each first shift register is electrically connected with the clock signal line through a first connecting line; the first repair line electrically connected with the clock signal end of each second shift register is crossed with the clock signal line and is insulated from the clock signal line; for example, as shown in fig. 1, the clock signal terminals CLKA and CLKB of the first shift registers Stage1 and Stage3 … … of odd-numbered stages are electrically connected to the clock signal lines CLK1 and CLK3, respectively, through the first connection line 1, the clock signal terminals CLKA and CLKB of the first shift registers Stage2 and Stage4 … … of even-numbered stages are electrically connected to the clock signal lines CLK2 and CLK4, respectively, through the first connection line 1, and the first repair lines 2 electrically connected to the clock signal terminals CLKA and CLKB of the second shift register Stage1 are arranged to intersect with and be insulated from the clock signal lines CLK1, CLK2, CLK3 and CLK 4;
a second repair line electrically connected with the starting signal end of each second shift register and a second connecting line electrically connected with the starting signal end of each first shift register are arranged in a crossed mode and are insulated from each other; for example, as shown in fig. 1, the second repair line 3 electrically connected to the enable signal terminal INPUT of the second shift register stage1 and the second connection line 4 electrically connected to the enable signal terminal INPUT of each first shift register stage are arranged to intersect and are insulated from each other;
a third repair line electrically connected with the output signal end of each second shift register and a third connecting line electrically connected with the output signal end of each first shift register are arranged in a crossed mode and are insulated from each other; for example, as shown in fig. 1, the third repair line 5 electrically connected to the output signal terminal OUT of the second shift register stage1 and the third connection line 6 electrically connected to the output signal terminal OUT of each first shift register stage are arranged to intersect and be insulated from each other;
a fourth repairing line electrically connected with the reset signal end of each second shift register and a fourth connecting line electrically connected with the reset signal end of each first shift register are arranged in a crossed mode and are insulated from each other; for example, as shown in fig. 1, the fourth repair line 7 electrically connected to the RESET signal terminal RESET of the second shift register stage1 and the fourth connection line 8 electrically connected to the RESET signal terminal RESET of each first shift register are disposed to cross and insulated from each other.
According to the gate driving circuit provided by the embodiment of the invention, when the first shift register is abnormal, the second shift register can replace the abnormal first shift register to work, so that the normal work of the whole gate driving circuit can be ensured by repairing the abnormal first shift register in the gate driving circuit, and the yield of a display device can be improved; in addition, the repair lines electrically connected to the signal terminals of the second shift register and the signal lines and the connecting lines electrically connected to the signal terminals of the first shift register are arranged in a cross-insulated manner, so that when repairing is performed by using the second shift register, the repair lines electrically connected to the signal terminals of the second shift register and the signal lines and the connecting lines electrically connected to the signal terminals of the first shift register of the abnormal stage are simply connected in a melting manner, and signals do not need to be additionally provided for the repair lines. Taking the occurrence of an abnormality in the third-Stage first shift register Stage3 as an example, it is sufficient to fuse the clock signal lines CLK1 and CLK3 connected to the first repair line 2 of the second shift register Stage1 and the first connection line 1 of the third-Stage first shift register Stage3, fuse the second repair line 3 of the second shift register Stage1 and the second connection line 4 electrically connected to the on signal terminal INPUT of the third-Stage first shift register Stage3, fuse the third repair line 5 of the second shift register Stage1 and the third connection line 6 electrically connected to the output signal terminal OUT of the third-Stage first shift register Stage3, fuse the fourth repair line 7 of the second shift register Stage1 and the fourth connection line 8 electrically connected to the RESET signal terminal RESET of the third-Stage first shift register Stage3, and it is not necessary to additionally fuse the first connection line 2 of the second shift register Stage1 and the gate driver circuit, The second repair line 3, the third repair line 5 and the fourth repair line 7 provide signals.
It should be noted that the gate driving circuit provided in the embodiment of the present invention may be applied to various types of gate driving circuits formed by using a GOA process, and is not limited herein. For example, the gate driving circuit provided by the embodiment of the present invention may have a structure as shown in fig. 1, and the structures of the first shift registers and the second shift registers may have structures as shown in fig. 2. Specifically, as shown in fig. 2, the integrated circuit includes five transistors M1, M2, M3, M4 and M5, the control signal terminals include a start signal terminal INPUT, clock signal terminals CLKA and CLKB, a low level signal terminal VGL and a RESET signal terminal RESET, and the output signal terminal is OUT; as shown in fig. 1, for each of the first shift registers Stage1 and Stage2 … … StageN, the start signal is generated from an output signal of a first shift register of a Stage immediately above the present Stage of the first shift register, for the first Stage of the first shift register Stage1, the gate driving circuit provides a dedicated STV signal as a start signal, the reset signal is generated by the output signal of the next two stages of the first shift register Stage1, the reset signal of the last two stages of the first shift registers Stage n-1 and Stage n is provided by the gate driving circuit or provided by a dedicated reset circuit, the output signal is output to the corresponding gate line of the first shift register Stage, the clock signal terminals CLKA and CLKB of the first shift registers Stage1 and Stage3 … … of the odd-numbered stages are respectively connected to the clock signal lines CLK1 and CLK3, and the clock signal terminals CLKA and CLKB of the first shift registers Stage2 and Stage4 … … of the even-numbered stages are respectively connected to the clock signal lines CLK2 and CLK 4; the structure of each second shift register is the same as that of the first shift register, so that when the first shift register at a certain stage is abnormal, the second shift register is used for replacing the abnormal first shift register to work, the normal work of the whole grid drive circuit is ensured, and the normal display of a picture by the display device is further ensured; in the display time of a frame, the gate driving circuit provides a pulse signal with a certain width to all gate lines in the display device line by line, the time width of the pulse signal is generally one time to several times of the charging time allocated to each line of pixels, the waveform of the pulse signal is generally square wave, and the source driving circuit provides correct video signal voltage to each pixel line by line in cooperation with the time generated by the pulse signal on each gate line, so that the normal display of the picture is realized.
In specific implementation, in the gate driving circuit provided by the embodiment of the invention, as shown in fig. 1, the first repair line 2 is arranged to be cross-insulated from the clock signal lines CLK1, CLK2, CLK3 and CLK4, so that the first repair line 2 may be arranged in different layers from the clock signal lines CLK1, CLK2, CLK3 and CLK4, and thus, the gate driving circuit may not work normally due to the fact that the first repair line 2 is electrically connected to the clock signal lines CLK1, CLK2, CLK3 and CLK 4.
In specific implementation, as shown in fig. 1, in the gate driving circuit provided in the embodiment of the present invention, the first repair line 2 and the first connection line 1 are respectively arranged to cross and insulate the clock signal lines CLK1, CLK2, CLK3, and CLK4, so that the first repair line 2 and the first connection line 1 can be arranged in the same layer, that is, the same patterning process is performed on the same film layer to simultaneously form the first repair line 2 and the first connection line 1, which can simplify the manufacturing process of the gate driving circuit and reduce the production cost. Of course, the first repair line and the first connection line may also be formed by two patterning processes, which is not limited herein.
In a specific implementation, in the gate driving circuit provided in the embodiment of the present invention, since the first repair line and the clock signal line are disposed in different layers and the first repair line and the connection line are disposed in the same layer, the first repair line and the first connection line may be disposed in the same layer as the gate line and the clock signal line and the data line are disposed in the same layer; or, the first repair line, the first connection line and the data line may be disposed on the same layer, and the clock signal line and the gate line may be disposed on the same layer.
In specific implementation, in the gate driving circuit provided in the embodiment of the present invention, as shown in fig. 1, the second repair line 3 and the second connection line 4 are arranged in a cross-insulated manner, so that the second repair line 3 and the second connection line 4 can be arranged in different layers, and thus, the gate driving circuit can be prevented from being unable to work normally due to the electrical connection between the second repair line 3 and the second connection line 4.
In specific implementation, in the gate driving circuit provided in the embodiment of the present invention, as shown in fig. 1, the third repair line 5 and the third connection line 6 are arranged in a cross-insulated manner, so that the third repair line 5 and the third connection line 6 can be arranged in different layers, and thus, the gate driving circuit can be prevented from being unable to work normally due to the electrical connection between the third repair line 5 and the third connection line 6.
In specific implementation, in the gate driving circuit provided in the embodiment of the present invention, as shown in fig. 1, the fourth repair line 7 and the fourth connection line 8 are arranged in a cross-insulated manner, so that the fourth repair line 7 and the fourth connection line 8 can be arranged in different layers, and thus, the gate driving circuit can be prevented from being unable to work normally due to the electrical connection between the fourth repair line 7 and the fourth connection line 8.
In specific implementation, in the gate driving circuit provided in the embodiment of the present invention, on the premise that the second repair line, the third repair line, and the fourth repair line are insulated from each other, the second repair line, the third repair line, and the fourth repair line may be disposed on the same layer, that is, the second repair line, the third repair line, and the fourth repair line are formed on the same film layer at the same time by using the same patterning process. Of course, the second repair line, the third repair line, and the fourth repair line may also be formed by a plurality of patterning processes, respectively, and are not limited herein.
In a specific implementation, in the gate driving circuit provided in the embodiment of the present invention, on the premise that the second connecting line, the third connecting line, and the fourth connecting line are insulated from each other, the second connecting line, the third connecting line, and the fourth connecting line may be disposed in the same layer, that is, the second connecting line, the third connecting line, and the fourth connecting line are formed simultaneously on the same film layer by using the same patterning process. Of course, the second connection line, the third connection line and the fourth connection line may also be formed by a plurality of patterning processes, which is not limited herein.
In a specific implementation, in the gate driving circuit provided in the embodiment of the present invention, since the second repair line, the third repair line, and the fourth repair line are disposed on the same layer, the second connection line, the third connection line, and the fourth connection line are disposed on the same layer, the second repair line and the second connection line are disposed on different layers, the third repair line and the third connection line are disposed on different layers, and the fourth repair line and the fourth connection line are disposed on different layers, the second repair line, the third repair line, and the fourth repair line can be disposed on the same layer as the gate line, and the second connection line, the third connection line, and the fourth connection line are disposed on the same layer as the data line; or, the second repair line, the third repair line and the fourth repair line may be all disposed on the same layer as the data line, and the second connection line, the third connection line and the fourth connection line may be all disposed on the same layer as the gate line.
In the gate driving circuit according to the embodiment of the invention, the other signal terminals of each of the first shift registers and the second shift registers are electrically connected to the corresponding signal lines, for example, as shown in fig. 1, the low level signal terminal VGL of each of the first shift registers Stage1 and Stage2 … … Stage n and the low level signal terminal VGL of the second shift register Stage1 are electrically connected to the low level signal line 9, respectively.
It should be noted that, in the gate driving circuit provided in the embodiment of the present invention, as shown in fig. 1, a second shift register stage1 may be additionally provided, so that only the first shift register of one stage can be repaired. In order to repair the multi-stage first shift register, a plurality of second shift registers may be additionally provided, which is not limited herein; for example, as shown in fig. 3, two second shift registers stage1 and stage2 are additionally provided. Specifically, the number of the second shift registers may be set according to actual circumstances.
In a specific implementation, in the gate driving circuit provided in the embodiment of the present invention, as shown in fig. 1, each second shift register may be disposed on a side of the first Stage first shift register Stage1 away from the second Stage first shift register Stage 2; or, each second shift register may be disposed on a side of the last stage first shift register StageN away from the penultimate stage first shift register StageN-1; alternatively, as shown in fig. 3, a part of the second shift registers may be disposed on a side of the first Stage first shift register Stage1 away from the second Stage first shift register Stage2, and the rest of the second shift registers may be disposed on a side of the last Stage first shift register Stage away from the penultimate Stage first shift register Stage-1, which is not limited herein.
It should be noted that, when a part of the second shift registers are located at a side of the first-stage first shift register far from the second-stage first shift register, and the remaining second shift registers are located at a side of the last-stage first shift register far from the penultimate first shift register, the second shift register near the first shift register with the abnormality can be selected for repair, so that the resistances of the first repair line, the second repair line, the third repair line and the fourth repair line can be ensured to be small, and the coupling capacitances between the first repair line, the second repair line, the third repair line and the fourth repair line and the connecting line are small, so that the repair effect can be optimized.
In a specific implementation, in the gate driving circuit provided in the embodiment of the present invention, as shown in fig. 3, the number of the second shift registers located on the side of the first shift register Stage1 away from the second shift register Stage2 is equal to the number of the second shift registers located on the side of the last shift register Stage away from the penultimate shift register Stage StageN-1; at this time, the second shift registers may be divided into two groups, the second shift registers included in each group are different from each other, and the two second shift registers included in each group are respectively located on a side of the first-Stage first shift register Stage1 away from the second-Stage first shift register Stage2 and a side of the last-Stage first shift register Stage n away from the penultimate-second-Stage first shift register Stage-1; preferably, two second shift registers included in each group share one second repairing line 3, one third repairing line 5, and one fourth repairing line 7, so that the arrangement of one second repairing line 3, one third repairing line 5, and one fourth repairing line 7 can be saved, and the occupied space of the second repairing line 3, the third repairing line 5, and the fourth repairing line 7 can be saved.
For the gate driving circuit provided in the embodiment of the present invention, an embodiment of the present invention further provides a method for repairing a gate driving circuit, where when an abnormality occurs in the first shift register, as shown in fig. 4, the method includes the following steps:
s401, connecting a first repair line of a second shift register with a clock signal line connected with a first connecting line of the first shift register with abnormality in a melting way, and disconnecting a clock signal end of the first shift register with abnormality from the first connecting line; for example, taking an abnormality of the third-Stage first shift register Stage3 of the gate driver circuit shown in fig. 1 as an example, after repairing the abnormality, as shown in fig. 5, the first repair line 2 of the second shift register Stage1 is fusion-connected to the clock signal lines CLK1 and CLK3 connected to the first connection line 1 of the third-Stage first shift register Stage3, and the connection between the clock signal terminals CLKA and CLKB of the third-Stage first shift register Stage3 and the first connection line 1 is disconnected (as shown by × in fig. 5), so that the influence of the abnormality of the third-Stage first shift register Stage3 on the gate driver circuit can be avoided;
s402, connecting a second repair line of a second shift register with a second connecting line of the abnormal first shift register in a melting mode, and disconnecting a starting signal end of the abnormal first shift register from the second connecting line; for example, as shown in fig. 5, the second repair line 3 of the second shift register Stage1 is connected to the second connection line 4 of the third Stage first shift register Stage3 in a fused manner, and the connection between the start signal terminal INPUT of the third Stage first shift register Stage3 and the second connection line 4 is disconnected (as shown by × in fig. 5), so that the gate driving circuit can be prevented from being affected by the abnormal third Stage first shift register Stage 3;
s403, connecting a third repair line of the second shift register with a third connecting line of the abnormal first shift register in a melting mode, and disconnecting an output signal end of the abnormal first shift register from the third connecting line; for example, as shown in fig. 5, the third repair line 5 of the second shift register Stage1 is connected to the third connection line 6 of the third-Stage first shift register Stage3 in a fused manner, and the connection between the output signal terminal OUT of the third-Stage first shift register Stage3 and the third connection line 6 is disconnected (as shown by x in fig. 5), so that the influence of the abnormal third-Stage first shift register Stage3 on the gate driving circuit can be avoided;
s404, connecting a fourth repair line of the second shift register and a fourth connecting line of the abnormal first shift register in a melting way, and disconnecting a reset signal end of the abnormal first shift register from the fourth connecting line; for example, as shown in fig. 5, the fourth repair line 7 of the second shift register Stage1 is connected to the fourth connection line 8 of the third-Stage first shift register Stage3 in a fused manner, and the connection between the RESET signal terminal RESET of the third-Stage first shift register Stage3 and the fourth connection line 8 is disconnected (as shown by × in fig. 5), so that the influence of the abnormal third-Stage first shift register Stage3 on the gate driving circuit can be avoided.
It should be noted that, in the repairing method provided in the embodiment of the present invention, the execution of step S401, step S402, step S403, and step S404 is not in a sequential order, and is not limited herein.
In a specific implementation, in the repair method provided in the embodiment of the present invention, the fusion bonding may be implemented by a laser method, or may be implemented by other means, which is not limited herein.
In specific implementation, in the repairing method provided in the embodiment of the present invention, when two second shift registers sharing the same second repairing line, the same third repairing line, and the same fourth repairing line are selected to respectively repair two first shift registers, as shown in fig. 6, the method may further include the following steps:
s601, a second repairing line shared by two second shift registers is disconnected at a position between two melting points on the second repairing line; for example, in the case where an abnormality occurs in the third-Stage first shift register Stage3 and the third-to-last-Stage first shift register Stage n-2 of the gate driver circuit shown in fig. 3, as shown in fig. 7 after the abnormality is repaired, the third-Stage first shift register Stage3 is replaced with the second shift register Stage1 located on the side of the first-Stage first shift register Stage1 away from the second-Stage first shift register Stage2, the second shift register Stage2 located on the side of the first-to-last-Stage first shift register Stage down to the side of the second-to-last-Stage first shift register Stage StageN-1 is replaced with the third-to-last-Stage first shift register Stage n-2, and the second shift register Stage3 common to the two second shift registers Stage1 and Stage2 is disconnected at a position C (shown by × in fig. 7) between two fusion points a and B on the second repair line, so that the on the second repair line of the two stages 1 and 2 can be avoided Leading to signal anomalies;
s602, a third repairing line shared by two second shift registers is disconnected at a position between two melting points on the third repairing line; for example, as shown in fig. 7, the third repair line 5 common to two second shift registers stage1 and stage2 is cut off at a position F (shown by × in fig. 7) between two melting points D and E on the third repair line, so that it is possible to avoid signal abnormality due to collision of output signals of the two stages of second shift registers stage1 and stage2 on the same third repair line 5;
s603, a fourth repairing line shared by the two second shift registers is disconnected at a position between two melting points on the fourth repairing line; for example, as shown in fig. 7, the fourth repair line 7 common to two second shift registers stage1 and stage2 is disconnected at a position I (shown by x in fig. 7) between two melting points G and H on the fourth repair line, so that it is possible to prevent the reset signals of the two stages of second shift registers stage1 and stage2 from colliding with the same fourth repair line 7 to cause a signal abnormality.
It should be noted that, in the repairing method provided in the embodiment of the present invention, the execution of step S401, step S402, step S403, step S404, step S601, step S602, and step S603 is not in a sequential order, and is not limited herein.
Preferably, in the repairing method provided in the embodiment of the present invention, when the abnormal first shift register is located at the upper half portion of the display panel, the second shift register located at a side of the first-stage first shift register away from the second-stage first shift register is selected for repairing; and when the abnormal first shift register is positioned at the lower half part of the display panel, selecting a second shift register positioned at one side of the last stage of first shift register, which is far away from the penultimate stage of first shift register, for repairing. For example, as shown in fig. 7, the third Stage first shift register Stage3 is located at the upper half of the display panel, and when an abnormality occurs in the third Stage first shift register Stage3, the second shift register Stage1 located on the side of the first Stage first shift register Stage1 away from the second Stage first shift register Stage2 is preferentially selected for repair; the third last stage first shift register StageN-2 is positioned at the lower half part of the display panel, and when the third last stage first shift register StageN-2 is abnormal, the second shift register stage2 positioned at one side of the first last stage first shift register StageN far away from the second last stage first shift register StageN-1 is preferably selected for repair; therefore, the resistors of the first repairing wire, the second repairing wire, the third repairing wire and the fourth repairing wire can be ensured to be small, and the coupling capacitors between the first repairing wire, the second repairing wire, the third repairing wire and the fourth repairing wire and the connecting wire are small, so that the repairing effect can be optimized.
It should be noted that, in the repair method provided in the embodiment of the present invention, the other signal terminal of the first shift register in which the abnormality occurs needs to be disconnected from the signal line. For example, as shown in fig. 5, the low level signal terminal VGL of the third Stage first shift register Stage3 is disconnected from the low level signal line, so as to avoid the influence of the abnormal third Stage first shift register Stage3 on the gate driving circuit; as shown in fig. 7, the low level signal terminal VGL of the third Stage first shift register Stage3 and the third last Stage first shift register StageN-2 is disconnected from the low level signal line, so as to prevent the gate driving circuit from being affected by the abnormal third Stage first shift register Stage3 and the third last Stage first shift register StageN-2.
Based on the same inventive concept, an embodiment of the present invention further provides a display device, including the gate driving circuit provided in the embodiment of the present invention, where the display device may be: any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like. The implementation of the display device can be seen in the embodiments of the gate driving circuit, and repeated descriptions are omitted.
The embodiment of the invention provides a gate driving circuit, a repairing method thereof and a display device, wherein the gate driving circuit comprises a plurality of first shift registers and at least one second shift register which are connected in series; when the first shift register is abnormal, the second shift register can replace the abnormal first shift register to work, so that the normal work of the whole grid driving circuit can be ensured by repairing the abnormal first shift register in the grid driving circuit, and the yield of the display device can be improved; in addition, the repair lines electrically connected to the signal terminals of the second shift register and the signal lines and the connecting lines electrically connected to the signal terminals of the first shift register are arranged in a cross-insulated manner, so that when repairing is performed by using the second shift register, the repair lines electrically connected to the signal terminals of the second shift register and the signal lines and the connecting lines electrically connected to the signal terminals of the first shift register of the abnormal stage are simply connected in a melting manner, and signals do not need to be additionally provided for the repair lines.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (16)
1. A gate drive circuit includes a plurality of first shift registers connected in series; it is characterized by also comprising: at least one second shift register; each second shift register is used for replacing the first shift register with abnormity to work;
the clock signal end of each first shift register is electrically connected with the clock signal line through a first connecting line; a first repair line electrically connected with a clock signal end of each second shift register is arranged in a crossed manner with the clock signal line and is insulated from the clock signal line;
a second repair line electrically connected with the starting signal end of each second shift register and a second connecting line electrically connected with the starting signal end of each first shift register are arranged in a crossed mode and are insulated from each other;
a third repair line electrically connected with the output signal end of each second shift register and a third connecting line electrically connected with the output signal end of each first shift register are arranged in a crossed manner and are insulated from each other;
and a fourth repairing wire electrically connected with the reset signal end of each second shift register and a fourth connecting wire electrically connected with the reset signal end of each first shift register are arranged in a crossed manner and are insulated from each other.
2. The gate drive circuit of claim 1, wherein the first repair line is disposed in a different layer from the clock signal line.
3. The gate driving circuit of claim 2, wherein the first repair line is disposed at the same layer as the first connection line.
4. The gate driving circuit according to claim 3, wherein the first repair line and the first connection line are disposed at the same layer as a gate line, and the clock signal line is disposed at the same layer as a data line; or,
the first repair line, the first connecting line and the data line are arranged on the same layer, and the clock signal line and the grid line are arranged on the same layer.
5. The gate driving circuit of claim 1, wherein the second repair line is disposed in a different layer from the second connection line.
6. The gate drive circuit of claim 5, wherein the third repair line is disposed in a different layer from the third connection line.
7. The gate drive circuit of claim 6, wherein the fourth repair line is disposed in a different layer from the fourth connection line.
8. The gate drive circuit of claim 7, wherein the second repair line, the third repair line, and the fourth repair line are disposed at the same layer.
9. The gate driver circuit according to claim 8, wherein the second connection line, the third connection line, and the fourth connection line are provided in the same layer.
10. The gate driving circuit according to claim 9, wherein the second repair line, the third repair line, and the fourth repair line are all disposed at the same layer as a gate line, and the second connection line, the third connection line, and the fourth connection line are all disposed at the same layer as a data line; or,
the second repairing line, the third repairing line and the fourth repairing line are all arranged on the same layer with the data line, and the second connecting line, the third connecting line and the fourth connecting line are all arranged on the same layer with the grid line.
11. The gate driving circuit according to any of claims 1 to 10, wherein each of the second shift registers is located on a side of the first shift register of the first stage remote from the first shift register of the second stage; or,
each second shift register is positioned at one side of the last stage of the first shift register, which is far away from the first shift register of the penultimate stage; or,
and a part of the second shift registers are positioned on one side of the first shift register of the first stage, which is far away from the first shift register of the second stage, and the rest of the second shift registers are positioned on one side of the first shift register of the last stage, which is far away from the first shift register of the penultimate stage.
12. The gate driver circuit according to claim 11, wherein the number of the second shift registers located on a side of the first shift register of a first stage away from the first shift register of a second stage is equal to the number of the second shift registers located on a side of the first shift register of a last stage away from the first shift register of a penultimate stage;
dividing each second shift register into two groups, wherein the second shift registers in each group are different from each other, and the two second shift registers in each group are respectively positioned on one side of the first shift register of the first stage, which is far away from the first shift register of the second stage, and one side of the first shift register of the last stage, which is far away from the first shift register of the penultimate stage;
two second shift registers in each group share one second repairing line, one third repairing line and one fourth repairing line.
13. A display device, comprising: a gate drive circuit as claimed in any one of claims 1 to 12.
14. A method for repairing a gate driving circuit, comprising:
when the first shift register is abnormal, a first repair line of a second shift register is connected with a clock signal line connected with a first connecting line of the first shift register with the abnormality in a melting way, and the connection between a clock signal end of the first shift register with the abnormality and the first connecting line is disconnected;
connecting a second repair line of the second shift register with a second connecting line of the first shift register with abnormality in a melting manner, and disconnecting a starting signal end of the first shift register with abnormality from the second connecting line;
connecting a third repair line of the second shift register with a third connecting line of the first shift register with abnormality in a melting manner, and disconnecting an output signal end of the first shift register with abnormality from the third connecting line;
and connecting a fourth repairing line of the second shift register with a fourth connecting line of the first shift register with abnormality in a melting way, and disconnecting the reset signal end of the first shift register with abnormality from the fourth connecting line.
15. The repair method of claim 14, wherein when two second shift registers sharing a same second repair line, a same third repair line, and a same fourth repair line are selected to repair two first shift registers, respectively, further comprising:
disconnecting a second repair line common to the two second shift registers at a location between two melt points on the second repair line;
disconnecting a third repair line common to the two second shift registers at a location between two melt points on the third repair line;
a fourth repair line common to the two second shift registers is disconnected at a location between two melt points on the fourth repair line.
16. A repair method according to claim 14, further comprising:
when the abnormal first shift register is positioned at the upper half part of the display panel, a second shift register positioned at one side of the first-stage first shift register, which is far away from the second-stage first shift register, is selected for repairing;
and when the abnormal first shift register is positioned at the lower half part of the display panel, selecting a second shift register positioned at one side of the last stage of first shift register, which is far away from the penultimate stage of first shift register, for repairing.
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| CN201610051710.6A CN105654886A (en) | 2016-01-25 | 2016-01-25 | Grid drive circuit, repairing method thereof and display device |
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