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CN107968128B - Low-consumable, high-performance back-contact conductive integrated backplane and manufacturing method thereof - Google Patents

Low-consumable, high-performance back-contact conductive integrated backplane and manufacturing method thereof Download PDF

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CN107968128B
CN107968128B CN201711160250.1A CN201711160250A CN107968128B CN 107968128 B CN107968128 B CN 107968128B CN 201711160250 A CN201711160250 A CN 201711160250A CN 107968128 B CN107968128 B CN 107968128B
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copper
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copper film
backboard
performance back
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CN107968128A (en
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孙嵩泉
王杨阳
马磊
彭为报
李晨
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POLAR NEW ENERGY (BENGBU) CO Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00Constructional details of devices covered by this subclass
    • H10F77/20Electrodes
    • H10F77/206Electrodes for devices having potential barriers
    • H10F77/211Electrodes for devices having potential barriers for photovoltaic cells
    • H10F77/219Arrangements for electrodes of back-contact photovoltaic cells
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F10/00Individual photovoltaic cells, e.g. solar cells
    • H10F10/10Individual photovoltaic cells, e.g. solar cells having potential barriers
    • H10F10/14Photovoltaic cells having only PN homojunction potential barriers
    • H10F10/146Back-junction photovoltaic cells, e.g. having interdigitated base-emitter regions on the back side
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00Manufacture or treatment of devices covered by this subclass
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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Abstract

The present invention gives the production methods that a kind of low-material-consumption, high-performance back contacts conduction integrate backboard, the following steps are included: forming copper film by magnetron sputtering copper facing in the flexible substrate of insulation, copper film constitutes conducting circuit pattern on flexible substrates, copper film with a thickness of 1nm~100nm;Copper coating is generated on above-mentioned copper film using electroless copper plating method, controls different location copper coating thickness;Above-mentioned conductive backings are cleaned and dried, obtain variable density reticular structure low-material-consumption, high-performance back contacts conduction integrates backboard.By generating copper coating, reaches circuit part width and thickness is controllable, the conducting channel cross section by electric current can be optimized, consumptive material is reduced after circuit optimization, and package assembling will not cause hot-spot;10 DEG C higher than cell piece series position of position temperature or so of original confluence, conductive backings of this optimization can solve, and it is increasingly complex to make figure, the higher circuit of resolution requirement, be particularly suitable for the more and complicated back contacts type cell encapsulation of the back electrodes such as IBC.

Description

低耗材、高性能背接触导电集成背板及其制作方法Low-consumable, high-performance back-contact conductive integrated backplane and manufacturing method thereof

技术领域technical field

本发明涉及一种低耗材、高性能的背接触导电集成背板。The invention relates to a low-consumable, high-performance back-contact conductive integrated backplane.

本发明还涉及一种低耗材、高性能背接触导电集成背板的制作方法。The invention also relates to a method for manufacturing a low-consumable, high-performance back-contact conductive integrated backplane.

背景技术Background technique

铜基导电集成背板广泛应用于电子元器件领域,而铜材成本在整个铜基导电集成背板占据了65%,传统的铜基导电集成背板有以下两种制作方法:1、铜箔和胶膜复合,用激光刻两条槽,去掉刻槽中间部分,达到绝缘效果或者直接用制作电路板的方法刻蚀去掉需要绝缘部分;2、利用模板和电解铜箔工艺,直接成型。但这两种方法都具有:(1)耗材多;(2)导电层的宽度和厚度不可局部调控;(3)封装成组件局部电流大,易发热;(4)不易成复杂电路等诸多缺点。Copper-based conductive integrated backplanes are widely used in the field of electronic components, and the cost of copper materials accounts for 65% of the entire copper-based conductive integrated backplane. Traditional copper-based conductive integrated backplanes have the following two manufacturing methods: 1. Copper foil Composite with the adhesive film, engrave two grooves with a laser, remove the middle part of the groove to achieve the insulation effect, or directly use the method of making a circuit board to etch and remove the part that needs insulation; 2. Use the template and electrolytic copper foil process to form directly. But both methods have: (1) many consumables; (2) the width and thickness of the conductive layer cannot be locally adjusted; (3) the local current of the packaged component is large, and it is easy to generate heat; (4) it is not easy to form a complex circuit and many other disadvantages .

发明内容Contents of the invention

本发明所要解决的技术问题是提供一种可提高组件效率,减少安全隐患,减少铜耗材的低耗材、高性能背接触导电集成背板。The technical problem to be solved by the present invention is to provide a low-consumable, high-performance back-contact conductive integrated backplane that can improve component efficiency, reduce potential safety hazards, and reduce copper consumables.

本发明所要解决的技术问题是还提供一种低耗材、高性能背接触导电集成背板的制作方法。The technical problem to be solved by the present invention is to provide a method for manufacturing a low-consumable, high-performance back-contact conductive integrated backplane.

为解决上述技术问题,本发明提供了一种低耗材、高性能背接触导电集成背板的制作方法,包括以下步骤:In order to solve the above technical problems, the present invention provides a method for manufacturing a low-consumable, high-performance back-contact conductive integrated backplane, which includes the following steps:

a)在绝缘的柔性衬底上通过磁控溅射镀铜形成铜膜,根据组件电流密度设计线型和图案,形成变密度网状结构,铜膜在柔性衬底上构成导电电路图形,铜膜的厚度为1nm~100nm;a) Copper film is formed by magnetron sputtering copper plating on an insulating flexible substrate, and the line type and pattern are designed according to the current density of the component to form a variable density network structure. The copper film forms a conductive circuit pattern on the flexible substrate, and the copper The thickness of the film is 1nm-100nm;

b)采用电化学镀铜方法在步骤a)得到的铜膜上生成铜镀层,控制不同位置铜镀层厚度,其中电池片互联位置的铜镀层高度为1μm~30μm,电流汇流引出位置的铜镀层高度为30μm~100μm;b) The electrochemical copper plating method is used to form a copper coating on the copper film obtained in step a), and the thickness of the copper coating at different positions is controlled. The height of the copper coating at the interconnection position of the battery sheet is 1 μm to 30 μm, and the height of the copper coating at the position where the current confluence is drawn out 30μm~100μm;

c)将步骤b)得到的导电集成背板清洗干燥,得到变密度网状结构的耗材、高性能背接触导电集成背板。c) cleaning and drying the conductive integrated backplane obtained in step b), to obtain consumables with a variable density network structure and a high-performance back-contact conductive integrated backplane.

作为本发明优选,在步骤a)中磁控溅射镀铜时直接采用掩膜方法在柔性衬底上形成构成导电电路图形的铜膜。As preferred in the present invention, the copper film constituting the conductive circuit pattern is directly formed on the flexible substrate by using a mask method during the copper plating by magnetron sputtering in step a).

作为本发明优选,对步骤a)中磁控溅射镀铜后形成的铜膜利用化学刻蚀或激光刻蚀出导电电路图形,导电电路图形形成变密度网状结构。As preferred in the present invention, the copper film formed after magnetron sputtering copper plating in step a) is chemically etched or laser etched to form a conductive circuit pattern, and the conductive circuit pattern forms a variable density network structure.

作为本发明优选,步骤a)中铜膜的厚度为5nm~20nm。As preferred in the present invention, the thickness of the copper film in step a) is 5nm-20nm.

采用这样的方法后,步骤a)中得到导电电路图形与传统的技术中图形一致,只是通过磁控溅射镀铜形成铜膜的厚度与传统技术中直接采用铜箔的厚度有所区别,在此步骤控制局部导电电路的宽度;After adopting such a method, the conductive circuit pattern obtained in step a) is consistent with the pattern in the traditional technology, but the thickness of the copper film formed by magnetron sputtering copper plating is different from the thickness of the copper foil directly used in the traditional technology. This step controls the width of the local conductive circuit;

通过步骤b)生成铜镀层,达到电路局部宽度和厚度可控制,可优化通过电流的导电电路横截面,电路优化后耗材减少;常规产品耗材节约40%,电路优化后,封装组件不会引起局部过热;原汇流位置温度比电池片串联位置高10℃左右,此优化的导电背板可解决,可制作图形更为复杂,分辨率要求更高的导电电路,特别适合IBC(数字插指型电池用的背接触导电集成背板)等背电极较多且复杂的背接触类型电池封装。Through step b) to generate a copper plating layer, the local width and thickness of the circuit can be controlled, and the cross-section of the conductive circuit through which the current passes can be optimized. After the circuit is optimized, the consumables are reduced; the consumables of conventional products are saved by 40%. After the circuit is optimized, the packaged components will not cause local Overheating; the temperature of the original confluence position is about 10°C higher than that of the cells in series. This optimized conductive backplane can solve the problem, and can make conductive circuits with more complex graphics and higher resolution requirements, especially suitable for IBC (digital finger battery) The back contact conductive integrated back plate used) and other back contact type battery packages with more and complex back electrodes.

本发明还提供了一种低耗材、高性能背接触导电集成背板,采用上述低耗材、高性能背接触导电集成背板的制作方法得到的低耗材、高性能背接触导电集成背板。The present invention also provides a low-consumable, high-performance back-contact conductive integrated backplane, which is obtained by adopting the manufacturing method of the above-mentioned low-consumable, high-performance back-contact conductive integrated backplane.

采用这样的结构后,本背接触导电集成背板的组件减少铜耗材,减少安全隐患,提高组件效率,串联电阻减小。After adopting such a structure, the components of the back-contact conductive integrated backplane can reduce copper consumables, reduce potential safety hazards, improve component efficiency, and reduce series resistance.

具体实施方式Detailed ways

实施例一Embodiment one

本低耗材、高性能背接触导电集成背板的制作方法,包括以下步骤:The manufacturing method of the low-consumable, high-performance back-contact conductive integrated backplane includes the following steps:

a)在绝缘的柔性衬底上通过磁控溅射镀铜形成铜膜,根据组件电流密度设计线型和图案,磁控溅射镀铜时直接采用掩膜方法在柔性衬底上形成构成导电电路图形的铜膜,在此步骤控制局部导电电路的宽度,铜膜具有变密度网状结构,铜膜的厚度为1nm;a) Copper film is formed by magnetron sputtering copper plating on an insulating flexible substrate, and the line type and pattern are designed according to the current density of the component. The copper film of the circuit pattern, in this step, the width of the local conductive circuit is controlled, the copper film has a variable density network structure, and the thickness of the copper film is 1nm;

b)采用电化学镀铜方法在步骤a)得到的铜膜上生成铜镀层,调控局部工艺,控制不同位置铜镀层厚度,其中电池片互联位置的铜镀层高度为2μm,电流汇流引出位置的铜镀层高度为30μm;b) The electrochemical copper plating method is used to form a copper coating on the copper film obtained in step a), and the local process is regulated to control the thickness of the copper coating at different positions. The coating height is 30μm;

c)将步骤b)得到的导电集成背板清洗干燥,得到低耗材、高性能背接触导电集成背板。c) cleaning and drying the conductive integrated backplane obtained in step b), to obtain a low-consumable, high-performance back-contact conductive integrated backplane.

本实施例得到的背接触导电集成背板在电池片互联位置的铜膜及铜镀层的总厚度达到2001nm,电流汇流引出位置的铜膜及铜镀层的总厚度达到30001nm。The total thickness of the copper film and copper plating at the cell interconnection position of the back contact conductive integrated backplane obtained in this embodiment reaches 2001nm, and the total thickness of the copper film and copper plating at the current confluence and extraction position reaches 30001nm.

与传统的铜基导电集成背板相比,本实施例的低耗材、高性能背接触导电集成背板电流/电压参数,常规采用35μm厚度铜箔,封装一块组件的铜耗材约0.36kg,本实施例得到低耗材、高性能背接触导电集成背板的导电电路图形及图形的宽度上与传统技术的图形及宽度都相同,而采用本实施例得到背接触导电集成背板,铜耗材约为0.21kg,铜耗材的用量上节约40%。Compared with the traditional copper-based conductive integrated backplane, the current/voltage parameters of the low-consumable, high-performance back-contact conductive integrated backplane in this embodiment generally use 35 μm thick copper foil, and the copper consumable for packaging a component is about 0.36kg. The embodiment obtains the conductive circuit pattern and the width of the conductive circuit pattern and the pattern of the low-consumable, high-performance back-contact conductive integrated backplane are the same as those of the traditional technology, and the back-contact conductive integrated backplane is obtained by using this embodiment. 0.21kg, saving 40% in the consumption of copper consumables.

本背接触导电集成背板通过控制不同位置铜镀层厚度,达到导电电路的优化,与传统的铜基导电集成背板相比,封装组件不会引起局部过热,并适合于低电流(小于1A)高电压的组件封装。The back-contact conductive integrated backplane achieves the optimization of the conductive circuit by controlling the thickness of copper plating at different positions. Compared with the traditional copper-based conductive integrated backplane, the packaging components will not cause local overheating and are suitable for low current (less than 1A) High voltage component packaging.

实施例二Embodiment two

本低耗材、高性能背接触导电集成背板的制作方法,包括以下步骤:The manufacturing method of the low-consumable, high-performance back-contact conductive integrated backplane includes the following steps:

a)在绝缘的柔性衬底上通过磁控溅射镀铜形成铜膜,磁控溅射镀铜后采用化学刻蚀在铜膜上形成构成导电电路图形的铜膜,导电电路图形形成变密度网状结构,铜膜的厚度为100nm;a) A copper film is formed on an insulating flexible substrate by magnetron sputtering copper plating, and after magnetron sputtering copper plating, a copper film constituting a conductive circuit pattern is formed on the copper film by chemical etching, and the conductive circuit pattern forms a variable density Network structure, the thickness of the copper film is 100nm;

b)采用化学镀铜方法在步骤a)得到的铜膜上生成铜镀层,调控局部工艺,控制不同位置铜镀层厚度,其中电池片互联位置的铜镀层高度为30μm,电流汇流引出位置的铜镀层高度为100μm;b) The electroless copper plating method is used to form a copper coating on the copper film obtained in step a), and the local process is regulated to control the thickness of the copper coating at different positions. The height is 100 μm;

c)将步骤b)得到的导电集成背板清洗干燥,得到低耗材、高性能背接触导电集成背板。c) cleaning and drying the conductive integrated backplane obtained in step b), to obtain a low-consumable, high-performance back-contact conductive integrated backplane.

本实施例得到低耗材、高性能背接触导电集成背板在电池片互联位置的铜膜及铜镀层的总厚度达到30100nm,电流汇流引出位置的铜膜及铜镀层的总厚度达到100100nm。In this embodiment, the total thickness of the copper film and copper coating at the cell interconnection position of the low-consumable, high-performance back-contact conductive integrated backplane reaches 30100 nm, and the total thickness of the copper film and copper coating at the current converging and drawing position reaches 100100 nm.

与传统的铜基导电集成背板相比,常规采用182μm厚度铜箔,封装一块组件的铜耗材约2.6kg,本实施例得到低耗材、高性能背接触导电集成背板的导电电路图形及图形的宽度上与传统技术的图形及宽度都相同,而采用本实施例得到背接触导电集成背板,铜耗材约为1.56kg,铜耗材的用量上节约40%。Compared with the traditional copper-based conductive integrated backplane, the copper foil with a thickness of 182 μm is conventionally used, and the copper consumables for packaging a component are about 2.6kg. The width is the same as the pattern and width of the traditional technology, but the back contact conductive integrated backplane is obtained by using this embodiment, the copper consumable is about 1.56kg, and the consumption of copper consumable is saved by 40%.

本低耗材、高性能背接触导电集成背板通过控制不同位置铜镀层厚度,达到导电电路的优化,相比铜基导电集成背板,封装组件不会引起局部过热,主要用于大电流组价封装,电流约为12A。This low-consumable, high-performance back-contact conductive integrated backplane achieves the optimization of conductive circuits by controlling the thickness of copper plating at different positions. Compared with copper-based conductive integrated backplanes, packaging components will not cause local overheating, and is mainly used for high-current assembly. package, the current is about 12A.

实施例三Embodiment three

本低耗材、高性能背接触导电集成背板的制作方法,包括以下步骤:The manufacturing method of the low-consumable, high-performance back-contact conductive integrated backplane includes the following steps:

a)在绝缘的柔性衬底上通过磁控溅射镀铜形成铜膜,磁控溅射镀铜后采用激光刻蚀在铜膜上形成构成导电电路图形的铜膜,导电电路图形形成变密度网状结构,铜膜的厚度为5nm;a) A copper film is formed on an insulating flexible substrate by magnetron sputtering copper plating, and after magnetron sputtering copper plating, a copper film forming a conductive circuit pattern is formed on the copper film by laser etching, and the conductive circuit pattern forms a variable density Network structure, the thickness of the copper film is 5nm;

b)采用化学镀铜方法在步骤a)得到的铜膜上生成铜镀层,调控局部工艺,控制不同位置铜镀层厚度,其中电池片互联位置的铜镀层高度为20μm,电流汇流引出位置的铜镀层高度为40μm;b) Using the electroless copper plating method to form a copper coating on the copper film obtained in step a), adjust the local process, and control the thickness of the copper coating at different positions, wherein the height of the copper coating at the interconnection position of the cells is 20 μm, and the copper coating at the position where the current flow is drawn out The height is 40 μm;

c)将步骤b)得到的导电集成背板清洗干燥,得到低耗材、高性能背接触导电集成背板。c) cleaning and drying the conductive integrated backplane obtained in step b), to obtain a low-consumable, high-performance back-contact conductive integrated backplane.

本实施例得到低耗材、高性能背接触导电集成背板在电池片互联位置的铜膜及铜镀层的总厚度达到20005nm,电流汇流引出位置的铜膜及铜镀层的总厚度达到40005nm。In this embodiment, the total thickness of the copper film and the copper coating at the cell interconnection position of the low-consumable, high-performance back contact conductive integrated backplane reaches 20005nm, and the total thickness of the copper film and the copper coating at the position where the current confluence is led out reaches 40005nm.

与传统的铜基导电集成背板相比,常规采用35μm厚度铜箔,封装一块组件的铜耗材约0.50kg,本实施例得到背接触导电集成背板的导电电路图形及图形的宽度上与传统技术的图形及宽度都相同,而采用本实施例得到背接触导电集成背板,铜耗材约为0.30kg,铜耗材的用量上节约40%。Compared with the traditional copper-based conductive integrated backplane, the copper foil with a thickness of 35 μm is conventionally used, and the copper consumables for packaging a component are about 0.50 kg. The pattern and width of the technology are the same, but the back contact conductive integrated backplane is obtained by using this embodiment, the copper consumable is about 0.30kg, and the consumption of copper consumable is saved by 40%.

本背接触导电集成背板通过控制不同位置铜镀层厚度,达到导电电路的优化,相比铜基导电集成背板,封装组件不会引起局部过热,主要用于常规电流组价封装,电流约为9A。The back contact conductive integrated backplane achieves the optimization of the conductive circuit by controlling the thickness of the copper plating at different positions. Compared with the copper-based conductive integrated backplane, the packaging components will not cause local overheating. It is mainly used for conventional current package packaging, and the current is about 9A.

实施例四Embodiment four

本低耗材、高性能背接触导电集成背板的制作方法,包括以下步骤:The manufacturing method of the low-consumable, high-performance back-contact conductive integrated backplane includes the following steps:

a)在绝缘的柔性衬底上通过磁控溅射镀铜形成铜膜,磁控溅射镀铜后采用激光刻蚀在铜膜上形成构成导电电路图形的铜膜,导电电路图形形成变密度网状结构,铜膜的厚度为20nm;a) A copper film is formed on an insulating flexible substrate by magnetron sputtering copper plating, and after magnetron sputtering copper plating, a copper film forming a conductive circuit pattern is formed on the copper film by laser etching, and the conductive circuit pattern forms a variable density Network structure, the thickness of the copper film is 20nm;

b)采用化学镀铜方法在步骤a)得到的铜膜上生成铜镀层,调控局部工艺,控制不同位置铜镀层厚度,其中电池片互联位置的铜镀层高度为25μm,电流汇流引出位置的铜镀层高度为50μm;b) Using the electroless copper plating method to generate a copper coating on the copper film obtained in step a), adjust the local process, and control the thickness of the copper coating at different positions, wherein the height of the copper coating at the interconnection position of the battery sheet is 25 μm, and the copper coating at the position where the current flow is drawn out The height is 50 μm;

c)将步骤b)得到的导电集成背板清洗干燥,得到低耗材、高性能背接触导电集成背板。c) cleaning and drying the conductive integrated backplane obtained in step b), to obtain a low-consumable, high-performance back-contact conductive integrated backplane.

本实施例得到低耗材、高性能背接触导电集成背板在电池片互联位置的铜膜及铜镀层的总厚度达到25020nm,电流汇流引出位置的铜膜及铜镀层的总厚度达到50020nm。In this embodiment, the total thickness of the copper film and the copper coating at the cell interconnection position of the low-consumable, high-performance back contact conductive integrated backplane reaches 25020nm, and the total thickness of the copper film and the copper coating at the position where the current confluence is led out reaches 50020nm.

与传统的铜基导电集成背板相比,常规采用63μm厚度铜箔,封装一块组件的铜耗材约0.90kg,本实施例得到背接触导电背板的导电电路图形及图形的宽度上与传统技术的图形及宽度都相同,而采用本实施例得到背接触导电集成背板,铜耗材约为0.54kg,铜耗材的用量上节约40%。Compared with the traditional copper-based conductive integrated backplane, the copper foil with a thickness of 63 μm is conventionally used, and the copper consumables for packaging a component are about 0.90 kg. The patterns and widths are the same, but the back contact conductive integrated backplane is obtained by using this embodiment, the copper consumable is about 0.54 kg, and the consumption of copper consumable is saved by 40%.

本低耗材、高性能背接触导电背板通过控制不同位置铜镀层厚度,达到导电电路的优化,相比铜基导电集成背板,封装组件不会引起局部过热,主要用于常规电流组价封装,电流约为9A。This low-consumable, high-performance back-contact conductive backplane optimizes the conductive circuit by controlling the thickness of the copper plating at different positions. Compared with the copper-based conductive integrated backplane, the packaging components will not cause local overheating, and it is mainly used for conventional current package packaging. , the current is about 9A.

以上所述的仅是本发明的四种实施方式,应当指出,对于本领域的普通技术人员来说,在不脱离本发明原理的前提下,还可以作出若干变型和改进,这些也应视为属于本发明的保护范围。The above are only four implementations of the present invention. It should be pointed out that for those skilled in the art, some modifications and improvements can be made without departing from the principles of the present invention. These should also be regarded as Belong to the protection scope of the present invention.

Claims (5)

1. the production method that a kind of low-material-consumption, high-performance back contacts conduction integrate backboard, comprising the following steps:
A) copper film is formed by magnetron sputtering copper facing in the flexible substrate of insulation, line style and figure is designed according to component current density Case forms variable density reticular structure, and copper film constitutes conducting circuit pattern on flexible substrates, copper film with a thickness of 1nm~ 100nm;
B) copper coating is generated on the copper film that step a) is obtained using electrochemical plating copper method, control different location copper coating is thick Degree, wherein the copper coating height of cell piece interconnection location is 1 μm~30 μm, and the copper coating height of electric current confluence extraction location is 30 μm~100 μm;
C) conduction for obtaining step b) integrates backboard and is cleaned and dried, and obtains low-material-consumption, the high-performance back of variable density reticular structure The conductive integrated backboard of contact.
2. the production method that low-material-consumption according to claim 1, high-performance back contacts conduction integrate backboard, it is characterized in that:
Masking method is directlyed adopt when magnetron sputtering copper facing in step a) and forms composition conducting circuit pattern on flexible substrates Copper film.
3. the production method that low-material-consumption according to claim 1, high-performance back contacts conduction integrate backboard, it is characterized in that:
Conducting circuit pattern is gone out using chemical etching or laser ablation to the copper film formed after magnetron sputtering copper facing in step a), is led Electric circuitous pattern forms variable density reticular structure.
4. the production method that low-material-consumption according to claim 1, high-performance back contacts conduction integrate backboard, it is characterized in that:
Copper film with a thickness of 5nm~20nm in step a).
5. a kind of low-material-consumption, high-performance back contacts conduction integrate backboard, it is characterized in that: using such as any one of claims 1 to 4 Low-material-consumption, the high-performance back contacts conduction collection that the production method that the low-material-consumption, high-performance back contacts conduction integrate backboard obtains At backboard.
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