CN107851586B - 到受体衬底的选择性微型器件转移 - Google Patents
到受体衬底的选择性微型器件转移 Download PDFInfo
- Publication number
- CN107851586B CN107851586B CN201680006964.4A CN201680006964A CN107851586B CN 107851586 B CN107851586 B CN 107851586B CN 201680006964 A CN201680006964 A CN 201680006964A CN 107851586 B CN107851586 B CN 107851586B
- Authority
- CN
- China
- Prior art keywords
- substrate
- force
- donor
- receptor
- acceptor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/07—Structure, shape, material or disposition of the bonding areas after the connecting process
- H01L24/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2607—Circuits therefor
- G01R31/2632—Circuits therefor for testing diodes
- G01R31/2635—Testing light-emitting diodes, laser diodes or photodiodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/27—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/75—Apparatus for connecting with bump connectors or layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, the devices being individual devices of subclass H10D or integrated devices of class H10
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68318—Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
- H01L2221/68322—Auxiliary support including means facilitating the selective separation of some of a plurality of devices from the auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68368—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/07—Structure, shape, material or disposition of the bonding areas after the connecting process
- H01L2224/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
- H01L2224/081—Disposition
- H01L2224/0812—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/08151—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/08221—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/08225—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/08238—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bonding area connecting to a bonding area protruding from the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/27001—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
- H01L2224/27002—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate for supporting the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/273—Manufacturing methods by local deposition of the material of the layer connector
- H01L2224/2731—Manufacturing methods by local deposition of the material of the layer connector in liquid form
- H01L2224/2732—Screen printing, i.e. using a stencil
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/273—Manufacturing methods by local deposition of the material of the layer connector
- H01L2224/2733—Manufacturing methods by local deposition of the material of the layer connector in solid form
- H01L2224/27334—Manufacturing methods by local deposition of the material of the layer connector in solid form using preformed layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29005—Structure
- H01L2224/29006—Layer connector larger than the underlying bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/2901—Shape
- H01L2224/29011—Shape comprising apertures or cavities
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/2901—Shape
- H01L2224/29016—Shape in side view
- H01L2224/29018—Shape in side view comprising protrusions or indentations
- H01L2224/29019—Shape in side view comprising protrusions or indentations at the bonding interface of the layer connector, i.e. on the surface of the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/2902—Disposition
- H01L2224/29026—Disposition relative to the bonding area, e.g. bond pad, of the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29075—Plural core members
- H01L2224/29078—Plural core members being disposed next to each other, e.g. side-to-side arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/32237—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the layer connector connecting to a bonding area disposed in a recess of the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7525—Means for applying energy, e.g. heating means
- H01L2224/75252—Means for applying energy, e.g. heating means in the upper part of the bonding apparatus, e.g. in the bonding head
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7525—Means for applying energy, e.g. heating means
- H01L2224/75253—Means for applying energy, e.g. heating means adapted for localised heating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7598—Apparatus for connecting with bump connectors or layer connectors specially adapted for batch processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus
- H01L2224/83005—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus being a temporary or sacrificial substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8312—Aligning
- H01L2224/83121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8312—Aligning
- H01L2224/83136—Aligning involving guiding structures, e.g. spacers or supporting members
- H01L2224/83138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
- H01L2224/8314—Guiding structures outside the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8312—Aligning
- H01L2224/83136—Aligning involving guiding structures, e.g. spacers or supporting members
- H01L2224/83138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
- H01L2224/83141—Guiding structures both on and outside the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8312—Aligning
- H01L2224/83143—Passive alignment, i.e. self alignment, e.g. using surface energy, chemical reactions, thermal equilibrium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8312—Aligning
- H01L2224/83148—Aligning involving movement of a part of the bonding apparatus
- H01L2224/83149—Aligning involving movement of a part of the bonding apparatus being the lower part of the bonding apparatus, i.e. holding means for the bodies to be connected, e.g. XY table
- H01L2224/8316—Translational movements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8312—Aligning
- H01L2224/83148—Aligning involving movement of a part of the bonding apparatus
- H01L2224/83169—Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head
- H01L2224/8318—Translational movements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/832—Applying energy for connecting
- H01L2224/83234—Applying energy for connecting using means for applying energy being within the device, e.g. integrated heater
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/832—Applying energy for connecting
- H01L2224/83238—Applying energy for connecting using electric resistance welding, i.e. ohmic heating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
- H01L2224/83862—Heat curing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/839—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector with the layer connector not providing any mechanical bonding
- H01L2224/83901—Pressing the layer connector against the bonding areas by means of another connector
- H01L2224/83902—Pressing the layer connector against the bonding areas by means of another connector by means of another layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/95001—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips involving a temporary auxiliary member not forming part of the bonding apparatus, e.g. removable or sacrificial coating, film or substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
- H05K13/04—Mounting of components, e.g. of leadless components
- H05K13/0404—Pick-and-place heads or apparatus, e.g. with jaws
- H05K13/0411—Pick-and-place heads or apparatus, e.g. with jaws having multiple mounting heads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/036—Manufacture or treatment of packages
- H10H20/0364—Manufacture or treatment of packages of interconnections
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Optics & Photonics (AREA)
- Led Device Packages (AREA)
- Micromachines (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
一种将微型器件从施体衬底选择性地转移到受体衬底上的接触焊盘的方法。微型器件通过施体力附接至施体衬底。该施体衬底和该受体衬底对准并且被放在一起,从而使得所选择的微型器件满足相应的接触焊盘。生成受体力以将所选择的微型器件固持到该受体衬底上的该接触焊盘。减弱该施体力并且移开该衬底,使得所选择的微型器件在该受体衬底上。公开了生成该受体力的若干方法,该若干方法包括粘合技术、机械技术和静电技术。
Description
相关申请的交叉引用
本申请要求以下申请的优先权:于2015年1月23日提交的加拿大专利申请号2,879,465;于2015年1月23日提交的加拿大专利申请号2,879,627;于2015年1月28日提交的加拿大专利申请号2,880,718;于2015年3月4日提交的加拿大专利申请号2,883,914;于2015年5月4日提交的加拿大专利申请号2,890,398;于2015年5月12日提交的加拿大专利申请号2,887,186;于2015年5月12日提交的加拿大专利申请号2,891,007;以及于2015年5月12日提交的加拿大专利申请号2,891,027,其中每个加拿大专利申请都通过引用以其全文结合在此。
技术领域
本公开涉及到系统衬底中的器件集成。更确切地,本公开涉及微型器件从施体衬底到受体衬底的选择性转移。
发明内容
根据一个方面,提供了一种转移在微型器件阵列中所选择的微型器件的方法,其中每个微型器件利用对受体衬底上呈阵列的接触焊盘的施体力而键合至施体衬底,该方法包括:将该施体衬底与该受体衬底对准,使得该选择的微型器件中的每个微型器件符合该受体衬底上的接触焊盘;将该施体衬底和该受体衬底一起移动直到该选择的微型器件中的每个微型器件与该受体衬底上的对应接触焊盘相接触或相接近;生成用于将该选择的微型器件固持到其接触焊盘的受体力而不影响与该受体衬底相接触或相接近接触的其他微型器件;以及移开该施体衬底和该受体衬底使该选择的微型器件在该受体衬底上。
一些实施例进一步包括减弱将该微型器件键合至该施体衬底的该施体力以辅助微型器件转移。
在一些实施例中,减弱针对该选择的微型器件的该施体力以提高微型器件转移的选择性。在一些实施例中,选择性地生成该受体力以提高微型器件转移的选择性。
一些实施例进一步包括使用激光剥离来减弱该施体力。
一些实施例进一步包括通过磁场来调制该力。
一些实施例进一步包括通过加热该施体衬底的区域来减弱该施体力。
一些实施例进一步包括通过加热该受体衬底来调制该受体力。
在一些实施例中,该加热是通过使电流穿过该接触焊盘而执行的。在一些实施例中,该受体力由机械柄生成。
一些实施例进一步包括对该受体衬底执行操作使得该接触焊盘与该选择的微型器件永久键合。
在一些实施例中,该受体力由该选择的微型器件与该受体衬底之间的静电引力生成。在一些实施例中,该受体力由定位在该选择的微型器件与该受体衬底之间的粘合层生成。
一些实施例进一步包括移除该施体力;以及向所选择的微型器件施加推力以便将该器件移向该受体衬底。
在一些实施例中,该推力由沉积在该选择的微型器件与该施体衬底之间的牺牲层产生。
根据另一个方面,提供了一种受体衬底结构,该受体衬底结构包括:着陆区域阵列,该着陆区域阵列用于选择性地固持施体衬底的微型器件,每个着陆区域包括:至少一个接触焊盘,该至少一个接触焊盘用于将微型器件耦合或连接至该受体衬底中的至少一个电路或电势;以及至少一个力调制元件,该至少一个力调制元件用于产生用于将微型器件固持在该受体衬底上的受体力。为清晰起见,微型器件位于受体衬底上的区域被称为着陆区域。
在一些实施例中,该力调制元件为静电结构。在一些实施例中,该力调制元件为机械柄。在一些实施例中,对于每个着陆区域,同一元件充当该力调制元件和该接触焊盘。
本公开的前述和附加方面和实施例鉴于各实施例和/或方面的详细说明对本领域普通技术人员而言是显而易见的,该详细说明参考附图作出,下面提供了对附图的简要说明。
附图说明
通过阅读以下详细说明并参照附图,本公开的前述和其他优点将变得显而易见。
图1A示出了在转移工艺开始之前的施体衬底和受体衬底。
图1B示出了在转移工艺开始之前的施体衬底和受体衬底。
图2A示出了在施体衬底和受体衬底彼此相接触或相接近之后调制施体力或受体力中的至少一种力的流程图。
图2B示出了提前调制施体力并且在施体衬底和受体衬底彼此相接触或相接近之后在需要时调制受体力的流程图。
图2C示出了提前调制受体力并且在施体衬底和受体衬底与彼此相接触或相接近之后在需要时调制施体力的流程图。
图3A示出了将施体衬底与受体衬底对准的步骤。
图3B示出了在限定的距离裕度内将这些衬底一起移动的步骤。
图3C-1示出了通过选择性地施加受体力来调制力的一个实施例。
图3C-2示出了通过选择性地减弱施体力和全局性地施加受体力来调制力的一个实施例。
图3D示出了通过选择性地施加受体力和减弱施体力来调制力的一个实施例。
图3E示出了移开衬底的步骤。
图4A示出了具有交错的不同微型器件的施体衬底并且受体衬底中的相应接触焊盘与每个微型器件对准,因此使得能够立刻转移不同的微型器件。
图4B示出了具有成组的不同微型器件的施体衬底并且受体衬底中的相应接触焊盘与每个微型器件对准,因此使得能够立刻转移不同的微型器件。
图4C示出了交错有不同微型器件的施体衬底并且具有微型器件类型中的一种微型器件类型的受体衬底中的相应接触焊盘的仅一组接触焊盘因此与每个微型器件对准,所以需要多个转移工艺来转移所有不同类型的微型器件。
图5A示出了结合到衬底中的选择性加热元件和全局性加热元件。
图5B示出了用于将结合到衬底中的选择性加热元件和全局性加热元件图案化的一个实施例。
图5C示出了用外部源选择性地加热至少一个衬底。
图6A示出了用于将微型器件从施体衬底选择性地转移到受体衬底的方法1100的流程图。
图6B示出了准备施体衬底和受体衬底以用于选择性转移的步骤。
图6C示出了将衬底对准的步骤。
图6D示出了在限定的距离裕度内向彼此移动衬底的步骤。
图6E示出了通过固化粘合剂(例如,施加压力或热量)来产生受体力的步骤。这可以是全局性地或选择性地。
图6F示出了在需要时减小施体力的步骤。这可以是全局性地或选择性地。
图6G示出了移动衬底远离彼此的步骤。
图7A示出了受体衬底上的粘合剂的其他可能安排。
图7B示出了在施加粘合剂之前和之后具有切口的接触焊盘。
图8示出了可以用于将粘合剂施加到接触焊盘的压印工艺。
图9示出了用于将微型器件从施体衬底选择性地转移到受体衬底的方法1200的流程图。
图10示出了被设置用于执行方法1200的施体衬底和受体衬底。
图11A示出了将施体衬底与受体衬底对准的步骤。
图11B示出了在机械力松弛时将施体衬底和受体衬底移动到限定的距离裕度的步骤。
图11C示出了增大机械力的步骤。
图11D示出了在需要时减小施体力的步骤(此步骤还可以提前完成)。
图11E示出了移动施体衬底和受体衬底远离彼此。
图12A示出了用于将微型器件从施体衬底选择性地转移到受体衬底的方法1300的流程图。
图12B示出了被设置用于执行方法1300的施体衬底和受体衬底。
图13A示出了将施体衬底与受体衬底对准的步骤。
图13B示出了在限定的距离裕度内移动衬底的步骤。
图13C示出了通过将电势施加到静电元件来产生受体力的步骤。这可以选择性地或全局性地完成。
图13D示出了在需要时减小施体力的步骤。这可以全局性地或选择性地完成。
图13E示出了移开衬底的步骤。
图14A示出了静电层的另一种替代性放置。
图14B示出了静电层的另一种替代性放置。
图14C示出了静电层的另一种替代性放置。
图14D示出了静电层的另一种替代性放置。
图15A示出了微型器件和接触焊盘的另一种替代性几何结构。
图15B示出了微型器件和接触焊盘的另一种替代性几何结构。
图15C示出了微型器件和接触焊盘的另一种替代性几何结构。
图15D示出了微型器件和接触焊盘的另一种替代性几何结构。
图15E示出了微型器件和接触焊盘的另一种替代性几何结构。
图16示出了用于将微型器件从施体衬底选择性地转移到受体衬底的方法1400的流程图。
图17A示出了将施体衬底与受体衬底对准的步骤。
图17B示出了将衬底移动到距彼此为限定的距离裕度的步骤。
图17C示出了在需要时产生受体力的步骤的一个实施例。这可以是全局性地或选择性地。该力可以利用不同的方法来产生。
图17D示出了从施体衬底向微型器件施加推力。来自施体衬底的推力应为选择性的。
图17E示出了移开衬底的步骤。
图18A示出了用于通过偏置施体衬底或受体衬底中的至少一个衬底来进行测试的平台以使得能够测试微型器件的缺陷和性能。在此,微型器件的输出是通过受体衬底。
图18B示出了用于通过偏置施体衬底或受体衬底中的至少一个衬底来进行测试的平台以使得能够测试微型器件的缺陷和性能。在此,微型器件的输出是通过受体衬底。
图19示出了用于测试微型器件以进行缺陷和性能分析的受体衬底的简化偏置条件。
虽然本公开易有各种修改和替代形式,但是具体的实施例和实施方式已在附图中通过示例的方式示出并且将在此进行详细描述。然而,应当理解,本公开并不旨在限于所公开的具体形式。相反,本公开将覆盖落入如所附权利要求书所限定的本发明的精神和范围内的所有修改、等效物和替代方案。
具体实施方式
许多微型器件(包括发光二极管(LED)、有机LED、传感器、固态器件、集成电路、MEMS(微机电系统)和其他电子部件)通常被成批地制造、经常在平坦的衬底上。为了形成操作系统,至少一个施体衬底的微型器件需要被选择性地转移到受体衬底。
衬底和转移结构:
图1A-1B示出了在转移工艺开始之前的施体衬底100和受体衬底200。微型器件102a、120b、102c始于附接至施体衬底100的阵列。受体衬底由微型器件将坐落的着陆区域202a、202b、202c阵列组成。着陆区域202a、202b、202c各自包括至少一个力调制元件204a、204b、204c和至少接触焊盘206a、206b、206c。力调制元件和接触焊盘可以与图1A中所示出的不相同或者可以是与图1B中所示出的结构相同的结构。微型器件102可以通过接触焊盘206a、206b、206c耦合或连接至受体衬底200上的电路或电势。力调制元件204a、204b、204c产生转移力以选择性地将微型器件102a、102b、102c固持在受体衬底200上并且将其与施体衬底100分离开。施体衬底100是微型器件102被制造或生长在其上的衬底或者微型器件已被转移到其上的另一个临时衬底。微型器件102可以是通常以平面批制造的任何微型器件,包括LED、OLED、传感器、固态器件、集成电路、MEMS和其他电子部件。施体衬底100是根据特定类型的微型器件102的制造工艺进行选取的。例如,在常规GaN LED的情况下,施体衬底100通常是蓝宝石。通常,在生长GaN LED时,施体衬底100的原子距离应当匹配生长的材料的原子距离以避免膜的缺陷。每个微型器件102通过由微型器件102的制造工艺和性质确定的力FD附接至施体衬底100。针对每个微型器件102,FD将基本上相同。针对微型器件102,受体衬底200可以是任何更令人期望的位置。其可以是例如印刷电路板(PCB)、薄膜晶体管背板、集成电路衬底或在光学微型器件102(比如LED)的情况下的显示器的部件(例如,驱动电路系统背板)。如图1B中所示出的受体衬底上的着陆区域指的是微型器件坐落在受体衬底上的位置并且可以由至少一个接触焊盘206a、206b、206c和至少一个力调制元件204a、204b、204c组成。虽然在一些附图中着陆区域可以与接触焊盘206a、206b、206c的大小相同,但是接触焊盘206a、206b、206c可以小于着陆区域。接触焊盘206a、206b、206c为微型器件可以耦合或直接连接至受体衬底200的位置。在本说明书中,着陆区域和接触焊盘可互换地使用。
选择性转移的目标是将一些选择的微型器件102从施体衬底100转移到受体衬底200。例如,将对在未转移微型器件102c的情况下微型器件102a和102b到接触焊盘206a和206b上的转移进行描述。
转移工艺
以下步骤描述了一种转移在微型器件阵列中所选择的微型器件的方法,其中每个微型器件利用对受体衬底上呈阵列的接触焊盘的施体力而键合至施体衬底:
a.将该施体衬底与该受体衬底对准,使得该选择的微型器件中的每个微型器件符合该受体衬底上的接触焊盘;
b.将该施体衬底和该受体衬底一起移动直到该选择的微型器件中的每个微型器件与该受体衬底上的至少一个接触焊盘相接触或相接近;
c.生成用于将该选择的微型器件固持到其接触焊盘的受体力;
d.移开该施体衬底和该受体衬底使该选择的微型器件在该受体衬底上,而施体衬底的其他未被选择的微型器件尽管在步骤b和c期间可能与系统衬底相接触或相接近接触但仍保持在施体衬底上。
如果施体力对受体力来说太强而不能克服将微型器件转移到受体衬底,则减弱针对该微型器件的施体力以辅助微型器件转移。另外,如果全局地施加受体力或者选择性受体力不足以选择性地转移微型器件,则选择性地减弱针对该选择的微型器件的施体力以提高微型器件转移的选择性。
图2A-2C示出了选择性转移方法1000A-1000C的示例性流程图。图1A-1B示出了适用于执行方法1000中的任何方法的施体衬底100和受体衬底200。将参照图3A-3E描述方法1000A。方法1000B和方法1000C为方法1000A的类似变化。可以用方法1000A-1000C的组合以进一步增强转移工艺。
在1002A,将施体衬底100与受体衬底200对准,使得所选择的微型器件102a、102b符合相应的接触焊盘202a、202b,如在图3A中所示出的那样。微型器件102c将不被如此转移,尽管被示出为已对准,但是其可以或者可以不与接触焊盘202c对准。
在1004A,将施体衬底100和受体衬底200一起移动直到所选择的微型器件102a、102b被定位在接触焊盘202a、202b的限定距离内,如在图3B中所示出的那样。限定距离可以与全部或部分触点相对应但是并不限于其。换言之,所选择的微型器件102a、102b实际地触及相应的接触焊盘202a、202b可能并非严格必需的,但是必须足够靠近,从而使得可以操纵在下文中所描述的力。
在1006A,对所选择的微型器件102、施体衬底100和受体衬底200(以及接触焊盘202a、202b)之间的力进行调制以产生所选择的微型器件对受体衬底200的净力以及其他微型器件102c对施体衬底100的净力(或零净力)。
考虑对所选择的微型器件102中的一个微型器件起作用的力。存在将该微型器件固持到施体衬底100的已有的力FD。还存在在微型器件102与受体衬底200之间生成的力FR,用于将微型器件102拉向或固持到受体衬底200并且引起转移。对于任何给定的微型器件102,当衬底被移开时,如果FR超过FD,则微型器件102将与受体衬底200一起行进,而如果FD超过FR,则微型器件102将与施体衬底100在一起。存在若干种方式用于生成将在稍后的部分中进行描述的FR。然而,一旦已生成FR,则存在至少四(4)种可能方式用于调制FR和FD以实现所选择的微型器件的转移。
1.将FD减弱到小于被选择用于转移的微型器件上的FR
2.将FR增强到大于被选择用于转移的微型器件上的FD。
3.将FR减弱到小于未被选择用于转移的微型器件上的FD
4.将FD增强到大于未被选择用于转移的微型器件上的FR
上文的不同组合和安排也是可能的。在一些情况下,使用组合可以是令人期望的。例如,如果所需要的FD或FR的变化很高,则可以用FD和FR的调制的组合来实现所选择的以及未被选择的微型器件的期望净力。优选地,FR可以选择性地生成并且因此仅作用在所选择的微型器件102a、102b上,如在图3C-1中所示出的那样。FR还可以全局地生成并且施加穿过受体衬底200的全部并且因此作用在微型器件102a、102b、102c上,如在图3C-2中所示出的那样,施体力在此可以被选择性地减弱。受体衬底上的着陆区域可以包括力调制元件以用于引起FR力调制(完全地或部分地)。用于FR的选择性和全局性生成的方法将在下文中进行描述,该方法包括粘合技术、机械技术以及静电以及磁性技术。另外,着陆区域中的力调制元件的示例在下文中进行描述。然而,本领域技术人员知晓,未在此列出的力调制元件的不同变化是可能的。此外,应理解的是,接触焊盘和力调制元件的形状和结构用于解释并且不限于在本说明书中所使用的形状和结构。
在一个实施例中,选择性地减弱所选择的微型器件102a、102b的施体力FD,使得FD’小于FR,如在图3D中所示出的那样。这可以例如使用激光剥离技术、研磨或者湿法/干法蚀刻来完成。在一些情况下,可以令人期望的是同时使用FR的选择性和全局性生成。例如,生成具有足够幅值的选择性FR以便单独克服FD’可能并不可行。在此情况下,FR的全局性分量应当优选地保持较小(理想地,小于FD’),而FR的全局性分量和选择性分量之和大于FD’,但小于FD。
还应注意的是,在步骤1002A-1006A期间执行的活动有时可以相互散置。例如,FD的选择性或全局性减弱可以发生在将衬底放在一起之前。
在1008A,移开施体衬底100和受体衬底200,使所选择的微型器件102a、102b附接至相应的接触焊盘202a、202b,如在图3E中所示出的那样。一旦施体衬底100与受体衬底200分离开,就可以采取进一步加工步骤。例如,可以将施体衬底100与受体衬底200重新对准并且可以重复步骤1002A至1008A,以便将一组不同的微型器件102转移到一组不同的接触焊盘202a、202b。附加层也可以沉积在微型器件102的顶部上或者在微型器件之间,例如,在LED显示器的制造过程中,可以沉积透明电极层、填充物、平面化层和其他光学层。
图2B示出了方法1000B,该方法是方法1000A的替代性实施例。
在1002B,全局性地(针对施体衬底的区域中的所有器件)或选择性地(仅针对所选择的微型器件102a、102b)调制微型器件102a、102b与施体衬底100之间的力以减弱施体力FD。
在1004B,将施体衬底100与受体衬底200对准,使得所选择的微型器件102a、102b符合相应的接触焊盘202a、202b。
在1006B,将施体衬底100和受体衬底200一起移动直到所选择的微型器件102a、102b触及接触焊盘202a、202b。所选择的微型器件102a、102b实际地触及相应的接触焊盘202a、202b可能并非严格必需的,但是必须足够靠近,从而使得可以操纵在下文中所描述的力。
在1008B,在需要时调制所选择的微型器件102与受体衬底200(以及接触焊盘202a、202b)之间的力以产生所选择的微型器件对受体衬底200的净力以及其他微型器件102c对施体衬底100的净力(或零净力)。
在1010B,移开施体衬底100和受体衬底200,使所选择的微型器件102a、102b附接至相应的接触焊盘202a、202b。
在1012B,将可选的后加工应用到所选择的微型器件102a、102b。一旦施体衬底100与受体衬底200分离开,就可以采取进一步加工步骤。附加层可以沉积在微型器件102的顶部上或者在微型器件之间,例如,在LED显示器的制造过程中,可以沉积透明电极层、填充物、平面化层和其他光学层。步骤1012B是可选的并且也可以在方法1000A或1000C结束时应用。
图2C示出了方法1000C,该方法是方法1000A的替代性实施例。
在1002C,处理与所选择的微型器件102a、102b相对应的接触焊盘202a、202b以在接触时产生额外的力。例如,可以施加粘合层,如在下文中更详细描述的那样。
在1004C,将施体衬底100与受体衬底200对准,使得所选择的微型器件102a、102b符合相应的接触焊盘202a、202b。
在1006C,将施体衬底100和受体衬底200一起移动直到所选择的微型器件102a、102b触及接触焊盘202a、202b。
在1008C,在需要时调制所选择的微型器件102与施体衬底100之间的力以产生所选择的微型器件对受体衬底200的净力以及其他微型器件102c对施体衬底100的净力(或零净力)。
在1010B,移开施体衬底100和受体衬底200,使所选择的微型器件102a、102b附接至相应的接触焊盘202a、202b。
多次应用
可以使用不同的或相同的施体衬底100将方法1000A、1000B、1000C中的任何方法多次应用到同一受体衬底200,或者使用不同的受体衬底200将该方法应用到同一施体衬底100。例如,考虑由LED组装显示器的情况。每个像素可以包括集群的红色、绿色和蓝色LED。然而,制造LED更容易以单色批次且在并非总是适用于结合到显示器中的衬底上完成。因此,LED必须从其可能生长的施体衬底100中移除,并且以RGB集群的方式被放置在可以是显示器背板的受体衬底上。在这种情况下,当像素阵列的间距可被设置成匹配施体衬底上的LED阵列的间距时,该颜色是最简单的。
当这是不可能的时候,每个阵列的间距可以成比例地设置。图4A和图4B示出了施体衬底上的LED的间距是受体衬底上的接触焊盘的间距的七分之一的安排。
然而,通常,使像素阵列的间距匹配施体衬底可能是不可行的。例如,人们通常尝试在施体衬底上以最小可能的间距来制造LED以最大化产量,但是受体衬底上像素和接触焊盘阵列的间距基于期望的产品规格(比如显示器的大小和分辨率)进行设计。在此情况下,人们不可能能够一步转移所有LED并且将有必要重复方法1000A、1000B、1000C中的任何方法。因此,可能可以设计施体衬底和受体衬底接触焊盘阵列,使得如在图4C中所示出的那样在每次重复方法1000A、1000B、1000C中的任何方法的过程中可以填充每个像素的一部分。在I,受体衬底与施体衬底未对准。在II,所有红色LED被转移。在III,所有绿色LED被转移。在IV,所有蓝色LED被转移。需要在每个转移步骤之间对施体衬底和受体衬底进行重定位。
本领域技术人员现在将理解的是,方法1000A、1000B和1000C的附加变化和组合也是有可能的。将应用到方法1000中的任何方法的具体技术和考虑在下文中单独地或组合地进行描述。
使用热量进行力调制
选择性加热和全局性加热可以以多种方式用于辅助方法1000A。例如,热量可以在步骤1008A中用于减弱FD或者在步骤1008A之后用于在微型器件102与接触焊盘202之间产生永久键合。在一个实施例中,可以使用结合到施体衬底100和/受体衬底200中的电阻元件来生成热量。
图5A示出了结合到衬底中的选择性和全局性加热元件。选择性加热元件300和全局性加热元件302可以结合到施体衬底100中,而选择性加热元件304和全局性加热元件306可以结合到受体衬底200中。在另一个实施例中,选择性加热可以使用在图5B的平面图中所示出的图案化全局性加热器来实现。
FD可以通过将热量施加到微型器件102与施体衬底100之间的界面来减弱。优选地,选择性加热元件300足以加热界面超过微型器件102将拆离的阈值温度。然而,当这不可行时,全局性加热器302可以用于将温度提高到阈值以下的点,而选择性加热器300仅将所选择的微型器件102a、102b的温度进一步提高到阈值以上。环境热源(例如,加温室)可以代替全局性加热器。
热量还可以用于在微型器件102与接触焊盘202a、202b之间产生永久键合。在此情况下,接触焊盘202a、202b可以由当被加热时将固化的材料构成,从而产生永久键合。优选地,选择性加热元件304足以加热接触焊盘202a、202b超过阈值温度从而导致固化。然而,当这不可行时,全局性加热器306可以用于将温度提高到固化阈值以下的点,而选择性加热器304将所选择的接触焊盘202a、202b的温度提高到阈值以上。环境热源(例如,加温室)可以代替全局性加热器。也可以施加压力以帮助永久键合。
其他变化是可能的。在一些情况下,微型器件102或接触焊盘202a、202b自己充当选择性加热器300、304中的电阻元件可能是可行的。也可以使用激光以选择性方式施加热量。在激光的情况下,有可能的是,施体衬底100和受体衬底200中的至少一者将必须由对所使用的激光至少半透明的材料构成。如在图5C中所示出的,在一种情况下,阴影掩模可以用于选择性地阻挡来自未被选择的器件的激光。在此,阴影掩模501根据激光的方向与受体衬底或施体衬底对准。然后,激光可以部分地或完全地覆盖任一衬底。在部分覆盖的情况下,光栅扫描或步骤重复可以用于覆盖衬底上的整个目标区域。为了进一步提高来自激光的热量转移,可以将具有更高激光吸收率的层添加到力调制元件中。可以使用接触焊盘作为受体衬底中的力调制元件。
粘合力调制
在选择性转移的另一个实施例中,FR由粘合剂生成。在此,FR或者通过将粘合剂选择性地涂敷到受体衬底上的着陆区域(或所选择的微型器件)或者通过选择性地固化粘合层来进行调制。此方法可以结合选择性地或全局性地减弱施体力来使用并且与方法1000A、1000B和1000C中的任何方法或其任何组合兼容。尽管以下说明是基于1000A的,但是类似的方法可以用于1000B、1000C以及方法的组合。另外,在不影响结果的情况下可以改变施体力减弱步骤1110关于其他步骤的顺序。
图6A示出了方法1100的流程图,该方法是专用于使用粘合剂生成FR的方法1000的修改版本。图6B示出了被设置用于执行方法1100的施体衬底100和受体衬底200。施体衬底100以截面示出并且受体衬底200以截面和平面图示出。施体衬底100具有附接的微型器件102阵列。施体力FD用于将微型器件102固持到施体衬底100。
受体衬底200具有附接的接触焊盘212阵列。虽然图6B示出了连接至接触焊盘212的力调制元件500,但是其可以是物理上分离开的。
如在图6B中所示出的,接触焊盘212a、212b被一圈粘合剂500围绕。粘合剂500已被选择性地涂敷到期望微型器件发生转移的接触焊盘212,从而使得当将施体衬底100和受体衬底200一起移动时,微型器件102a、102b将与粘合剂500以及接触焊盘212a、212b相接触。
方法1100将参照图6B-6F进行解释。在1102,选择性地涂敷粘合剂,如在图6B中所示出的那样。
在1104,将施体衬底100与受体衬底200对准,使得所选择的微型器件102a、102b符合相应的接触焊盘212a、212b,如在图6C中所示出的那样。
在1106,将施体衬底100和受体衬底200一起移动直到所选择的微型器件102a、102b与相应的所选择的接触焊盘212a、212b以及粘合剂500相接触,如在图6D中所示出的那样。
在1108,生成受体力FR,如在图6E中示出的那样。FR通过微型器件102a、102b、粘合剂500以及接触焊盘212a、212b中的至少一个接触焊盘与受体衬底200之间的粘合生成。FR用于将所选择的微型器件102固持到相应的所选择的接触焊盘212。优选地,FR可以通过选择性地涂敷粘合剂500而选择性地生成,如所示出的那样。
在1110,选择性地(或全局性地)减弱所选择的微型器件102a、102b的施体力FD,使得FD’小于FR,如在图6F中所示出的那样。这可以例如使用激光剥离技术、研磨或者湿法/干法蚀刻来完成。在另一种情况下,可以减弱所有微型器件的施体力FD。在此情况下,力调制通过将粘合剂选择性涂敷到受体衬底上的所选择的力元件来完成。FD和FR调制的顺序可以改变。如果粘合力调制是选择性的并且FR大于FD,则此步骤可被排除。
在1112,移开施体衬底100和受体衬底200,使所选择的微型器件102a、102b附接至相应的接触焊盘212a、212b,如在图6G中所示出的那样。一旦施体衬底100与受体衬底200分离开,就可以采取进一步加工步骤。例如,可以将施体衬底100与受体衬底200重新对准并且可以重复步骤,以便将一组不同的微型器件102转移到接触焊盘212。附加层也可以沉积在微型器件102的顶部上或者在微型器件之间,例如,在LED显示器的制造过程中,可以沉积透明电极层、填充物、平面化层和其他光学层。
在1114,一个可能的附加步骤为固化粘合剂500。固化可以在微型器件102与接触焊盘212之间产生永久键合。在另一个实施例中,固化作为步骤1108的一部分发生并且是生成FR的一部分。如果若干组选择的微型器件102将要被转移到公共受体衬底200,则固化可以在所有转移完成之后或者在转移每个组之后完成。
可以通过多种方式涂敷粘合剂500。例如,可以将粘合剂500涂敷到微型器件102、接触焊盘212或受体衬底200中的任何或全部。将经常令人期望的是,在微型器件102与其相应的接触焊盘212之间存在电耦合。在此情况下,粘合剂可以针对其传导性进行选择。然而,合适的导电粘合剂并非总是可用的。在任何情况下,但特别是在导电粘合剂不可用时,粘合剂可以涂敷在接触焊盘附近或者可以仅覆盖接触焊盘的一部分。图7A示出了受体衬底200上的粘合剂的一些其他可能的安排,包括:(I)四个角、(II)相反侧、(III)中心以及(IV)单侧几何结构。
在另一个实施例中,可以为粘合剂500提供一个或多个切口。图7B示出了(I)在涂敷粘合剂之前以及(II)在涂敷粘合剂之后具有切口的接触焊盘212。
粘合剂500可以通过任何正常的光刻技术被压印、印刷或图案化在接触焊盘212、微型器件102或受体衬底200上。例如,图8示出了可以用于将粘合剂500涂敷到例如接触焊盘212的压印工艺。生成FR的选择性可以通过选择哪个接触焊盘212将接收粘合剂500来实现。类似的过程可以用于将粘合剂涂敷到微型器件102或受体衬底200。在(I),具有匹配粘合剂500的期望分布的剖面的压印是湿的。在(II),使压印与受体衬底200和所选择的微型器件102相接触。在(III),受体衬底现在被粘合剂弄湿并且准备接收所选择的微型器件102的转移。根据工艺的需要,也可以使用具有反剖面的压印。在另一个实施例中,微型器件102和接触焊盘212均可以被粘合剂弄湿。
粘合剂500可以被选择成使得其将在施加热量时固化。关于加热而描述的技术中的任何技术可以由本领域技术人员根据具体应用的需要适当地加以应用。
机械力调制
在选择性转移的另一个实施例中,FR由机械力生成。在此,FR通过在受体衬底上的着陆区域与微型器件之间施加机械力进行调制。此方法可以结合选择性地或全局性地减弱施体力来使用并且与方法1000A、1000B和1000C中的任何方法或其任何组合兼容。尽管以下说明是基于1000A的,但是类似的方法可以用于1000B、1000C以及方法的组合。另外,在不影响结果的情况下可以改变施体力减弱步骤1210关于其他步骤的顺序。
在一个示例中,差分热膨胀或压力可以用于实现将微型器件102固持到接触焊盘212的摩擦配合。
图9示出了方法1200的流程图,该方法是适用于FR的机械生成的方法1000A的修改版本。图10示出了被设置用于执行方法1200的施体衬底100和受体衬底200。施体衬底100以截面示出并且受体衬底200以截面和平面图示出。施体衬底100具有附接的微型器件102阵列。施体力FD用于将微型器件102固持到施体衬底100。微型器件102和施体衬底100被示出为连接至地244。
受体衬底200具有附接的接触焊盘232阵列。在所示出的实施例中,接触焊盘232阵列具有与微型器件102阵列相同的间距;即,针对每个接触焊盘232存在一个微型器件102。如在上文中所讨论的,虽然优选的是接触焊盘232阵列的间距和微型器件102阵列的间距成比例(因为这便利了多个器件的同时转移),但这不必是真的。
方法1200将参照图11A-11E进行描述。在1202,准备衬底以用于机械力调制。在机械柄的情况下,柄通过不同的手段被打开。在一个示例中,将热量施加到可以与着陆区域上的接触焊盘相同的力调制元件222。机械柄和接触焊盘在此可互换地使用。然而,对本领域技术人员而言明显的是,机械柄和接触焊盘可以不同。也可以将机械柄集成到微型器件中。可以使用加热器304全局性地或选择性地施加热量,导致柄打开,如在图11A中由双箭头示出的那样。注意,接触焊盘222由中央凹陷224和外围壁226构成。还应当注意的是,也可以组合地或单独地使用选择性加热器304和全局性加热器306的组合或者选择性加热器304和环境热源或外部热源的组合。
在1204,将施体衬底100与受体衬底200对准,使得所选择的微型器件102a、102b符合相应的接触焊盘222a、222b,如在图11B中所示出的那样。
在1206,将施体衬底100和受体衬底200一起移动直到所选择的微型器件102a、102b适配到相应机械柄的外围壁所限定的空间中,如在图11B中所示出的那样。如以上指出的,每个接触焊盘222由中央凹陷224和外围壁226构成。接触焊盘222的这些特征的大小被确定以便紧密地适配在微型器件102周围。机械柄的材料部分地由于热性质而被选取,具体地使得机械柄具有比微型器件102更高的热膨胀系数。因此,当将热量施加到机械柄时,在同一温度下该机械柄膨胀得比微型器件102可能膨胀得会更多,使得中央凹陷和外围壁将能够用间隙228容纳微型器件102。机械柄的膨胀后的大小允许微型器件102容易适配。
在1208,生成受体力FR。FR通过选择性地冷却与所选择的微型器件102相对应的接触焊盘222而生成,导致了外围壁226在所选择的微型器件102周围收缩、关闭了间隙228并且对微型器件102施以压缩力从而将其固持在位,如在图11C中所示出的那样。选择性可以通过选择性地断开选择性加热器304来实现。
在1210,选择性地(或全局性地)减弱所选择的微型器件102a、102b的施体力FD,使得FD’小于FR,如在图11D中所示出的那样。这可以例如使用激光剥离技术、研磨或者湿法/干法蚀刻来完成。在一些实施例中,FD弱于FR,在该情况下,不需要选择性地减弱FD。如果机械力调制是选择性的并且FR大于FD,则此步骤可被排除。
在1212,移开施体衬底100和受体衬底200,使所选择的微型器件102a、102b附接至相应的接触焊盘222a、222b,如在图11E中所示出的那样。一旦施体衬底100与受体衬底200分离开,就可以采取进一步加工步骤。例如,可以将施体衬底100与受体衬底200重新对准并且可以重复步骤,以便将一组不同的微型器件102转移到接触焊盘222。附加层也可以沉积在微型器件102的顶部上或者在微型器件之间,例如,在LED显示器的制造过程中,可以沉积透明电极层、填充物、平面化层和其他光学层。
静电力调制
在选择性转移的另一个实施例中,FR由静电力或磁力生成。在磁力的情况下,电流穿过导电层而非对静电力的导电层充电。尽管在此的结构用于描述静电力,但是类似的结构可以用于磁力。在此,FR通过在受体衬底上的着陆区域与微型器件之间施加选择性静电力进行调制。此方法可以结合选择性地或全局性地减弱施体力来使用并且与方法1000A、1000B和1000C中的任何方法或其任何组合兼容。尽管以下说明是基于1000A的,但是类似的方法可以用于1000B、1000C以及方法的组合。另外,在不影响结果的情况下可以改变施体力减弱步骤1410关于其他步骤的顺序。
在选择性转移的另一个实施例中,FR由静电力生成。在此,FR通过在受体衬底上的着陆区域与微型器件之间施加选择性静电力进行调制。此方法可以结合选择性地或全局性地减弱施体力来使用并且与方法1000A、1000B和1000C中的任何方法或其任何组合兼容。尽管以下说明是基于1000A的,但是类似的方法可以用于1000B、1000C以及方法的组合。另外,在不影响结果的情况下可以改变施体力减弱步骤1410关于其他步骤的顺序。
图12A示出了方法1300的流程图,该方法是适合用于FR的静电生成的方法1000A的修改版本。图12B示出了被设置用于执行方法1300的施体衬底100和受体衬底200。施体衬底100以截面示出并且受体衬底200以截面和平面图示出。施体衬底100具有附接的微型器件102阵列。施体力FD用于将微型器件102固持到施体衬底100。微型器件102和施体衬底100被示出为连接至地244。
受体衬底200上的着陆区域至少具有附接的接触焊盘232和力调制元件234。
接触焊盘232被一圈导体/电介质双层复合物(以下称为静电层234)围绕。力调制元件234的形状和位置可以在着陆区域中且关于接触焊盘发生改变。静电层234具有电介质部分236和导电部分238。电介质部分236包括部分地针对其介电性质而选择的材料,该电介质特性包括介电常数、电介质泄漏和击穿电压。电介质部分还可以是微型器件或者受体衬底和微型器件的组合的一部分。合适的材料可以包括SiN、SiON、SiO、HfO和各种聚合物。导电部分238部分地针对其导电性质进行选择。存在许多合适的单一金属、双层和三层(可能合适的包括Ag、Au和Ti/Au)。每个导电部分238经由开关242耦合至电压源240。注意,虽然导电部分238被示出为经由简单开关242并联连接至单一电压源240,但是这将被理解成说明性示例。导电部分238可以并联连接至一个电压源240。导电部分238的不同子集可以连接至不同电压源。简单开关242可以用更复杂的安排来替代。期望的功能性为能够在需要时将电势不同于微型器件102的电势的电压源240选择性地连接至所选择的导电部分238从而引起所选择的导电部分238与相应的所选择的微型器件102之间的静电引力。
方法1300将结合图13A-13E进行解释。在1302,将施体衬底100与受体衬底对准,使得所选择的微型器件102a、102b符合相应的接触焊盘232a、232b,如在图13A中所示出的那样。
在1304,将施体衬底100和受体衬底200一起移动直到微型器件102与接触焊盘232相接触,如在图13B中所示出的那样。
在1306,生成受体力FR,如在图13C中示出的那样。FR通过闭合将静电层234的导电部分238连接至电压源240的开关242a、242b而生成,在电压源240的电势下产生了带电的导电部分238。处于不同电势(例如,接地电势(或其他相对电势))的选择的微型器件102a、102b将被静电地吸引到导电部分238。静电电荷可以通过不同的电势水平生成。例如,对于300nm电介质,为了适当抓握微型器件,可能需要将20V到50V之间的电压差施加到静电力元件上。然而,此电压可以根据器件、柄的大小和介电常数进行修改。
在1308,选择性地减弱所选择的微型器件102a、102b的施体力FD,使得FD’小于FR,如在图13D中所示出的那样。这可以例如使用激光剥离技术、研磨或者湿法/干法蚀刻来完成。
在1310,移开施体衬底100和受体衬底200,使所选择的微型器件102a、102b附接至相应的接触焊盘232a、232b,如在图13E中所示出的那样。一旦施体衬底100与受体衬底200分离开,就可以采取进一步加工步骤并且可以移除地244。例如,可以将施体衬底100与受体衬底200重新对准并且可以重复步骤,以便将一组不同的微型器件102转移到接触焊盘232。附加层也可以沉积在微型器件102的顶部上或者在微型器件之间,例如,在LED显示器的制造过程中,可以沉积透明电极层、填充物、平面化层和其他光学层。应当注意,如果移除了到电压源240的连接,则FR将停止操作。因此,用于在微型器件102与接触焊盘232之间产生永久键合的进一步加工步骤是令人期望的。如在上文中所描述的,固化接触焊盘232是将产生这种键合并且使得能够进一步使受体衬底200工作或运输该受体衬底的合适的进一步加工步骤。
在其他实施例中,静电层234可以呈现其他配置。图14A-14D示出了静电层234的一些替代性放置。静电层234相对于每个接触焊盘232的可能的替代性放置包括:(A)四个角、(B)相反侧、(C)中心以及(D)一侧。本领域技术人员现在将能够设计出适用于具体应用的配置。
在其他实施例中,接触焊盘232、静电层234和微型器件102的几何结构可以改变成不同的效果。图15A-15E展示了一些可能的替代性几何结构。图15A示出了静电层234在接触焊盘232的顶部上方延伸以形成空洞241并且微型器件102具有将适配在空洞241内的台面243的实施例。图15B示出了静电层234在接触焊盘232的顶部上方延伸以形成空洞241并且微型器件102具有将适配在空洞241内附接至该微型器件的延伸245的实施例。延伸245可以由与接触焊盘232相同的材料制成,使得随后的固化将融合延伸245和接触焊盘232。如在图15E中所示出的,倾斜几何结构也是可能的。具有台面243或延伸245的几何结构可以帮助将微型器件102引导到接触焊盘232中并确保适当适配并且防止在从施体衬底100拆离时微型器件102发生倾斜。优选地,微型器件102和接触焊盘232的几何结构被选择成相匹配,从而使静电力最大化。
图15C示出了静电层234形成空洞241但是导电部分238保持在与接触焊盘232相同的平面中的实施例。图15D示出了静电层234形成空洞241但还与接触焊盘232重叠并且导电部分238处于与接触焊盘232不同的平面中从而允许对静电力进行微调的实施例。
具有不同高度的微型器件的转移
在选择性转移的另一个实施例中,施体衬底上的力被调制成将器件推向受体衬底。在一个示例中,在移除施体力之后,其他力(比如静电力)可以用于将器件推向受体衬底。在另一种情况下,牺牲层可以用于在存在热量或光源的情况下产生推力。为了选择性地产生推力,阴影掩模可以用于将光源(例如,激光)应用到所选择的微型器件。另外,FR可以通过前述方法(例如,机械方法、加热方法、粘合方法、静电方法)之一生成。例如,FR可以通过将选择性静电力施加在受体衬底的着陆区域与微型器件之间而进行调制。此方法与方法1000A、1000B和1000C中的任何方法或其任何组合兼容。尽管以下说明是基于1000A的,但是类似的方法可以用于1000B、1000C以及这些方法的组合。另外,在不影响结果的情况下可以改变施体力减弱步骤1410关于其他步骤的顺序。然而,最可靠的结果可以通过先施加FR并且然后向微型器件施加推力来实现。
图16示出了基于静电FR的方法1400的流程图。然而,也可以应用其他FR力。方法1400是方法1300的修改版本并且特别适合具有不同高度的微型器件102的同时转移。在1402,将施体衬底100与受体衬底对准,使得所选择的微型器件102a、102b符合相应的接触焊盘232a、232b,如在图17A中所示出的那样。注意,微型器件102a具有不同于微型器件102b的高度。
在1404,将施体衬底100和受体衬底200一起移动直到微型器件102足够接近用于作用在微型器件102上的静电FR。施体衬底100和受体衬底200可以被固持成使得没有微型器件102与接触焊盘232相接触或者如在图17B中所示出的,衬底100、200可以在一些微型器件102与接触焊盘232相接触时停止靠近。
在1406,生成受体力FR,如在图17C中示出的那样。FR通过闭合将静电层234的导电部分238连接至电压源240的开关242a、242b而生成,在电压源240的电势下产生了带电的导电部分238。处于不同电势(例如,接地电势)的选择的微型器件102a、102b将被静电地吸引到导电部分238。
在1408,选择性地减弱所选择的微型器件102a、102b的施体力FD,使得FD’小于FR。这可以例如使用激光剥离技术、研磨或者湿法/干法蚀刻来完成。此时,微型器件102a、102b将从施体衬底100拆离。微型器件102b将跳过间隙到其在受体衬底200上的相应接触焊盘232a、232b。
在1410,移开施体衬底100和受体衬底200,使所选择的微型器件102a、102b附接至相应的接触焊盘232a、232b,如在图17E中所示出的那样。一旦施体衬底100与受体衬底200分离开,就可以采取进一步加工步骤。例如,可以将施体衬底100与受体衬底200重新对准并且可以重复步骤,以便将一组不同的微型器件102转移到接触焊盘232。附加层也可以沉积在微型器件102的顶部上或者在微型器件之间,例如,在LED显示器的制造过程中,可以沉积透明电极层、填充物、平面化层和其他光学层。应当注意,如果移除了到电压源240的连接,则FR将停止操作。因此,用于在微型器件102与接触焊盘232之间产生永久键合的进一步加工步骤是令人期望的。如在上文中所描述的,固化接触焊盘232是将产生这种键合并且使得能够进一步使受体衬底200工作或运输该受体衬底的合适的进一步加工步骤。
此方法的一个应用为基于微型LED器件开发显示器。LED显示器由RGB(或其他像素图案化)像素组成,该像素由单色LED(比如红色、绿色或蓝色或任何其他颜色)制成。LED被单独地制造并且然后被转移到背板。背板电路主动地或被动地驱动这些LED。采用主动形式的每个子像素由晶体管电路通过或者控制电流、接通时间或两者来驱动。采用被动形式的每个子像素可以通过选择对应行和列进行处理并且由外部驱动力驱动。
LED常规地以单色LED的形式被制造在晶片上并且通过不同工艺(比如蚀刻)被图案化成单独的微型器件。由于LED在其衬底上的间距不同于其在显示器上的间距,因此需要一种方法将其从其衬底选择性地转移到背板。LED在其衬底上的间距为可能增加在晶片上的LED制造产量的最小值,而背板上的LED间距取决于显示器的大小和分辨率。根据在此实施的方法,人们可以调制LED衬底与微型LED之间的力并且使用在此呈现的技术中的任何技术增大所选择的LED与背板衬底之间的力。在一种情况下,首先调制针对LED晶片的力。在此情况下,LED器件与衬底之间的力通过激光、背板蚀刻或其他方法被减小。该工艺可以选择性地减弱用于转移的所选择的LED与LED衬底之间的连接力或者其可以应用到所有器件从而减小所有LED器件到LED衬底的连接力。在一个实施例中,这可以通过将所有LED从其原生衬底转移到临时衬底来完成。在此,临时衬底从顶侧附接至LED,并且然后第一衬底通过抛光和/或蚀刻或者激光剥离被移除。临时衬底与LED器件之间的力弱于系统衬底可以选择性地施加到LED的力。为了实现这一点,缓冲层可以首先沉积在临时衬底上。此缓冲层可以是聚酰亚胺层。如果缓冲层不导电,则为了使能够在转移到临时和系统衬底上之后测试器件,将在缓冲层之前或之后沉积和图案化电极。如果在缓冲层之前沉积电极,则可以图案化缓冲层从而产生用于接触的开口。
在另一种方法中,LED连接力调制发生在LED衬底和背板衬底相接触之后并且通过在此呈现的前上述方法选择性地调制对LED的系统衬底力。LED衬底力调制还可以在背板衬底力调制之前完成。
由于在前述方法中的大多数方法中,在转移之后将LED固持到背板衬底的力是临时的,因此可能需要后加工步骤来增加到背板衬底的连接可靠性。在一个实施例中,可以使用高温(和/或压力)。在此,平坦表面用于在温度增加时将压力施加到LED上。压力逐步增加以避免LED器件的开裂或错位。另外,背板衬底的选择性力在此工艺期间可以保持有效以辅助键合。
在一种情况下,LED所需要的两种连接是在转移侧上并且在转移工艺之后LED与背板完全接触。在另一种情况下,将沉积和图案化顶部电极(如果需要的话)。在一种情况下,可以在沉积电极之前使用偏振层。例如,聚酰亚胺层可以覆盖在背板衬底上。在沉积之后,可以图案化该层以产生用于将顶部电极层连接至系统衬底触点的开口。该触点可以针对每个LED是分离开的或者被共享。另外,也可以在顶部电极沉积之前或之后沉积光学增强层。
测试工艺
识别缺陷微型器件以及还在被转移之后表征该微型器件是开发高产量系统的重要部分,因为其可以使得能够使用修复和补偿技术。
在图18B所示出的一个实施例中,在转移工艺过程中受体衬底被置于测试模式中。如果需要,施体衬底可以被偏置到测试模式(如图18A所示)。如果微型器件是光电器件,则传感器1810(或传感器阵列)用于提取被转移器件的光学特性。在此,受体衬底被偏置成使得仅通过所选择的接触焊盘1804来激活所选择的器件1802。同样地,未被选择的器件1806保持去激活并且未被选择的焊盘1808保持无效以防止任何干扰。为了进行连接性测试,微型器件被偏置成为有效的(在LED的情况下,其发光)。如果微型器件并非有效,则该器件可以被标记为有缺陷。在另一个测试中,微型器件被偏置成为无效的(在LED的情况下,其不发光)。如果微型器件是有效的,则该器件可以被标记为有缺陷。图19示出了用于激活或去激活微型器件的像素偏置条件的示例。在此,微型器件1906耦合1908至偏置电压1910(电源电压)以变成已激活的。为了去激活微型器件1906,其与电压断开连接。在此,可以对施体衬底1900进行偏置以使得能够进行测试。在另一种情况下,在后加工过程中测试微型器件。在使用表面将压力施加到器件从而产生永久键合时,对电路进行偏置以激活微型器件。表面可以是导电的从而使得其可以充当微型器件的另一个电极(如果需要的话)。如果器件并非有效的则可以调整压力以改善到受体衬底的连接中的任何故障。可以执行类似的测试以针对打开的缺陷器件进行测试。为了进行性能测试,用不同的电平来对微型器件进行偏置并且测量其性能(在LED的情况下,其输出的光和色点)。
在一种情况下,有缺陷的器件在应用任何后加工之前被替代或被固定以便将器件永久地键合到受体衬底中。在此,可以在用工作器件替代有缺陷的器件之前移除该有缺陷的器件。在另一个实施例中,受体衬底上与微型器件相对应的着陆区域包括至少接触焊盘和至少力调制元件。
应理解的是,对根据上文且如上文的变化的各实施例进行设想。
在另一个实施例中,通过使用激光剥离减弱施体力来调制净转移力。在另一个实施例中,通过使用选择性地加热所选择的微型器件中的每个微型器件附近的施体衬底的区域减弱施体力来调制净转移力。在另一个实施例中,通过将粘合层选择性地施加到微型器件来调制净转移力。在另一个实施例中,模制器件用于选择性地施加粘合层。在另一个实施例中,印刷用于选择性地施加粘合层。在另一个实施例中,对受体衬底执行后加工,从而使得接触焊盘与所选择的微型器件永久地键合。在另一个实施例中,后加工包括加热受体衬底。在另一个实施例中,加热通过使电流穿过接触焊盘来完成。在另一个实施例中,使用至少一组另外的选择的微型器件和相应的接触焊盘来重复该方法。在另一个实施例中,接触焊盘位于受体衬底的凹口内部并且每个选择的微型器件适配到一个这种凹口中。在另一个实施例中,微型器件阵列的间距与接触焊盘阵列的间距相同。在另一个实施例中,微型器件阵列的间距与接触焊盘阵列的间距成比例。在另一个实施例中,所选择的微型器件中的每个微型器件包括突起并且接触焊盘包括大小被确定为匹配每个微型器件上的突起的凹陷。在另一个实施例中,净转移力通过在所选择的微型器件与受体衬底之间生成静电引力进行调制。在另一个实施例中,静电力由受体衬底上或受体衬底后面的力元件施加到施体衬底上的整个微型器件阵列。在另一个实施例中,静电力由着陆区域的力调制元件选择性地生成。在另一个实施例中,受体衬底上的着陆区域的力调制元件包括每个接触焊盘附近的导电元件,每个导电元件能够联接至电压源以维持静电电荷。在另一个实施例中,每个导电元件包括一个或多个子元件。在另一个实施例中,子元件分布在接触焊盘周围。在另一个实施例中,每个导电元件围绕接触焊盘。在另一个实施例中,受体衬底上的着陆区域的力调制元件包括贯穿着陆区域的很大一部分的导电层和电介质层,该导电层能够联接至电压源以维持静电电荷。在另一个实施例中,施体衬底和受体衬底被紧密地放在一起,但是所选择的微型器件和接触焊盘不接触直到调制净转移力之后,因此所选择的微型器件移动穿过小的间隙到接触焊盘。在另一个实施例中,所选择的微型器件的高度不同。在另一个实施例中,接触焊盘是内凹的。在另一个实施例中,受体衬底的力调制元件生成机械夹紧力。在另一个实施例中,机械力调制元件形成至少一个接触焊盘的一部分。在另一个实施例中,机械力调制元件与接触焊盘分离开。在另一个实施例中,机械力调制通过力调制元件或微型器件中的至少一个的热膨胀或压缩产生。在另一个实施例中,每个接触焊盘具有内凹部分并且每个选择的微型器件被插入接触焊盘的内凹部分中。
在另一个实施例中,受体衬底在将施体衬底和受体衬底一起移动之前被加热从而使得接触焊盘的内凹部分扩展至大于所选择的微型器件,并且受体衬底在施体衬底和受体衬底被移开之前被冷却从而使得接触焊盘的内凹部分在所选择的微型器件周围收缩并且经由所选择的微型器件的机械夹紧提供受体力。
在另一个实施例中,受体衬底的着陆区域中的力调制元件为定位在所选择的微型器件与受体衬底之间的粘合层。在另一个实施例中,粘合层是导电的。在另一个实施例中,受体衬底上的接触焊盘中的每个接触焊盘的一部分覆盖有粘合层。在另一个实施例中,所选择的微型器件中的每个微型器件的一部分覆盖有粘合层。在另一个实施例中,接触焊盘附近区域的一部分覆盖有粘合层。
在另一个实施例中,利用前述方法中的至少一种方法在施体衬底上以及利用所描述的方法中的至少一种方法在受体衬底上调制净转移力。
虽然已经展示并描述了本公开的特定实施方式和应用,但是应理解的是,本公开不限于在此公开的精确构造和构成,并且在不背离如在所附权利要求书中限定的本发明的精神和范围的情况下各种修改、改变和变化可以从前述说明中变得显而易见。
Claims (18)
1.一种转移在微型器件阵列中所选择的微型器件的方法,其中每个微型器件利用施体力而键合至施体衬底,所述方法包括:
将所述施体衬底与受体衬底对准,使得所述选择的微型器件中的每个微型器件符合所述受体衬底上的接触焊盘;
将所述施体衬底和所述受体衬底一起移动直到所述选择的微型器件中的每个微型器件与所述受体衬底上的对应接触焊盘相接触或相接近;
通过力调制单元生成用于将所述选择的微型器件中的每个微型器件固持到其对应接触焊盘的受体力,其中所述选择的微型器件中的每个微型器件对应于所述力调制单元中的一者;以及
移开所述施体衬底和所述受体衬底使所述选择的微型器件在所述受体衬底上,
其中所述力调制单元在所述受体衬底上并且与所述接触焊盘直接接触。
2.如权利要求1所述的方法,进一步包括减弱将所述微型器件键合至所述施体衬底的所述施体力以辅助微型器件转移。
3.如权利要求2所述的方法,其中,减弱针对所述选择的微型器件的所述施体力以提高微型器件转移的选择性。
4.如权利要求1所述的方法,其中,选择性地生成所述受体力以提高微型器件转移的选择性。
5.如权利要求1所述的方法,进一步包括使用激光剥离来减弱所述施体力。
6.如权利要求1所述的方法,进一步包括通过加热所述施体衬底的区域来减弱所述施体力。
7.如权利要求4所述的方法,进一步包括通过加热所述受体衬底来调制所述受体力。
8.如权利要求7所述的方法,其中,所述加热是通过使电流穿过所述接触焊盘而执行的。
9.如权利要求4所述的方法,其中,所述受体力由机械柄生成。
10.如权利要求1所述的方法,进一步包括对所述受体衬底执行操作使得所述接触焊盘与所述选择的微型器件永久键合。
11.如权利要求4所述的方法,其中,所述受体力由所述选择的微型器件与所述受体衬底之间的静电引力生成。
12.如权利要求1所述的方法,其中,所述受体力由定位在所述选择的微型器件与所述受体衬底之间的粘合层生成。
13.如权利要求1所述的方法,进一步包括:
移除所述施体力;以及
向所选择的微型器件施加推力以便将所述器件移向所述受体衬底。
14.如权利要求13所述的方法,其中,所述推力由沉积在所述选择的微型器件与所述施体衬底之间的牺牲层产生。
15.一种受体衬底结构,包括:
着陆区域阵列,所述着陆区域阵列用于选择性地固持施体衬底的微型器件,每个着陆区域包括:
至少一个接触焊盘,所述至少一个接触焊盘用于将微型器件耦合至所述受体衬底中的电路或电势;以及
至少一个力调制元件,所述至少一个力调制元件用于产生用于将微型器件固持在所述受体衬底上的受体力,
其中所述微型器件中的每个微型器件对应于所述至少一个力调制元件中的一者,并且其中所述至少一个力调制单元在所述受体衬底上并且与所述至少一个接触焊盘直接接触。
16.如权利要求15所述的受体衬底结构,其中,所述力调制元件为静电结构。
17.如权利要求15所述的受体衬底结构,其中,所述力调制元件为机械柄。
18.如权利要求15所述的受体衬底结构,其中,对于每个着陆区域,同一元件充当所述力调制元件和所述接触焊盘。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202110684431.4A CN113410146A (zh) | 2015-01-23 | 2016-01-21 | 到受体衬底的选择性微型器件转移 |
Applications Claiming Priority (17)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CA2879627 | 2015-01-23 | ||
CA2879465A CA2879465A1 (en) | 2015-01-23 | 2015-01-23 | Integration of semiconductor devices into system substrate |
CA2879627A CA2879627A1 (en) | 2015-01-23 | 2015-01-23 | Selective semiconductor device integration into system substrate |
CA2879465 | 2015-01-23 | ||
CA2880718A CA2880718A1 (en) | 2015-01-28 | 2015-01-28 | Selective transfer of semiconductor device to a system substrate |
CA2880718 | 2015-01-28 | ||
CA2883914 | 2015-03-04 | ||
CA2883914A CA2883914A1 (en) | 2015-03-04 | 2015-03-04 | Selective transferring of micro-devices |
CA2890398 | 2015-05-04 | ||
CA2890398A CA2890398A1 (en) | 2015-05-04 | 2015-05-04 | Selective and non-selective micro-device transferring |
CA2891027 | 2015-05-12 | ||
CA2887186A CA2887186A1 (en) | 2015-05-12 | 2015-05-12 | Selective transferring and bonding of pre-fabricated micro-devices |
CA2887186 | 2015-05-12 | ||
CA2891007 | 2015-05-12 | ||
CA2891007 | 2015-05-12 | ||
CA2891027 | 2015-05-12 | ||
PCT/IB2016/050307 WO2016116889A1 (en) | 2015-01-23 | 2016-01-21 | Selective micro device transfer to receiver substrate |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202110684431.4A Division CN113410146A (zh) | 2015-01-23 | 2016-01-21 | 到受体衬底的选择性微型器件转移 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN107851586A CN107851586A (zh) | 2018-03-27 |
CN107851586B true CN107851586B (zh) | 2021-07-06 |
Family
ID=56416502
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201680006964.4A Active CN107851586B (zh) | 2015-01-23 | 2016-01-21 | 到受体衬底的选择性微型器件转移 |
CN202110684431.4A Pending CN113410146A (zh) | 2015-01-23 | 2016-01-21 | 到受体衬底的选择性微型器件转移 |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202110684431.4A Pending CN113410146A (zh) | 2015-01-23 | 2016-01-21 | 到受体衬底的选择性微型器件转移 |
Country Status (4)
Country | Link |
---|---|
US (9) | US20160219702A1 (zh) |
CN (2) | CN107851586B (zh) |
DE (1) | DE112016000447T5 (zh) |
WO (1) | WO2016116889A1 (zh) |
Families Citing this family (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107851586B (zh) * | 2015-01-23 | 2021-07-06 | 维耶尔公司 | 到受体衬底的选择性微型器件转移 |
US10134803B2 (en) * | 2015-01-23 | 2018-11-20 | Vuereal Inc. | Micro device integration into system substrate |
US10519037B2 (en) * | 2016-01-18 | 2019-12-31 | Palo Alto Research Center Incorporated | Multipass transfer surface for dynamic assembly |
KR102510934B1 (ko) * | 2016-10-04 | 2023-03-16 | 뷰리얼 인크. | 도너 기판 내의 마이크로 디바이스 배열 |
TWI624929B (zh) * | 2016-12-02 | 2018-05-21 | 英屬開曼群島商錼創科技股份有限公司 | 顯示器的製作方法 |
FR3061358B1 (fr) * | 2016-12-27 | 2021-06-11 | Aledia | Procede de fabrication d’un dispositif optoelectronique comportant des plots photoluminescents de photoresine |
DE102017101536B4 (de) * | 2017-01-26 | 2022-06-02 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Verfahren zum Selektieren von Halbleiterchips |
CN106910700B (zh) * | 2017-03-09 | 2020-12-04 | 京东方科技集团股份有限公司 | 转印装置和电子器件的转印方法 |
TWI756384B (zh) * | 2017-03-16 | 2022-03-01 | 美商康寧公司 | 用於大量轉移微型led的方法及製程 |
KR102236769B1 (ko) * | 2017-07-18 | 2021-04-06 | 삼성전자주식회사 | 엘이디 모듈 제조장치 및 엘이디 모듈 제조방법 |
US10636936B2 (en) | 2018-03-05 | 2020-04-28 | Sharp Kabushiki Kaisha | MEMS array system and method of manipulating objects |
KR20190114372A (ko) * | 2018-03-30 | 2019-10-10 | (주)포인트엔지니어링 | 마이크로 led 전사 시스템 |
TWI647742B (zh) * | 2018-04-19 | 2019-01-11 | 友達光電股份有限公司 | 發光裝置及其製造方法 |
CN111146131B (zh) * | 2018-11-06 | 2022-08-26 | 成都辰显光电有限公司 | 一种微元件的转移装置及转移方法 |
WO2020252577A1 (en) * | 2019-06-18 | 2020-12-24 | Vuereal Inc. | High throughput microprinting process |
CN110444648B (zh) * | 2019-07-29 | 2020-09-04 | 南京中电熊猫平板显示科技有限公司 | 微型发光二极管阵列显示背板及其制造方法和修复方法 |
US11302561B2 (en) * | 2019-11-12 | 2022-04-12 | Palo Alto Research Center Incorporated | Transfer elements that selectably hold and release objects based on changes in stiffness |
CN110808262B (zh) * | 2019-11-15 | 2022-06-24 | 京东方科技集团股份有限公司 | 微型led显示器件及其制备方法 |
JP7520984B2 (ja) * | 2020-02-18 | 2024-07-23 | エーファウ・グループ・エー・タルナー・ゲーエムベーハー | 構成部材を移送する方法および装置 |
US11348905B2 (en) | 2020-03-02 | 2022-05-31 | Palo Alto Research Center Incorporated | Method and system for assembly of micro-LEDs onto a substrate |
KR20230147717A (ko) * | 2021-02-22 | 2023-10-23 | 뷰리얼 인크. | 카트리지 간섭 |
TW202310209A (zh) * | 2021-05-04 | 2023-03-01 | 加拿大商弗瑞爾公司 | 整合式色彩轉換盒 |
US20220406764A1 (en) * | 2021-05-14 | 2022-12-22 | Seoul Viosys Co., Ltd. | Light emiting module and display apparatus having the same |
WO2023015382A1 (en) * | 2021-08-09 | 2023-02-16 | Vuereal Inc. | Selective release of microdevices |
DE102021120689A1 (de) | 2021-08-09 | 2023-02-09 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Transferverfahren für optoelektronsiche halbleiterbauelemete |
CN114384841B (zh) * | 2021-12-31 | 2024-04-30 | 江苏天芯微半导体设备有限公司 | 一种用于衬底处理设备的信号调制模组 |
DE102022122980A1 (de) * | 2022-09-09 | 2024-03-14 | Ams-Osram International Gmbh | Verfahren zum Herstellen eines optoelektronischen Bauelements und optoelektronisches Bauelement |
DE102022122981A1 (de) * | 2022-09-09 | 2024-03-14 | Ams-Osram International Gmbh | Verfahren zum Herstellen eines optoelektronischen Bauelements und optoelektronisches Bauelement |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030162463A1 (en) * | 2001-04-11 | 2003-08-28 | Kunihiko Hayashi | Element transfer method, element arrangmenet method using the same, and image display |
CN1813362A (zh) * | 2003-06-26 | 2006-08-02 | 纳幕尔杜邦公司 | 在基底上形成填充介电材料的图案的方法 |
US20130130440A1 (en) * | 2011-11-18 | 2013-05-23 | Hsin-Hua Hu | Method of fabricating and transferring a micro device and an array of micro devices utilizing an intermediate electrically conductive bonding layer |
Family Cites Families (78)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5184398A (en) * | 1991-08-30 | 1993-02-09 | Texas Instruments Incorporated | In-situ real-time sheet resistance measurement method |
US5782399A (en) * | 1995-12-22 | 1998-07-21 | Tti Testron, Inc. | Method and apparatus for attaching spherical and/or non-spherical contacts to a substrate |
JP2000208698A (ja) * | 1999-01-18 | 2000-07-28 | Toshiba Corp | 半導体装置 |
US20020048137A1 (en) | 1998-04-01 | 2002-04-25 | Williams Thomas J. | Two-layered embedded capacitor |
US6159822A (en) | 1999-06-02 | 2000-12-12 | Vanguard International Semiconductor Corporation | Self-planarized shallow trench isolation |
JP2004537158A (ja) | 2001-02-08 | 2004-12-09 | インターナショナル・ビジネス・マシーンズ・コーポレーション | チップ転写方法および該装置 |
JP2003109773A (ja) | 2001-07-27 | 2003-04-11 | Semiconductor Energy Lab Co Ltd | 発光装置、半導体装置およびそれらの作製方法 |
FR2838561B1 (fr) | 2002-04-12 | 2004-09-17 | Commissariat Energie Atomique | Matrice de photodectecteurs, a pixels isoles par des murs, hybridee sur un circuit de lecture |
JP4411575B2 (ja) * | 2002-04-25 | 2010-02-10 | セイコーエプソン株式会社 | 電子装置の製造装置 |
SG120879A1 (en) | 2002-08-08 | 2006-04-26 | Micron Technology Inc | Packaged microelectronic components |
US6987355B2 (en) | 2003-06-11 | 2006-01-17 | Eastman Kodak Company | Stacked OLED display having improved efficiency |
US7053412B2 (en) | 2003-06-27 | 2006-05-30 | The Trustees Of Princeton University And Universal Display Corporation | Grey scale bistable display |
US20050104225A1 (en) | 2003-11-19 | 2005-05-19 | Yuan-Chang Huang | Conductive bumps with insulating sidewalls and method for fabricating |
US7088431B2 (en) * | 2003-12-17 | 2006-08-08 | Asml Netherlands B.V. | Lithographic apparatus and device manufacturing method |
KR100906475B1 (ko) | 2004-01-13 | 2009-07-08 | 삼성전자주식회사 | 마이크로 광학벤치 구조물 및 그 제조방법 |
JP4349952B2 (ja) * | 2004-03-24 | 2009-10-21 | 京セラ株式会社 | ウェハ支持部材とその製造方法 |
US7018859B2 (en) | 2004-06-28 | 2006-03-28 | Epistar Corporation | Method of fabricating AlGaInP light-emitting diode and structure thereof |
KR100635575B1 (ko) | 2004-11-17 | 2006-10-17 | 삼성에스디아이 주식회사 | 풀 칼라 유기 전계 발광 표시 소자 및 그 제조방법 |
US7307327B2 (en) | 2005-08-04 | 2007-12-11 | Micron Technology, Inc. | Reduced crosstalk CMOS image sensors |
KR100685844B1 (ko) | 2005-08-26 | 2007-02-22 | 삼성에스디아이 주식회사 | 양면발광 유기 전계발광 표시장치 및 그의 구동방법 |
US7736948B2 (en) | 2005-11-11 | 2010-06-15 | Koninklijke Philips Electronics N.V. | Method of manufacturing a plurality of semiconductor devices and carrier substrate |
CN100576492C (zh) | 2006-09-30 | 2009-12-30 | 中芯国际集成电路制造(上海)有限公司 | 形成器件隔离区的方法 |
KR101636750B1 (ko) * | 2007-01-17 | 2016-07-06 | 더 보오드 오브 트러스티스 오브 더 유니버시티 오브 일리노이즈 | 프린팅기반 어셈블리에 의해 제조되는 광학 시스템 |
US7629184B2 (en) * | 2007-03-20 | 2009-12-08 | Tokyo Electron Limited | RFID temperature sensing wafer, system and method |
SG10201703432XA (en) * | 2007-04-27 | 2017-06-29 | Applied Materials Inc | Annular baffle |
TWI471971B (zh) | 2007-10-30 | 2015-02-01 | 尼康股份有限公司 | Substrate holding member, substrate bonding apparatus, laminated substrate manufacturing apparatus, substrate bonding method, laminated substrate manufacturing method, and laminated semiconductor device manufacturing method |
KR101553691B1 (ko) | 2008-07-10 | 2015-09-17 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 발광장치 |
US8139340B2 (en) * | 2009-01-20 | 2012-03-20 | Plasma-Therm Llc | Conductive seal ring electrostatic chuck |
US9991147B2 (en) * | 2009-09-01 | 2018-06-05 | Hermes Microvision, Inc. | Wafer grounding and biasing method, apparatus, and application |
CN102097357A (zh) | 2009-12-15 | 2011-06-15 | 中芯国际集成电路制造(上海)有限公司 | 隔离结构的制作方法 |
US8436255B2 (en) * | 2009-12-31 | 2013-05-07 | Stmicroelectronics Pte Ltd. | Fan-out wafer level package with polymeric layer for high reliability |
JP5458307B2 (ja) | 2010-03-05 | 2014-04-02 | 株式会社ジャパンディスプレイ | 電気光学表示装置 |
WO2011123285A1 (en) | 2010-03-29 | 2011-10-06 | Semprius, Inc. | Selective transfer of active components |
WO2011126726A1 (en) * | 2010-03-29 | 2011-10-13 | Semprius, Inc. | Electrically bonded arrays of transfer printed active components |
EP2736089B1 (en) | 2011-07-19 | 2018-09-12 | Hitachi, Ltd. | Organic light-emitting element, light source device and organic light-emitting element manufacturing method |
US8573469B2 (en) | 2011-11-18 | 2013-11-05 | LuxVue Technology Corporation | Method of forming a micro LED structure and array of micro LED structures with an electrically insulating layer |
US9965106B2 (en) | 2011-11-22 | 2018-05-08 | Atmel Corporation | Touch screen with electrodes positioned between pixels |
TWI631697B (zh) | 2012-02-17 | 2018-08-01 | 財團法人工業技術研究院 | 發光元件及其製造方法 |
TWI546979B (zh) | 2012-03-05 | 2016-08-21 | 晶元光電股份有限公司 | 對位接合之發光二極體裝置與其製造方法 |
US9548332B2 (en) * | 2012-04-27 | 2017-01-17 | Apple Inc. | Method of forming a micro LED device with self-aligned metallization stack |
US9134368B2 (en) * | 2012-05-07 | 2015-09-15 | Taiwan Semiconductor Manufacturing Co., Ltd. | Contactless wafer probing with improved power supply |
CN103390647A (zh) * | 2012-05-10 | 2013-11-13 | 无锡华润上华半导体有限公司 | 一种功率mos器件结构 |
CN102683534B (zh) | 2012-05-21 | 2015-02-25 | 厦门市三安光电科技有限公司 | 垂直式交流发光二极管器件及其制作方法 |
US8933433B2 (en) | 2012-07-30 | 2015-01-13 | LuxVue Technology Corporation | Method and structure for receiving a micro device |
DE102012215513A1 (de) | 2012-08-31 | 2014-03-06 | J. Schmalz Gmbh | Greifvorrichtung |
US8765582B2 (en) * | 2012-09-04 | 2014-07-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for extreme ultraviolet electrostatic chuck with reduced clamp effect |
US9159700B2 (en) | 2012-12-10 | 2015-10-13 | LuxVue Technology Corporation | Active matrix emissive micro LED display |
CN103904073A (zh) | 2012-12-29 | 2014-07-02 | 欧普照明股份有限公司 | Led和oled集成照明模块 |
EP2939265B1 (en) * | 2012-12-31 | 2018-10-31 | Flir Systems, Inc. | Wafer level packaging of microbolometer vacuum package assemblies |
US9443833B2 (en) | 2013-01-31 | 2016-09-13 | Nthdegree Technologies Worldwide Inc. | Transparent overlapping LED die layers |
JP5988411B2 (ja) * | 2013-02-25 | 2016-09-07 | 京セラ株式会社 | 試料保持具 |
KR101772783B1 (ko) | 2013-03-13 | 2017-08-29 | 캐보트 코포레이션 | 조합된 낮은 유전 상수, 높은 비저항, 및 광학 밀도 특성, 및 제어된 전기 비저항을 갖는 충전제-중합체 조성물을 갖는 코팅, 및 그로 제조된 장치, 및 그의 제조 방법 |
WO2014149182A1 (en) * | 2013-03-15 | 2014-09-25 | Applied Materials, Inc. | Methods and apparatus for electrostatic chuck repair and refurbishment |
US9728124B2 (en) | 2013-05-08 | 2017-08-08 | Apple Inc. | Adaptive RGB-to-RGBW conversion for RGBW display systems |
CN104241535B (zh) | 2013-06-06 | 2017-07-25 | 上海和辉光电有限公司 | 一种有机发光结构 |
US8987765B2 (en) | 2013-06-17 | 2015-03-24 | LuxVue Technology Corporation | Reflective bank structure and method for integrating a light emitting device |
US8928021B1 (en) | 2013-06-18 | 2015-01-06 | LuxVue Technology Corporation | LED light pipe |
US9111464B2 (en) | 2013-06-18 | 2015-08-18 | LuxVue Technology Corporation | LED display with wavelength conversion layer |
JP2015050011A (ja) | 2013-08-30 | 2015-03-16 | 株式会社ジャパンディスプレイ | エレクトロルミネセンス装置およびその製造方法 |
US9431283B2 (en) * | 2013-09-19 | 2016-08-30 | Palo Alto Research Center Incorporated | Direct electrostatic assembly with capacitively coupled electrodes |
US10062738B2 (en) | 2013-11-27 | 2018-08-28 | The Regents Of The University Of Michigan | Devices combining thin film inorganic LEDs with organic LEDs and fabrication thereof |
US10153190B2 (en) * | 2014-02-05 | 2018-12-11 | Micron Technology, Inc. | Devices, systems and methods for electrostatic force enhanced semiconductor bonding |
US11158526B2 (en) * | 2014-02-07 | 2021-10-26 | Applied Materials, Inc. | Temperature controlled substrate support assembly |
US9871350B2 (en) | 2014-02-10 | 2018-01-16 | Soraa Laser Diode, Inc. | Manufacturable RGB laser diode source |
US9257414B2 (en) * | 2014-04-10 | 2016-02-09 | Taiwan Semiconductor Manufacturing Company, Ltd. | Stacked semiconductor structure and method |
US9196498B1 (en) * | 2014-08-12 | 2015-11-24 | Applied Materials, Inc. | Stationary actively-cooled shadow ring for heat dissipation in plasma chamber |
TWI647833B (zh) | 2014-08-26 | 2019-01-11 | 愛爾蘭商艾克斯瑟樂普林特有限公司 | 微組合複合式顯示裝置及發光元件 |
WO2016043497A2 (ko) | 2014-09-16 | 2016-03-24 | 엘지디스플레이 주식회사 | 광 제어 장치, 광 제어 장치의 제조 방법 및 광 제어 장치를 포함하는 표시 장치 |
US10381335B2 (en) | 2014-10-31 | 2019-08-13 | ehux, Inc. | Hybrid display using inorganic micro light emitting diodes (uLEDs) and organic LEDs (OLEDs) |
US9607907B2 (en) | 2014-12-01 | 2017-03-28 | Industrial Technology Research Institute | Electric-programmable magnetic module and picking-up and placement process for electronic devices |
US9478583B2 (en) | 2014-12-08 | 2016-10-25 | Apple Inc. | Wearable display having an array of LEDs on a conformable silicon substrate |
US10700120B2 (en) * | 2015-01-23 | 2020-06-30 | Vuereal Inc. | Micro device integration into system substrate |
CA2887186A1 (en) | 2015-05-12 | 2016-11-12 | Ignis Innovation Inc. | Selective transferring and bonding of pre-fabricated micro-devices |
CA2880718A1 (en) | 2015-01-28 | 2016-07-28 | Ignis Innovation Inc. | Selective transfer of semiconductor device to a system substrate |
CA2890398A1 (en) | 2015-05-04 | 2016-11-04 | Ignis Innovation Inc. | Selective and non-selective micro-device transferring |
CN107851586B (zh) * | 2015-01-23 | 2021-07-06 | 维耶尔公司 | 到受体衬底的选择性微型器件转移 |
US9941262B2 (en) | 2015-12-07 | 2018-04-10 | Glo Ab | Laser lift-off on isolated III-nitride light islands for inter-substrate LED transfer |
US11293847B2 (en) * | 2019-05-21 | 2022-04-05 | Exxonmobil Upstream Research Company | Test system and methods for evaluating erosion of a test sample |
-
2016
- 2016-01-21 CN CN201680006964.4A patent/CN107851586B/zh active Active
- 2016-01-21 WO PCT/IB2016/050307 patent/WO2016116889A1/en active Application Filing
- 2016-01-21 DE DE112016000447.8T patent/DE112016000447T5/de active Pending
- 2016-01-21 CN CN202110684431.4A patent/CN113410146A/zh active Pending
- 2016-01-21 US US15/002,662 patent/US20160219702A1/en not_active Abandoned
-
2020
- 2020-07-16 US US16/931,132 patent/US11728302B2/en active Active
-
2021
- 2021-07-01 US US17/365,708 patent/US11476216B2/en active Active
- 2021-07-01 US US17/365,634 patent/US11735545B2/en active Active
-
2022
- 2022-01-06 US US17/569,893 patent/US11728306B2/en active Active
- 2022-01-06 US US17/569,900 patent/US11735546B2/en active Active
- 2022-01-06 US US17/569,918 patent/US11735547B2/en active Active
- 2022-04-27 US US17/730,719 patent/US12199058B2/en active Active
-
2024
- 2024-09-24 US US18/895,330 patent/US20250015030A1/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030162463A1 (en) * | 2001-04-11 | 2003-08-28 | Kunihiko Hayashi | Element transfer method, element arrangmenet method using the same, and image display |
CN1813362A (zh) * | 2003-06-26 | 2006-08-02 | 纳幕尔杜邦公司 | 在基底上形成填充介电材料的图案的方法 |
US20130130440A1 (en) * | 2011-11-18 | 2013-05-23 | Hsin-Hua Hu | Method of fabricating and transferring a micro device and an array of micro devices utilizing an intermediate electrically conductive bonding layer |
Also Published As
Publication number | Publication date |
---|---|
US20200350281A1 (en) | 2020-11-05 |
US11735546B2 (en) | 2023-08-22 |
WO2016116889A1 (en) | 2016-07-28 |
CN113410146A (zh) | 2021-09-17 |
US20220130783A1 (en) | 2022-04-28 |
US11735547B2 (en) | 2023-08-22 |
US11476216B2 (en) | 2022-10-18 |
DE112016000447T5 (de) | 2017-11-16 |
US20210327739A1 (en) | 2021-10-21 |
US11728302B2 (en) | 2023-08-15 |
US20220254745A1 (en) | 2022-08-11 |
US12199058B2 (en) | 2025-01-14 |
US11728306B2 (en) | 2023-08-15 |
US20220139857A1 (en) | 2022-05-05 |
US20210327740A1 (en) | 2021-10-21 |
US11735545B2 (en) | 2023-08-22 |
CN107851586A (zh) | 2018-03-27 |
US20160219702A1 (en) | 2016-07-28 |
US20220139856A1 (en) | 2022-05-05 |
US20250015030A1 (en) | 2025-01-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN107851586B (zh) | 到受体衬底的选择性微型器件转移 | |
US12075565B2 (en) | Selective transfer of micro devices | |
TWI581355B (zh) | 轉置微元件的方法 | |
KR102438882B1 (ko) | 시스템 기판으로의 마이크로 디바이스의 집적 | |
EP3221903B1 (en) | Transferring method of micro-led, and manufacturing method of micro-led device | |
US20200411471A1 (en) | Microdevice transfer setup and integration of micro-devices into system substrate | |
TWI859194B (zh) | 交錯及拼塊堆疊的微裝置整合及驅動 | |
US20230326937A1 (en) | Integration of microdevices into system substrate | |
WO2017008253A1 (en) | Transferring method, manufacturing method, device and electronic apparatus of micro-led | |
US20210242287A1 (en) | Integration of microdevices into system substrate | |
KR20180041772A (ko) | 반도체 디바이스의 어셈블리 | |
KR20210057667A (ko) | 강도의 변화에 기초하여 물체를 선택가능하게 보유 및 해제하는 전사 요소 | |
CA2936523A1 (en) | Selective micro device transfer to receiver substrate | |
US20240266330A1 (en) | Integration of microdevices into system substrate | |
CA2883914A1 (en) | Selective transferring of micro-devices | |
US20240347368A1 (en) | High throughput microprinting process | |
CA2921737A1 (en) | Micro device integration into system substrate | |
TW202504066A (zh) | 交錯及拼塊堆疊的微裝置整合及驅動 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20190125 Address after: Ontario, Canada Applicant after: VueReal Inc. Address before: Ontario, Canada Applicant before: Chaji Gholamreza Applicant before: Ihsaara Fathi |
|
TA01 | Transfer of patent application right | ||
GR01 | Patent grant | ||
GR01 | Patent grant |