CN107527802A - Groove type double-layer grid MOS film build methods - Google Patents

Abstract

The invention discloses a method for forming a trench-type double-layer gate MOS film, which includes: step 1, forming an oxide film layer and a hard mask layer on a silicon substrate, opening the trench etching window by patterning, and etching to form Trench; deposit a sacrificial oxide layer after trench chamfering; step 2, deposit a pad oxide layer, then deposit polysilicon and etch back, then coat photoresist, and then etch polysilicon after patterning and defining The third step is to perform thermal oxidation to form a dielectric oxide layer, then etch back the dielectric oxide layer, deposit polysilicon and etch back to form a polysilicon gate; deposit an oxide layer, deposit polysilicon and Under the definition of glue, the polysilicon is etched back to form an electrostatic discharge structure; the fourth step is to implant the body region and the source region, deposit the oxide layer, deposit the borophosphosilicate glass, and wet the borophosphosilicate glass and the oxide layer. Etching back; contact hole photolithography and etching, metal deposition.

Description

Trench type double-layer gate MOS film formation method

technical field

The invention relates to the field of semiconductors, in particular to a trench-type double-layer gate MOS film forming method.

Background technique

In the trench double-layer gate MOSFET, the surface of the laminated film is planarized by reflow instead of CMP (Chemical Mechanical Polishing).

In products with ESD structures, gate/source short circuits will occur around the wafer, and analysis under a microscope shows that there are metal residues at the edge of the laminating film.

Further analysis confirmed that due to the straight ESD interface, tungsten residues formed after lamination. Residual tungsten causes the above-mentioned problems.

The above problems are based on the current process: after the trench is formed, a pad oxide layer is deposited, then polysilicon is deposited and etched back, and then photoresist is coated, and the polysilicon is etched to form a polysilicon source after patterning and definition; Perform thermal oxidation to form a thermal oxide layer, then etch back the thermal oxide layer, deposit polysilicon and etch back to form a polysilicon gate; form silicate glass, deposit polysilicon and etch back the polysilicon under the definition of photoresist Form an electrostatic discharge structure; implant the body region and the source region, form silicate glass again, deposit borophosphosilicate glass, etch back the silicate glass, borophosphosilicate glass and oxide layer; contact hole photolithography and Subsequent processes such as etching and metal deposition are completed. This process is mainly due to the insufficient optimization of the thickness of the interlayer film (interlayer dielectric) composed of silicate glass and borophosphosilicate glass and the B/P parameters in borophosphosilicate glass, resulting in insufficient surface flatness in the later stage. , the thickness uniformity of the interlayer film is not good, and it is easy to form residual tungsten metal blocks.

Contents of the invention

The technical problem to be solved by the present invention is to provide a trench-type double-layer gate MOS film forming method.

In order to solve the above problems, the method for forming a trench-type double-layer gate MOS film according to the present invention: includes:

The first step is to form an oxide film layer and a hard mask layer on the silicon substrate, open the trench etching window by patterning, etch to form a trench; trench chamfering treatment;

The second step is to deposit a pad oxide layer, then deposit polysilicon and etch back, then coat photoresist, pattern and define, and then etch the polysilicon to form a polysilicon source;

Step 3, thermal oxidation is performed to form a thermal oxide layer, and then the thermal oxide layer is etched back;

Step 4: Deposit polysilicon and etch back to form a polysilicon gate; form silicate glass, deposit polysilicon and etch back polysilicon under the definition of photoresist to form an electrostatic discharge structure;

Implant the body region and the source region, form silicate glass again, deposit borophosphosilicate glass, etch back the silicate glass, borophosphosilicate glass and oxide layer; contact hole photolithography and etching, deposition Metal.

Further, in the second step, the pad oxide layer is an ONO composite layer, that is, a sandwich structure including three layers of an oxide film, a nitride film, and an oxide film.

Further, in the third step, the etching back process of the thermal oxide layer adopts wet etching.

Further, in the 4th step, the thickness of the re-formed silicate glass is The thickness of borophosphosilicate glass is

Further, in the borophosphosilicate glass, the molar ratio of boron and phosphorus is: (9.8±0.3)/(5.4±0.3).

Further, in the fourth step, silicate glass and borophosphosilicate glass form the interlayer dielectric, and the etch-back process adopts wet etching, and the thickness of the interlayer dielectric after final etching is

Further, in the fourth step, the borophosphosilicate glass is formed in an oxygen atmosphere at 950-1000° C. for 30 minutes.

In the fourth step, the etching depth of the contact hole is 0.3-0.4 μm.

The trench-type double-layer gate MOS film forming method of the present invention improves the surface flatness and avoids the problem of tungsten residue by optimizing the thickness of the interlayer film and the molar ratio of boron and phosphorus in the borophosphosilicate glass.

Description of drawings

1 to 4 are process step diagrams of the present invention.

Fig. 5 is a process flow chart of the present invention.

Explanation of reference signs

1 is a hard mask, 2 is an oxide film, 3 is an ONO layer, 4 is polysilicon, 5 is a thermal oxide layer, 6 is a contact hole, and 7 is borophosphosilicate glass.

detailed description

The method for forming a trench-type double-layer gate MOS film according to the present invention: comprises the following process steps:

The first step is to form an oxide film layer and a hard mask layer on the silicon substrate, open the trench etching window by patterning, etch to form a trench; trench chamfering treatment.

The second step is to deposit the pad oxide layer. The pad oxide layer is an ONO composite layer, that is, a sandwich structure including three layers of oxide film, nitride film, and oxide film. Then polysilicon is deposited and etched back, and then photoresist is coated, patterned and defined, and then the polysilicon is etched to form a polysilicon source.

In the third step, thermal oxidation is performed to form a thermal oxide layer, and then wet etching is performed on the thermal oxide layer.

Step 4: Deposit polysilicon and etch back to form a polysilicon gate; form silicate glass, deposit polysilicon and etch back polysilicon under the definition of photoresist to form an electrostatic discharge structure.

Implant the body region and the source region to form silicate glass again, with a thickness of for example Deposit borophosphosilicate glass with a B/P molar ratio of 9.8/5.4 in an oxygen atmosphere at 950-1000°C for 30 minutes, with a thickness of For example, in this embodiment, the middle value is selected Perform wet etching back on silicate glass and borophosphosilicate glass; contact hole photolithography and etching, contact hole etching depth is 0.3-.4μm, such as 0.35μm, deposit metal. The craft is complete.

The above are only preferred embodiments of the present invention, and are not intended to limit the present invention. Various modifications and variations of the present invention will occur to those skilled in the art. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

Claims (8)

1. A kind of 1. groove type double-layer grid MOS film build methods, it is characterised in that：Comprising：

   1st step, oxidation film layer and hard mask layer are formed on a silicon substrate, graphical to open etching groove window, etching forms ditch Groove；Groove chamfering processing；

   2nd step, cushion oxide layer is deposited, then depositing polysilicon and time quarter, be then coated with photoresist, it is right again after patterning definition Polysilicon performs etching to form polysilicon source；

   3rd step, carry out thermal oxide and form thermal oxide layer, then thermal oxide layer carve；

   4th step, depositing polysilicon and return form polysilicon gate at quarter；Form silicate glass, depositing polysilicon and in photoresist Definition under polysilicon is carried out back to form Electro-static Driven Comb structure quarter；

   The injection of body area and source region is carried out, forms silicate glass again, boron-phosphorosilicate glass is deposited, to silicate glass and boron phosphorus Silica glass carve；Contact hole lithographic definition and etching, deposit metal.
2. 2. groove type double-layer grid MOS film build methods as claimed in claim 1, it is characterised in that：In 2nd step, oxygen is padded Change layer is ONO composite beds, i.e., comprising oxide-film, nitride film, three layers of oxide-film sandwich structure.
3. 3. groove type double-layer grid MOS film build methods as claimed in claim 1, it is characterised in that：In 3rd step, thermal oxide Layer returns carving technology and uses wet etching.
4. 4. groove type double-layer grid MOS film build methods as claimed in claim 1, it is characterised in that：In 4th step, shape again Into the thickness of silicate glass be 1200~2000, the thickness of boron-phosphorosilicate glass is 8000~10000.
5. 5. groove type double-layer grid MOS film build methods as claimed in claim 4, it is characterised in that：In the boron-phosphorosilicate glass, Boron, the molar ratio of phosphorus are（9.8±0.3）/（5.4±0.3）.
6. 6. groove type double-layer grid MOS film build methods as claimed in claim 1, it is characterised in that：In 4th step, silicate Glass and boron-phosphorosilicate glass form inter-level dielectric, return carving technology and use wet etching, and inter-level dielectric thickness is after final etching 5000~6000.
7. 7. groove type double-layer grid MOS film build methods as claimed in claim 1, it is characterised in that：In 4th step, boron phosphorus silicon The formation of glass is the 30 minutes time under 950~1000 DEG C of oxygen atmosphere.
8. 8. groove type double-layer grid MOS film build methods as claimed in claim 1, it is characterised in that：In 4th step, contact hole Etching depth is 0.3~0.4 μm.