CN107505485B - Contact probe, semiconductor device testing apparatus, and semiconductor device testing method - Google Patents

Abstract

The invention realizes low resistance contact with respect to a pad of a semiconductor element. The semiconductor element testing device is provided with a contact probe (12), and the contact probe (12) is contacted with an emitter bonding pad (1b) when a semiconductor element (1) placed on a testing table (11) is tested. The contact probe (12) is held on the contact block (14) in a state of being separated from the plunger pin (18), and after the contact block (14) is lowered, the contact probe (12) is first allowed to stand by itself on the emitter pad (1b) of the semiconductor element (1). Then, when the contact block (14) is lowered, 1 of the plunger pins (18) comes into contact with the protrusion (12d) of the contact probe (12), and thereafter, the other plunger pins (18) come into contact with the 1 st contact surface (12b) around the protrusion (12 d). The contact probe (12) can realize low-resistance contact by keeping the parallelism with the semiconductor element (1) even if the contact probe is inclined to the emitter pad (1 b).

Description

Contact probe, semiconductor device testing apparatus, and semiconductor device testing method

technical field

The present invention relates to a contact probe used in a dynamic characteristic test of a semiconductor element (chip), a semiconductor element testing apparatus, and a semiconductor element testing method.

Background technique

A semiconductor element test apparatus for testing the dynamic characteristics of a semiconductor element is known, and generally includes a test circuit, a contact block, a contact pin, and a test stand (for example, refer to Patent Document 1). The contact block is a component used as a unit for electrically connecting the test circuit and the semiconductor element on the test bench, and has a placement plate and a base unit. The placement tray is located above the test table on which the semiconductor element is placed, and holds a plurality of contact pins as contact probes that come into contact with the semiconductor element. One side of the base unit is connected to the wiring connected to the test circuit, and the other side holds a plurality of plunger pins which are in contact with the other side in a state where a load is applied to the contact pins.

When the semiconductor element is a power device such as an IGBT (Insulated Gate Bipolar Transistor), it has a gate pad, an emitter pad, and a collector pad. When the test is performed, the contact pins are brought into contact with the gate pad and the emitter pad of the semiconductor element, and the electrodes of the test circuit provided on the test stand are brought into contact with the collector pad. When the semiconductor element is a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), the contact pin is placed in contact with the gate pad and the emitter pad, and the electrode of the test bed is placed in contact with the drain pad. Furthermore, when the semiconductor is FWD (Free Wheeling Diode), the contact pins are brought into contact with the cathode pads, and the electrodes of the test stand are brought into contact with the anode pads.

Here, the contact pins are used as contact probes because when the semiconductor element is destroyed, the molten material of the semiconductor element (silicon or the like) adheres to the tip of the probe, so the probe must be replaced. Thus, the placement tray holding the contact pins is arranged to be detachable on the base unit. When the contact pin needs to be replaced, remove the placement plate from the base unit, replace the damaged contact pin with a good one, and install it on the base unit again.

When a semiconductor element testing apparatus performs a test, firstly, a semiconductor element is arranged at a predetermined position on a test table, and a contact block is lowered to an arbitrary position by an up-down movement mechanism, so that the contact pin is brought into contact with the semiconductor element. At this time, the contact pin applies a load to the semiconductor element according to the spring characteristic of the spring included in the plunger pin. The gate and emitter (source, cathode) pads of the semiconductor element are electrically connected to the test circuit through contact pins, plunger pins and wiring, and the collector (drain, anode) pads pass through the electrodes and wirings of the test bench. The circuit is electrically connected, and the electrical characteristics test is carried out.

In this case, in order to apply a uniform current and voltage to the semiconductor element, it is necessary to arrange dozens of contact pins uniformly on the semiconductor element. The number of contact pins arranged on the semiconductor element increases or decreases according to the test current. In addition, when the contact surface radius of the cylindrical contact pin and the semiconductor element is R, the cross-sectional area of each pin is (πR＾2), so as a whole, the contact probe with the contact probe is determined by (πR＾2)×number of pieces Contact area of semiconductor components.

Here, the chip size of the semiconductor element tends to be reduced due to the accelerated development of cell integration and performance improvement (improvement of rated current) in recent years. Even if the chip size is reduced, a semiconductor element is required to be contacted with a low resistance and a test in which a large current flows. Therefore, it is necessary to improve the energization performance of the contact probe as a semiconductor element testing apparatus. There are two methods to improve the energization performance. One method is to select a material that reduces the contact resistance between the contact pin and the semiconductor element, and the other method is to increase the contact area between the contact pin and the semiconductor element.

Conventionally, low-resistance materials such as tungsten alloys, copper alloys, silver alloys, palladium alloys, gold alloys, and iridium alloys have been used for contact pins. In addition, by reducing the pitch between the contact pins and arranging a plurality of contact pins, the contact area with the semiconductor element is increased.

As another method of increasing the contact area with the semiconductor element, it has been proposed to use, as a contact probe, a conductive resin brought into contact with the emitter (source) pad surface of the semiconductor element (see, for example, Patent Document 2). By forming the conductive resin into the size of the emitter (source) pad of the semiconductor element, the contact area can be greatly increased.

prior art literature

Patent Literature

Patent Document 1: Japanese Patent Laid-Open No. 2012-068076

Patent Document 2: Japanese Patent Laid-Open No. 2009-128189

SUMMARY OF THE INVENTION

The technical problem to be solved by the invention

However, even if the structure in which the emitter (source) pad of the semiconductor element and the conductive resin are brought into face-to-face contact can increase a large contact area, it is difficult to connect the emitter (source) of the semiconductor element with the uneven surface of the conductive resin. source) pad to apply a uniform load. Therefore, there is a problem in that the contact resistance is not uniform over the entire surface of the emitter (source) pad of the semiconductor element, and the current concentrates in the area with low contact resistance, causing local heat generation and damaging the semiconductor element.

The present invention has been developed in view of the above-mentioned problems, and an object thereof is to provide a contact probe, a semiconductor element testing apparatus, and a semiconductor element testing method that realize low-resistance contact with a pad of a semiconductor element.

Technical solutions adopted to solve technical problems

In order to solve the above-mentioned problems, the present invention provides a touch probe. The contact probe has a first contact surface that is in contact with the plurality of plunger pins; and a second contact surface that is in contact with the inspection object surface on the side opposite to the first contact surface face contact.

The present invention provides a semiconductor element test device, comprising: a test stand on which a semiconductor element is placed; a plurality of contact probes, when the semiconductor element test is performed, the plurality of contact probes are connected to the test stand placed on the test stand. The main electrode of the semiconductor element on the test stand is in contact; a plurality of plunger pins, when the semiconductor element test is performed, the plurality of plunger pins are in contact with the contact probe, and the contact probe is Press to the main electrode of the semiconductor element; a placing plate, when the semiconductor element test is not being performed, the placing plate lifts the contact probe, so that the contact probe is kept in contact with the semiconductor element. the position where the main electrode is separated, when the test of the semiconductor element is carried out, the placement plate enables the contact probe to be placed at a predetermined position of the main electrode of the semiconductor element by its own weight; and the base unit, when not The base unit holds the plunger pin at a position separated from the contact probe when the semiconductor element test is performed, and the base unit contacts and presses the plunger pin during the semiconductor element test The contact probes are placed on the main electrodes of the semiconductor elements. The contact probe in the semiconductor element testing apparatus has a prismatic body having a first contact surface that contacts the plurality of plunger pins, and a side opposite to the first contact surface. , a second contact surface in contact with the main electrode of the semiconductor element; and a protruding portion protrudingly provided at the center of the first contact surface and in contact with one of the plunger pins .

The present invention also provides a semiconductor element testing method for evaluating the electrical characteristics of the semiconductor element. The semiconductor element testing method has the steps of placing a plurality of contact probes on the main electrode of the semiconductor element by its own weight, the plurality of contact probes being on the side of the prismatic body that is in contact with the plunger pin Each of the contact surfaces has a protruding portion in the center; one of the plunger pins is brought into contact with the protruding portion of the contact probe to maintain the parallelism between the contact probe and the main electrode of the semiconductor element ; and on each of the contact probes, increase the load when the plunger pin is in contact with the protruding portion, and make other plurality of the plunger pins abut against the first contact surface around the protruding portion catch.

Invention effect

The above-described contact probe, semiconductor device testing apparatus, and semiconductor device testing method have the advantage that different loads are applied to the contact probe at the upper center and the periphery of the contact probe, so that the contact probe can be relative to the inclined pad in the semiconductor device. Parallelism is maintained for low resistance contacts.

Description of drawings

FIG. 1 is a diagram showing a configuration example of a semiconductor element testing apparatus according to the first embodiment.

FIG. 2 is an external perspective view showing a touch probe.

FIG. 3 is a plan view showing an arrangement relationship among semiconductors, contact probes, and plunger pins.

4 is an explanatory diagram of the contact area of the contact probe, FIG. 4(A) shows the contact area in the case of the columnar contact probe, and FIG. 4(B) shows the contact area in the case of the needle-shaped contact probe.

FIG. 5 is a diagram schematically illustrating a step of bringing the plunger pins into contact with the contact probes after bringing the contact probes into contact with the semiconductor element.

6 is an explanatory diagram of the operation of the semiconductor element testing apparatus, FIG. 6(A) shows a standby state before initial contact, FIG. 6(B) shows a contact state with the semiconductor element, and FIG. 6(C) shows a In the contact state with the protrusion, FIG. 6(D) shows the complete contact state.

FIG. 7 is a diagram showing the relationship between the pressing amount of the plunger pin and the load.

FIG. 8 is a diagram illustrating the balance of the load applied to the touch probe.

FIG. 9 is a diagram showing another embodiment of the contact probe.

10 is a diagram showing a configuration example of a semiconductor element testing apparatus according to the second embodiment.

11 is a plan view showing an arrangement relationship among semiconductors, contact probes, and plunger pins.

Detailed ways

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. First, the overall structure of the semiconductor element testing apparatus of the embodiment used for the dynamic characteristic test of a semiconductor element (chip) will be described.

FIG. 1 is a diagram showing a configuration example of a semiconductor element testing apparatus according to the first embodiment, and FIG. 2 is an external perspective view showing a contact probe.

The semiconductor element testing apparatus includes: a test stand 11 on which the semiconductor element 1 in a chip state is placed; contact probes 12 and 13 which are in electrical contact with the semiconductor element 1; and a contact block 14 which contacts the semiconductor element 1 Block 14 holds the contact probes 12 , 13 ; and test circuit 15 . Here, an IGBT is shown as an example of the semiconductor element 1 to be tested. In the case of an IGBT, the semiconductor element 1 is mounted with the side having the gate pad 1a serving as the control electrode and the emitter pad 1b serving as the main electrode facing upward and the surface having the collector pad facing downward. on test bench 11.

The contact block 14 includes a placement tray 16 and a base unit 17 . The placement plate 16 is provided with probe holding holes 16a, 16b through which the contact probes 12, 13 are inserted according to the positions where the contact probes 12, 13 are arranged in the semiconductor element 1, respectively. The base unit holds the plunger pin 18 that is in contact with and pressed by the contact probes 12 and 13 . The plunger pin 18 has a spring that applies a predetermined load to the contact probes 12 and 13 .

The placing plate 16 is set to be detachable on the base unit 17. When the contact probes 12 and 13 need to be replaced, the placing plate 16 is removed from the base unit 17, and the damaged contact probes 12 and 13 are replaced with good ones. Needles 12, 13. In addition, when the semiconductor element 1 is not being tested, the mounting plate 16 lifts the contact probes 12 and 13 from the semiconductor element 1 and keeps the state separated from the plunger pin 18 . When the semiconductor element 1 is tested, first, the placement tray 16 is lowered, and the contact probes 12 and 13 are lowered and placed on the semiconductor element 1 by their own weight. After that, by further descending the placement plate 16 , the contact probes 12 and 13 descend and come into contact with the plunger pin 18 . As the placement plate 16 is further lowered, the plunger pins 18 apply a load to the contact probes 12 and 13 and press the contact probes 12 and 13 against the semiconductor element 1 .

The plunger pin 18 is connected to the test circuit 15 through wirings 19a and 19b. The test stand 11 has a wiring 19c whose one end is connected to the lower surface of the semiconductor element 1 , and the other end of the wiring 19c is connected to the test circuit 15 .

Here, as shown in FIG. 2 , the contact probe 12 in contact with the emitter pad 1b of the semiconductor element 1 has a prismatic body 12a. The upper end surface of the main body 12 a constitutes a first contact surface 12 b that contacts the plunger pin 18 , and the lower end surface constitutes a second contact surface 12 c that contacts the emitter pad 1 b of the semiconductor element 1 . The contact probe 12 further has a protruding portion 12d protruding from the vicinity of the center of the first contact surface 12b, and the plunger pin 18 is in contact with the upper surface of the protruding portion 12d. The contact probe 12 also has a flange portion 12e at the peripheral portion on one side of the first contact surface 12b. When the contact probes 12 are loosely inserted through the probe holding holes 16 a formed in the placement tray 16 , the flanges 12 e are locked in the probe holding holes 16 a to prevent the contact probes 12 from falling out of the placement tray 16 . The contact probe 12 is also chamfered at the peripheral portion on one side of the second contact surface 12c, and the corner portion is cut at an angle of 45 degrees.

FIG. 3 is a plan view showing an arrangement relationship between semiconductors, contact probes, and plunger pins, FIG. 4 is an explanatory view of the contact area of the contact probe, and FIG. 4(A) shows the contact area of the columnar contact probe. , Figure 4(B) shows the contact area of the needle-like contact probe.

When the semiconductor element 1 is tested, the number of contact probes 12 corresponding to the chip size is brought into contact with the emitter pad 1b. In the example shown in FIG. 3, five contact probes 12 are in contact with the emitter pad 1b. Each of the contact probes 12 is in contact with five plunger pins 18 . Among them, one plunger pin 18 is in contact with the protruding portion 12d of the contact probe 12, and the other four plunger pins 18 are in contact with the first contact surface 12d of the contact probe 12 so as to surround the protruding portion 12d.

As shown in FIG. 4(A) , the contact area between the contact probe 12 and the emitter pad 1 b of the semiconductor element 1 is equal to the area of the second contact surface 12 c of the contact probe 12 . That is, when four times (8R) of the diameter (2R) of the touch probe 13 as shown in FIG. 4(B) are set as the horizontal (a) and vertical (b) dimensions of the second contact surface 12c, the second The contact area of the contact surface 12c is 64R^2. On the other hand, when five pin-shaped contact probes 13 are used, the contact area of the five pins is 5πR＾2 (πR^2×5 pieces).

Here, when five pin-shaped contact probes 13 are used, compared with the case where one block-shaped contact probe 12 is used, the contact area differs by about 4 (=64^2/5πR^2) times. That is, by changing the five pin-shaped contact probes 13 to one block-shaped contact probe 12 , the contact area of the probes in contact with the emitter pad 1 b of the semiconductor element 1 is quadrupled. lower resistance contacts. Thus, by effectively utilizing the dead space area of the inter-pin pitch formed by the point contact of the conventional pin-shaped contact probes 13, the surface contact with the emitter pad 1b of the semiconductor element 1 can be used to increase the contact area several hundred times. the size of.

Next, a procedure for performing a dynamic characteristic test of a semiconductor element (chip) using the above semiconductor element testing apparatus will be described.

FIG. 5 is a diagram schematically illustrating a step of contacting the plunger pin with the contact probe after the contact probe is brought into contact with the semiconductor element. 6 is an operation explanatory diagram of the semiconductor element testing apparatus, FIG. 6(A) shows a standby state before initial contact, FIG. 6(B) shows a contact state with the semiconductor element, and FIG. 6(C) shows a contact state with a protruding portion , Figure 6(D) shows the complete contact state. In addition, in FIG. 5 , the contact probe 12 uses a probe whose peripheral portion on the side of the second contact surface 12 c is chamfered by 45 degrees, and in FIG. 6 , the contact probe 12 uses the peripheral portion on the side of the second contact surface 12 c. The tip is chamfered into a curved shape (rounded corners).

As shown in the upper part of FIG. 5 , the placement plate 16 is recessed with a portion for holding the contact probes 12 , and the block-shaped contact probes 12 held on the recessed portion are separated from the plunger pins 18 in a non-contact state. The mounting plate 16 also has a portion for holding the contact probes 13 protrudingly provided, and the pin-shaped contact probes 13 held at the protruding portion and the plunger pin 18 are almost in contact with each other. In this way, in a state in which the block-shaped contact probes 12 and the plunger pins 18 are not in contact and the pin-shaped contact probes 13 and the plunger pins 18 are almost in contact with each other, the mounting plate 16 is fixed to the base unit 17 and is connected to the base unit. 17 Act together.

After the contact block 14 of the semiconductor device testing apparatus is lowered, the second contact surface 12c of the block-shaped contact probe 12 is placed on the emitter pad 1b of the semiconductor device 1, and the pin-shaped contact probe 13 is placed on the semiconductor device 1. on the gate pad 1a of the element 1.

As shown in the lower part of FIG. 5 , after the placement plate 16 is further lowered, the state is in which the block-shaped contact probes 12 remain on the emitter pads 1b of the semiconductor element 1, and the pin-shaped contact probes 13 remain on the emitter pad 1b. on the gate pad 1a of the semiconductor element 1 . At this time, the pin-shaped contact probe 13 is applied with a load corresponding to the lowering of the contact block 14 through the corresponding plunger pin 18 .

After the placing tray 16 is further lowered, the protruding portions 12d of the contact probes 12 come into contact with the front ends of the corresponding plunger pins 18 . Next, after the placing plate 16 is further lowered, the first contact surfaces 12 b of the contact probes 12 are brought into contact with the tips of the corresponding four plunger pins 18 . After the placing tray 16 is further lowered and stopped, the plunger pin 18 abutting on the protruding portion 12d and the first contact surface 12b of the contact probe 12 imposes a regulation on the protruding portion 12d and the first contact surface 12b of the contact probe 12. load.

In this way, the placement tray 16 is configured such that the block-shaped contact probes 12 are placed on the semiconductor element in a free state, and then the plunger pins 18 are arranged in the order of the protruding portions 12d of the contact probes 12 and the first contact surfaces 12b. Press it.

Next, the operation of the semiconductor element testing apparatus will be described in detail. In addition, since the pin-shaped contact probe 13 has the same structure as the conventional one, illustration and description are abbreviate|omitted here.

First, as shown in FIG. 6(A) , in the initial state at the start of the test, the main body 12a of the contact probe 12 is loosely fitted into the probe holding hole 16a of the placement plate 16, and the flange portion 12e is locked to the probe Hold the periphery of the hole 16a. At this time, the contact probe 12 is not in contact with any of the plunger pins 18, and is therefore lifted from the placement plate 16 in a free state.

Next, after the placement plate 16 is lowered, the contact probes 12 are first placed on the emitter pad 1 b that is the main electrode of the semiconductor element 1 . As shown in FIG. 6(B) , after the placement plate 16 is further lowered, the placement plate 16 is separated from the contact probes 12, and the contact probes 12 are kept in an upright state by their own weight. That is, the contact probe 12 is placed in a state in which the second contact surface 12c of the contact probe 12 and the surface of the emitter pad 1b of the semiconductor element 1 are parallel to each other.

As shown in FIG. 6(C) , after the placing plate 16 is further lowered, one of the plunger pins 18 comes into contact with the protruding portion 12d of the contact probe 12 and presses the contact probe 12 to the emitter pad of the semiconductor element 1 1b. Thereby, the contact probe 12 is pressed against the emitter pad 1b of the semiconductor element 1 without being inclined in a state in which the second contact surface 12c and the surface of the emitter pad 1b of the semiconductor element 1 are parallel. In this way, by uniformly contacting the second contact surface 12c of the contact probe 12 with the emitter pad 1b of the semiconductor element 1, a large contact area can be obtained, and the contact resistance can be made uniform, so that local current concentration can be avoided. , Destruction of semiconductor elements caused by heat. In addition, since the contact probes 12 are not pressed in a state of being inclined with respect to the emitter pads 1b of the semiconductor element 1 on one side, it is possible to reduce the formation of deep probe marks and the like on the surfaces of the emitter pads 1b. Conditions that impair quality.

As shown in FIG. 6(D) , after the placing plate 16 is further lowered, the remaining plunger pins 18 are brought into contact with the first contact surfaces 12 b of the contact probes 12 . In the contact probe 12, the first contact surface 12b around the protruding portion 12d is removed by the remaining plunger pin 18 in a state where the protruding portion 12d in the upper center presses the emitter pad 1b of the semiconductor element 1 in the vertical direction. Press the emitter pad 1 b of the semiconductor element 1 . At this time, the plunger pin 18 urging the protruding portion 12d is also shortened by the spring by the amount (height portion) protruding from the first contact surface 12b of the protruding portion 12d compared to the plunger pin 18 urging the surrounding of the protruding portion 12d. . Therefore, in the contact probe 12, a stronger load corresponding to the protruding amount of the protruding portion 12d is applied to the protruding portion 12d than the first contact surface 12b around the protruding portion 12d. Thereby, the plunger pin 18 and the contact probe 12 are brought into a state of complete contact, and the semiconductor element test apparatus is brought into a state in which the test circuit 15 can perform the test. In this way, since the second contact surface 12c of the contact probe 12 is parallel to the emitter pad 1b of the semiconductor element 1, the contact area is increased, and the contact resistance becomes low, which is suitable for high-current testing.

After the dynamic characteristic test of the semiconductor element 1 is completed, the operation of the semiconductor element testing apparatus is reversed from the above-described process. That is, from the testable state shown in FIG. 6(D) to the state shown in FIG. 6(C) , that is, after the placing plate 16 is raised, it first comes into contact with the first contact surface 12b around the protruding portion 12d The connected plunger pin 18 is separated from the first contact surface 12b. Then, after the placing plate 16 is raised, the plunger pin 18 abutting against the protruding portion 12d is separated from the protruding portion 12d, and the state shown in FIG. 6(B) is obtained. Then, when the placement tray 16 is further raised, the placement tray 16 lifts the contact probes 12 and returns to the standby state shown in FIG. 6(A).

Next, the spring characteristics of the spring of the plunger pin 18 and the load applied to the contact probe 12 when the plunger pin 18 is biased will be described.

FIG. 7 is a diagram showing the relationship between the pressing amount of the plunger pin and the load, and FIG. 8 is a diagram explaining the balance of the load applied to the touch probe. In addition, in FIG. 7 , the horizontal axis represents the pressing amount of the plunger pin 18 , and the vertical axis represents the load applied to the touch probe 12 .

As shown in FIG. 7 , the amount of pressing of the contact probe 12 by the plunger pin 18 is proportional to the load applied to the contact probe 12 , and the value of the load is determined by the constant of the spring of the plunger pin 18 .

Here, the plunger pin 18 that presses the center of the protruding portion 12d of the contact probe 12 is pressed by an amount greater than the protruding amount of the protruding portion 12d compared to the plunger pin 18 that presses the periphery of the first contact surface 12b around the protruding portion 12d part and therefore a high load. Therefore, when the semiconductor device testing apparatus is tested, the central plunger pin 18 pushes down the contact probe 12 with a high load, and the peripheral plunger pin 18 pushes down the contact probe 12 with a low load. The difference in the load is realized by assuming that all the plunger pins 18 have the same spring characteristics, and the protruding portion 12d is provided in the vicinity of the center of the contact probe 12 to change the pressing amount.

In this way, the center of the upper part of the contact probe 12 is first pressed, and the contact probe 12 is placed on the inclined surface of the semiconductor element 1 with a large contact area by the operation of pressing the periphery while increasing the load on the center. on the surface of the emitter pad 1b. That is, as shown in FIG. 8, when the surface of the emitter pad 1b of the semiconductor element 1 is inclined, the contact probe 12 is placed on the surface of the emitter pad 1b of the semiconductor element 1 with its own weight, so it is inevitable It is erected in the vertical direction with respect to the surface of the emitter pad 1b.

Next, the contact probe 12 is pressed by the center one plunger pin 18 while being placed on the surface of the emitter pad 1b, so that the second contact surface 12c is kept parallel to the surface of the emitter pad 1b Press down the surface of the emitter pad 1b equally. After that, by controlling the load on the central plunger pin 18 to be high and the load on the peripheral plunger pins 18 slightly lower than the load on the central plunger pin 18, the contact probe 12 is maintained in contact with the emitter pad 1b. surface fit pose. By changing the load characteristic of the plunger pin 18, the pressing force of the contact probe 12 on the surface of the emitter pad 1b of the semiconductor element 1 will not be unbalanced, so that the surface of the emitter pad 1b will not be deeply formed. probe traces. In addition, the formation of probe marks can also be suppressed by making the peripheral portion on the second contact surface 12c side of the contact probe 12 R-shaped.

As described above, the contact probe 12 does not push down the surface of the emitter pad 1b on one side, so the contact area increases and the contact resistance is low, and the contact area with the electrode is further increased and the contact resistance is low. The probe 12 will be described.

FIG. 9 is a diagram showing another embodiment of the contact probe.

The contact probe 12 has a comb shape in which a plurality of grooves 12f are formed on the second contact surface 12c. The grooves 12f may be, for example, V-grooves formed in a lattice shape. Accordingly, when the emitter pad 1b of the semiconductor element 1 is formed of a soft metal such as aluminum, when the contact probe 12 is pressed, the pressed metal can enter the space of the groove 12f. As a result, the contact area between the contact probe 12 and the emitter pad 1b is increased, the contact resistance becomes lower, and the contact probe 12 suitable for a larger current test can be realized.

The contact probes 12 can appropriately increase or decrease the contact area between the contact probes 12 and the emitter pads 1b by changing the pitch and depth of the grooves 12f according to the hardness of the metal forming the emitter pads 1b of the semiconductor element 1 .

10 is a diagram showing a configuration example of a semiconductor element testing apparatus according to the second embodiment, and FIG. 11 is a plan view showing an arrangement relationship among semiconductors, contact probes, and plunger pins. In addition, in FIGS. 10 and 11 , the same reference numerals are given to the same or equivalent components as those shown in FIGS. 1 and 3 , and detailed descriptions are omitted.

In the semiconductor element testing apparatus according to the second embodiment, the contact probes 20 in which the first contact surfaces 12 b in contact with the plunger pins 18 are formed in a flat shape are used. In this contact probe 20, the area in which the second contact surface 12b and the emitter pad 1b are in surface contact is the same as that of the contact probe 12 used in the semiconductor element testing apparatus according to the first embodiment. Therefore, in the semiconductor element testing apparatus according to the second embodiment, the contact area between the contact probes 20 and the emitter pad 1b can be enlarged, and the current density can be reduced. In addition, in the second embodiment, when the placing tray 16 is attached to the base unit 17 , the contact probes 20 held on the placing tray 16 can be brought into contact with the plunger pins held on the base unit 17 .

When the semiconductor element 1 is tested, as shown in FIG. 11, five contact probes 20 are brought into contact with the emitter pad 1b. Further, each of the contact probes 20 is in contact with the first contact surface 12 b via the five plunger pins 18 . In addition, the number of the contact probes 20 mounted on the emitter pad 1b of the semiconductor element 1 is determined according to the contact probes 20 and the chip size. In addition, the number of plunger pins 18 that come into contact with the contact probes 20 is determined according to the size of the first contact surface 12 b and the installation interval of the plunger pins 18 held by the base unit 17 .

Label description

1 Semiconductor element

1a Gate pad

1b Emitter pad

11 Test bench

12 Contact probe

12a Subject

12b 1st contact surface

12c 2nd contact surface

12d protrusion

12e Flange

12f slot

13 Contact probe

14 Contact block

15 Test circuit

16 Placing the tray

16a, 16b Probe Holder Holes

17 Base unit

18 Plunger pin

19a, 19b, 19c wiring

20 touch probe

Claims (6)

1. A semiconductor device testing apparatus, comprising:

a test stand on which a semiconductor element is placed;

a plurality of contact probes which are brought into contact with main electrodes of the semiconductor device mounted on the test stage when the semiconductor device is tested;

a plurality of plunger pins which are brought into contact with the contact probes and press the contact probes against the main electrodes of the semiconductor device when the semiconductor device test is performed;

a placement tray for lifting the contact probe to hold the contact probe at a position separated from the main electrode of the semiconductor device when the semiconductor device test is not performed, and for placing the contact probe at a predetermined position of the main electrode of the semiconductor device by its own weight when the semiconductor device test is performed; and

a base unit for holding the plunger pin at a position separated from the contact probe when the semiconductor device test is not performed, and for pressing the contact probe placed on the main electrode of the semiconductor device by contacting the plunger pin when the semiconductor device test is performed,

the contact probe has: a prismatic body having a 1 st contact surface that contacts the plurality of plunger pins, and a 2 nd contact surface that contacts the main electrode of the semiconductor element on a side opposite to the 1 st contact surface; and a protrusion portion that is protrudingly provided at a center of the 1 st contact surface and is pressed with a high load by a center plug pin arranged at a center among the plug pins, an upper surface of the 1 st contact surface located around the protrusion portion being a low-load pressing surface that is pressed by a plurality of peripheral plug pins arranged around the center plug pin.

2. The semiconductor device testing apparatus according to claim 1,

the placing tray has a through hole into which the contact probe is loosely fitted;

the contact probe has a flange portion on a peripheral portion on the 1 st contact surface side, and the flange portion prevents the contact probe from falling off from the through hole.

3. The semiconductor device testing apparatus according to claim 1,

the contact probe forms a groove on the 2 nd contact surface.

4. The semiconductor device testing apparatus according to claim 1,

the placement tray is detachably attached to the base unit that can be raised and lowered with respect to the test bed.

5. A semiconductor element testing method for evaluating electrical characteristics of a semiconductor element, the semiconductor element testing method comprising the steps of:

placing a plurality of contact probes, each having a protruding portion at the center of a contact surface of the prism-shaped body on the side of contact with the plurality of plunger pins, on the main electrode of the semiconductor element by using the weight of the contact probe;

a central plunger pin arranged at the center of the plunger pins is abutted against the protruding part of the contact probe, so that the parallelism between the contact probe and the main electrode of the semiconductor element is maintained; and

in each of the contact probes, a load when the center plunger pin abuts against the protruding portion is increased, and a contact surface between a plurality of peripheral plunger pins arranged around the center plunger pin and the protruding portion is made to abut against a lower load than the center plunger pin.

6. The semiconductor device testing method according to claim 5, wherein the test result is obtained by testing the semiconductor device,

the plunger pin has a spring with the same load, and the difference between the load applied to the protruding portion and the load applied to the contact surface around the protruding portion is set according to the amount of protrusion of the protruding portion from the contact surface.

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