[go: up one dir, main page]

CN107294888B - Equalization enhancement module, demodulation system and equalization enhancement method - Google Patents

Equalization enhancement module, demodulation system and equalization enhancement method Download PDF

Info

Publication number
CN107294888B
CN107294888B CN201610220363.5A CN201610220363A CN107294888B CN 107294888 B CN107294888 B CN 107294888B CN 201610220363 A CN201610220363 A CN 201610220363A CN 107294888 B CN107294888 B CN 107294888B
Authority
CN
China
Prior art keywords
scaling
coefficient
ratio
equalization
area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201610220363.5A
Other languages
Chinese (zh)
Other versions
CN107294888A (en
Inventor
陈家伟
郑凯文
赖科印
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MediaTek Inc
Original Assignee
MediaTek Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by MediaTek Inc filed Critical MediaTek Inc
Priority to CN201610220363.5A priority Critical patent/CN107294888B/en
Publication of CN107294888A publication Critical patent/CN107294888A/en
Application granted granted Critical
Publication of CN107294888B publication Critical patent/CN107294888B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006Arrangements for removing intersymbol interference
    • H04L25/03012Arrangements for removing intersymbol interference operating in the time domain
    • H04L25/03019Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception
    • H04L25/03057Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception with a recursive structure
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03878Line equalisers; line build-out devices
    • H04L25/03885Line equalisers; line build-out devices adaptive

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

本发明涉及一种等化增强模块,包含有一乘法单元,用来将多个等化信号乘以一缩放系数,以取得多个缩放信号;一判断单元,耦接于该乘法单元,用来判断该多个缩放信号是否位于一特定区域,产生多个判断结果;一比例计算单元,耦接于该判断单元,用来根据该多个判断结果,计算一区内比例,其中该区内比例相关于该多个缩放信号位于该特定区域的一比例;以及一系数计算单元,耦接于该比例计算单元,用来根据该区内比例,计算该缩放系数。

Figure 201610220363

The present invention relates to an equalization enhancement module, comprising a multiplication unit, for multiplying a plurality of equalization signals by a scaling coefficient to obtain a plurality of scaling signals; a determination unit, coupled to the multiplication unit, for determining whether the plurality of scaling signals are located in a specific area, and generating a plurality of determination results; a ratio calculation unit, coupled to the determination unit, for calculating an intra-area ratio according to the plurality of determination results, wherein the intra-area ratio is related to a ratio of the plurality of scaling signals located in the specific area; and a coefficient calculation unit, coupled to the ratio calculation unit, for calculating the scaling coefficient according to the intra-area ratio.

Figure 201610220363

Description

等化增强模块、解调制系统以及等化增强方法Equalization enhancement module, demodulation system and equalization enhancement method

技术领域technical field

本发明涉及一种等化增强模块、解调制系统以及等化增强方法,尤指一种可改善最小均方差均衡器的等化增强模块、解调制系统以及等化增强方法。The present invention relates to an equalization enhancement module, a demodulation system and an equalization enhancement method, in particular to an equalization enhancement module, a demodulation system and an equalization enhancement method which can improve the minimum mean square error equalizer.

背景技术Background technique

数字通讯系统已广泛地应用于手机、数字视频转换盒(Set-Top Box,STB)、数字电视棒、无线网卡等数字通讯装置中。一般来说,数字通讯系统包含调制(Modulation)系统以及解调制(Demodulation)系统,调制系统将欲传输的位(Bits)调制成为传送符元并传送至通道中再由解调制系统接收接收信号以进行解调制;解调制系统所接收的一接收信号y可表示为y=hs+n,其中s代表调制系统产生的传送符元,h代表信道响应,n代表噪声。解调制系统接收道接收信号后,利用包含于解调制系统的一均衡器以消除通道对传送符元的影响。Digital communication systems have been widely used in digital communication devices such as mobile phones, digital video converter boxes (Set-Top Box, STB), digital TV sticks, and wireless network cards. Generally speaking, a digital communication system includes a modulation (Modulation) system and a demodulation (Demodulation) system. The modulation system modulates the bits to be transmitted into transmitted symbols and transmits them to the channel, and then the demodulation system receives the received signal to Perform demodulation; a received signal y received by the demodulation system can be expressed as y=hs+n, where s represents the transmitted symbol generated by the modulation system, h represents the channel response, and n represents the noise. After the demodulation system receives the channel received signal, an equalizer included in the demodulation system is used to eliminate the influence of the channel on the transmitted symbols.

在已知技术中,强制归零均衡器(Zero Forcing Equalizer)为复杂度低的均衡器,其将接收信号y乘以信道响应的倒数(记为h-1),强制归零均衡器的输出信号xZF可表示为xZF=h-1y=s+h-1n,如此一来,强制归零均衡器即可消除通道对传送符元的影响。然而,当通道响应小时,强制归零均衡器具有噪声增强(Noise Enhancement)的问题。为了避免强制归零均衡器所造成噪声增强的效应,最小均方差均衡器(Minimum Mean Square ErrorEqualizer,MMSE Equalizer)已成为解调制系统中常见的解决方案,最小均方差均衡器系将接收信号y乘以

Figure BDA0000961884510000011
其中
Figure BDA0000961884510000012
Figure BDA0000961884510000013
分别代表传送符元及噪声的能量,而最小均方差均衡器的输出信号xMMSE可表示为
Figure BDA0000961884510000014
如此一来,无论通道响应或强或弱,当接收信噪比(Received Signal-to-Noise Ratio,Received SNR)够高,即接收信号能量
Figure BDA0000961884510000015
远大于噪声能量
Figure BDA0000961884510000016
时,
Figure BDA0000961884510000017
可近似于h-1,最小均方差均衡器可近似于强制归零均衡器。In the known technology, a zero-forcing equalizer (Zero Forcing Equalizer) is a low-complexity equalizer, which multiplies the received signal y by the inverse of the channel response (denoted as h -1 ), and the output of the forcing-to-zero equalizer is The signal x ZF can be expressed as x ZF =h -1 y = s+h -1 n, so that the forced-to-zero equalizer can eliminate the effect of the channel on the transmitted symbols. However, when the channel response is small, the forced-zero equalizer has the problem of noise enhancement. In order to avoid the effect of noise enhancement caused by the forced-to-zero equalizer, Minimum Mean Square Error Equalizer (MMSE Equalizer) has become a common solution in demodulation systems. The minimum mean square error equalizer multiplies the received signal y by by
Figure BDA0000961884510000011
in
Figure BDA0000961884510000012
and
Figure BDA0000961884510000013
represent the energy of transmitted symbols and noise, respectively, and the output signal x MMSE of the minimum mean square error equalizer can be expressed as
Figure BDA0000961884510000014
In this way, no matter whether the channel response is strong or weak, when the received signal-to-noise ratio (Received Signal-to-Noise Ratio, Received SNR) is high enough, the received signal energy is
Figure BDA0000961884510000015
much larger than the noise energy
Figure BDA0000961884510000016
hour,
Figure BDA0000961884510000017
can be approximated by h -1 , the minimum mean square error equalizer can be approximated by a forced-zero equalizer.

然而,当噪声能量

Figure BDA0000961884510000021
较强时,最小均方差均衡器会造成其输出信号xMMSE的能量减小,反而降低解调制系统的符元判断精准度,即最小均方差均衡器的输出信号xMMSE的能量减小会导致解调制系统的符元错误率(Symbol Error Rate,SER)及相应的位错误率(BitError Rate,BER)上升,反而降低解调制系统的系统效能。However, when the noise energy
Figure BDA0000961884510000021
When it is strong, the minimum mean square error equalizer will cause the energy of its output signal x MMSE to decrease, but it will reduce the symbol judgment accuracy of the demodulation system, that is, the reduction of the energy of the output signal x MMSE of the minimum mean square error equalizer will lead to The symbol error rate (SER) of the demodulation system and the corresponding bit error rate (BitError Rate, BER) of the demodulation system increase, which reduces the system performance of the demodulation system.

因此,已知技术实有改善的必要。Therefore, there is a need for improvement in the known technology.

发明内容SUMMARY OF THE INVENTION

因此,本发明的主要目的即在于提供一种等化增强模块、解调制系统以及等化增强方法,以改善已知技术的缺点。Therefore, the main purpose of the present invention is to provide an equalization enhancement module, a demodulation system and an equalization enhancement method, so as to improve the shortcomings of the known technology.

本发明揭示一种等化增强模块,包含有一乘法单元,用来将多个等化信号(Equalized Signal)乘以一缩放系数(Scaling Coefficient),以取得多个缩放信号(Scaled Signal);一判断单元,耦接于该乘法单元,用来判断该多个缩放信号是否位于一特定区域,产生多个判断结果;一比例计算单元,耦接于该判断单元,用来根据该多个判断结果,计算一区内比例,其中该区内比例相关于该多个缩放信号位于该特定区域的一比例;以及一系数计算单元,耦接于该比例计算单元,用来根据该区内比例,计算该缩放系数。The present invention discloses an equalization enhancement module, comprising a multiplication unit for multiplying a plurality of equalized signals by a scaling coefficient to obtain a plurality of scaled signals; a judgment a unit, coupled to the multiplication unit, used for judging whether the plurality of scaling signals are located in a specific area, and generating a plurality of judgment results; a ratio calculation unit, coupled to the judgment unit, used for according to the plurality of judgment results, calculating an intra-scale ratio, wherein the intra-scale ratio is related to a ratio at which the plurality of zoom signals are located in the specific area; and a coefficient calculation unit coupled to the scale calculation unit for calculating the intra-scale ratio according to the intra-scale ratio zoom factor.

本发明另揭示露一种解调制(Demodulation)系统,包含有一等化模块,用来对多个接收信号进行等化,以产生多个等化信号;一符元判断模块;以及一等化增强模块,耦接于这些化模块与该符元判断模块之间,这些化增强模块包含有一乘法单元,用来将该多个等化信号乘以一缩放系数,以取得多个缩放信号;一判断单元,耦接于该乘法单元,用来判断该多个缩放信号是否位于一特定区域,产生多个判断结果;一比例计算单元,耦接于该判断单元,用来根据该多个判断结果,计算一区内比例;以及一系数计算单元,耦接于该比例计算单元,用来根据该区内比例,计算该缩放系数;其中,该符元判断模块对该多个缩放信号进行解调制。The present invention further discloses a demodulation system, comprising an equalization module for equalizing a plurality of received signals to generate a plurality of equalized signals; a symbol judging module; and an equalization enhancement a module, coupled between the UL modules and the symbol judgment module, the UL enhancement modules include a multiplication unit for multiplying the plurality of equalization signals by a scaling factor to obtain a plurality of scaling signals; a judgment a unit, coupled to the multiplication unit, used for judging whether the plurality of scaling signals are located in a specific area, and generating a plurality of judgment results; a ratio calculation unit, coupled to the judgment unit, used for according to the plurality of judgment results, calculating a scale within an area; and a coefficient calculating unit coupled to the scale calculating unit for calculating the scaling coefficient according to the scale within the area; wherein the symbol determination module demodulates the plurality of scaled signals.

本发明另揭示一种等化增强方法,包含有将多个等化信号乘以一缩放系数,以取得多个缩放信号;判断多个缩放信号是否位于一特定区域,产生多个判断结果;根据该多个判断结果,计算一区内比例,其中该区内比例相关于该多个缩放信号位于该特定区域的一比例;以及根据该区内比例,计算该缩放系数。The present invention further discloses an equalization enhancement method, which includes multiplying a plurality of equalization signals by a scaling factor to obtain a plurality of scaled signals; judging whether the plurality of scaled signals are located in a specific area, and generating a plurality of judgment results; The plurality of determination results are used to calculate an in-area ratio, wherein the in-area ratio is related to a ratio of the plurality of zoom signals in the specific area; and the zoom coefficient is calculated according to the in-area ratio.

附图说明Description of drawings

图1为本发明实施例一解调制系统的示意图。FIG. 1 is a schematic diagram of a demodulation system according to an embodiment of the present invention.

图2为本发明实施例一等化增强模块的示意图。FIG. 2 is a schematic diagram of an equalization enhancement module according to an embodiment of the present invention.

图3为本发明实施例一比例计算单元的示意图。FIG. 3 is a schematic diagram of a proportional calculation unit according to an embodiment of the present invention.

图4为本发明实施例一系数计算单元的示意图。FIG. 4 is a schematic diagram of a coefficient calculation unit according to an embodiment of the present invention.

图5为多个等化信号的星座图。FIG. 5 is a constellation diagram of a plurality of equalized signals.

图6为多个缩放信号的星座图。FIG. 6 is a constellation diagram of a plurality of scaled signals.

图7为一帧的示意图。FIG. 7 is a schematic diagram of one frame.

图8为本发明实施例一解调制系统的示意图。FIG. 8 is a schematic diagram of a demodulation system according to Embodiment 1 of the present invention.

图9为本发明实施例一等化增强模块的示意图。FIG. 9 is a schematic diagram of an equalization enhancement module according to an embodiment of the present invention.

符号说明Symbol Description

1 解调制系统1 Demodulation system

10 等化增强模块10 Equalization Enhancement Module

12 等化模块12 Equalization Modules

14 符元判断模块14 Symbolic judgment module

200 乘法单元200 Multiplication Units

202 判断单元202 Judgment unit

204、304 比例计算单元204, 304 proportional calculation unit

206、406 系数计算单元206, 406 Coefficient calculation unit

300 平均单元300 average units

80 等化增强流程80 Equalization Enhancement Process

800~810 步骤800~810 steps

90 等化增强模块90 Equalization Enhancement Module

902 处理单元902 processing unit

904 储存单元904 storage unit

908 程序代码908 program code

y1~yn 接收信号y 1 to yn received signal

x1~xn 等化信号x 1 ~ x n equalized signal

gx1~gxn 缩放信号gx 1 to gx n scaled signal

AD1、AD2 加法器AD1, AD2 adder

D1、D2 缓存器D1, D2 registers

Data 数据子帧Data data subframe

FR 帧FR frame

Header 标头子帧Header subframe

MUX 多任务器MUX multitasker

MP1、MP2 乘法器MP1, MP2 Multiplier

Ik、Ik+1 区内比例Proportion within I k , I k+1

IR 特定比例IR specific ratio

R0 特定区域R 0 specific area

SB 减法器SB subtractor

gk、gk+1 缩放系数g k , g k+1 scaling factor

hitk 判断结果hit k judgment result

α 平均系数α Average coefficient

μ 调整系数μ adjustment factor

具体实施方式Detailed ways

请参考图1,图1为本发明实施例一解调制系统1的示意图。解调制系统1可为一特殊应用集成电路(Application-Specific Integrated Circuit,ASIC),其包含一等化模块12、一等化增强模块10以及一符元判断模块14。解调制系统1自一信道中接收多个接收信号,等化模块12用来对该多个接收信号进行等化,以产生多个等化信号(EqualizedSignal),等化增强模块10将该多个等化信号乘以一缩放系数(Scaling Coefficient),以产生多个缩放信号(Scaled Signal)至符元判断模块14,符元判断模块14即可对该多个缩放符元进行解调制(Demodulation)。其中,等化模块12可为一最小均方差均衡器(MinimumMean Square Error Equalizer,MMSE Equalizer)。详细来说,于一第1时间区间至一第n时间区间中,解调制系统1分别由等化模块12接收到接收信号y1~yn,而等化模块12接收到接收信号y1~yn后分别对接收信号y1~yn进行等化,而产生等化信号x1~xn。等化增强模块10可根据等化信号x1~xn-1(即于第n时间区间前等化增强模块10所接收来自等化模块12的输出信号),产生缩放系数g1~gn,并将等化信号x1~xn分别乘以缩放系数g1~gn,以产生缩放信号gx1~gxn。符元判断模块14即可对缩放信号gx1~gxn进行解调制。Please refer to FIG. 1 , which is a schematic diagram of a demodulation system 1 according to an embodiment of the present invention. The demodulation system 1 can be an Application-Specific Integrated Circuit (ASIC), which includes an equalization module 12 , an equalization enhancement module 10 and a symbol determination module 14 . The demodulation system 1 receives multiple received signals from a channel, the equalization module 12 is used to equalize the multiple received signals to generate multiple equalized signals (Equalized Signals), and the equalization enhancement module 10 equals the multiple received signals. The equalized signal is multiplied by a scaling coefficient to generate a plurality of scaled signals to the symbol determination module 14, and the symbol determination module 14 can demodulate the plurality of scaled symbols. . The equalization module 12 may be a minimum mean square error equalizer (Minimum Mean Square Error Equalizer, MMSE Equalizer). Specifically, in a first time interval to an nth time interval, the demodulation system 1 receives the received signals y 1 ˜yn by the equalization module 12 respectively, and the equalization module 12 receives the received signals y 1 ˜yn . After yn , the received signals y 1 to yn are respectively equalized to generate equalized signals x 1 to x n . The equalization enhancement module 10 can generate scaling coefficients g 1 to g n according to the equalization signals x 1 to x n-1 (ie, the output signals from the equalization module 12 received by the equalization enhancement module 10 before the nth time interval). , and multiply the equalized signals x 1 ˜x n by the scaling coefficients g 1 ˜g n respectively, so as to generate the scaling signals gx 1 ˜gx n . The symbol determination module 14 can demodulate the scaled signals gx 1 -gx n .

具体来说,于第1时间区间时,等化增强模块10可预先设定缩放系数g1为1,缩放信号gx1即为等化信号x1本身(即gx1=x1)。于第2时间区间时,等化增强模块10可根据等化信号x1产生缩放系数g2,并将等化信号x2乘以缩放系数g2以产生缩放信号gx2为gx2=g2x2。以此类推,于第n时间区间时,等化增强模块10可根据等化信号x1~xn-1产生缩放系数gn,并将等化信号xn乘以缩放系数gn以产生缩放信号gxn为gxn=gnxnSpecifically, in the first time interval, the equalization enhancement module 10 may preset the scaling coefficient g 1 to 1, and the scaling signal gx 1 is the equalized signal x 1 itself (ie, gx 1 =x 1 ). During the second time interval, the equalization enhancement module 10 may generate a scaling factor g 2 according to the equalized signal x 1 , and multiply the equalized signal x 2 by the scaling factor g 2 to generate the scaling signal gx 2 as gx 2 =g 2 x 2 . By analogy, in the nth time interval, the equalization enhancement module 10 can generate the scaling factor g n according to the equalized signals x 1 ˜x n−1 , and multiply the equalized signal x n by the scaling factor g n to generate the scaling The signal gx n is gx n =g n x n .

需注意的是,因等化模块12为最小均方差均衡器,当噪声能量强时,其输出信号(即等化信号x1~xn)的能量比其对应的接收信号y1~yn的能量小(即|xk|2<|yk|2)。为了避免因等化信号x1~xn的能量较小而导致对应于解调制系统1的符元错误率或位错误率上升,等化增强模块10所产生的缩放系数g1~gn系用来补偿等化模块12(即最小均方差均衡器)所造成的能量缩减,以进一步改善系统效能。It should be noted that since the equalization module 12 is a minimum mean square error equalizer, when the noise energy is strong, the energy of the output signal (ie the equalized signal x 1 ˜x n ) is higher than that of the corresponding received signal y 1 ˜yn . is small (ie |x k | 2 <|y k | 2 ). In order to avoid the increase of the symbol error rate or the bit error rate corresponding to the demodulation system 1 due to the small energy of the equalization signals x 1 ˜x n , the scaling coefficients g 1 ˜g n generated by the equalization enhancement module 10 are It is used to compensate the energy reduction caused by the equalization module 12 (ie, the minimum mean square error equalizer), so as to further improve the system performance.

关于等化增强模块10产生缩放系数g2~gn(缩放系数g1已预先设定为1)的操作细节,请进一步参考图1,图2为等化增强模块10的示意图。如图2所示,等化增强模块10包含一乘法单元200、一判断单元202、一比例计算单元204以及一系数计算单元206。于第1时间区间至第n时间区间中,等化增强模块10自等化模块12分别接收等化信号x1~xn,乘法单元200分别将等化信号x1~xn乘以缩放系数g1~gn,以取得缩放信号gx1~gxn。判断单元202耦接于乘法单元200,用来判断缩放信号gx1~gxn的对应星座点是否位于一特定区域R,以产生判断结果hit1~hitn。比例计算单元204耦接于判断单元202,用来根据判断结果hit1~hitn,计算区内比例I1~In,其中区内比例I1~In相关于缩放信号gx1~gxn-1位于特定区域R的比例。系数计算单元206耦接于比例计算单元204,用来根据区内比例I1~In,计算缩放系数g1~gn,并将缩放系数g1~gn传递回乘法单元200,使得于第n时间区间时,乘法单元200可将等化信号xn乘以缩放系数gn,以产生缩放信号gxn至符元判断模块14,符元判断模块14即可对缩放信号gxn进行解调制。For details of the operation of the equalization enhancement module 10 to generate the scaling coefficients g 2 ˜g n (the scaling coefficient g 1 is preset to 1), please refer to FIG. 1 , and FIG. 2 is a schematic diagram of the equalization enhancement module 10 . As shown in FIG. 2 , the equalization enhancement module 10 includes a multiplication unit 200 , a determination unit 202 , a ratio calculation unit 204 and a coefficient calculation unit 206 . In the first time interval to the nth time interval, the equalization enhancement module 10 receives the equalization signals x 1 ˜x n from the equalization module 12 respectively, and the multiplying unit 200 respectively multiplies the equalization signals x 1 ˜x n by the scaling factor g 1 ˜g n to obtain scaled signals gx 1 ˜gx n . The judging unit 202 is coupled to the multiplying unit 200 for judging whether the corresponding constellation points of the scaling signals gx 1 ˜gx n are located in a specific region R, so as to generate the judging results hit 1 ˜hit n . The ratio calculating unit 204 is coupled to the judging unit 202, and is used for calculating the intra-area ratios I 1 ˜In according to the judging results hit 1 ˜hit n , wherein the intra-area ratios I 1 ˜In are related to the scaling signals gx 1 ˜gx n -1 for the proportion that lies in a specific region R. The coefficient calculation unit 206 is coupled to the scale calculation unit 204 and is used for calculating the scaling coefficients g 1 ˜g n according to the intra-area scales I 1 ˜In , and transmitting the scaling coefficients g 1 ˜g n back to the multiplying unit 200 , so that the In the nth time interval, the multiplying unit 200 can multiply the equalization signal x n by the scaling coefficient g n to generate the scaling signal gx n to the symbol determination module 14 , and the symbol determination module 14 can solve the scaling signal gx n modulation.

详细来说,于第k时间区间中,判断单元202判断缩放信号gxk的对应星座点是否位于特定区域R,若缩放信号gxk位于特定区域R,判断单元202输出对应于缩放信号gxk的判断结果hitk为1;反之,若缩放信号gxk不位于特定区域R,判断单元202输出对应于缩放信号gxk的判断结果hitk为0。判断单元202判断缩放信号gxk之对应星座点是否位于特定区域R的方式并未有所限,于一实施例中,判断单元202可判断缩放信号gxk的一同相成份(In-phaseComponent)与一正交成份(Quadrature Component)是否于一特定范围,若缩放信号gxk的同相成份与正交成份于特定范围,判断单元202判断缩放信号gxk位于特定区域R且输出判断结果hitk为1;反之,判断单元202判断缩放信号gxk不位于特定区域R且输出判断结果hitk为0。举例来说,当接收信号y1~yn具有以四位相位偏移调制(Quadrature Phase ShiftKeying,QPSK)的符元(Symbol)信号时,判断单元202可判断缩放信号gxk的同相成份的一绝对值(记为|Re{gxk}|)是否小于一特定值d,并判断缩放信号gxk的正交成份的一绝对值(记为|Im{gxk}|)是否小于特定值d,当|Re{gxk}|小于特定值d且|Im{gxk}|小于特定值d时,判断单元202判断缩放信号gxk位于特定区域R且输出判断结果hitk为1;反之,判断单元202输出判断结果hitk为0。判断单元202产生判断结果hit1~hitn,并将判断结果hit1~hitn传递至比例计算单元204。In detail, in the kth time interval, the determination unit 202 determines whether the corresponding constellation point of the zoomed signal gxk is located in the specific region R, and if the zoomed signal gxk is located in the specific region R, the determination unit 202 outputs the corresponding constellation point of the zoomed signal gxk . The judgment result hit k is 1; otherwise, if the scaling signal gx k is not located in the specific region R, the judgment unit 202 outputs the judgment result hit k corresponding to the scaling signal gx k as 0. The manner in which the determination unit 202 determines whether the corresponding constellation point of the scaling signal gxk is located in the specific region R is not limited. Whether a quadrature component (Quadrature Component) is within a specific range, if the in-phase component and the quadrature component of the scaling signal gx k are within a specific range, the judging unit 202 judges that the scaling signal gx k is located in a specific region R and outputs the judgment result hit k as 1 On the contrary, the judgment unit 202 judges that the scaling signal gx k is not located in the specific region R and outputs the judgment result hit k as 0. For example, when the received signals y 1 ˜yn have a symbol signal modulated by Quadrature Phase Shift Keying (QPSK), the determining unit 202 can determine one of the in-phase components of the scaling signal gx k Whether the absolute value (denoted as |Re{gx k }|) is less than a specific value d, and determine whether an absolute value (denoted as |Im{gx k }|) of the quadrature component of the scaling signal gx k is smaller than the specific value d , when |Re{gx k }| is less than the specific value d and |Im{gx k }| is less than the specific value d, the judgment unit 202 judges that the scaling signal gx k is located in the specific area R and outputs the judgment result hit k as 1; otherwise, The judgment unit 202 outputs the judgment result hit k as 0. The judging unit 202 generates the judging results hit 1 ˜hit n , and transmits the judging results hit 1 ˜hit n to the ratio calculating unit 204 .

比例计算单元204可根据判断结果hit1~hitn并利用一递归平均(RecursiveAverage)方式,计算区内比例I1~In。请参考图3,图3为本发明实施例一比例计算单元304的示意图。比例计算单元304可用来实现比例计算单元204,其包含有一多任务器MUX以及一平均单元300,多任务器MUX可耦接于判断单元202,用来接收判断单元202所产生的判断结果hit1~hitn。以判断结果hit1~hitn中一判断结果hitk为例,当判断结果hitk为1时,多任务器MUX输出一信号S为一平均系数α;当判断结果hitk为0时,多任务器MUX输出该信号为0。换句话说,多任务器MUX所输出的信号S可表示为αhitkThe ratio calculation unit 204 can calculate the intra-area ratios I 1 ˜In by using a recursive averaging method according to the judgment results hit 1 ˜hit n . Please refer to FIG. 3 , which is a schematic diagram of a ratio calculation unit 304 according to an embodiment of the present invention. The ratio calculation unit 304 can be used to realize the ratio calculation unit 204, which includes a multiplexer MUX and an averaging unit 300. The multiplexer MUX can be coupled to the judgment unit 202 for receiving the judgment result hit generated by the judgment unit 202 1 to hit n . Taking a judgment result hit k in the judgment results hit 1 to hit n as an example, when the judgment result hit k is 1, the multiplexer MUX outputs a signal S which is an average coefficient α; when the judgment result hit k is 0, more The tasker MUX outputs this signal as 0. In other words, the signal S output by the multiplexer MUX can be represented as αhit k .

另一方面,平均单元300可根据平均系数α以及判断结果hit1~hitn,计算区内比例I1~In,具体来说,平均单元300包含有一乘法器MP1、一加法器AD1以及一缓存器D1,加法器AD1耦接于多任务器MUX,缓存器D1耦接于加法器AD1,乘法器MP1耦接于加法器AD1与缓存器D1之间。以下以第k时间区间与第k+1时间区间为例进行说明,于第k时间区间时,缓存器D1的输出为一区内比例Ik(对应至暂存区内比例),乘法器MP1将区内比例Ik乘以一系数为(1-α)后产生一相乘结果R1,并将相乘结果R1传递至加法器AD1,其中相乘结果R1可表示为R1=(1-α)Ik。加法器AD1将信号S与相乘结果R1相加以取得一相加结果R2,相加结果R2可表示为R2=αhitk+(1-α)Ik,相加结果R2即为区内比例Ik+1。另外,比例计算单元304将相加结果R2/区内比例Ik+1储存于缓存器D1中,使得于第k+1时间区间时,缓存器D1即可输出区内比例Ik+1,换句话说,比例计算单元304的平均单元300用来实现Ik+1=αhitk+(1-α)Ik,其中整数k可为1到n-1的正整数。如此一来,比例计算单元304于第1时间区间至第n-1时间区间接收到判断结果hit1~hitn-1后,即可根据判断结果hit1~hitn-1分别于第1时间区间至第n时间区产生区内比例I1~In,其中区内比例I1可预先设定为一特定值。同时,于第1时间区间至第n时间区间中,比例计算单元304将所产生的区内比例I1~In传递至系数计算单元206。On the other hand, the averaging unit 300 can calculate the intra-area ratios I 1 ˜I n according to the averaging coefficient α and the judgment results hit 1 ˜hit n . Specifically, the averaging unit 300 includes a multiplier MP1 , an adder AD1 and a The register D1, the adder AD1 is coupled to the multiplexer MUX, the register D1 is coupled to the adder AD1, and the multiplier MP1 is coupled between the adder AD1 and the register D1. The following takes the kth time interval and the k+1th time interval as examples for description. In the kth time interval, the output of the register D1 is an intra-area ratio I k (corresponding to the proportion in the temporary storage area), and the multiplier MP1 Multiply the ratio I k in the area by a coefficient as (1-α) to generate a multiplication result R1, and transmit the multiplication result R1 to the adder AD1, where the multiplication result R1 can be expressed as R1=(1-α )I k . The adder AD1 adds the signal S and the multiplication result R1 to obtain an addition result R2. The addition result R2 can be expressed as R2=αhit k +(1-α)I k , and the addition result R2 is the ratio I in the area k+1 . In addition, the ratio calculation unit 304 stores the addition result R2/intra-scale ratio I k+1 in the register D1, so that in the k+1 th time interval, the register D1 can output the intra-scale ratio I k+1 , In other words, the averaging unit 300 of the ratio calculating unit 304 is used to realize I k+1 =αhit k +(1−α)I k , where the integer k may be a positive integer from 1 to n−1. In this way, after receiving the determination results hit 1 to hit n-1 in the first time interval to the n-1 time interval, the ratio calculation unit 304 can calculate the determination results hit 1 to hit n-1 at the first time respectively according to the determination results hit 1 to hit n-1. From the interval to the nth time zone, the intra-scale ratios I 1 -In are generated, wherein the intra-scale ratio I 1 can be preset as a specific value. Meanwhile, in the first time interval to the nth time interval, the ratio calculation unit 304 transmits the generated intra-area ratios I 1 -In to the coefficient calculation unit 206 .

系数计算单元206可于第1时间区间至第n时间区间中分别判断区内比例I1~In是否大于一特定比例IR,以计算缩放系数g2~gn,使得区内比例渐趋近于(收敛至)特定比例IR。以于第k时间区间所收到的区内比例Ik为例,当区内比例Ik大于特定比例IR时,系数计算单元206计算缩放系数gk+1为缩放系数gk(对应至暂存缩放系数)增加一第一特定值Δg1(即gk+1=gk+Δg1);反之,当区内比例Ik小于特定比例IR时,系数计算单元206计算缩放系数gk+1为缩放系数gk减去一第二特定值Δg2(即gk+1=gk-Δg2),其中第一特定值Δg1与第二特定值Δg2皆大于零。The coefficient calculation unit 206 can respectively determine whether the intra-scale ratios I 1 ˜In are greater than a specific ratio IR in the first time interval to the n-th time interval, so as to calculate the scaling coefficients g 2 ˜g n , so that the intra-scale ratios asymptotically approach to (convergence to) a specific ratio IR. Taking the intra-scale ratio I k received in the k-th time interval as an example, when the intra-scale ratio I k is greater than the specific ratio IR, the coefficient calculation unit 206 calculates the scaling coefficient g k+1 as the scaling coefficient g k (corresponding to the temporary (i.e., g k+1 =g k +Δg 1 ) is increased by a first specific value Δg 1 (that is, g k+1 =g k +Δg 1 ); on the contrary, when the intra-area ratio I k is smaller than the specific ratio IR, the coefficient calculation unit 206 calculates the scaling coefficient g k+ 1 is the scaling factor g k minus a second specific value Δg 2 (ie g k+1 =g k −Δg 2 ), wherein the first specific value Δg 1 and the second specific value Δg 2 are both greater than zero.

具体来说,请参考图4,图4为本发明实施例一系数计算单元406的示意图。系数计算单元406可用来实现系数计算单元206,其包含有一减法器SB、一乘法器MP2、一加法器AD2以及一缓存器D2。减法器SB耦接于比例计算单元204以接收比例计算单元204所产生的区内比例,乘法器MP2耦接于减法器SB,加法器AD2耦接于乘法器MP2与缓存器D2之间,且缓存器D2还将输出回馈至加法器AD2。同样地,以下以第k时间区间与第k+1时间区间为例进行说明,于第k时间区间时,减法器SB接收比例计算单元204所产生的区内比例Ik,减法器SB将区内比例Ik减去特定比例IR,产生一相减结果R3,相减结果R3可表示为R3=Ik-IR。乘法器MP2将相减结果R3(即Ik-IR)乘以一调整系数μ,即产生一相乘结果R4并将相乘结果R4传递至加法器AD2,其中相乘结果R4可表示为R4=μ(Ik-IR),此时(即于第k时间区间中)缓存器D2的输出为缩放系数gk(对应至暂存缩放系数),而加法器AD2将相乘结果R4与缩放系数gk相加,以产生一相加结果R5,相加结果R5可表示为R5=gk+μ(Ik-IR),相加结果R5即为缩放系数gk+1。另外,系数计算单元406将相加结果R5/缩放系数gk+1储存于缓存器D2中,使得于第k+1时间区间时,缓存器D2即可输出缩放系数gk+1,换句话说,系数计算单元406用来实现gk+1=gk+μ(Ik-IR),其中整数k可为1到n-1的正整数。如此一来,系数计算单元406于第1时间区间至第n-1时间区间接收到区内比例I1~In-1,并分别计算缩放系数g2~gn(其中缩放系数g1预先设定为1),使得区内比例收敛至特定比例IR。Specifically, please refer to FIG. 4 , which is a schematic diagram of a coefficient calculation unit 406 according to an embodiment of the present invention. The coefficient calculation unit 406 can be used to implement the coefficient calculation unit 206, which includes a subtractor SB, a multiplier MP2, an adder AD2, and a register D2. The subtractor SB is coupled to the ratio calculation unit 204 to receive the regional ratio generated by the ratio calculation unit 204, the multiplier MP2 is coupled to the subtractor SB, the adder AD2 is coupled between the multiplier MP2 and the register D2, and The buffer D2 also feeds the output back to the adder AD2. Similarly, the following description takes the k-th time interval and the k+1-th time interval as examples. During the k-th time interval, the subtractor SB receives the intra-scale ratio I k generated by the ratio calculation unit 204, and the subtractor SB converts the The inner ratio I k is subtracted from the specific ratio IR to produce a subtraction result R3, which can be expressed as R3=I k −IR. The multiplier MP2 multiplies the subtraction result R3 (ie I k -IR) by an adjustment coefficient μ, that is, generates a multiplication result R4 and transmits the multiplication result R4 to the adder AD2, wherein the multiplication result R4 can be expressed as R4 =μ(I k −I R ), at this time (that is, in the kth time interval) the output of the register D2 is the scaling coefficient g k (corresponding to the temporary scaling coefficient), and the adder AD2 will multiply the result R4 with The scaling coefficients g k are added to generate an addition result R5 , which can be expressed as R5=g k +μ(I k −IR), and the addition result R5 is the scaling coefficient g k+1 . In addition, the coefficient calculation unit 406 stores the addition result R5/scaling coefficient g k+1 in the register D2, so that in the k+1 th time interval, the register D2 can output the scaling coefficient g k+1 , in other words In other words, the coefficient calculation unit 406 is used to realize g k+1 =g k +μ(I k −IR), where the integer k may be a positive integer from 1 to n−1. In this way, the coefficient calculation unit 406 receives the intra-scale ratios I 1 ˜I n-1 in the first time interval to the n−1 th time interval, and calculates the scaling coefficients g 2 ˜g n respectively (wherein the scaling coefficient g 1 is pre- Set to 1), so that the intra-scale scale converges to a specific scale IR.

如此一来,等化增强模块10可产生缩放系数,以补偿等化模块12(即最小均方差均衡器)所造成的能量缩减。请参考图5及图6,图5为等化模块12所输出的多个等化信号的之星座图,图6等化增强模块10所产生的多个缩放信号的星座图。因等化模块12造成能量缩减,多个等化信号位于一特定区域R0的一比例为52%,若直接对等化模块12所输出的多个等化信号进行解调制,将导致符元错误率或位错误率升高。相比之下,透过等化增强模块10所产生的缩放系数,可使多个缩放信号的星座点向外散开,多个缩放信号位于特定区域R0的一比例降低为25%,对化增强模块10所产生的缩放系数进行解调制,可降低符元错误率或位错误率,提升解调制系统1的效能。In this way, the equalization enhancement module 10 can generate scaling coefficients to compensate for the energy reduction caused by the equalization module 12 (ie, the minimum mean square error equalizer). Please refer to FIG. 5 and FIG. 6 . FIG. 5 is a constellation diagram of a plurality of equalized signals output by the equalization module 12 , and FIG. 6 is a constellation diagram of a plurality of scaled signals generated by the equalization enhancement module 10 . Due to the energy reduction caused by the equalization module 12, the ratio of the multiple equalized signals located in a specific region R 0 is 52%. If the multiple equalized signals output by the equalization module 12 are directly demodulated, the symbol element The error rate or bit error rate increases. In contrast, through the scaling factor generated by the equalization enhancement module 10, the constellation points of the multiple scaled signals can be spread out, and the ratio of the multiple scaled signals located in the specific region R 0 is reduced to 25%. Demodulating the scaling coefficients generated by the enhancement module 10 can reduce the symbol error rate or the bit error rate and improve the performance of the demodulation system 1 .

另一方面,解调制系统1可用来对一帧(Frame)FR进行解调制。详细来说,帧FR可包含一标头子帧Header以及一数据子帧Data,如图7所示。帧FR可由一传送端传送至一通道中,解调制系统1可自信道接收对应于帧FR的接收信号y1~yN,其中接收信号y1~yn可对应于标头子帧Header而接收信号yn+1~yN可对应于数据子帧Data。解调制系统1可依照上述方式根据接收信号y1~yn产生缩放系数gn(即最后更新的缩放系数),并根据缩放系数gn对其后续对应于数据子帧Data的接收信号yn+1~yN进行解调。如此一来,即可更准确地解调制出帧FR所包含的信息,以提升系统效能。On the other hand, the demodulation system 1 can be used to demodulate a frame (Frame) FR. Specifically, the frame FR may include a header subframe Header and a data subframe Data, as shown in FIG. 7 . The frame FR can be transmitted to a channel by a transmitter, and the demodulation system 1 can receive the received signals y 1 ˜y N corresponding to the frame FR from the channel, wherein the received signals y 1 ˜yn can be received corresponding to the header subframe Header Signals y n+1 ˜y N may correspond to data subframes Data. The demodulation system 1 can generate the scaling coefficient g n (ie, the last updated scaling coefficient) according to the received signals y 1 to y n in the above-mentioned manner, and then according to the scaling coefficient g n to its subsequent received signal yn corresponding to the data subframe Data +1 to y N for demodulation. In this way, the information contained in the frame FR can be more accurately demodulated, so as to improve the system performance.

关于等化增强模块产生缩放信号的操作流程,可进一步归纳为一等化增强流程80,请参考图8,图8为本发明实施例等化增强流程80的示意图。等化增强流程80可由一等化增强模块来执行,其包含以下步骤:The operation flow of the equalization enhancement module for generating the scaling signal can be further summarized as a first equalization enhancement flow 80 , please refer to FIG. 8 , which is a schematic diagram of the equalization enhancement flow 80 according to an embodiment of the present invention. The equalization enhancement process 80 can be performed by the first equalization enhancement module, which includes the following steps:

步骤800:开始。Step 800: Start.

步骤802:将等化信号x1~xn-1乘以一缩放系数g,以取得缩放信号gx1~gxn-1Step 802 : Multiply the equalized signals x 1 ˜x n-1 by a scaling factor g to obtain the scaling signals gx 1 ˜gx n-1 .

步骤804:判断缩放信号gx1~gxn-1之对应星座点是否位于特定区域R,产生判断结果hit1~hitn-1Step 804 : Determine whether the corresponding constellation points of the scaling signals gx 1 ˜gx n-1 are located in the specific region R, and generate determination results hit 1 ˜hit n-1 .

步骤806:根据判断结果hit1~hitn-1,计算一区内比例In,其中区内比例In相关于缩放信号gx1~gxn-1位于特定区域R的比例。Step 806 : Calculate an intra-area ratio In according to the judgment results hit 1 ˜hit n-1 , wherein the intra-area ratio In is related to the ratio of the scaling signals gx 1 ˜gx n -1 in the specific area R.

步骤808:根据区内比例In,调整缩放系数g。Step 808: Adjust the scaling factor g according to the intra-area ratio I n .

步骤810:结束。Step 810: End.

于等化增强流程80中,缩放系数g的系数值可随时间变化而不同,即缩放系数g的系数值于第1时间区间至第n时间区间可分别为缩放系数g1~gn。另外,于步骤806中,等化增强模块可利用递归平均方式计算区内比例In,即计算区内比例In为Ik+1=αhitk+(1-α)Ik,除此之外,等化增强模块亦可直接计算区内比例In

Figure BDA0000961884510000081
Figure BDA0000961884510000082
亦符合本发明的要求。In the equalization enhancement process 80, the coefficient value of the scaling coefficient g may vary with time, that is, the coefficient value of the scaling coefficient g may be the scaling coefficients g1 -gn in the first time interval to the nth time interval, respectively. In addition, in step 806, the equalization enhancement module can use the recursive averaging method to calculate the intra-area ratio I n , that is, the calculated intra-area ratio In is I k+1 =αhit k +(1−α)I k , in addition to this In addition, the equalization enhancement module can also directly calculate the ratio In in the region as
Figure BDA0000961884510000081
Figure BDA0000961884510000082
It also meets the requirements of the present invention.

另外,于步骤808中,等化增强模块可判断区内比例In是否大于特定比例IR,当区内比例In大于特定比例IR时,等化增强模块计算缩放系数g为一暂存缩放系数g-1增加第一特定值Δg1(即g=g-1+Δg1);当区内比例In小于特定比例IR时,等化增强模块计算缩放系数为暂存缩放系数g-1减去第二特定值Δg2(即gk+1=gk-Δg2)。除此之外,等化增强模块亦可计算缩放系数g为g=g-1+μ(In-IR),亦符合本发明的要求。其余等化增强流程80之操作细节,可参考前述相关段落,于此不再赘述。In addition, in step 808, the equalization enhancement module can determine whether the intra-scale ratio I n is greater than the specific ratio IR, and when the intra-scale ratio I n is greater than the specific ratio IR, the equalization and enhancement module calculates the scaling coefficient g as a temporarily stored scaling coefficient g −1 increases the first specific value Δg 1 (ie g=g −1 + Δg 1 ); when the ratio In within the region is smaller than the specific ratio IR, the scaling factor calculated by the equalization enhancement module is the temporary storage scaling factor g −1 minus Go to the second specific value Δg 2 (ie g k+1 =g k −Δg 2 ). In addition, the equalization enhancement module can also calculate the scaling factor g as g=g −1 + μ(In −IR), which also meets the requirements of the present invention. For the operation details of the rest of the equalization enhancement process 80, reference may be made to the above-mentioned relevant paragraphs, which will not be repeated here.

另一方面,等化增强模块不限于以特殊应用集成电路来实现,请参考图9,图9本发明实施例一等化增强模块90的示意图,等化增强模块90包含一处理单元902及一储存单元904。前述等化增强流程80可编译成一程序代码908并储存于储存单元904中,以指示处理单元902执行等化增强流程80。其中,处理单元902可为一中央处理器(CPU)、一数字信号处理器(Digital Signal Processor,DSP)或是一微处理器(Microprocessor),而不在此限,储存单元904可为一只读式内存(read-only memory,ROM)或是一非挥发性内存(non-volatile memory,例如,一电子抹除式可复写只读存储器(electrically erasableprogrammable read only memory,EEPROM)或一闪存(flash memory)),而不在此限。On the other hand, the equalization enhancement module is not limited to be implemented by special application integrated circuits. Please refer to FIG. 9 , which is a schematic diagram of an equalization enhancement module 90 according to an embodiment of the present invention. The equalization enhancement module 90 includes a processing unit 902 and a storage unit 904 . The aforementioned equalization enhancement process 80 can be compiled into a program code 908 and stored in the storage unit 904 to instruct the processing unit 902 to execute the equalization enhancement process 80 . The processing unit 902 may be a central processing unit (CPU), a digital signal processor (DSP) or a microprocessor (Microprocessor), but not limited thereto, the storage unit 904 may be a read-only read-only memory (ROM) or a non-volatile memory (non-volatile memory, for example, an electronically erasable programmable read only memory, EEPROM) or a flash memory )), but not otherwise.

需注意的是,前述实施例用以说明本发明的概念,本领域具通常知识者当可据以做不同的修饰,而不限于此。举例来说,前述实施例是以接收信号y1~yn为具有四位相位偏移调制(QPSK)的符元信号为例进行说明,而本发明不限于此,接收信号y1~yn亦可具有正交振幅调制(Quadrature Amplitude Modulation,QAM)、相位偏移调制(Phase ShiftKeying,PSK)或振幅相位偏移调制(Amplitude Phase Shift Keying,APSK)的符元信号,亦属于本发明的范畴。另外,等化模块12不限于最小均方差均衡器,只要等化模块12所产生的等化信号的能量不大于等化模块12所产生的接收信号的能量,皆可利用本发明的等化增强模块补偿等化模块12所造成的能量缩减,以进一步改善解调制系统1的系统效能。It should be noted that the foregoing embodiments are used to illustrate the concept of the present invention, and those skilled in the art can make various modifications accordingly, but are not limited thereto. For example, the foregoing embodiments are described by taking the received signals y 1 ˜yn as symbol signals with four-bit phase shift modulation (QPSK) as an example, but the present invention is not limited to this, the received signals y 1 ˜yn are It can also have a symbol signal with Quadrature Amplitude Modulation (QAM), Phase Shift Keying (PSK) or Amplitude Phase Shift Keying (APSK), which also belongs to the scope of the present invention. . In addition, the equalization module 12 is not limited to the minimum mean square error equalizer, as long as the energy of the equalized signal generated by the equalization module 12 is not greater than the energy of the received signal generated by the equalization module 12, the equalization enhancement of the present invention can be used. The module compensates for the energy reduction caused by the equalization module 12 to further improve the system performance of the demodulation system 1 .

由上述可知,本发明根据缩放信号位于特定区域的比例来调整缩放系数,以补偿等化模块(最小均方差均衡器)所造成的能量缩减,进一步降低符元错误率或位错误率,提升解调制系统的效能。It can be seen from the above that the present invention adjusts the scaling factor according to the ratio of the scaling signal in a specific area, so as to compensate the energy reduction caused by the equalization module (minimum mean square error equalizer), further reduce the symbol error rate or bit error rate, and improve the solution. Efficiency of the modulation system.

以上所述仅为本发明的较佳实施例,凡依本发明申请专利范围所做的均等变化与修饰,皆应属本发明的涵盖范围。The above descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made according to the scope of the patent application of the present invention shall fall within the scope of the present invention.

Claims (18)

1.一种等化增强模块,包含有:1. An equalization enhancement module, comprising: 一乘法单元,用来将多个等化信号分别乘以不同的缩放系数,以取得多个缩放信号;a multiplying unit for multiplying the multiple equalization signals by different scaling coefficients to obtain multiple scaling signals; 一判断单元,耦接于该乘法单元,用来判断该多个缩放信号的对应星座点是否位于一特定区域,产生多个判断结果;a judging unit, coupled to the multiplying unit, for judging whether the corresponding constellation points of the plurality of scaled signals are located in a specific area, and generating a plurality of judgment results; 一比例计算单元,耦接于该判断单元,用来根据该多个判断结果,计算一区内比例,其中该区内比例相关于该多个缩放信号位于该特定区域的一比例;以及a scale calculation unit, coupled to the judgment unit, for calculating an area scale according to the plurality of judgment results, wherein the area scale is related to a scale at which the plurality of scaling signals are located in the specific area; and 一系数计算单元,耦接于该比例计算单元,用来根据该区内比例,计算缩放系数。A coefficient calculation unit, coupled to the scale calculation unit, is used for calculating the scaling coefficient according to the scale in the area. 2.如权利要求1所述的等化增强模块,其特征在于,该比例计算单元包含有一平均单元,该平均单元根据该多个判断结果以及一平均系数,计算该区内比例。2 . The equalization enhancement module as claimed in claim 1 , wherein the ratio calculation unit comprises an average unit, and the average unit calculates the intra-area ratio according to the plurality of judgment results and an average coefficient. 3 . 3.如权利要求2所述的等化增强模块,其特征在于,该平均单元包含有:3. The equalization enhancement module of claim 2, wherein the averaging unit comprises: 一第一乘法器,用来将一暂存区内比例乘以一第一系数,以产生一第一相乘结果,其中该第一系数为1减该平均系数;a first multiplier for multiplying a ratio in a temporary storage area by a first coefficient to generate a first multiplication result, wherein the first coefficient is 1 minus the average coefficient; 一第一加法器,耦接于该第一乘法器,用来将该第一相乘结果与一第一信号相加,以产生一第一相加结果,其中该第一信号相关于该多个判断结果中一判断结果与该平均系数;以及a first adder coupled to the first multiplier for adding the first multiplication result and a first signal to generate a first addition result, wherein the first signal is related to the multiple one of the judgment results and the average coefficient; and 一第一缓存器,耦接于该第一加法器,用来输出该区内比例为该第一相加结果。A first register, coupled to the first adder, is used for outputting the ratio within the region as the first addition result. 4.如权利要求3所述的等化增强模块,其特征在于,当该判断结果显示该多个缩放信号的一缩放信号位于该特定区域之内时,该第一信号为该平均系数,当该判断结果显示该缩放信号位于该特定区域之外时,该第一信号为0。4 . The equalization enhancement module of claim 3 , wherein when the determination result shows that a scaled signal of the plurality of scaled signals is located within the specific area, the first signal is the average coefficient, and when 4 . When the judgment result shows that the zoom signal is outside the specific area, the first signal is 0. 5.如权利要求3所述的等化增强模块,其特征在于,该平均单元另包含有一多任务器,耦接于该第一加法器,其中当该判断结果显示该多个缩放信号的一缩放信号位于该特定区域之内时,该多任务器所产生的该第一信号为该平均系数,当该判断结果显示该缩放信号位于该特定区域之外时,该多任务器所产生之该第一信号为0。5 . The equalization enhancement module of claim 3 , wherein the averaging unit further comprises a multiplexer, coupled to the first adder, wherein when the judgment result shows the difference of the plurality of scaled signals. 6 . When a scaling signal is located within the specific area, the first signal generated by the multiplexer is the average coefficient. When the determination result shows that the scaling signal is located outside the specific area, the multiplexer generates the average coefficient. The first signal is zero. 6.如权利要求1所述的等化增强模块,其中当该区内比例大于一特定比例时,该系数计算单元计算缩放系数为一暂存缩放系数增加一第一特定值。6 . The equalization enhancement module as claimed in claim 1 , wherein when the ratio within the region is greater than a specific ratio, the coefficient calculation unit calculates the scaling factor to add a first specific value to a temporarily stored scaling factor. 7 . 7.如权利要求6所述的等化增强模块,其特征在于,当该区内比例小于该特定比例时,该系数计算单元计算缩放系数为该暂存缩放系数减去一第二特定值。7 . The equalization enhancement module of claim 6 , wherein when the ratio within the region is smaller than the specific ratio, the coefficient calculation unit calculates the scaling coefficient as the temporarily stored scaling coefficient minus a second specific value. 8 . 8.如权利要求6所述的等化增强模块,其特征在于,该系数计算单元包含有:8. The equalization enhancement module of claim 6, wherein the coefficient calculation unit comprises: 一减法器,用来产生该区内比例与该特定比例的一相减结果;a subtractor for generating a subtraction result of the ratio in the region and the specific ratio; 一第二乘法器,耦接于该减法器,用来将该相减结果乘以一调整系数,以产生一第二相乘结果;a second multiplier, coupled to the subtractor, for multiplying the subtraction result by an adjustment coefficient to generate a second multiplication result; 一第二加法器,耦接于该第二乘法器,用来将该第二相乘结果与该暂存缩放系数相加,以产生一第二相加结果;以及a second adder, coupled to the second multiplier, for adding the second multiplication result and the temporarily stored scaling coefficient to generate a second addition result; and 一第二缓存器,耦接于该第二加法器,用来输出缩放系数为该第二相加结果。A second register, coupled to the second adder, is used for outputting the scaling coefficient as the second addition result. 9.一种解调制系统,包含有:9. A demodulation system, comprising: 一等化模块,用来对多个接收信号进行等化,以产生多个等化信号;The first equalization module is used to equalize multiple received signals to generate multiple equalized signals; 一符元判断模块;以及a meta-judgment module; and 一等化增强模块,耦接于该等化模块与该符元判断模块之间,该等化增强模块包含有:An equalization enhancement module is coupled between the equalization module and the symbol judgment module, and the equalization enhancement module includes: 一乘法单元,用来将该多个等化信号分别乘以不同的缩放系数,以取得多个缩放信号;a multiplying unit for multiplying the plurality of equalization signals by different scaling coefficients to obtain a plurality of scaling signals; 一判断单元,耦接于该乘法单元,用来判断该多个缩放信号是否位于一特定区域,产生多个判断结果;a judging unit, coupled to the multiplying unit, for judging whether the plurality of scaling signals are located in a specific area, and generating a plurality of judging results; 一比例计算单元,耦接于该判断单元,用来根据该多个判断结果,计算一区内比例;以及a ratio calculation unit, coupled to the judgment unit, for calculating a ratio within a region according to the plurality of judgment results; and 一系数计算单元,耦接于该比例计算单元,用来根据该区内比例,计算缩放系数;a coefficient calculation unit, coupled to the scale calculation unit, for calculating the scaling coefficient according to the scale in the area; 其中,该符元判断模块对该多个缩放信号进行解调制。Wherein, the symbol determination module demodulates the plurality of scaled signals. 10.如权利要求9所述的解调制系统,其特征在于,该等化模块为一最小均方差均衡器。10. The demodulation system of claim 9, wherein the equalization module is a minimum mean square error equalizer. 11.如权利要求9所述的解调制系统,其特征在于,该等化模块所产生的该多个等化信号的能量不大于其对应的多个接收信号的能量。11 . The demodulation system of claim 9 , wherein the energy of the plurality of equalized signals generated by the equalization module is not greater than the energy of the corresponding plurality of received signals. 12 . 12.一种等化增强方法,可提升一解调制系统的效能,包含有:12. An equalization enhancement method capable of improving the performance of a demodulation system, comprising: 将多个等化信号分别乘以不同的缩放系数,以取得多个缩放信号;Multiply the multiple equalization signals by different scaling coefficients to obtain multiple scaling signals; 判断多个缩放信号的对应星座点是否位于一特定区域,产生多个判断结果;Judging whether the corresponding constellation points of the plurality of zoomed signals are located in a specific area, and generating a plurality of judgment results; 根据该多个判断结果,计算一区内比例,其中该区内比例相关于该多个缩放信号位于该特定区域之一比例;以及calculating an intra-area ratio according to the plurality of determination results, wherein the intra-area ratio is related to a ratio in which the plurality of zoom signals are located in the specific area; and 根据该区内比例,计算缩放系数,使该区内比例渐趋近于一特定比例。According to the scale in the area, the scaling factor is calculated to make the scale in the area gradually approach a specific scale. 13.如权利要求12所述的等化增强方法,其特征在于,根据该多个判断结果计算该区内比例的步骤包含有:13. The equalization enhancement method as claimed in claim 12, wherein the step of calculating the ratio within the region according to the plurality of judgment results comprises: 根据该多个判断结果以及一平均系数,计算该区内比例。According to the plurality of judgment results and an average coefficient, the area ratio is calculated. 14.如权利要求13所述的等化增强方法,其特征在于,根据该多个判断结果以及该平均系数计算该区内比例的步骤包含有:14. The equalization enhancement method of claim 13 , wherein the step of calculating the ratio within the region according to the plurality of judgment results and the average coefficient comprises: 将一暂存区内比例乘以一第一系数,以产生一第一相乘结果,其中该第一系数为1减该平均系数;multiplying a ratio in the temporary storage area by a first coefficient to generate a first multiplication result, wherein the first coefficient is 1 minus the average coefficient; 将该第一相乘结果与一第一信号相加,以产生一第一相加结果,其中该第一信号相关于该多个判断结果中一判断结果与该平均系数;以及adding the first multiplication result and a first signal to generate a first addition result, wherein the first signal is related to a determination result among the plurality of determination results and the average coefficient; and 输出该区内比例为该第一相加结果。The ratio within the region is output as the first addition result. 15.如权利要求14所述的等化增强方法,其特征在于,当该判断结果显示该多个缩放信号的一缩放信号位于该特定区域之内时,产生该第一信号为该平均系数,当该判断结果显示该缩放信号位于该特定区域之外时,产生该第一信号为0。15 . The equalization enhancement method of claim 14 , wherein when the determination result shows that a scaled signal of the plurality of scaled signals is located within the specific area, the first signal is generated as the average coefficient, 15 . When the determination result shows that the zoom signal is outside the specific area, the first signal is generated to be 0. 16.如权利要求12所述的等化增强方法,其特征在于,根据该区内比例计算缩放系数的步骤包含有:16. The equalization enhancement method as claimed in claim 12, wherein the step of calculating the scaling factor according to the scale in the area comprises: 当该区内比例大于该特定比例时,计算缩放系数为一暂存缩放系数增加一第一特定值。When the scale in the area is greater than the specific scale, the scaling factor is calculated to add a first specific value to a temporarily stored scaling factor. 17.如权利要求16所述的等化增强方法,其特征在于,根据该区内比例计算缩放系数的步骤另包含有:17. The equalization enhancement method as claimed in claim 16, wherein the step of calculating the scaling factor according to the scale in the area further comprises: 当该区内比例小于该特定比例时,计算缩放系数为该暂存缩放系数减去一第二特定值。When the scale in the area is smaller than the specific scale, the calculated scaling factor is the temporarily stored scaling factor minus a second specific value. 18.如权利要求16所述的等化增强方法,其特征在于,根据该区内比例计算缩放系数的步骤包含有:18. The equalization enhancement method as claimed in claim 16, wherein the step of calculating the scaling factor according to the scale in the area comprises: 产生该区内比例与该特定比例之一相减结果;produces the result of subtracting one of the proportions in the area and that particular proportion; 将该相减结果乘以一调整系数,以产生一第二相乘结果;multiplying the subtraction result by an adjustment coefficient to generate a second multiplication result; 将该第二相乘结果与该暂存缩放系数相加,以产生一第二相加结果;以及取得缩放系数为该第二相加结果。adding the second multiplication result and the temporarily stored scaling factor to generate a second adding result; and obtaining the scaling factor as the second adding result.
CN201610220363.5A 2016-04-11 2016-04-11 Equalization enhancement module, demodulation system and equalization enhancement method Active CN107294888B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201610220363.5A CN107294888B (en) 2016-04-11 2016-04-11 Equalization enhancement module, demodulation system and equalization enhancement method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610220363.5A CN107294888B (en) 2016-04-11 2016-04-11 Equalization enhancement module, demodulation system and equalization enhancement method

Publications (2)

Publication Number Publication Date
CN107294888A CN107294888A (en) 2017-10-24
CN107294888B true CN107294888B (en) 2020-08-14

Family

ID=60095561

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610220363.5A Active CN107294888B (en) 2016-04-11 2016-04-11 Equalization enhancement module, demodulation system and equalization enhancement method

Country Status (1)

Country Link
CN (1) CN107294888B (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101309246A (en) * 2007-05-18 2008-11-19 联发科技股份有限公司 Receiver apparatus for processing amplitude modulated symbol stream
CN101471749A (en) * 2007-12-28 2009-07-01 三星电子株式会社 Method for generating log-likelihood ratio for QAM-OFDM modulating signal
CN102223497A (en) * 2010-04-13 2011-10-19 新港传播媒介公司 Apparatus and method for equalizing analog TV signals
CN103973630A (en) * 2013-01-24 2014-08-06 晨星软件研发(深圳)有限公司 Signal processing method applicable to digital television broadcasting system and receiver
CN104603853A (en) * 2012-05-04 2015-05-06 李尔登公司 System and methods for coping with doppler effects in distributed-input distributed-output wireless systems
CN105376184A (en) * 2015-10-28 2016-03-02 西安电子科技大学 2D antenna cancellation method of narrowband full-duplex system

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200607272A (en) * 2004-05-11 2006-02-16 Matsushita Electric Ind Co Ltd OFDM reception apparatus and method
US20080181324A1 (en) * 2007-01-30 2008-07-31 Texas Instruments Incorporated Systems and methods for scaling to equalize noise variance

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101309246A (en) * 2007-05-18 2008-11-19 联发科技股份有限公司 Receiver apparatus for processing amplitude modulated symbol stream
CN101471749A (en) * 2007-12-28 2009-07-01 三星电子株式会社 Method for generating log-likelihood ratio for QAM-OFDM modulating signal
CN102223497A (en) * 2010-04-13 2011-10-19 新港传播媒介公司 Apparatus and method for equalizing analog TV signals
CN104603853A (en) * 2012-05-04 2015-05-06 李尔登公司 System and methods for coping with doppler effects in distributed-input distributed-output wireless systems
CN103973630A (en) * 2013-01-24 2014-08-06 晨星软件研发(深圳)有限公司 Signal processing method applicable to digital television broadcasting system and receiver
CN105376184A (en) * 2015-10-28 2016-03-02 西安电子科技大学 2D antenna cancellation method of narrowband full-duplex system

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
最小均方误差自适应均衡器的软实现;杜思深等;《现代电子技术》;20051201;全文 *

Also Published As

Publication number Publication date
CN107294888A (en) 2017-10-24

Similar Documents

Publication Publication Date Title
JP2005033793A (en) Apparatus and method for direct measurement of channel state for coded orthogonal frequency division multiplexing receiver
WO2016148158A1 (en) Method and receiver for decoding optical signal
CN101690056B (en) Interference suppression method and apparatus
CN101878605A (en) Receiving device and receiving method
US10554309B2 (en) Pilot-aided carrier phase estimation for optical communications
JP4362141B2 (en) Equalizer
US8867445B2 (en) Bit soft value normalization
TWI627846B (en) Module of enhancing equalization, demodulation system and method of enhancing equalization
US6680985B1 (en) Adaptive quadrature amplitude modulation decoding system
US7826523B2 (en) Effective adaptive filtering techniques
CN107294888B (en) Equalization enhancement module, demodulation system and equalization enhancement method
JP5682226B2 (en) Receiving device and method, demodulating device and method, and program
JP4776311B2 (en) Likelihood corrector and likelihood correction method
US7680219B2 (en) Apparatus and method for decoding a bit sequence from QPSK or QAM symbols
CN105871396B (en) Signal receiving end capable of adaptively adjusting soft information and signal processing method thereof
JP5656617B2 (en) Receiving apparatus and method
JP5478327B2 (en) Wireless communication system, receiver, and demodulation method for transmitting and receiving signals generated by modulo arithmetic
JP2013175829A (en) Equalization device and broadcast receiver
US9787520B2 (en) Signal receiver with adaptive soft information adjustment and associated signal processing method
JP2017147667A (en) Signal compensation system, signal compensation execution system, and signal compensation coefficient calculation method
KR101657103B1 (en) Channel estimation apparatus of 16apsk and method thereof
JP5419146B2 (en) Demodulator and demodulation processing method
CN109995691A (en) Receiving device and method for generating log probability ratio
TW201943233A (en) Circuit and method of phase recovery
JP2012222558A (en) Demodulation controller, receiver, and demodulation method

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
TA01 Transfer of patent application right

Effective date of registration: 20200415

Address after: No.1, Duhang 1st Road, Hsinchu City, Hsinchu Science Park, Taiwan, China

Applicant after: MEDIATEK Inc.

Address before: Taiwan Hsinchu County Tai Yuan Street China jhubei City, No. 26 4 floor 1

Applicant before: MStar Semiconductor, Inc.

TA01 Transfer of patent application right
GR01 Patent grant
GR01 Patent grant