CN107241529B

CN107241529B - TTL video output system and method thereof

Info

Publication number: CN107241529B
Application number: CN201710569664.3A
Authority: CN
Inventors: 王彬彬
Original assignee: Shanghai Freesense Image Technology Co ltd
Current assignee: Shanghai Freesense Image Technology Co ltd
Priority date: 2017-07-13
Filing date: 2017-07-13
Publication date: 2020-04-07
Anticipated expiration: 2037-07-13
Also published as: CN107241529A

Abstract

The invention discloses a TTL video output system, wherein the first clock signal, the first clock management module and the image output control module are connected in sequence, and the image output control module outputs an image signal without a clock, so the The second clock signal is connected to the second clock management module, and the second clock management module outputs an image clock. The external PLL chip of the present invention is controlled by the FPGA control system, and the external PLL chip will output two clocks to send to the FPGA. These two clocks are of the same frequency, but have different uses. One of them enters the FPGA control system through PLL0 and is internally connected to the clock management. The module de-skews and increases the fan-out to improve the clock quality and send the improved clock to the image control; another clock PLL1 is sent to the clock management module to improve the signal quality, and then the clock is sent to the outside, For lighting.

Description

TTL video output system and method thereof

Technical Field

The invention belongs to the technical field of liquid crystal, and particularly relates to a TTL video output system. Meanwhile, the invention also relates to a TTL video output method.

Background

Liquid Crystal Display modules (hereinafter referred to as modules) and related Liquid Crystal Display devices (hereinafter referred to as devices) are widely used, and due to the fact that Transistor-Transistor logic (TTL) signals are stable and reliable, transmission rate is high, power consumption is low, and many modules and devices adopt the TTL signals as Display interfaces for receiving video images.

When the module and the device thereof are used for production, debugging and imaging processes, TTL video signals are required to be generated through a video image signal source or a video adapter plate (hereinafter referred to as a video source for short) to provide a source of module display signals for the module, so that the accuracy and reliability of the video signals generated by the video source are guaranteed to be the premise of guaranteeing module display.

In the TTL video transmission aspect, since internal signals can only be connected to other chips through the package bonding wires, the connecting wires and the through holes on the PCB, if the TTL levels are used as the output interfaces, the rise/fall time of data and the synchronization matching between multiple channels of data may be seriously deteriorated due to various parasitic parameters. Therefore, the TTL level is generally adopted for video transmission, and the speed is low, and the dotted graph is distorted.

Disclosure of Invention

The invention aims to solve the defects in the prior art, and provides a TTL video output system and a TTL video output method, which can improve the TTL video transmission effect under the condition of no distortion of signals.

In order to achieve the purpose, the invention provides the following technical scheme:

a TTL video output system comprises a PLL chip and an FPGA control system, wherein the PLL chip comprises a first clock signal and a second clock signal which have the same frequency, the FPGA control system comprises a first clock management module, a second clock management module and an image output control module, the first clock signal, the first clock management module and the image output control module are sequentially connected, the image output control module outputs an image signal which does not contain a clock, the second clock signal is connected with the second clock management module, and the second clock management module outputs an image clock.

The invention also provides a TTL video output method, which comprises the following steps:

s1, after the upper computer issues playing parameters and playing control, controlling an external PLL chip to output two paths of same-frequency and same-phase clocks, wherein the PLL0 is used for controlling the output of image data and line-field synchronizing signals; PLL1 is used for clocking of lighting; since the PLL1 and PLL0 are the same-frequency and same-phase signals at the beginning, the output timing is a synchronous signal at the source end;

and S2, if the lighting is abnormal, the upper computer sends out a phase control parameter to adjust the clock phase of the output image, at the moment, the clock and the data output by the source end are not synchronous, and the output reaches the terminal due to the phase shift generated when the signal passes through the system, so that the lighting effect can be achieved.

Preferably, in S2, the adjustment is performed by observing the image state.

The invention has the technical effects and advantages that: according to the TTL video output system and the TTL video output method, an external PLL chip is controlled by an FPGA control system, the external PLL chip can output two clocks to be sent to an FPGA, the two clocks have the same frequency but different purposes, one of the two clocks enters the FPGA control system through the PLL0 and is connected with a clock management module to be subjected to de-skew and fan-out increase, so that the clock quality is improved, and the improved clock is sent to image control; another clock PLL1 is sent to the clock management module to improve the signal quality, and then the clock is sent to the outside for lighting; the image output control module is used for outputting a clock for controlling a time sequence and a clock for lighting up the image, and only outputting a data signal and a plurality of line-field synchronous signals of the image when the module works, so that the problem of improving the TTL video transmission effect under the condition of no distortion of the signals is solved.

Drawings

FIG. 1 is a block diagram of the module of the present invention;

FIG. 2 is a control flow chart of the present invention.

FIG. 3 is an analysis diagram of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail with reference to the following embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

As shown in fig. 1, the invention provides a TTL video output system, which includes a PLL chip and an FPGA control system, where the PLL chip includes a first clock signal and a second clock signal with the same frequency, the FPGA control system includes a first clock management module, a second clock management module, and an image output control module, the first clock signal, the first clock management module, and the image output control module are sequentially connected, the image output control module outputs an image signal that does not include a clock, the second clock signal is connected to the second clock management module, and the second clock management module outputs an image clock.

As shown in fig. 2, the present invention further provides a TTL video output method, which includes the following steps:

s1, after the upper computer issues playing parameters and playing control, the upper computer controls the PLL chip to output two paths of clock signals with the same frequency, wherein one path of clock signal is used for controlling the output of image data and line-field synchronous signals, and the other path of clock signal is used for controlling the clock of lighting;

and S2, if the lighting is abnormal, the upper computer sends out phase control parameters to adjust the clock phase of the output image, and the output reaches the terminal to achieve the lighting effect. In S2, adjustment is performed by observing the image state; because the same set of cable and tool, the phase change that can arouse is certain, consequently, only need carry out once adjustment just can.

During lighting, we can encounter the situation that the output waveform of the source end is synchronous, and the terminal is not synchronous. Thereby causing an abnormality in the lighting effect. It can be easily understood from the definition of the fourier series that all periodic signals can be formed by the superposition of sine waves (herein referred to as sine and cosine) with different frequencies. A sine wave with a fixed frequency enters any complex system, the output of the sine wave only causes the amplitude and the phase of the input waveform to change, and the shape of the waveform is not changed. Therefore, the clock and the signal are shifted after reaching the terminal due to the difference in frequency of the clock and the data. As shown in fig. 3.

Finally, it should be noted that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that modifications may be made to the embodiments or portions thereof without departing from the spirit and scope of the invention.

Claims

1. A TTL video output system is characterized by comprising a PLL chip and an FPGA control system, wherein the PLL chip comprises a first clock signal and a second clock signal with the same frequency, the FPGA control system comprises a first clock management module, a second clock management module and an image output control module, the first clock signal, the first clock management module and the image output control module are sequentially connected, the image output control module outputs an image signal without a clock, the second clock signal is connected with the second clock management module, and the second clock management module outputs an image clock with adjustable phase; the PLL chip is connected with an external upper computer.

2. A TTL video output method according to claim 1, wherein: the method comprises the following steps:

and S2, if the lighting is abnormal, the upper computer sends out phase control parameters to adjust the clock phase of the output image, and the output reaches the terminal to achieve the lighting effect.

3. The TTL video output method according to claim 2, wherein: in S2, adjustment is performed by observing the image state.