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CN107046087B - Epitaxial wafer of light emitting diode and preparation method thereof - Google Patents

Epitaxial wafer of light emitting diode and preparation method thereof Download PDF

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Publication number
CN107046087B
CN107046087B CN201710289169.7A CN201710289169A CN107046087B CN 107046087 B CN107046087 B CN 107046087B CN 201710289169 A CN201710289169 A CN 201710289169A CN 107046087 B CN107046087 B CN 107046087B
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layers
inn
epitaxial wafer
ingan
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CN107046087A (en
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张宇
马欢
肖云飞
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HC Semitek Zhejiang Co Ltd
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HC Semitek Zhejiang Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/815—Bodies having stress relaxation structures, e.g. buffer layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/013—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
    • H10H20/0133—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials
    • H10H20/01335—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials the light-emitting regions comprising nitride materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/811—Bodies having quantum effect structures or superlattices, e.g. tunnel junctions

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Abstract

The invention discloses an epitaxial wafer of a light emitting diode and a preparation method thereof, belonging to the technical field of photoelectrons. The epitaxial wafer comprises a substrate, and a buffer layer, a u-shaped GaN layer, a stress release layer, an n-shaped GaN layer, a light emitting layer, an electronic barrier layer and a p-shaped GaN layer which are sequentially stacked on the substrate, wherein the stress release layer comprises an InN layer and a second InGaN layer, the lattices of the InN layer and the second InGaN layer are larger than that of the u-shaped GaN layer, so that the stress release layer can generate outward tension parallel to the surface of the u-shaped GaN layer on the u-shaped GaN layer, meanwhile, the lattices of the InN layer are larger than that of the second InGaN layer, and the tension of the stress release layer on the u-shaped GaN layer can be gradually increased along with the increase of the number of times of alternate growth by alternately growing the InN layer and the second InGaN layer, so that the warping of the epitaxial wafer is gradually reduced, and finally the surface of the stress release layer tends to be gradually flat.

Description

A kind of epitaxial wafer of light emitting diode and preparation method thereof
Technical field
The present invention relates to photoelectron technical field, in particular to a kind of epitaxial wafer of light emitting diode and preparation method thereof.
Background technique
Light emitting diode (English: Light Emitting Diode, referred to as: LED) as great shadow in photoelectronic industry Ring power new product, have the characteristics that small in size, long service life, various colors are colorful, low energy consumption, be widely used in illuminate, The fields such as display screen, signal lamp, backlight, toy.The nuclear structure of LED is epitaxial wafer, the photoelectricity of the production of epitaxial wafer to LED Characteristic has large effect.
Epitaxial wafer generally includes buffer layer, u-shaped GaN layer, n-type GaN layer, luminescent layer, electronic barrier layer and p-type GaN layer.
In a kind of epitaxial wafer, buffer layer is AlN layers, and luminescent layer is InGaN layer and the alternate periodic structure of GaN layer.? When directly growing u-shaped GaN layer on AlN layer, can exist since the lattice of AlN and GaN have differences, in u-shaped GaN layer larger Stress.Stress in u-shaped GaN layer can make u-shaped GaN layer generate the warpage far from one side of substrate, this allows for the n of subsequent growth Type GaN layer also generates warpage, and with the growth of n-type GaN layer, the warpage degree of n-type GaN layer can also be further increased.? The growth of epitaxial wafer is carried out in graphite plate, and the bottom of graphite plate will do it heating, and warpage will lead to the table of n-type GaN layer Identity distance is different with a distance from the bottom of graphite plate, this will cause the temperature of the surface different zones of n-type GaN layer different.Temperature Have a significant impact for the doping of In, when the surface of the n-type GaN layer of warpage grows luminescent layer, the In doping of InGaN layer can be by To influence, there is In and adulterate non-uniform situation, In doping unevenly will lead to the emission wavelength of different zones on epitaxial wafer Can be different with brightness, to influence the quality of LED.
Summary of the invention
In order to solve the problems, such as that n-type GaN layer can generate warpage, the embodiment of the invention provides a kind of the outer of light emitting diode Prolong piece and preparation method thereof.The technical solution is as follows:
On the one hand, the embodiment of the invention provides a kind of epitaxial wafer of light emitting diode, the epitaxial wafer include substrate and Stack gradually buffer layer over the substrate, u-shaped GaN layer, stress release layer, n-type GaN layer, luminescent layer, electronic barrier layer and P-type GaN layer, wherein the buffer layer is AlN layers, and the luminescent layer includes the first In of alternately laminated settingxGa(1-x)N layers and GaN layer, the stress release layer include alternately laminated setting InN layer and the second InGaN layer, described InN layers and described second The number of plies of InGaN layer is identical, 0 < x < 1.
Preferably, described InN layers with a thickness of 5~8nm.
Further, second InGaN layer with a thickness of 5~8nm.
Preferably, InN layers of the number of plies is 30~50 layers.
Preferably, the stress release layer with a thickness of 160~480nm.
On the other hand, the embodiment of the invention also provides a kind of preparation method of the epitaxial wafer of light emitting diode, the systems Preparation Method includes:
One substrate is provided；
Successively grown buffer layer, u-shaped GaN layer, stress release layer, n-type GaN layer, luminescent layer, electronics resistance over the substrate Barrier and p-type GaN layer, wherein the buffer layer is AlN layers, and the luminescent layer includes the first of alternately laminated setting InxGa(1-x)N layers and GaN layer, the stress release layer include the InN layer and the second InGaN layer of alternately laminated setting, the InN Layer, 0 < x < 1 identical with the number of plies of second InGaN layer.
Further, InN layers of the growth temperature is 800 DEG C~900 DEG C.
Preferably, the growth temperature of second InGaN layer is 800 DEG C~900 DEG C.
Optionally, InN layers of the growth pressure is 300~400mbar.
Optionally, the growth pressure of second InGaN layer is 300~400mbar.
Technical solution provided in an embodiment of the present invention have the benefit that by buffer layer be AlN layers, luminescent layer For the first InxGa(1-x)Stress release layer is set in the epitaxial wafer of N layers and the alternate periodic structure of GaN layer, stress release layer includes The InN layer and the second InGaN layer of alternately laminated setting, InN layers identical with the number of plies of the second InGaN layer, due to InN layers and second The lattice of InGaN layer is bigger than the lattice of u-shaped GaN layer, therefore stress release layer can generate the parallel u-shaped in direction to u-shaped GaN layer The surface of GaN layer and outside tension, to slow down the warpage of epitaxial wafer, simultaneously because InN layers of lattice is greater than the 2nd InGaN The lattice of layer, by InN layer of alternating growth and the second InGaN layer, can make stress release layer to the tension of u-shaped GaN layer with The increase of the number of alternating growth and be gradually increased, to gradually decrease the warpage of epitaxial wafer, the surface of final stress releasing layer It can gradually tend to be flat, so that it is guaranteed that when growing luminescent layer, the first In in luminescent layerxGa(1-x)N layers of In uniform doping, keeps away Exempt from the emission wavelength of different zones and brightness meeting different problems on epitaxial wafer occur, is conducive to the quality for promoting LED.
Detailed description of the invention
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other Attached drawing.
Fig. 1 is a kind of structural schematic diagram of the epitaxial wafer of light emitting diode provided in an embodiment of the present invention；
Fig. 2 is a kind of flow chart of the preparation method of the epitaxial wafer of light emitting diode provided in an embodiment of the present invention；
Fig. 3 is the flow chart of the preparation method of the epitaxial wafer of another light emitting diode provided in an embodiment of the present invention；
Fig. 4~Fig. 8 is the structural schematic diagram in the epitaxial wafer manufacturing process of light emitting diode provided in an embodiment of the present invention；
Fig. 9 is schematic cross-section of existing epitaxial wafer after the completion of light emitting layer grown；
Figure 10 is a kind of schematic cross-section of the epitaxial wafer provided in an embodiment of the present invention after the completion of light emitting layer grown；
Figure 11~Figure 12 is the structural representation in the epitaxial wafer manufacturing process of light emitting diode provided in an embodiment of the present invention Figure；
Figure 13 is the structural schematic diagram of existing LED a kind of；
Figure 14 is the structural schematic diagram of LED using the epitaxial wafer preparation in the embodiment of the present invention a kind of.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to embodiment party of the present invention Formula is described in further detail.
Fig. 1 is a kind of structural schematic diagram of the epitaxial wafer of light emitting diode provided in an embodiment of the present invention, as shown in Figure 1, The epitaxial wafer includes substrate 10 and the buffer layer 20, u-shaped GaN layer 30, the stress release layer 40, N-shaped that are sequentially laminated on substrate 10 GaN layer 50, luminescent layer 60, electronic barrier layer 70 and p-type GaN layer 80, wherein buffer layer 20 is AlN layers, and luminescent layer 60 includes handing over For the first In being stackedxGa(1-x)N layer 61 and GaN layer 62, stress release layer 40 include the InN layer 41 of alternately laminated setting With the second InGaN layer 42, InN layer 41 is identical with the number of plies of the second InGaN layer 42,0 < x < 1.
The embodiment of the present invention is provided by being AlN layers in buffer layer, and luminescent layer is the first InxGa(1-x)N layers and GaN layer friendship Stress release layer is set in the epitaxial wafer of the periodic structure replaced, and stress release layer includes the InN layer and second of alternately laminated setting InGaN layer, InN layers identical with the number of plies of the second InGaN layer, since the lattice of InN layers and the second InGaN layer is than u-shaped GaN layer Lattice is big, thus stress release layer u-shaped GaN layer can be generated the parallel u-shaped GaN layer in direction surface and outside tension, from And slow down the warpage of epitaxial wafer, simultaneously because InN layers of lattice is greater than the lattice of the second InGaN layer, pass through InN layers of alternating growth With the second InGaN layer, can make stress release layer to the tension of u-shaped GaN layer with the increase of the number of alternating growth and gradually Increase, to gradually decrease the warpage of epitaxial wafer, the surface of final stress releasing layer can gradually tend to be flat, so that it is guaranteed that in life When long luminescent layer, the first In in luminescent layerxGa(1-x)N layers of In uniform doping avoids the occurrence of shining for different zones on epitaxial wafer Wavelength and brightness meeting different problems, are conducive to the quality for promoting LED.
It should be noted that Fig. 1 is merely illustrative, not to limit the first InxGa(1-x)The layer of N layer 61 and GaN layer 62 Number, the number of plies of InN layer 41 and the second InGaN layer 42, in other embodiments, the first InxGa(1-x)The layer of N layer 61 and GaN layer 62 Number can be more or less, and the number of plies of InN layer 41 and the second InGaN layer 42 can be more or less.
When realization, substrate can be Sapphire Substrate.
Preferably, stress release layer includes InN layers of multilayer and the second InGaN layer of multilayer, InN layers and the second InGaN layer structure At InN/InGaN superlattice structure, the InN layer and the second InGaN layer that multiple periods are arranged are conducive to gradually discharge in epitaxial wafer Stress, reduce the warpage degree of epitaxial wafer.
Optionally, InN layers and the alternate periodicity of the second InGaN layer can be 30~50, if InN layers and the 2nd InGaN The alternate periodicity of layer is too small, is not enough to be completely counterbalanced by the warpage of u-shaped GaN layer, if InN layers alternately all with the second InGaN layer Issue is excessive, may cause the one side warpage of the separate substrate of finally formed stress release layer.
Preferably, InN layers of thickness can be 5~8nm.If InN layers of thickness is too small, need to be arranged the more period The warpage that u-shaped GaN layer could be eliminated will increase manufacture difficulty, reduce production efficiency.In the thickness of the second InGaN layer and total In the case that the number of plies is certain, if InN layers of thickness is excessive, the overall thickness that will lead to stress release layer is excessive, to increase outer Prolong the overall thickness of piece.
Preferably, the thickness of the second InGaN layer can be 5~8nm.If the thickness of the second InGaN layer is too small, need to set The warpage of u-shaped GaN layer could be eliminated by setting the more period, will increase manufacture difficulty, reduce production efficiency.In InN layers of thickness And in the case that the total number of plies is certain, if the thickness of the second InGaN layer is excessive, the total thickness that will lead to stress release layer is spent Greatly, to increase the overall thickness of epitaxial wafer.
Optionally, the thickness of stress release layer can be 160~480nm.
In growth stress releasing layer, the thickness of the second InGaN layer and InN layers should be paid the utmost attention to, in the second InGaN layer and In the case that InN layers of thickness determines, the warpage of epitaxial wafer is gradually eliminated by changing periodicity.
It should be noted that the second InGaN layer and InN layers of thickness can be the same or different.
Optionally, in p-type GaN layer, the doping concentration of Mg can be 1E19cm-3~1E20cm-3.The doping concentration of Mg drops It is low to be conducive to improve crystal quality, the resistance of p-type GaN layer is reduced, and be conducive to the transmission in hole, so as to improve electricity Son and combined efficiency of the hole in luminescent layer, are improved luminous efficiency.But if the doping concentration of Mg in p-type GaN layer It is too low, then it will increase the resistance of p-type GaN layer again, be unfavorable for the transmission in hole, also will increase positive operating voltage.
Optionally, the thickness of p-type GaN layer can be 50~100nm.If p-type GaN layer is blocked up, the resistance meeting of p-type GaN layer Increase, causes forward voltage to increase, if the thickness of p-type GaN layer is excessively thin, is unfavorable for the extending transversely of electric current, electric current is caused to gather around It squeezes.
Preferably, the thickness of buffer layer can be 20nm~40nm, and the thickness of buffer layer is different, finally formed epitaxial layer Quality also can be different, if the thickness of buffer layer is excessively thin, the surface that will lead to buffer layer is more loose and coarse, after cannot being The growth of continuous structure provides a good template, and with the increase of buffer layer thickness, the surface of buffer layer gradually becomes more to cause It is close and smooth, be conducive to the growth of subsequent structural, if but the thickness of buffer layer is blocked up, will lead to the surface of buffer layer excessively Densification is equally unfavorable for the growth of subsequent structural, and the lattice defect that can not be reduced in epitaxial layer can be buffer layer.
Optionally, electronic barrier layer can be p-type AlGaN electronic barrier layer.
Fig. 2 is a kind of flow chart of the preparation method of the epitaxial wafer of light emitting diode provided in an embodiment of the present invention, such as Fig. 2 Shown, which includes:
S11: a substrate is provided.
S12: successively grown buffer layer, u-shaped GaN layer, stress release layer, n-type GaN layer, luminescent layer, electronics resistance on substrate Barrier and p-type GaN layer.
Wherein, buffer layer is AlN layers, and luminescent layer includes the first In of alternately laminated settingxGa(1-x)N layers and GaN layer, are answered Power releasing layer includes the InN layer and the second InGaN layer of alternately laminated setting, and InN layers identical with the number of plies of the second InGaN layer, 0 < X < 1.
The embodiment of the present invention is provided by being AlN layers in buffer layer, and luminescent layer is the first InxGa(1-x)N layers and GaN layer friendship Stress release layer is set in the epitaxial wafer of the periodic structure replaced, and stress release layer includes the InN layer and second of alternately laminated setting InGaN layer, InN layers identical with the number of plies of the second InGaN layer, since there are crystal lattice difference, InN between InN layers and u-shaped GaN layer There is also certain crystal lattice differences between layer and the second InGaN layer, in InN layers of alternating growth and the second InGaN layer, stress release Stress can be generated in layer makes stress release layer generate the warpage with u-shaped GaN layer opposite direction, due to stress release layer generation and u The opposite warpage of type GaN layer, cancels out each other between the two, therefore the surface of stress release layer can gradually tend to be flat, thus really Protect the first In in luminescent layer when growing luminescent layerxGa(1-x)N layers of In uniform doping, avoids the occurrence of different zones on epitaxial wafer Emission wavelength and brightness can different problems, be conducive to promoted LED quality.
Fig. 3 is the flow chart of the preparation method of the epitaxial wafer of another light emitting diode provided in an embodiment of the present invention, under Face is described in detail in conjunction with 4~11 couples of Fig. 3 of attached drawing preparation method provided:
S21: a substrate is provided.
When realization, which can be Sapphire Substrate, and Sapphire Substrate is a kind of common substrate, and preparation process is more It is mature.
In the step s 21, Sapphire Substrate can be pre-processed, Sapphire Substrate is placed in reaction chamber, to indigo plant Jewel substrate carries out annealing 8~10 minutes.
Specifically, annealing temperature can be 1000~1100 DEG C, and annealing pressure can be 100~300mbar, anneal When processing, H is passed through with the speed of 100L/min~130L/min into reaction chamber2, to be made annealing treatment in a hydrogen atmosphere.
S22: it is epitaxially grown on the substrate buffer layer.
As shown in figure 4, the growing AIN buffer layer 20 on substrate 10.
Wherein, the thickness of AlN buffer layer 20 can be 20nm~40nm, and the thickness of the AlN buffer layer 20 of growth is different, most End form at the quality of epitaxial layer also can be different, if the thickness of AlN buffer layer 20 is excessively thin, will lead to the table of AlN buffer layer 20 Face is more loose and coarse, a good template cannot be provided for the growth of subsequent structural, with the increasing of 20 thickness of AlN buffer layer Add, the surface of AlN buffer layer 20 gradually becomes comparatively dense and smooth, is conducive to the growth of subsequent structural, if but AlN buffering The thickness of layer 20 is blocked up, then the surface that will lead to AlN buffer layer 20 is excessively fine and close, is equally unfavorable for the growth of subsequent structural, nothing Method reduces the lattice defect in epitaxial layer.
The growth temperature of AlN buffer layer 20 can be 1050~1200 DEG C, and growth pressure can be 100~200mbar.
Preferably, after step s 22, nitrogen treatment can also be carried out to AlN buffer layer 20.
Specifically, the temperature in adjustable reaction chamber is to 900~1200 DEG C, keep the pressure in reaction chamber be 100~ 300mbar controls NH3Flow be 10000~20000sccm.
S23: u-shaped GaN layer is grown on the buffer layer.
As shown in figure 5, growing u-shaped GaN layer 30 on AlN buffer layer 20.
When realization, the thickness of u-shaped GaN layer 30 can be 2 μm~4 μm, if the thickness of u-shaped GaN layer 30 is excessively thin, after will increase Dislocation density in the structure of continuous growth, the thickness of u-shaped GaN layer 30 is blocked up, will increase the forward resistance of epitaxial wafer.
Specifically, when growing u-shaped GaN layer 30, it can control NH3Flow be 30000~40000sccm, trimethyl gallium Flow be 200~400sccm, H2Flow be 100~130L/min.
The growth temperature of u-shaped GaN layer 30 can be 900~1200 DEG C, and growth pressure can be 300~600mbar.
S24: the growth stress releasing layer in u-shaped GaN layer.
As shown in fig. 6, the growth stress releasing layer 40 in u-shaped GaN layer 30, wherein stress release layer 40 includes alternately laminated The multilayer InN layer 41 and the second InGaN layer of multilayer 42 of setting, multilayer InN layer 41 and the second InGaN layer of multilayer 42 constitute InN/ InGaN superlattice structure.The InN layer 41 and the second InGaN layer 42 that multiple periods are arranged are conducive to gradually discharge in epitaxial wafer Stress reduces the warpage degree of epitaxial wafer.
Step S24 may include:
InN layer 41 is grown in u-shaped GaN layer 30.
Two InGaN layer 42 of growth regulation on InN layer 41.
InN layer 41 is grown in the second InGaN layer 42.
Two InGaN layer 42 of growth regulation and InN layer 41 are alternately repeated to constitute InN/InGaN superlattice structure.
Wherein, the thickness of InN layer 41 can be 5~8nm.If the thickness of InN layer 41 is too small, need to be arranged more week Phase could eliminate the warpage of u-shaped GaN layer 30, if the thickness of InN layer 41 is excessive, the total thickness that will lead to stress release layer 40 is spent Greatly, to increase the overall thickness of epitaxial wafer.
Further, when growing InN layer 41, it can control NH3Flow be 30000~60000sccm, trimethyl indium Flow is 1000~1500sccm, N2Flow be 100~130L/min.
The growth temperature of InN layer 41 can be 800~900 DEG C, and growth pressure can be 300~400mbar.
The thickness of second InGaN layer 42 can be 5~8nm.If the thickness of the second InGaN layer 42 is too small, need to be arranged The more period could eliminate the warpage of u-shaped GaN layer 30, if the thickness of the second InGaN layer 42 is excessive, will lead to stress release The overall thickness of layer 40 is excessive, to increase the overall thickness of epitaxial wafer.
It should be noted that the thickness of the second InGaN layer 42 and InN layer 41 can be the same or different.
Further, when two InGaN layer 42 of growth regulation, it can control NH3Flow be 30000~60000sccm, front three The flow of base gallium is 20~50sccm, and the flow of trimethyl indium is 1000~1500sccm, N2Flow be 100~130L/ min。
The growth temperature of second InGaN layer 42 can be 800~900 DEG C, and growth pressure can be 300~400mbar.
It, can be with alternating growth InN layer 41 and the second InGaN layer 42 each 30~50 times, if InN layer 41 and second when realization The alternate periodicity of InGaN layer 42 is too small, is not enough to be completely counterbalanced by the warpage of u-shaped GaN layer 60, if InN layer 41 and second The alternate periodicity of InGaN layer 42 is excessive, and the one side that may cause the separate substrate 10 of finally formed stress release layer 40 produces Raw warpage.
Optionally, the overall thickness of stress release layer 40 can be 160~480nm.
It should be noted that InN layer 41 can be first grown in u-shaped GaN layer 30 in growth stress releasing layer 40, The second InGaN layer 42 can be first grown in u-shaped GaN layer 30.
S25: the growing n-type GaN layer on stress release layer.
As shown in fig. 7, the growing n-type GaN layer 50 on stress release layer 40.
Specifically, n-type GaN layer may include the first N-shaped GaN sublayer 51 and the second N-shaped GaN sublayer 52.
Step S25 may include:
The one N-shaped GaN sublayer 51 of growth regulation on stress release layer 40.
The two N-shaped GaN sublayer 52 of growth regulation in the first N-shaped GaN sublayer 51.
Wherein, the thickness of the first N-shaped GaN sublayer 51 can be 3~4 μm.
Further, when one N-shaped GaN sublayer 51 of growth regulation, it can control NH3Flow be 30000~60000sccm, The flow of trimethyl gallium is 200~400sccm, H2Flow be 100~130L/min, SiH4Flow be 20~50sccm.
The growth temperature of first N-shaped GaN sublayer 51 can be 800~900 DEG C, growth pressure can for 300~ 400mbar。
Optionally, the Si doping concentration in the first N-shaped GaN sublayer 51 can be 5E18cm-3~1E19cm-3。
The thickness of second N-shaped GaN sublayer 52 can be 200~400nm.
Further, when two N-shaped GaN sublayer 52 of growth regulation, it can control NH3Flow be 30000~60000sccm, The flow of trimethyl gallium is 200~400sccm, H2Flow be 100~130L/min, SiH4Flow be 2~10sccm.
The growth temperature of second N-shaped GaN sublayer 52 can be 800~900 DEG C, growth pressure can for 300~ 400mbar。
Optionally, the Si doping concentration in the second N-shaped GaN sublayer 52 can be 5E17cm-3~1E18cm-3。
S26: luminescent layer is grown in n-type GaN layer.
As shown in figure 8, growing luminescent layer 60 in n-type GaN layer 50.
When realization, luminescent layer 60 may include alternately stacked the first In of multilayerxGa(1-x)N layer 61 and multilayer GaN layer 62, Wherein 0 < x < 1, preferably 0.2 < x < 0.25.First InxGa(1-x)N layer 61 and the alternately stacked periodicity of GaN layer 62 can be 7~15.
It should be noted that illustrating only the part-structure in luminescent layer 40 in Fig. 8, it is not limited to first InxGa(1-x)N layer 61 and the alternately stacked periodicity of GaN layer 62 can also be first in N-shaped GaN furthermore when growing luminescent layer 40 GaN layer 62 is grown on layer 50.
Specifically, one In of growth regulationxGa(1-x)When N layer 61, NH can control3Flow be 50000~70000sccm, three The flow of methyl gallium is 20~40sccm, and the flow of trimethyl indium is 1500~2000sccm, N2Flow be 100~130L/ min。
Optionally, the first InxGa(1-x)The thickness of N layer 61 can be 2.5~3.5nm.
First InxGa(1-x)The growth temperature of N layer 61 can be 700~750 DEG C, growth pressure can for 300~ 400mbar。
Specifically, when growing GaN layer 62, it can control NH3Flow be 50000~70000sccm, the stream of trimethyl gallium Amount is 20~100sccm, N2Flow be 100~130L/min.
Optionally, the thickness of GaN layer 62 can be 8~15nm.
The growth temperature of GaN layer 62 can be 750~850 DEG C, and growth pressure can be 300~400mbar.
Fig. 9 is schematic cross-section of existing epitaxial wafer after the completion of light emitting layer grown, and Figure 10 is that the embodiment of the present invention provides A kind of schematic cross-section of epitaxial wafer after the completion of light emitting layer grown, epitaxial wafer as shown in Figure 9, including substrate 10a, buffering Layer 20a, u-shaped GaN layer 30a, n-type GaN layer 50a and luminescent layer 60a, the warpage degree of epitaxial wafer gradually increase along the direction of growth Greatly, comparison diagram 9 and Figure 10 are it is found that the warpage degree of the luminescent layer 60 in the application is effectively reduced.
S27: electronic barrier layer is grown on the light-emitting layer.
As shown in figure 11, p-type AlGaN electronic barrier layer 70 is grown on luminescent layer 60.
When realization, the thickness of p-type AlGaN electronic barrier layer 70 can be 50nm~100nm, if p-type AlGaN electronic blocking The thickness of layer 70 is excessively thin, can reduce the barrier effect to electronics, if the thickness of p-type AlGaN electronic barrier layer 70 is blocked up, can increase Add the absorption of the meeting light of p-type AlGaN electronic barrier layer 70, is reduced so as to cause the brightness of LED.
Specifically, when growing p-type AlGaN electronic barrier layer 70, it can control NH3Flow be 50000~ 70000sccm, the flow of trimethyl gallium are 30~60sccm, H2Flow be 100~130L/min, the flow of trimethyl aluminium is The flow of 100~130sccm, two luxuriant magnesium are 1000~1300sccm.
The growth temperature of p-type AlGaN electronic barrier layer 70 can be 900~950 DEG C, growth pressure can for 200~ 400mbar。
Optionally, the Mg doping concentration in p-type AlGaN electronic barrier layer 70 can be 1E19cm-3~1E20cm-3, Al's Concentration can be 1E20cm-3~3E20cm-3。
S28: p-type GaN layer is grown on electronic barrier layer.
As shown in figure 12, p-type GaN layer 80 is grown on p-type AlGaN electronic barrier layer 70.
Specifically, the thickness of p-type GaN layer 80 can be 50nm~100nm.
Specifically, when growing p-type GaN layer 80, it can control NH3Flow be 50000~70000sccm, trimethyl gallium Flow be 20~100sccm, H2Flow be 100~130L/min, the flow of two luxuriant magnesium is 1000~3000sccm.
The growth temperature of p-type GaN layer 80 can be 950~1000 DEG C, and growth pressure can be 400~900mbar.
Optionally, the Mg doping concentration in p-type GaN layer 80 can be 1E19cm-3~1E20cm-3.The doping concentration of Mg drops It is low to be conducive to improve crystal quality, the resistance of p-type GaN layer 80 is reduced, and be conducive to the transmission in hole, so as to improve Combined efficiency of the electrons and holes in luminescent layer, is improved luminous efficiency.But if the doping of Mg is dense in p-type GaN layer It spends low, then will increase the resistance of p-type GaN layer again, be unfavorable for the transmission in hole, also will increase positive operating voltage.
S29: by reaction chamber in 650~680 DEG C of 20~30min of heat preservation, heating system is closed later and to gas system, to anti- Chamber temperature is answered to be reduced to room temperature.
After the production for completing transparency conducting layer, follow-up process can be carried out to epitaxial wafer, to prepare LED.
Figure 13 is the structural schematic diagram of existing LED a kind of, and Figure 14 is a kind of epitaxial wafer using in the embodiment of the present invention The structural schematic diagram of the LED of preparation, two kinds of LED are all made of 2 inches of epitaxial wafers and are made, and the transparency conducting layer 90 in two kinds of LED is equal For the indium tin oxide layer of 150nm, and preparation process is identical, and 110 material of electrode in two kinds of LED is identical, is Cr/Pt/Au electricity Pole, thickness is 1500nm, and preparation process is identical, and the protective layer 120 in two kinds of LED is the SiO of 100nm2, two kinds of LED Size it is identical, be 25mil × 25mil, choose epitaxial wafer in 42 inches of the embodiment of the present invention and 42 inches are existing Some epitaxial wafers are packaged into white light LEDs under identical packaging technology using identical cutting technique, under 350mA electric current into Row test.The following table 1 is the test result statistical form of existing epitaxial wafer and epitaxial wafer of the invention, and table 2 is existing epitaxial wafer The test result statistical form of the test result of the LED of production and the LED of epitaxial wafer of the invention production, the test of epitaxial wafer are light Photoluminescence test, the test of LED are electroluminescent test, and every numerical value in table 2 is multiple LED of same epitaxial wafer production Average value, such as 5011 crystal grain of No. 1 epitaxial wafer indicate that No. 1 epitaxial wafers are divided into 5011 crystal grain and are fabricated to 5011 LED is tested, and the emission wavelength average value of this 5011 LED is 450.9nm.
From the above data, using the LED of the epitaxial wafer preparation in the present invention, wavelength concentration is improved, bright Degree has also obtained certain promotion, effectively increases the quality of LED.
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all in spirit of the invention and Within principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.

Claims (9)

1.一种发光二极管的外延片，其特征在于，所述外延片包括衬底和依次层叠在所述衬底上的缓冲层、u型GaN层、应力释放层、n型GaN层、发光层、电子阻挡层和p型GaN层，其中，所述缓冲层为AlN层，所述发光层包括交替层叠设置的多层第一InxGa(1-x)N层和多层GaN层，所述应力释放层包括交替层叠设置的InN层和第二InGaN层，所述InN层和所述第二InGaN层的层数相同，0＜x＜1；所述应力释放层的厚度为160～480nm。1. an epitaxial wafer of a light-emitting diode, characterized in that the epitaxial wafer comprises a substrate and a buffer layer, a u-type GaN layer, a stress release layer, an n-type GaN layer, a light-emitting layer stacked on the substrate in turn , an electron blocking layer, and a p-type GaN layer, wherein the buffer layer is an AlN layer, and the light emitting layer includes multiple layers of first In x Ga (1-x) N layers and multiple layers of GaN layers that are alternately stacked. The stress release layer includes alternately stacked InN layers and second InGaN layers, the InN layers and the second InGaN layers have the same number of layers, 0<x<1; the thickness of the stress release layer is 160-480nm . 2.根据权利要求1所述的外延片，其特征在于，所述InN层的厚度为5～8nm。2 . The epitaxial wafer according to claim 1 , wherein the thickness of the InN layer is 5-8 nm. 3 . 3.根据权利要求1所述的外延片，其特征在于，所述第二InGaN层的厚度为5～8nm。3 . The epitaxial wafer according to claim 1 , wherein the thickness of the second InGaN layer is 5-8 nm. 4 . 4.根据权利要求1或2所述的外延片，其特征在于，所述InN层的层数为30～50层。4 . The epitaxial wafer according to claim 1 , wherein the number of the InN layers is 30 to 50 layers. 5 . 5.一种发光二极管的外延片的制备方法，其特征在于，所述制备方法包括：5. A preparation method of an epitaxial wafer of a light-emitting diode, wherein the preparation method comprises: 提供一衬底；providing a substrate; 在所述衬底上依次生长缓冲层、u型GaN层、应力释放层、n型GaN层、发光层、电子阻挡层和p型GaN层，其中，所述缓冲层为AlN层，所述发光层包括交替层叠设置的第一InxGa(1-x)N层和GaN层，所述应力释放层包括交替层叠设置的InN层和第二InGaN层，所述InN层和所述第二InGaN层的层数相同，0＜x＜1；所述应力释放层的厚度为160～480nm。A buffer layer, a u-type GaN layer, a stress release layer, an n-type GaN layer, a light-emitting layer, an electron blocking layer and a p-type GaN layer are grown on the substrate in sequence, wherein the buffer layer is an AlN layer, and the light-emitting layer is an AlN layer. The layers include alternately stacked first InxGa (1-x) N layers and GaN layers, and the stress relief layer includes alternately stacked InN layers and second InGaN layers, the InN layers and the second InGaN layers The number of layers is the same, 0<x<1; the thickness of the stress release layer is 160-480 nm. 6.根据权利要求5所述的制备方法，其特征在于，所述InN层的生长温度为800℃～900℃。6 . The preparation method according to claim 5 , wherein the growth temperature of the InN layer is 800° C.˜900° C. 7 . 7.根据权利要求5所述的制备方法，其特征在于，所述第二InGaN层的生长温度为800℃～900℃。7 . The preparation method according to claim 5 , wherein the growth temperature of the second InGaN layer is 800° C.˜900° C. 8 . 8.根据权利要求5所述的制备方法，其特征在于，所述InN层的生长压力为300～400mbar。8 . The preparation method according to claim 5 , wherein the growth pressure of the InN layer is 300-400 mbar. 9 . 9.根据权利要求5所述的制备方法，其特征在于，所述第二InGaN层的生长压力为300～400mbar。9 . The preparation method according to claim 5 , wherein the growth pressure of the second InGaN layer is 300-400 mbar. 10 .
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