CN107015387A - A kind of measurement circuit for array base palte - Google Patents
A kind of measurement circuit for array base palte Download PDFInfo
- Publication number
- CN107015387A CN107015387A CN201710356742.1A CN201710356742A CN107015387A CN 107015387 A CN107015387 A CN 107015387A CN 201710356742 A CN201710356742 A CN 201710356742A CN 107015387 A CN107015387 A CN 107015387A
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- Prior art keywords
- metal
- metal routing
- layer
- measurement circuit
- base palte
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/1306—Details
- G02F1/1309—Repairing; Testing
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Liquid Crystal (AREA)
Abstract
The present invention provides a kind of measurement circuit for array base palte, the measurement circuit includes a plurality of first, second test stub, the a plurality of first test stub is arranged at the gate electrode side of array base palte, the a plurality of second test stub is arranged at the source side of array base palte, layer where a plurality of grid line of the array base palte is defined as the first metal layer, layer where a plurality of data lines of the array base palte is defined as second metal layer, and the measurement circuit further comprises a plurality of first, second metal routing；Each first test stub is connected to each grid line by each first metal routing, and each second test stub is connected to each data wire by each second metal routing；Wherein described first, second metal routing is respectively positioned on the first metal layer or second metal layer；After detection is lighted in the power-up that the measurement circuit carries out the array base palte, first, second metal routing region is cut by laser.
Description
Technical field
The present invention relates to field of liquid crystal display, more particularly to a kind of measurement circuit for array base palte.
Background technology
Liquid crystal display panel is most important element in liquid crystal display device, and it generally includes thin film transistor (TFT) (Thin
Film Transistor, TFT) substrate, colored filter (Color Filter, CF) substrate and it is folded between two substrates
Liquid crystal layer.Wherein, multi-strip scanning line, a plurality of data lines, multiple pixel electrodes and multiple into square are provided with array base palte
The thin film transistor (TFT) of battle array arrangement etc. all kinds of electronic components.In order to ensure the electrical connection of all kinds of electronic components on array base palte
Relation is correct, and industry can set test stub in the edge of array base palte in the lump generally when manufacturing array base palte
(shorting bar), to carry out cell sections of power-up before modularity using stub is tested and light detection, is then detected
The test stub on the array base palte in liquid crystal display panel is cut off after finishing, then liquid crystal display panel is sent into carry out modularity
(Module sections).
Generally, test stub will be arranged at danger signal line R, green line G and the blueness of the source side of array base palte
Signal wire B (test for corresponding to RGB R/G./B respectively) is shorted together respectively.In addition, the grid that array base palte will be arranged at
Odd signals line, the even signal line of side are shorted together respectively.So, after detection is lighted in the power-up for carrying out cell sections,
It is accomplished by disconnecting test stub by laser cutting.
The wire structures of stub are tested for shown in Fig. 1.Wherein, layer where gate electrode side cabling is defined as the first metal layer M1,
Layer where test stub lead-out wire is defined as second metal layer M2；Layer where source side cabling is defined as second metal layer M2, surveys
Layer where examination stub lead-out wire is defined as the first metal layer M1.When being cut by laser, raster data model side needs cut-out
One metal level M1, data-driven side needs cut-out second metal layer M2.But between the first metal layer M1 and second metal layer M2
Gate insulator (i.e. gate insulator layers), due to laser cutting M1 with the focus condition required for M2 be it is different,
Laser power is also different, therefore, has easily caused and can't cut in the case of same laser-configured (laser recipe)
The risk of gate electrode side cabling or source side cabling, and the production operation time (tact of board can then be increased using different configurations
time)。
Therefore, a kind of new measurement circuit of offer is needed badly to solve the above problems.
The content of the invention
It is an object of the present invention to provide a kind of measurement circuit for array base palte, it using grid by being sidled
Line mode is realized required when cutting the data wire of the grid line of gate electrode side or source side using source side cabling mode
Focusing it is identical, and laser power is identical, so as to ensure to cut yield.
The present invention provides a kind of measurement circuit for array base palte, and the measurement circuit includes a plurality of first test stub
With a plurality of second test stub, a plurality of first test stub is arranged at the gate electrode side of array base palte, and described a plurality of second surveys
Examination stub is arranged at the source side of array base palte, and layer where a plurality of grid line of the array base palte is defined as the first metal layer, institute
Layer where stating a plurality of data lines of array base palte is defined as second metal layer, and the measurement circuit further comprises a plurality of first gold medal
Belong to cabling and a plurality of second metal routing；Each first test stub is connected to often by each first metal routing
Grid line described in one, each second test stub is connected to each data wire by each second metal routing；
Wherein described first metal routing and second metal routing are respectively positioned on the first metal layer, or first metal routing and
Second metal routing is respectively positioned on second metal layer；Detection is lighted in the power-up for carrying out the array base palte in the measurement circuit
Afterwards, the first metal routing and the second metal routing region are cut by laser.
In one embodiment of this invention, material phase used in first metal routing and second metal routing
Together.
In one embodiment of this invention, layer where the first test stub and the second test stub place layer are equal
It is different from layer where the first metal routing；Or, layer where layer where the first test stub and the second test stub
It is different from layer where the second metal routing.
In one embodiment of this invention, first metal routing and second metal routing are respectively positioned on the first metal
During layer, a plurality of grid line institute of material used in first metal routing and second metal routing and the array base palte
The material used is identical.
In another embodiment of the invention, first metal routing and second metal routing are respectively positioned on the second gold medal
When belonging to layer, many datas of material used in first metal routing and second metal routing and the array base palte
Material is identical used in line.
In one embodiment of this invention, the data wire includes danger signal line, green line and blue signal line,
And according to a pre-order spread configuration.
In one embodiment of this invention, the grid line includes odd number grid line and even number grid line, and presetting suitable according to one
Sequence spread configuration.
The present invention also provides a kind of liquid crystal display panel, and the liquid crystal display panel includes viewing area and positioned at described aobvious
Show the outer peripheral areas of area periphery, the outer peripheral areas includes above-mentioned measurement circuit.
It is an advantage of the current invention that the present invention passes through using gate electrode side cabling mode or using source side cabling mode
(i.e. on the basis of the cabling of side, opposite side cabling enters walking line switching) realizes grid line or source side in cutting gate electrode side
Required focusing is identical during data wire, and laser power is identical, so that ensure to cut yield, and when avoiding increase production operation
Between the problem of.
Brief description of the drawings
Fig. 1 is the connection diagram for testing stub in the prior art；
Fig. 2A and Fig. 2 B are respectively the wires design schematic diagram and source side of the test stub of gate electrode side in the prior art
Test stub wires design schematic diagram；
Fig. 3 A and Fig. 3 B are respectively that the wiring of the grid side test stub of the measurement circuit of the first embodiment of the present invention is set
The schematic diagram of the wires design of meter and source electrode side test stub；
Fig. 4 A and Fig. 4 B are respectively the first metal routing and grid line in the measurement circuit of first embodiment of the present invention
The schematic diagram of connection and the schematic diagram of the second metal routing and data wire connection；
Fig. 5 A and Fig. 5 B are respectively that the wiring of the grid side test stub of the measurement circuit of the second embodiment of the present invention is set
The schematic diagram of the wires design of meter and source electrode side test stub；
Fig. 6 A and Fig. 6 B are respectively the first metal routing and grid line in the measurement circuit of second embodiment of the present invention
The schematic diagram of connection and the schematic diagram of the second metal routing and data wire connection.
Embodiment
The embodiment of the measurement circuit provided below in conjunction with the accompanying drawings the present invention elaborates.
Liquid crystal display panel includes viewing area and the outer peripheral areas positioned at viewing area periphery.Wherein, in liquid crystal
The viewing area of display panel includes a plurality of orthogonal data wire and grid line, shown in Figure 1.The data wire includes red
Chrominance signal line, green line and blue signal line, and (order is, for example, danger signal line R1, green according to a pre-order
Chrominance signal line G1 and blue signal line B1, but not limited to this, can also be sequentially green line G1, blue signal line B1, red
Chrominance signal line R1) spread configuration.The grid line includes odd number grid line and even number grid line, and according to a pre-order (order example
It is such as odd number grid line ODD, even number grid line EVEN, sequentially can also is even number grid line, odd number grid line still) spread configuration.Separately
Outside, the outer peripheral areas typically may include measurement circuit.
The present invention provides a kind of measurement circuit for array base palte, specifically as shown in Fig. 3 A to Fig. 6 B.
With reference to shown in Fig. 1 to 2B, the measurement circuit includes a plurality of first test stub 111 and a plurality of second test
Stub 112, a plurality of first test stub 111 is arranged at the source side of array base palte, a plurality of second test stub 112
It is arranged at the gate electrode side of array base palte.Generally, the place layer of a plurality of grid line 131 of the array base palte is defined as first
Metal level M1, the place layer of a plurality of data lines 132 of the array base palte is defined as second metal layer M2.And, the first metal layer M1
It is different layers with second metal layer M2.It is gate insulator 140 between the first metal layer M1 and second metal layer M2.
Referring to shown in Fig. 3 A, 3B, 5A, 5B, the measurement circuit further comprises a plurality of first metal routing 121 and a plurality of
Second metal routing 122；Each first test stub 111 is connected to each by each first metal routing 121
The grid line 131 (G1, G2, G3, G4 in such as Fig. 5 A), each second test stub 112 passes through each second gold medal
Category cabling 122 is connected to each data wire 132 (R1, G1, B1, R2 in such as Fig. 3 B).Wherein described first metal routing
121 and second metal routing 122 be respectively positioned on the first metal layer M1 (as shown in Figure 4 A and 4 B shown in FIG.), or first metal
Cabling 121 and second metal routing 122 are respectively positioned on second metal layer M2 (as shown in Fig. 6 A and Fig. 6 B).That is, the
One metal routing 121 is located at same layer with the second metal routing 122 and material is identical.So, when the measurement circuit carries out institute
State array base palte power-up light detection after, to the first metal routing 121 and the region of the second metal routing 122 (as schemed
151,152 shown in 3A, 3B) it is cut by laser, the medium in laser beam path is identical (for example, being first insulating barrier
140 the first metal layer M1 again, or, it is first second metal layer M2 insulating barriers 140 again), therefore identical can be used to focus on
And laser power.So, it can not only ensure to cut yield, and it also avoid increasing the production operation time.Preferably, it is described
First metal routing 121 is identical with material used in second metal routing 122, so as to further improve cutting
Yield.
Referring to shown in Fig. 3 A to 4B, in the first embodiment of the present invention, in the case of keeping gate electrode side constant, by source
Pole side implements change as shown in Figure 3 B, and data wire 132 has done a cabling conversion in the second cutting zone 152.It is specific and
Speech, referring to shown in Fig. 4 B, etches a via 160 in the gate insulator 140 so that the second metal routing 122 passes through institute
State via 160 afterwards with the data wire 132 of source side to be connected, because the place layer of data wire 132 of source side is second metal layer
M2, second metal routing 122 is located at the lower section of gate insulator 140, therefore, and second metal routing 122 is located at the
One metal level M1.In the lump with reference to shown in Fig. 4 A and Fig. 4 B, when cutting gate electrode side using a default laser-configured in gate electrode side
First metal routing 121 (the first metal routing 121 and grid line 131 are located at same layer, i.e. the first metal layer M1, and at GI layers
The lower section of 140 (i.e. gate insulator layers)) after, identical laser-configured (including focusing on and power) can be used to cut
Cut in the second cutting zone 152 the second metal routing 122 (because the second metal routing 122 also is located at the first metal layer M1,
And in the lower section of GI layers 140).Therefore, prior art different layers can be not only avoided to need different focusing and laser power
Problem, and the grid line 131 of gate electrode side and the data wire 132 of source side can be cut by using same laser configuration, and
Ensure cutting yield.
Furthermore it is preferred that first metal routing 121 and second metal routing 122 are respectively positioned on the first metal layer
During M1, material used in first metal routing 121 and second metal routing 122 is a plurality of with the array base palte
Material used in grid line 131 is identical, so as to save material cost.
In addition, in the first embodiment of the invention, testing stub 111 the first of gate electrode side and being surveyed the second of source side
Examination stub 112 is respectively positioned on second metal layer M2, and the first metal routing 121 and the second metal routing 122 are respectively positioned on the first metal
Layer M1.
Referring to shown in Fig. 5 A to 6B, in second embodiment of the invention, in the case of keeping source side constant, by grid
Side implements change as shown in Figure 5A, and grid line 131 has done a cabling conversion in the first cutting zone 151.Specifically, join
As shown in Fig. 6 A, a via 160 is etched in the gate insulator 140 so that the first metal routing 121 passes through the via
Be connected with the grid line 131 of gate electrode side after 160, because the place layer of grid line 131 of gate electrode side is the first metal layer M1, described the
One metal routing 121 is located at the top of gate insulator 140, therefore, and first metal routing 121 is located at second metal layer
M2.In the lump with reference to shown in Fig. 6 A and Fig. 6 B, when cutting the second metal of source side using a default laser-configured in source side
Cabling 122 (the second metal routing 122 and data wire 132 are located at same layer, i.e. second metal layer M2, and in the upper of GI layers 140
Side) after, identical laser-configured (including focusing on and power) can be used to cut first in the first cutting zone 151
Metal routing 121 (because the first metal routing 121 also is located at second metal layer M2, and in the top of GI layers 140).Therefore, no
The problem of different focusing of prior art different layers needs and laser power can only be avoided, and can be swashed by using identical
Light configures to cut the grid line 131 of gate electrode side and the data wire 132 of source side, and ensures to cut yield.
Furthermore it is preferred that first metal routing 121 and second metal routing 122 are respectively positioned on second metal layer
During M2, material used in first metal routing 121 and second metal routing 122 is a plurality of with the array base palte
Material used in data wire 132 is identical, so as to save material cost.
In addition, in second embodiment of the invention, testing stub 111 the first of gate electrode side and being surveyed the second of source side
Examination stub 112 is respectively positioned on the first metal layer M1, and the first metal routing 121 and the second metal routing 122 are respectively positioned on the second metal
Layer M2.
Described above is only the preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art
Member, under the premise without departing from the principles of the invention, can also make some improvements and modifications, these improvements and modifications also should be regarded as
Protection scope of the present invention.
Claims (8)
1. a kind of measurement circuit for array base palte, the measurement circuit includes a plurality of first test stub and a plurality of second and surveyed
Stub is tried, a plurality of first test stub is arranged at the gate electrode side of array base palte, and a plurality of second test stub is arranged at
The source side of array base palte, layer where a plurality of grid line of the array base palte is defined as the first metal layer, the array base palte
Layer where a plurality of data lines is defined as second metal layer, it is characterised in that the measurement circuit further comprises a plurality of first gold medal
Belong to cabling and a plurality of second metal routing；Each first test stub is connected to often by each first metal routing
Grid line described in one, each second test stub is connected to each data wire by each second metal routing；
Wherein described first metal routing and second metal routing are respectively positioned on the first metal layer, or first metal routing and
Second metal routing is respectively positioned on second metal layer；Detection is lighted in the power-up for carrying out the array base palte in the measurement circuit
Afterwards, the first metal routing and the second metal routing region are cut by laser.
2. measurement circuit according to claim 1, it is characterised in that first metal routing and second metal are walked
Material is identical used in line.
3. measurement circuit according to claim 1, it is characterised in that layer and described second where the first test stub
Layer is different from layer where the first metal routing where testing stub；Or, layer and described the where the first test stub
Layer where two test stubs is different from layer where the second metal routing.
4. measurement circuit according to claim 1, it is characterised in that first metal routing and second metal are walked
When line is respectively positioned on the first metal layer, material used in first metal routing and second metal routing and the array
Material used in a plurality of grid line of substrate is identical.
5. measurement circuit according to claim 1, it is characterised in that first metal routing and second metal are walked
When line is respectively positioned on second metal layer, material used in first metal routing and second metal routing and the array
Material used in a plurality of data lines of substrate is identical.
6. measurement circuit according to claim 1, it is characterised in that the data wire includes danger signal line, green letter
Number line and blue signal line, and according to a pre-order spread configuration.
7. measurement circuit according to claim 1, it is characterised in that the grid line includes odd number grid line and even number grid line,
And according to a pre-order spread configuration.
8. a kind of liquid crystal display panel, the liquid crystal display panel includes viewing area and positioned at the outer of viewing area periphery
Enclose region, it is characterised in that the outer peripheral areas includes the measurement circuit described in claim 1~7 any one.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710356742.1A CN107015387A (en) | 2017-05-19 | 2017-05-19 | A kind of measurement circuit for array base palte |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710356742.1A CN107015387A (en) | 2017-05-19 | 2017-05-19 | A kind of measurement circuit for array base palte |
Publications (1)
| Publication Number | Publication Date |
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| CN107015387A true CN107015387A (en) | 2017-08-04 |
Family
ID=59449205
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
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| CN201710356742.1A Pending CN107015387A (en) | 2017-05-19 | 2017-05-19 | A kind of measurement circuit for array base palte |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107966860A (en) * | 2017-11-24 | 2018-04-27 | 深圳市华星光电技术有限公司 | A kind of GOA circuits, display panel and display device |
| CN108873398A (en) * | 2018-06-05 | 2018-11-23 | 深圳市华星光电技术有限公司 | Liquid crystal display panel and its application method |
| CN109557738A (en) * | 2018-12-21 | 2019-04-02 | 惠科股份有限公司 | test circuit, test method and display panel |
| CN110379345A (en) * | 2019-06-12 | 2019-10-25 | 北海惠科光电技术有限公司 | Array substrate and display panel |
| CN111061102A (en) * | 2019-12-17 | 2020-04-24 | Tcl华星光电技术有限公司 | Array substrate and display panel |
| WO2020098023A1 (en) * | 2018-11-14 | 2020-05-22 | 惠科股份有限公司 | Method for manufacturing display panel and detection method for same |
| CN111292660A (en) * | 2020-02-12 | 2020-06-16 | 合肥鑫晟光电科技有限公司 | OLED driving backboard, detection method thereof and display device |
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| CN107966860A (en) * | 2017-11-24 | 2018-04-27 | 深圳市华星光电技术有限公司 | A kind of GOA circuits, display panel and display device |
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| WO2020098023A1 (en) * | 2018-11-14 | 2020-05-22 | 惠科股份有限公司 | Method for manufacturing display panel and detection method for same |
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| CN111061102A (en) * | 2019-12-17 | 2020-04-24 | Tcl华星光电技术有限公司 | Array substrate and display panel |
| CN111061102B (en) * | 2019-12-17 | 2022-12-23 | Tcl华星光电技术有限公司 | Array substrate and display panel |
| CN111292660A (en) * | 2020-02-12 | 2020-06-16 | 合肥鑫晟光电科技有限公司 | OLED driving backboard, detection method thereof and display device |
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| TA01 | Transfer of patent application right |
Effective date of registration: 20171026 Address after: 518132 No. 9-2 Ming Avenue, Gongming street, Guangming District, Guangdong, Shenzhen Applicant after: Shenzhen Huaxing photoelectric semiconductor display technology Co., Ltd. Address before: 518132 9-2, Guangming Road, Guangming New District, Guangdong, Shenzhen Applicant before: Shenzhen Huaxing Optoelectronic Technology Co., Ltd. |
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Application publication date: 20170804 |