CN106324934A - Shorting bar structure and array substrate - Google Patents
Shorting bar structure and array substrate Download PDFInfo
- Publication number
- CN106324934A CN106324934A CN201610979868.XA CN201610979868A CN106324934A CN 106324934 A CN106324934 A CN 106324934A CN 201610979868 A CN201610979868 A CN 201610979868A CN 106324934 A CN106324934 A CN 106324934A
- Authority
- CN
- China
- Prior art keywords
- layer
- metal
- shorting bar
- insulating layer
- via hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136204—Arrangements to prevent high voltage or static electricity failures
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136254—Checking; Testing
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Liquid Crystal (AREA)
Abstract
The invention provides a shorting bar structure. The shorting bar structure comprises a data line layer, a first insulation layer, a metal wiring layer, a second insulation layer, a third insulation layer and a metal connection layer which are stacked sequentially from bottom to top, and the data line layer is communicated with the metal wiring layer through the metal connection layer. Compared with an existing shorting bar structure, the shorting bar structure has the advantages that the data line layer and the metal wiring layer are conducted indirectly, and a connecting line is prolonged, so that impedance between conducting film layers is enlarged, the joint of the two film layers is protected from explosive damage by current increased instantaneously, and the technical problem that test effects are affected due to the fact that impedance between the conducting film layers of the existing shorting bar structure is small, and the joint of the film layers is damaged explosively easily by the current increased instantaneously when test signals are input is solved.
Description
Technical Field
The invention relates to the technical field of liquid crystal display, in particular to a short-circuit bar structure and an array substrate with the same.
Background
The liquid crystal display panel is the most important element in a liquid crystal display device, and generally includes an array substrate, a color filter substrate, and a liquid crystal layer sandwiched between the two substrates. The array substrate is provided with a plurality of scanning lines, a plurality of data lines, a plurality of pixel electrodes, a plurality of thin film transistors distributed in an array and other various electronic elements. In order to ensure the correct electrical connection relationship between various electronic components on the tft substrate, in general, when the array substrate is manufactured, a shorting bar is disposed at the edge of the array substrate to detect the array substrate before modularization by using the shorting bar, and after the array substrate is detected to be completed, the shorting bar is cut off, and then the liquid crystal display panel is sent to the modularization process.
As shown in fig. 1, the film structure of the short bar in the prior art includes a data line layer 101, a first insulating layer 102, a metal routing layer 103, a second insulating layer 104, a third insulating layer 105 and an electrode layer 106, a via hole 107 is disposed between the data line layer 101 and the metal routing layer 103, so that the data line layer 101 is communicated with the metal routing layer 103, wherein the data line layer 101 is used for connecting data lines on the array substrate, the metal routing layer 103 is connected to a test signal source through metal routing lines on the same layer, and the data lines are connected to the test signal source through metal routing lines disposed on an upper layer, so as to avoid metal routing lines on the same layer as the data lines.
However, in the short-circuit bar structure in the prior art, when the test signal source inputs the test signal to the short-circuit bar, a large amount of static electricity is gathered on the short-circuit bar, and the risk that the film layer joint is damaged by explosion is generated, so that the test operation of the short-circuit bar is influenced.
Disclosure of Invention
The invention provides a short-circuit rod structure which can increase the impedance of a data line layer and a metal wiring layer, and further solves the technical problem that when a circuit rod inputs a test signal, static electricity is gathered, and current is increased instantly to explode and damage the connection part of a film layer, so that the test effect is influenced.
In order to solve the above problems, the technical scheme provided by the invention is as follows:
the invention provides a short-circuit bar structure, comprising:
the data wire layer, the first insulating layer, the metal routing layer, the second insulating layer, the third insulating layer and the metal connecting layer are sequentially stacked from bottom to top; and
the first via hole penetrates through the second insulating layer and the third insulating layer, and conductive materials are filled in the first via hole, so that the metal connecting layer is conducted with the metal wiring layer;
the second conducting hole sequentially penetrates through the first insulating layer, the metal wiring layer, the second insulating layer and the third insulating layer, and conductive materials are filled in the second conducting hole, so that the metal connecting layer is conducted with the data wire layer; wherein,
and an insulating material is arranged on the outer side of the part, positioned on the metal wiring layer, of the second via hole, so that the data wire layer is prevented from being directly conducted with the metal wiring layer, and the data wire layer is conducted with the metal wiring layer through the metal connecting layer.
According to a preferred embodiment of the present invention, the stacking positions of the data line layer and the metal wiring layer are interchangeable.
According to a preferred embodiment of the present invention, the shorting bar is connected to the array substrate, the array substrate includes a display area and a peripheral area, a plurality of data lines are arranged in the display area of the array substrate, the data lines are connected to the data line layer of the shorting bar, the shorting bar is located in the peripheral area, and the metal routing layer of the shorting bar is connected to the test signal source through the metal routing on the same layer.
According to a preferred embodiment of the present invention, the metal connection layer is an indium tin oxide transparent conductive material.
According to a preferred embodiment of the present invention, the ito transparent conductive material is deposited in both the first via hole and the second via hole.
According to the above object of the present invention, an array substrate is provided, which includes a display area and a peripheral area, wherein a plurality of data lines are arranged in the display area, a test signal source and a shorting bar are arranged in the peripheral area, and the shorting bar is connected to the test signal source through a metal wire;
the shorting bar includes:
the data wire layer, the first insulating layer, the metal routing layer, the second insulating layer, the third insulating layer and the metal connecting layer are sequentially stacked from bottom to top; and
the first via hole penetrates through the second insulating layer and the third insulating layer, and conductive materials are filled in the first via hole, so that the metal connecting layer is conducted with the metal wiring layer;
the second conducting hole sequentially penetrates through the first insulating layer, the metal wiring layer, the second insulating layer and the third insulating layer, and conductive materials are filled in the second conducting hole, so that the metal connecting layer is conducted with the data wire layer; wherein,
and an insulating material is arranged on the outer side of the part, positioned on the metal wiring layer, of the second via hole, so that the data wire layer is prevented from being directly conducted with the metal wiring layer, and the data wire layer is conducted with the metal wiring layer through the metal connecting layer.
According to a preferred embodiment of the present invention, the stacking positions of the data line layer and the metal wiring layer are interchangeable.
According to a preferred embodiment of the present invention, the data line is connected to the data line layer of the short-circuit bar, and the metal routing layer of the short-circuit bar is connected to the test signal source through the metal routing on the same layer.
According to a preferred embodiment of the present invention, the metal connection layer is an indium tin oxide transparent conductive material.
According to a preferred embodiment of the present invention, the ito transparent conductive material is deposited in both the first via hole and the second via hole.
The invention has the beneficial effects that: compared with the existing short-circuit bar structure, the short-circuit bar structure has the advantages that the data line layer is indirectly conducted with the metal wiring layer, and the connecting line is prolonged, so that the impedance between the conducting film layers is increased, and the junction of the two film layers is prevented from being damaged by the instantly increased current; the technical problem of current short-circuit bar structure, it is less to switch on the interlaminar impedance of rete, when inputing the test signal, the rete junction is fried easily to the electric current that increases in the twinkling of an eye to influence the test effect is solved.
Drawings
In order to illustrate the embodiments or the technical solutions in the prior art more clearly, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the invention, and it is obvious for a person skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a schematic diagram of a conventional shorting bar;
FIG. 2 is a schematic view of a shorting bar according to the present invention;
FIG. 3 is a schematic diagram of the connection relationship between the shorting bar and the data line according to the present invention.
Detailed Description
The following description of the various embodiments refers to the accompanying drawings that illustrate specific embodiments in which the invention may be practiced. The directional terms mentioned in the present invention, such as [ upper ], [ lower ], [ front ], [ rear ], [ left ], [ right ], [ inner ], [ outer ], [ side ], are only referring to the directions of the attached drawings. Accordingly, the directional terms used are used for explanation and understanding of the present invention, and are not used for limiting the present invention. In the drawings, elements having similar structures are denoted by the same reference numerals.
The invention aims at the technical problem that the existing short-circuit bar structure has small impedance between two conducting film layers, and when a test signal is input, the instantly increased current is easy to damage the film layer connection part, so that the test effect is influenced.
As shown in fig. 2, the shorting bar structure of the present invention includes a data line layer 201, a first insulating layer 202, a metal routing layer 203, a second insulating layer 204, a third insulating layer 205, and a metal connecting layer 206, which are stacked in sequence from bottom to top; a first via hole 207 and a second via hole 208 are formed in the shorting bar; the first via hole 207 is formed between the metal connection layer 206 and the metal wiring layer 203, and a conductive material is filled in the first via hole 207 to achieve conduction between the metal connection layer 206 and the metal wiring layer 203; the second via hole 208 is formed between the metal connection layer 206 and the data line layer 201, and a conductive material is filled in the second via hole 208.
The second via hole 208 is provided with an insulating material 209 at the outer side of the portion of the metal wiring layer 203 to prevent the data line layer 201 from directly conducting with the metal wiring layer 203, so as to achieve the conduction between the metal connection layer 206 and the data line layer 201.
Preferably, the metal connection layer 206 is made of an indium tin oxide transparent conductive material;
preferably, the first via hole 207 and the second via hole 208 are filled with a conductive material having the same material as the metal connection layer 206.
Preferably, the positional relationship between the metal connection layer 206 and the data line layer 201 is interchanged, so that the resistance of the connection position between the metal connection layer 206 and the data line layer 201 can be increased, and the film layer is prevented from being damaged by static electricity.
The first via hole 207 and the second via hole 208 are disposed to indirectly connect the data line layer 201 and the metal wiring layer 203 through the metal connection layer 206, so as to increase the impedance at the connection between the data line layer 201 and the metal wiring layer 203.
In addition, the design is flexible, convenience is brought to the later-stage requirements of different hole opening modes, different connection modes of the film layer can be formed by the different hole opening modes, the connection is diversified, and the change of the photomask is simpler; the mask design of the third insulating layer 205 close to the upper surface of the shorting bar is flexible, if the upper layer of the third insulating layer 205 has no metal connection layer 206, the third insulating layer 205 has no hole, the first insulating layer 202 has a hole, and the data line layer 201 is directly connected to the metal wiring layer 203, which is the same as the conventional design, mainly the mask design on the third insulating layer 205 is flexible, the mask on the third insulating layer 205 is used when the first via hole 207 and the second via hole 208 of the present invention are opened, and the mask on the third insulating layer 205 is not used when two via holes are not needed.
As shown in fig. 3, the shorting bar is connected to the array substrate, the array substrate includes a display area and a peripheral area, wherein a plurality of scan lines and data lines are arranged in the display area, the peripheral area is provided with the shorting bar and a plurality of metal wires for driving display, the shorting bar structure of the present invention is used for connecting to the data lines, and the scan lines and the common electrode can be connected to detect through a conventional shorting bar.
The short-circuit bar is connected with the data line through a wiring 301 and a signal line 302, wherein one end of the wiring 301 is connected with the data line, the other end of the wiring 301 is connected with the signal line 302 through a bonding pad 303, and the other end of the signal line 302 is connected with the data line layer of the short-circuit bar, so that the short-circuit bar is indirectly conducted with the metal routing layer and conducted with a test signal source.
Further, there are three shorting bars, including a first shorting bar 304, a second shorting bar 305, and a third shorting bar 306; a red (R) signal data line 307, a green (G) signal data line 308, and a blue (B) signal data line 309 in the wiring 301 are connected to the shorting bar through the signal line 302, respectively, for example, the red (R) signal data line 307 is connected to the first shorting bar 304, the green (G) signal data line 308 is connected to the second shorting bar 305, and the blue (B) signal data line 309 is connected to the third shorting bar 306.
During testing, voltage is applied to a common electrode of the liquid crystal display panel, a circuit bar connected with the gate line inputs a test signal to turn on all thin film transistors on the array substrate, the test signal is respectively applied to the three short circuit bars to enable the liquid crystal display panel to display pure-color pictures with different colors, and whether the circuit is abnormal or not is judged by observing the pictures with naked eyes or identifying the pictures with an instrument; after the screen inspection, the portions of the signal lines 302 connected to the wirings 301 need to be cut by laser, and then the liquid crystal display panel enters a grouping stage.
According to the above object of the present invention, an array substrate is provided, which includes a display area and a peripheral area, wherein a plurality of data lines are arranged in the display area, a test signal source and a shorting bar are arranged in the peripheral area, and the shorting bar is connected to the test signal source through a metal wire; the shorting bar includes: the data wire layer, the first insulating layer, the metal routing layer, the second insulating layer, the third insulating layer and the metal connecting layer are sequentially stacked from bottom to top; the first via hole penetrates through the second insulating layer and the third insulating layer, and conductive materials are filled in the first via hole, so that the metal connecting layer is conducted with the metal wiring layer; the second conducting hole sequentially penetrates through the first insulating layer, the metal wiring layer, the second insulating layer and the third insulating layer, and conductive materials are filled in the second conducting hole, so that the metal connecting layer is conducted with the data wire layer; and the outer side of the part of the second via hole, which is positioned on the metal wiring layer, is provided with an insulating material so as to prevent the data line layer from being directly conducted with the metal wiring layer, so that the data line layer is conducted with the metal wiring layer through the metal connecting layer.
Preferably, the stacking positions of the data line layer and the metal wiring layer are interchangeable.
Preferably, the data line is connected to a data line layer of the short-circuit bar, and a metal routing layer of the short-circuit bar is conducted with the test signal source through the metal routing on the same layer.
Preferably, the metal connecting layer is made of indium tin oxide transparent conductive material.
Preferably, the indium tin oxide transparent conductive material is deposited in both the first via hole and the second via hole.
The specific structure of the array substrate provided by the present invention is the same as or similar to the preferred embodiment of the shorting bar, and please refer to the related description of the preferred embodiment of the shorting bar.
The invention has the beneficial effects that: compared with the existing short-circuit bar structure, the short-circuit bar structure increases the impedance between the conducting film layers, and avoids the junction of the two film layers from being damaged by the instantly increased current; the technical problem of current short-circuit bar structure, it is less to switch on the interlaminar impedance of rete, when inputing the test signal, the rete junction is fried easily to the electric current that increases in the twinkling of an eye to influence the test effect is solved.
In summary, although the present invention has been described with reference to the preferred embodiments, the above-described preferred embodiments are not intended to limit the present invention, and those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention, therefore, the scope of the present invention shall be determined by the appended claims.
Claims (10)
1. A shorting bar structure, comprising:
the data wire layer, the first insulating layer, the metal routing layer, the second insulating layer, the third insulating layer and the metal connecting layer are sequentially stacked from bottom to top; and
the first via hole penetrates through the second insulating layer and the third insulating layer, and conductive materials are filled in the first via hole, so that the metal connecting layer is conducted with the metal wiring layer;
the second conducting hole sequentially penetrates through the first insulating layer, the metal wiring layer, the second insulating layer and the third insulating layer, and conductive materials are filled in the second conducting hole, so that the metal connecting layer is conducted with the data wire layer; wherein,
and an insulating material is arranged on the outer side of the part, positioned on the metal wiring layer, of the second via hole, so that the data wire layer is prevented from being directly conducted with the metal wiring layer, and the data wire layer is conducted with the metal wiring layer through the metal connecting layer.
2. The shorting bar structure according to claim 1, wherein the stacking positions of the data line layer and the metal routing layer are interchangeable.
3. The shorting bar structure according to claim 1, wherein the shorting bar is connected to an array substrate, the array substrate includes a display area and a peripheral area, a plurality of data lines are arranged in the display area of the array substrate, the data lines are connected to data line layers of the shorting bar, the shorting bar is located in the peripheral area, and the metal routing layer of the shorting bar is connected to a test signal source through metal routing on the same layer.
4. The shorting bar structure according to claim 1, wherein the metal connection layer is an indium tin oxide transparent conductive material.
5. The shorting bar structure according to claim 4, wherein the ITO transparent conductive material is deposited in both the first via hole and the second via hole.
6. An array substrate is characterized by comprising a display area and a peripheral area, wherein a plurality of data lines are distributed in the display area, a test signal source and a short-circuit bar are arranged in the peripheral area, and the short-circuit bar is connected with the test signal source through a metal wire;
the shorting bar includes:
the data wire layer, the first insulating layer, the metal routing layer, the second insulating layer, the third insulating layer and the metal connecting layer are sequentially stacked from bottom to top; and
the first via hole penetrates through the second insulating layer and the third insulating layer, and conductive materials are filled in the first via hole, so that the metal connecting layer is conducted with the metal wiring layer;
the second conducting hole sequentially penetrates through the first insulating layer, the metal wiring layer, the second insulating layer and the third insulating layer, and conductive materials are filled in the second conducting hole, so that the metal connecting layer is conducted with the data wire layer; wherein,
and an insulating material is arranged on the outer side of the part, positioned on the metal wiring layer, of the second via hole, so that the data wire layer is prevented from being directly conducted with the metal wiring layer, and the data wire layer is conducted with the metal wiring layer through the metal connecting layer.
7. The array substrate of claim 6, wherein the stacking position of the data line layer and the metal routing layer is interchangeable.
8. The array substrate of claim 6, wherein the data line is connected to a data line layer of the shorting bar, and a metal routing layer of the shorting bar is connected to the test signal source through the metal routing on the same layer.
9. The array substrate of claim 6, wherein the metal connection layer is an indium tin oxide transparent conductive material.
10. The array substrate of claim 9, wherein the indium tin oxide transparent conductive material is deposited in both the first via hole and the second via hole.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610979868.XA CN106324934A (en) | 2016-11-08 | 2016-11-08 | Shorting bar structure and array substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610979868.XA CN106324934A (en) | 2016-11-08 | 2016-11-08 | Shorting bar structure and array substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106324934A true CN106324934A (en) | 2017-01-11 |
Family
ID=57816932
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610979868.XA Pending CN106324934A (en) | 2016-11-08 | 2016-11-08 | Shorting bar structure and array substrate |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106324934A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112987351A (en) * | 2021-02-10 | 2021-06-18 | 深圳市华星光电半导体显示技术有限公司 | Short-circuit bar, display panel and display device |
| WO2022141586A1 (en) * | 2020-12-31 | 2022-07-07 | 华为技术有限公司 | Signal switching structure and hardware-in-loop simulation testing system |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050077517A1 (en) * | 2003-10-14 | 2005-04-14 | Lg.Philips Lcd Co., Ltd. | Liquid crystal display panel and fabricating method thereof |
| KR100679518B1 (en) * | 2000-07-13 | 2007-02-07 | 엘지.필립스 엘시디 주식회사 | Array board for liquid crystal display device and manufacturing method thereof |
| CN101770982A (en) * | 2009-01-04 | 2010-07-07 | 上海天马微电子有限公司 | Liquid crystal display, liquid crystal display substrate and forming method thereof |
| CN103163668A (en) * | 2011-12-15 | 2013-06-19 | 武汉天马微电子有限公司 | Detection device for liquid crystal display device |
| CN104656327A (en) * | 2015-02-11 | 2015-05-27 | 深圳市华星光电技术有限公司 | Array substrate and liquid crystal display panel |
-
2016
- 2016-11-08 CN CN201610979868.XA patent/CN106324934A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100679518B1 (en) * | 2000-07-13 | 2007-02-07 | 엘지.필립스 엘시디 주식회사 | Array board for liquid crystal display device and manufacturing method thereof |
| US20050077517A1 (en) * | 2003-10-14 | 2005-04-14 | Lg.Philips Lcd Co., Ltd. | Liquid crystal display panel and fabricating method thereof |
| CN101770982A (en) * | 2009-01-04 | 2010-07-07 | 上海天马微电子有限公司 | Liquid crystal display, liquid crystal display substrate and forming method thereof |
| CN103163668A (en) * | 2011-12-15 | 2013-06-19 | 武汉天马微电子有限公司 | Detection device for liquid crystal display device |
| CN104656327A (en) * | 2015-02-11 | 2015-05-27 | 深圳市华星光电技术有限公司 | Array substrate and liquid crystal display panel |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2022141586A1 (en) * | 2020-12-31 | 2022-07-07 | 华为技术有限公司 | Signal switching structure and hardware-in-loop simulation testing system |
| CN112987351A (en) * | 2021-02-10 | 2021-06-18 | 深圳市华星光电半导体显示技术有限公司 | Short-circuit bar, display panel and display device |
| WO2022170703A1 (en) * | 2021-02-10 | 2022-08-18 | 深圳市华星光电半导体显示技术有限公司 | Shorting bar, display panel and display apparatus |
| US11852934B2 (en) | 2021-02-10 | 2023-12-26 | Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | Shorting bar, display panel, and display device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI223731B (en) | Display panel | |
| CN103163668B (en) | Detection device for liquid crystal display device | |
| US20040169781A1 (en) | Repair method for defects in data lines and flat panel display incorporating the same | |
| CN102566167B (en) | Array substrate | |
| US10204938B2 (en) | Display panel, display apparatus, and method of repairing a signal line thereof | |
| WO2013011855A1 (en) | Active matrix display device | |
| US10514789B2 (en) | Integrated touch control display panel and display device | |
| TW201205172A (en) | Display panel and method of repairing signal lines thereof | |
| JP6539743B2 (en) | Array substrate and liquid crystal display panel | |
| CN111863885B (en) | Display panel to be cut, manufacturing method of display panel and display device | |
| KR20120066822A (en) | Array substragte andmethod for manufacturing the array substrate | |
| WO2013021992A1 (en) | Active matrix display device | |
| CN108732830B (en) | Display panel and display device | |
| KR100593977B1 (en) | LCD Display | |
| KR20170056082A (en) | In-cell touch type liquid crystal display device | |
| CN106324934A (en) | Shorting bar structure and array substrate | |
| CN108231798A (en) | A kind of display panel to be detected, display panel and display device | |
| CN109100896A (en) | The vertical light line restorative procedure of array substrate, display panel and its display panel | |
| US20240178077A1 (en) | Display panel and display panel motherboard | |
| CN114488632B (en) | Display panel, display device and detection method thereof | |
| JPH11119683A (en) | Inspection method of liquid crystal display panel | |
| US11908358B2 (en) | Gate test part and display device including the same | |
| CN110389477A (en) | Thin film transistor substrate and liquid crystal display panel | |
| KR102347412B1 (en) | Display Panel For Display Device and Test Method therefor | |
| CN205427403U (en) | Various membrane base plate and integrated touch -control display panel |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20170111 |