CN106960786A - A kind of technique for the bottom and apical curvature radius for increasing groove - Google Patents

Abstract

The invention discloses a process for increasing the radius of curvature of the bottom and top of the trench. First, a first layer of silicon oxide and a first layer of silicon nitride are formed on a semiconductor substrate; A layer of silicon nitride opens the window; using the first layer of silicon oxide and the first layer of silicon nitride as a mask, a groove is formed in the semiconductor substrate through a groove process; then, a second layer of silicon oxide is formed on the semiconductor substrate and the second layer of silicon nitride; most of the second layer of silicon oxide and the second layer of silicon nitride are removed by an anisotropic etching process, and only the second layer of silicon oxide and the second layer of nitride are left on the sidewall of the trench Silicon: A thermal oxidation layer is formed on the bottom and top of the trench through a thermal oxidation process, which increases the radius of curvature of the bottom and top of the trench.

Description

A process for increasing the radius of curvature of the bottom and top of the trench

technical field

The invention belongs to the technical field of semiconductor technology, and relates to a semiconductor trench process (trench process), in particular to a trench process for power devices, in particular to a process for increasing the radius of curvature of the bottom and top of the trench.

Background technique

In high-power semiconductor devices, including various MOS (metal-oxide-semiconductor) gate-controlled transistors, especially IGBTs (insulated gate bipolar transistors), trench gate structures are widely used. Compared with the planar gate structure, the trench gate structure has a higher cell density and lower saturation voltage drop. However, there are two problems with the trench gate structure: First, the electric field at the bottom of the trench is concentrated and the electric field strength is relatively large, so the HTRB (high temperature reverse bias) reliability of the device is adversely affected. Second, the top edge of the trench is very rough, almost at a right angle, which creates gate leakage problems. So it is necessary to increase the radius of curvature of the bottom and top of the groove.

One way to increase the radius of curvature of the bottom of the trench is to protect the sidewalls of the trench with reactants from previous processes, and to make the bottom of the trench more rounded by isotropic etching (see, for example, US Patent 6521538B2). However, this method is not efficient because the isotropic etching process is relatively difficult to control.

Another approach is to use a thermal oxidation process to increase the radius of curvature at the bottom of the trench (see, eg, US Patent 8659065B2). The thermal oxidation process is easier to control, but this method still has two disadvantages: First, it requires two trench etching processes, which increases the complexity and cost. Secondly, the top of the groove still has a nearly right-angled shape, which is not smooth enough.

In order to solve the above-mentioned problems, the present invention proposes an improved method, using a thermal oxidation process to simultaneously increase the curvature radius of the bottom and top of the trench.

Contents of the invention

The object of the present invention is to propose a simple and controllable method of simultaneously increasing the radius of curvature of the bottom and top of the trench. Technical scheme of the present invention is as follows:

A process for increasing the radius of curvature of the bottom and top of a trench, comprising the following steps: forming a first layer of silicon oxide and a first layer of silicon nitride on a semiconductor substrate; A layer of silicon nitride opens the window; using the first layer of silicon oxide and the first layer of silicon nitride as a mask, a trench is formed in the semiconductor substrate through a groove process; then, a second layer of silicon oxide and silicon nitride is formed on the semiconductor substrate. The second layer of silicon nitride; remove most of the second layer of silicon oxide and second layer of silicon nitride by anisotropic etching process, leaving only the second layer of silicon oxide and second layer of silicon nitride on the sidewall of the trench ; A thermal oxidation layer is formed on the bottom and top of the trench through a thermal oxidation process, which increases the radius of curvature of the bottom and top of the trench.

Preferably, the semiconductor substrate is silicon material or silicon carbide material.

The beneficial effects of the present invention are as follows:

The present invention is a simple and controllable method: its simplicity lies in that the groove etching process has only one step, and the curvature radius of the bottom and top of the groove is increased simultaneously in one step; its controllability lies in that it utilizes thermal oxidation The process increases the radius of curvature, and under certain conditions, only the thermal oxidation time can be used to precisely control the etching result.

Description of drawings

1 is a cross-sectional view of a semiconductor substrate on which a first layer of silicon oxide and a first layer of silicon nitride are formed;

Figure 2 shows that windows are opened in the first layer of silicon oxide and the first layer of silicon nitride;

Fig. 3 shows that the first layer of silicon oxide and the first layer of silicon nitride are used as masks to etch trenches in the semiconductor substrate;

Figure 4 shows the formation of a second layer of silicon oxide and a second layer of silicon nitride;

Figure 5 shows that the anisotropic etching process removes most of the second layer of silicon oxide and the second layer of silicon nitride, leaving only the second layer of silicon oxide and the second layer of silicon nitride on the sidewall of the trench;

Figure 6 shows that a thermal oxide layer is generated on the bottom and top of the trench through a thermal oxidation process;

Figure 7 shows the semiconductor substrate after removing all silicon oxide and silicon nitride, the radius of curvature of the bottom and top of the trench increases;

FIG. 8 is an application example of the structure in FIG. 7: a gate oxide layer and a polysilicon layer are formed inside the trench. Polysilicon exists only inside the trench;

FIG. 9 is another application example of the structure in FIG. 7: a gate oxide layer and a polysilicon layer are formed inside the trench, and the polysilicon layer extends above the trench.

detailed description

The invention discloses a process for increasing the curvature radius of the bottom and the top of the groove. Form the first layer of silicon oxide and the first layer of silicon nitride on the semiconductor substrate first; then open the window of the first layer of silicon oxide and the first layer of silicon nitride by photolithography; use the first layer of silicon oxide and the first layer of nitrogen Silicon is used as a mask, and grooves are formed in the semiconductor substrate through a groove process; then, a second layer of silicon oxide and a second layer of silicon nitride are formed on the semiconductor substrate; most of the first layer is removed by an anisotropic etching process. The second layer of silicon oxide and the second layer of silicon nitride, only the second layer of silicon oxide and the second layer of silicon nitride are reserved on the side walls of the trench; a thermal oxide layer is formed on the bottom and top of the trench through a thermal oxidation process, increasing the The radius of curvature of the bottom and top of the trench is increased.

SUMMARY OF THE INVENTION It is an object of the present invention to form a trench on a semiconductor substrate, the trench having increased bottom and top radii of curvature. Specifically, the method for increasing the radius of curvature of the bottom and top of the trench includes the following steps: a) first forming a first layer of silicon oxide and a first layer of silicon nitride on a semiconductor substrate; b) through photolithography and etching, Open a window on the first layer of silicon oxide and the first layer of silicon nitride, that is, the patterning step; c) use the first layer of silicon oxide and the first layer of silicon nitride as a mask to open a trench in the semiconductor substrate ; d) Deposit a second silicon oxide conformal layer on the trenched substrate; e) Then deposit a second silicon nitride conformal layer on it; f) Perform anisotropic etching to remove A second layer of silicon oxide and a second layer of silicon nitride parallel to the surface of the substrate, leaving only the second layer of silicon oxide and the second layer of silicon nitride on the side walls of the trench; g) performing a thermal oxidation step until the A thermal oxide layer is formed at the bottom of the trench and at the corners of the top of the trench; h) All silicon nitride and silicon oxide layers are removed.

Below in conjunction with accompanying drawing, the present invention is described in further detail:

The present invention comprises the following steps. Referring to FIG. 1 , the first step is to form a first layer of silicon oxide 2 and a first layer of silicon nitride 3 on a semiconductor substrate 1 . The first layer of silicon oxide 2 can be formed by a thermal oxidation process, or by a CVD (Chemical Vapor Deposition) process. The first layer of silicon nitride 3 can be formed by CVD process. These layers should be formed using a process that produces isotropic or conformal layers on the substrate, and can also be formed using ALD (atomic layer deposition) techniques.

Then, through photolithography and etching processes, windows are opened on the first layer of silicon oxide 2 and the first layer of silicon nitride 3 , as shown in FIG. 2 .

Subsequently, a trench 101 is etched in the semiconductor substrate 1 , as shown in FIG. 3 . The trench etching process utilizes the first layer of silicon oxide 2 and the first layer of silicon nitride 3 as masks. The top 11 of the trench 101 has a rectangular shape. Very unsmooth. The width of trench 101 is 2r ₁ . The radius of curvature of the groove bottom 21 is r ₁ .

After the trench etching is completed, a second layer of silicon oxide 4 and a second layer of silicon nitride 5 are formed by CVD or ALD process, as shown in FIG. 4 . The CVD and ALD processes are conformal, so the second layer of silicon oxide 4 and the second layer of silicon nitride 5 not only cover the upper surface of the semiconductor substrate but also cover the inner surface of the trench.

Then, most of the second layer of silicon oxide 4 and the second layer of silicon nitride 5 are removed by an anisotropic etching process, leaving only the second layer of silicon oxide 4 and the second layer of silicon nitride 5 on the side walls of the trench. , as shown in Figure 5. This anisotropic etching process step can be completed using commercial semiconductor processing equipment, such as LAM 4300 etching equipment, and is preferably performed under etching conditions with trifluoromethane gas (CHF ₃ ).

The following is the thermal oxidation process. The thermal oxidation of silicon is preferably carried out at about 1050°C, and for the choice of oxidizing agent, water vapor is more preferably used as the oxidizing agent than dry oxygen. Oxidizing agents such as oxygen atoms cannot pass through silicon nitride layers 3 and 5, but can pass through oxide layers 2 and 4. The silicon substrate at the bottom of the trench cannot be protected by the second silicon nitride layer 5 and the second silicon oxide layer 4 . And remove that part of the second layer of silicon nitride layer 5 and the second layer of silicon oxide layer 4 on the surface of the substrate so that only a very thin silicon oxide is left at the top corner of the trench, forming a very short oxygen penetration and diffusion path . Therefore, the thermal oxide layer 6 is only formed on the bottom and top of the trench, and no thermal oxide layer will be formed on the sidewall of the trench. And the thermal oxide layer 6 is formed fastest at the bottom of the trench, and slightly slower at the top corner of the trench. As shown in Figure 6, at the top corner, oxygen can diffuse through the anisotropic etching process. The thin silicon oxide layer 4 is removed. In the silicon oxide layer 4 below the second silicon nitride layer 5 , the oxidant diffuses slowly along the sidewall, thereby consuming the silicon substrate on the sidewall and slowly increasing the thickness of the silicon oxide layer on the sidewall. Since this thermal oxidation process consumes silicon or other semiconductor substrate material at the bottom and top corners of the trench at a faster rate than the sidewalls, it changes the shape of the trench, rounds corners that would otherwise not be round, and increases the The radius of curvature at the bottom of the groove is increased, thereby increasing the radius of curvature at the bottom and top at the same time. The increase in size of the bottom radius can be accurately controlled by taking the oxidation time as a control condition under such conditions to increase the bottom radius from r ₁ to r ₂ . When the silicon at the corner of the trench is consumed by the formation of silicon oxide, the thermal expansion ratio is about 2.4:1, which causes the upper surface silicon nitride layer 3 (5 in the original English text, is it correct) at the corner of the trench to be in contact with the side The silicon nitride layer 5 on the wall is far away. Simulations of the trench formation and etch process disclosed herein show that for this step, a thermal oxidation time of 40 minutes increases the trench radius from 0.4 microns to 0.6 microns, resulting in a trench width of 0.8 microns (2×r ₁ ) and a depth of about 5 microns. Conditions applicable to other trench sizes, aspect ratios and local curvatures can be readily determined by means of such simulations by varying the initial dimensions and etch times.

Finally, all the silicon oxide and silicon nitride layers are removed by wet etching or CDE (chemical dry etching, chemical dry etching), and the result shown in FIG. 7 is obtained. It can be seen that the shape of the trench 102 is significantly different from that of the trench 101 . The top 12 of the groove 102 is significantly more rounded than the top 11 of the groove 101 . The width of trench 102 is still 2r _{1 ,} but the radius of curvature of the bottom of trench 102 is greater than r ₁ . Therefore, the radius of curvature of the groove bottom and top is increased. The trench depth can easily be increased by more than 5 microns by increasing the initial etch depth when etching through the mask openings formed in the initial silicon nitride layer 3 and first silicon oxide layer 2 .

FIG. 8 is one of the application examples of the aforementioned trench structure: a gate oxide layer 6 and a polysilicon layer 7 are formed inside the trench 102 . Polysilicon 7 exists only inside trench 102 . Specific device electrodes and doping structures are not shown.

FIG. 9 shows the second application example of the aforementioned trench structure: a gate oxide layer 6 and a polysilicon layer 7 are formed inside the trench 102 . The polysilicon 7 not only exists inside the trench 102, but also extends to the surface of the semiconductor substrate 1, forming a polysilicon bridge structure. Specific device electrodes and doping structures are not shown.

When making a device, the material of the semiconductor substrate 1 can be silicon or silicon carbide.

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

The embodiments of the present invention have been described in detail above in conjunction with the accompanying drawings and specific examples, but the present invention is not limited to the above embodiments, within the scope of knowledge possessed by those of ordinary skill in the art, it can also be implemented without departing from the gist of the present invention. Various changes are made.

Claims (2)

1. a kind of technique for the bottom and apical curvature radius for increasing groove, it is characterised in that the technique comprises the following steps： First layer silica and first layer silicon nitride are formed on a semiconductor substrate；Then by photoetching first layer silica and first Layer silicon nitride opens window；Using first layer silica and first layer silicon nitride as mask, by cutting technique, in semiconductor substrate Interior formation groove；Then, second layer silica and second layer silicon nitride are formed on a semiconductor substrate；Pass through anisotropic etching Technique removes most of second layer silica and second layer silicon nitride, only retains second layer silica and second in the side wall of groove Layer silicon nitride；Thermal oxide layer is formed in the bottom of groove and top by thermal oxidation technology, the bottom and top of groove is increased Radius of curvature.

2. technique according to claim 1, it is characterised in that：Described semiconductor substrate is silicon materials or carborundum material Material.