[go: up one dir, main page]

CN106847676A - The patterning method and forming method of semiconductor devices - Google Patents

The patterning method and forming method of semiconductor devices Download PDF

Info

Publication number
CN106847676A
CN106847676A CN201510881916.7A CN201510881916A CN106847676A CN 106847676 A CN106847676 A CN 106847676A CN 201510881916 A CN201510881916 A CN 201510881916A CN 106847676 A CN106847676 A CN 106847676A
Authority
CN
China
Prior art keywords
exposure
photoresist layer
layer
positive photoresist
semiconductor devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201510881916.7A
Other languages
Chinese (zh)
Inventor
胡华勇
叶蕾
刘剑尧
张楠楠
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
Original Assignee
Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Manufacturing International Shanghai Corp, Semiconductor Manufacturing International Beijing Corp filed Critical Semiconductor Manufacturing International Shanghai Corp
Priority to CN201510881916.7A priority Critical patent/CN106847676A/en
Publication of CN106847676A publication Critical patent/CN106847676A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)

Abstract

The patterning method and forming method of a kind of semiconductor devices, wherein patterning method include:Material layer to be etched is provided;Positive photoresist layer is formed in material layer to be etched;First exposure is carried out to positive photoresist layer using mask plate, the first exposure region is formed in positive photoresist layer;Positivity development is carried out to positive photoresist layer, the positive photoresist layer of the first exposure region is removed;After positivity development, second exposure is carried out to positive photoresist layer using the mask plate, the second exposure region is formed in positive photoresist layer, second exposure is identical with respect to the position of positive photoresist layer with mask plate in the first exposure, the exposure energy corresponding exposure size of the corresponding exposure size of exposure energy more than the first exposure of the second exposure;Negativity development is carried out to positive photoresist layer, the positive photoresist layer outside the second exposure region of removal forms the target photoresist layer with circular pattern.The patterning method simplifies the Patternized technique of semiconductor devices and reduces cost.

Description

The patterning method and forming method of semiconductor devices
Technical field
The present invention relates to field of semiconductor manufacture, more particularly to a kind of semiconductor devices patterning method and Forming method.
Background technology
In the technique of semiconductor devices manufacture, the figure on mask plate is passed through using photoetching process generally Exposure is transferred on substrate.Photoetching process includes:Substrate is provided;Photoresist is formed on a semiconductor substrate; The photoresist is exposed and developed, the photoresist of patterning is formed;It is with the photoresist for patterning Mask is performed etching to substrate so that the pattern on photoresist is transferred in substrate;Removal photoresist.With The continuous diminution of dimensions of semiconductor devices, photoetching critical size moves closer to the thing even beyond photoetching The reason limit, thus proposes more acute challenge to photoetching technique.The basic thought of dual recompose-technique It is that final target pattern is formed by composition twice, to overcome the inaccessiable photolithography limitation of single composition.
In the patterning process of cyclic structure, single exposure composition needs to form the mask plate patterns of ring-type, And by the figure on the mask plate of ring-type by the photoresist layer that is transferred in material layer to be etched of exposure in, Prepared by the mask plate patterns of wherein two-dimentional ring-type and the process window of exposure transfer is all very narrow, is unfavorable for technique Control and maintenance.Therefore propose the patterned dual recompose-technique to cyclic structure.The dual composition Technology includes two methods, and the first is litho (photoetching)-etch (etching)-litho (photoetching)-etch (etching) (LELE), be for second self-aligned double patterning shape (self-aligned double patterning, SADP).Cyclic structure it is graphical in, if by LELE techniques, i.e., exposed by first time The first exposure region is defined, then forms logical in the hard mask layer under photoresist layer after first time etches Hole, then defines the second exposure region, the face of second exposure region by being exposed on same position for the second time Product forms cyclic structure by second etching in hard mask layer afterwards more than the area of the first exposure region, The method is related to first time to expose the overlay difference for forming figure with second exposure and causes the non-of cyclic structure Concentric problem, and double exposure and twice etching increased the difficulty of processing step and control.
The graphical general use autoregistration graphic method of cyclic structure is formed in the prior art, including: Sacrificial material layer is formed in material layer to be etched;Sacrificial material layer is patterned by photoetching process, Pattern is made it have, sacrifice layer is formed;Side-wall material layer in gap is deposited on sacrifice layer;Etching clearance side The wall material bed of material, at least exposes the top surface of sacrifice layer, so as to the side wall in sacrifice layer forms clearance side wall; Removal sacrifice layer, retention gap side wall;Using clearance side wall as mask, treat etachable material layer and carved Erosion, makes it have pattern.The method can ensure the concentric problem of cyclic structure, and can effectively ensure The dimensional homogeneity of cyclic structure, but complex process and relatively costly.
The content of the invention
The problem that the present invention is solved is to provide the patterning method and forming method of a kind of semiconductor devices, with Simplified flowsheet and reduces cost.
To solve the above problems, the present invention provides a kind of patterning method of semiconductor devices, including:Carry For material layer to be etched;Positive photoresist layer is formed in the material layer to be etched;Using mask plate pair The positive photoresist layer carries out the first exposure, and the first exposure region is formed in the positive photoresist layer; Positivity development is carried out to the positive photoresist layer, the positive photoresist layer of first exposure region is removed; After carrying out positivity development, the second exposure is carried out to the positive photoresist layer using the mask plate, in institute State and formed in positive photoresist layer the second exposure region, mask plate is relative to positive-tone photo described in the second exposure The position of glue-line is identical relative to the position of positive photoresist layer with mask plate described in the first exposure, and Corresponding exposure size is more than under the exposure energy effect of the first exposure under the exposure energy effect of the second exposure Corresponding exposure size;Negativity development is carried out to the positive photoresist layer, second exposure region is removed Positive photoresist layer in addition, forms the target photoresist layer with circular pattern.
Optionally, the figure of the mask plate is pass pattern.
Optionally, there is light acid producing agent and resin in the positive photoresist layer.
Optionally, the developer that the positivity development is used is tetramethyl ammonium hydroxide solution or tetraethyl hydrogen Ammonium hydroxide solution.
Optionally, the developer that the negativity development is used is n-butanol, positive fourth of the twelve Earthly Branches alcohol, hexamethylene, hexamethylene Ketone, methyl methacrylate or EMA.
Optionally, after being exposed first and before positivity development, also the positive photoresist layer is carried out First baking;After being exposed second and before negativity development, the is also carried out to the positive photoresist layer Two bakings.
Optionally, following technique was also included before the positive photoresist layer is formed:Described to be etched Hard mask layer is formed in material layer;After the target photoresist layer is formed, with the target photoresist layer For mask is performed etching to the hard mask layer, ring-type hard mask layer is formed.
The present invention also provides a kind of forming method of semiconductor devices, and the ring-type formed using the above method is hard Mask layer is treated etachable material layer and is performed etching for mask, forms ring target layer.
The present invention also provides a kind of forming method of semiconductor devices, the target light formed using the above method Photoresist layer is treated etachable material layer and is performed etching for mask, forms ring target layer.
Compared with prior art, technical scheme has advantages below:
The present invention is exposed on by carrying out to positive photoresist layer first and forms first in positive photoresist layer and expose Light area, then carries out positivity development to the positive photoresist layer, by the positive photoresist of the first exposure region Layer removal, is exposed on by second the second exposure region is formed in positive photoresist layer afterwards, due to the first exposure Light and the second exposure are using mask plate described in identical mask plate and the second exposure relative to positive photoresist The position of layer is identical relative to the position of positive photoresist layer with mask plate described in the first exposure so that the One exposure region and the second exposure region are concentric, and due to corresponding exposure under the exposure energy effect of the second exposure Size is more than corresponding exposure size under the exposure energy effect of the first exposure so that the second exposure of formation The area in area covers the first exposure region more than the area and the second exposure region of the first exposure region, carries out afterwards Negativity is developed, by the positive photoresist layer removal outside the second exposure region, so as to remain the first exposure region And the second positive photoresist layer between exposure region, the target photoresist layer with circular pattern is ultimately formed, The present invention use only double exposure and development twice is formed the target photoresist with circular pattern Layer, and etching technics and depositing operation need not be used, it is middle compared to existing technology to form to be etched as etching Needed during the ring-type mask pattern of material layer using exposure technology, developing process, etching technics and The situation of depositing operation, reduces the complexity of technique, and reduces process costs.
Brief description of the drawings
Fig. 1 to Fig. 6 is the structural representation of the patterning process of semiconductor devices in the prior art;
Fig. 7 is the structural representation of the semiconductor devices that prior art is formed;
Fig. 8 to Figure 15 is the structural representation of the patterning process of semiconductor devices in one embodiment of the invention Figure;
Figure 16 be semiconductor devices forming process in the present invention structural representation;
Figure 17 is the structural representation of the semiconductor devices that the present invention is formed.
Specific embodiment
As described in background, the Patternized technique of the semiconductor devices for being formed in the prior art is complicated, And high cost.
Fig. 1 to Fig. 6 is the structural representation of the patterning process of semiconductor devices in the prior art.
With reference to Fig. 1, there is provided material layer to be etched 100, formed in the material layer to be etched 100 and sacrificed Material layer 110;The photoresist layer 120 of patterning is formed in the sacrificial material layer 110.The pattern Pattern in the photoresist layer 120 of change is discrete through hole, and the destination layer being subsequently formed has the figure of annular Case.
It is mask to the sacrifice with the photoresist layer 120 (referring to Fig. 1) of the patterning with reference to Fig. 2 Material layer 110 (referring to Fig. 1) is performed etching and makes it have pattern, forms sacrifice layer 111;Formed and sacrificed Photoresist layer 120 is removed after layer 111.
With reference to Fig. 3, Fig. 3 is the schematic diagram formed on the basis of Fig. 2, forms gap side-wall material layer 130, The covering material layer 100 to be etched of the gap side-wall material layer 130 and sacrifice layer 111.
With reference to Fig. 4, using anisotropy dry carving technology etching gap side-wall material 130 (referring to Fig. 3) of layer, At least expose the top surface of sacrifice layer 111, so as to the side wall in sacrifice layer 111 forms clearance side wall 131.
With reference to Fig. 5, removal sacrifice layer 111 (referring to Fig. 4), retention gap side wall 131.Clearance side wall 131 Be shaped as annular.
With reference to Fig. 6, using clearance side wall 131 as mask, treat etachable material layer 100 and perform etching, shape Circlewise destination layer 101.Fig. 7 is the schematic perspective view of the ring target to be formed layer 101.
Research discovery, the original of the complex process of the patterning of semiconductor devices, and high cost in the prior art Because being:
Need to be exposed technique and developing process when the photoresist layer 120 of patterning is formed, formed sacrificial Need to perform etching technique during domestic animal layer 111, need to carry out deposition work when forming gap side-wall material layer 130 Skill, needs to perform etching technique during removal sacrifice layer 111, ultimately forms clearance side wall 131 as etching The ring-type mask pattern of material layer to be etched 100, it is seen that ultimately forming clearance side wall 131 needs through overexposure Light technique, developing process, etching technics and depositing operation, cause complex process, and process costs are high.
On this basis, the present invention provides a kind of patterning method of semiconductor devices, in corrosion material to be etched Positive photoresist layer is formed on layer, the first exposure region is formed by the first exposure, then to the positivity light Photoresist layer has carried out positivity development, the positive photoresist layer of the first exposure region is removed, then by second Exposure formed the second exposure region, second exposure described in mask plate relative to positive photoresist layer position and Mask plate is identical relative to the position of positive photoresist layer described in first exposure, and in the exposure of the second exposure Corresponding exposure size is more than corresponding exposure guide rule under the exposure energy effect of the first exposure under light energy effect It is very little, negativity development has been carried out afterwards, by the positive photoresist layer removal outside the second exposure region, most end form Into the target photoresist layer with circular pattern as the mask for etching material layer to be etched, technique is reduced Complexity, and reduce process costs.
It is understandable to enable the above objects, features and advantages of the present invention to become apparent, below in conjunction with the accompanying drawings Specific embodiment of the invention is described in detail.
Fig. 8 to Figure 15 is the structural representation of the patterning process of semiconductor devices in one embodiment of the invention Figure.
With reference to Fig. 8, there is provided material layer to be etched 200.
The material layer to be etched 200 is the follow-up material layer for needing and etching.The material layer to be etched 200 It can be single or multiple lift stacked structure.The material of the material layer to be etched 200 can be semiconductor material Material, such as silicon, germanium or SiGe, no longer illustrate one by one here.In the present embodiment, the corrosion material to be etched Layer 200 is silicon.
Hard mask can also be formed between material layer to be etched 200 and the positive photoresist layer being subsequently formed Layer 210 and the bottom anti-reflection layer 220 on hard mask layer 210.
The material of the hard mask layer 210 can be the abilities such as silicon nitride, silicon oxynitride, TEOS or metal The hard mask layer in domain often uses material, and the method for forming the hard mask layer 210 is depositing operation, such as chemistry Gas-phase deposition or physical gas-phase deposition.The hard mask layer 210 is nonessential layer.
The bottom anti-reflection layer 220 is used for the intensity of the bottom illumination for improving post-exposure process.It is described The material of bottom anti-reflection layer 220 is BARC material of the prior art, or organic antireflecting Coating, such as light absorbing material or polymeric material, or inorganic anti-reflective coating, such as titanium, oxidation Titanium, titanium nitride, chromium oxide, carbon, amorphous silicon, silicon nitride, silicon oxynitride or silicon oxide carbide.It is described Bottom anti-reflection layer 220 is nonessential layer.
With continued reference to Fig. 8, positive photoresist layer 230 is formed in the material layer to be etched 200.
In the present embodiment, the positive photoresist layer 230 also covers bottom anti-reflection layer 220 and hard mask Layer 210.
There is light acid producing agent and resin in the positive photoresist layer 230.
The material of the positive photoresist layer 230 is the material of positive photoresist layer in the prior art.
With reference to Fig. 9, the first exposure is carried out to the positive photoresist layer 230 using mask plate, it is described just The first exposure region (I regions) is formed in property photoresist layer 230.
The figure of the mask plate be pass pattern, the cross section of the pass pattern be shaped as can be Rectangle or circular or irregular shape, in the present embodiment, the shape of cross section of the pass pattern is circle.
Specifically, the exposure light source irradiation mask plate of the first exposure, enters to the positive photoresist layer 230 Row first exposes.
The exposure energy of the first exposure carried out to the positive photoresist layer 230 has threshold value E0, first The central energy value E1 of the light source of exposure is more than threshold value, by more than or equal to threshold in the exposure energy of the first exposure The property of the positive photoresist layer 230 of the exposure energy irradiation of value E0 changes, the positive photoresist Light acid producing agent in layer 230 produces light acid, the light under more than or equal to the effect of threshold value E0 exposure energies Resin in acid and positive photoresist layer 230 reacts so that first exposes in positive photoresist layer 230 Light area has hydrophily, does not have hydrophobicity by the region of the first exposure irradiation, subsequently when positivity is developed First exposure region is removed.
Curve 1 is the energy distribution curve figure of the first exposure, and the is carried out to the positive photoresist layer 230 The corresponding exposure size of energy distribution curve of one exposure is H1.
With reference to Figure 10, positivity development is carried out to the positive photoresist layer 230, remove first exposure The positive photoresist layer 230 in area.
The positivity development is developed using positivity developer to the positive photoresist layer 230, in institute State in positivity development, the positivity developer dissolves the positive photoresist layer 230 of the first exposure region, institute The material for stating positivity developer is alkaline solution, such as TMAH (TMAH) solution or tetrem Base Ammonia.
After positivity development, the first baking can also be carried out, be remained in just after the positivity is developed Moisture removal on property photoresist layer 230.The temperature of first baking is 80 degrees Celsius~120 degrees Celsius, So that positive photoresist layer 230 is unlikely to deformation, and will can be remained in just after positivity development faster Moisture removal on property photoresist layer 230.
After carrying out the positivity development, multiple discrete through holes, institute are formed in positive photoresist layer 230 The shape of cross section for stating through hole can be rectangle or circular or irregular shape, in the present embodiment, the through hole Shape of cross section for circle.
With reference to Figure 11, after carrying out positivity development, using the mask plate to the positive photoresist layer 230 The second exposure is carried out, the second exposure region (II region), second are formed in the positive photoresist layer 230 Mask plate described in exposure is relative relative to mask plate described in the position of positive photoresist layer and the first exposure It is identical in the position of positive photoresist layer, and the corresponding exposure guide rule under the exposure energy effect of the second exposure It is very little to be more than corresponding exposure size under the effect of the exposure energy of the first exposure.
Specifically, the exposure light source of the second exposure irradiates the mask plate, to the positive photoresist layer 230 Carry out the second exposure.
The exposure energy of the second exposure carried out to the positive photoresist layer 230 has threshold value E0, second The central energy value E2 of the light source of exposure is more than threshold value, by more than or equal to threshold in the exposure energy of the second exposure The property of the positive photoresist layer 230 of the exposure energy irradiation of value E0 changes, the positive photoresist Light acid producing agent in layer 230 produces light acid, the light under more than or equal to the effect of threshold value E0 exposure energies Resin in acid and positive photoresist layer 230 reacts, and forms the second exposure region, the second exposure region tool There is hydrophily, hydrophobicity is not had by the positive photoresist layer 230 of the second exposure irradiation, subsequently in negativity The positive photoresist layer 230 beyond the second exposure region is removed during development.
Curve 2 is the energy distribution curve figure of the second exposure, and the is carried out to the positive photoresist layer 230 The corresponding exposure size of energy distribution curve of two exposures is H2, and the exposure size H2 of the second exposure is more than The exposure size H1 of the first exposure.
In the present embodiment, exposed using the energy of the exposure of identical light source generator generation first and second Energy, difference is that the central energy value E2 of light source is more than in light source in the first exposure in the second exposure Heart energy value E1.In other embodiments, the first exposure neutralizes the light source generator used in the second exposure Can need to only ensure that corresponding exposure size is more than first under the exposure energy effect of the second exposure with difference Corresponding exposure size under the exposure energy effect of exposure.Such as the energy of corresponding first exposure in Figure 12 The energy distribution curve 4 of the amount exposure of distribution curve 3 and second, and corresponding first exposure in Figure 13 The energy distribution curve 6 of the exposure of energy distribution curve 5 and second.
Because the second exposure and the first exposure use same mask plate, and mask plate described in the second exposure Relative to mask plate described in the position of positive photoresist layer 230 and the first exposure relative to positive photoresist The position of layer 230 is identical so that the first exposure region and the second exposure region are concentric, and in the exposure of the second exposure Corresponding exposure size H2 is more than corresponding exposure under the exposure energy effect of the first exposure under light energy effect Light size H1 so that the area of the second exposure region is covered more than the area and the second exposure region of the first exposure region First exposure region.
With reference to Figure 14, carry out negativity development to the positive photoresist layer 230, the second exposure region of removal with Outer positive photoresist layer 230, forms the target photoresist layer 231 with circular pattern.
The negativity development is developed using negativity developer to the positive photoresist layer 230, in institute State in negativity development, the negativity developer dissolves the positive photoresist layer 230 beyond the second exposure region, The material of the negativity developer be organic solution, such as n-butanol, positive fourth of the twelve Earthly Branches alcohol, hexamethylene, cyclohexanone, Methyl methacrylate or EMA.
After carrying out negativity development, the positive photoresist layer 230 outside the second exposure region is removed, so as to protect The positive photoresist layer 230 between the first exposure region and the second exposure region is stayed, has been ultimately formed with circular chart The target photoresist layer 231 of case.
After negativity development, the second baking can also be carried out, be remained in just after the negativity is developed Moisture removal on property photoresist layer 230.The temperature of second baking is 80 degrees Celsius~120 degrees Celsius, So that positive photoresist layer 230 is unlikely to deformation, and will can be remained in just after negativity development faster Moisture removal on property photoresist layer 230.
The pattern of the target photoresist layer 231 is circular pattern.In the present embodiment, the target light of formation The pattern of photoresist layer 231 is circular loop pattern, in other embodiments, the figure of target photoresist layer 231 Case can be straight-flanked ring pattern or irregular circular pattern.
The present invention use only double exposure (including the first exposure and second exposure) and twice development (bag Include positivity development and negativity development) the target photoresist layer 231 with circular pattern is formed, and need not It is middle compared to existing technology to be formed as the ring for etching material layer to be etched using etching technics and depositing operation Needed during shape mask pattern using exposure technology, developing process, etching technics and depositing operation Situation, reduces the complexity of technique, and reduces process costs.
With reference to Figure 15, with target photoresist layer 231 for mask etching bottom anti-reflection layer 220 and hard mask Layer 210, forms annular bottom portion anti-reflecting layer 221 and ring-type hard mask layer 211.
Preferably, the technique of etching bottom anti-reflecting layer 220 and hard mask layer 210 is anisotropy dry etching Technique, advantageously allowing the ring-type hard mask layer 211 to be formed has perpendicular to material layer to be etched 200 Side wall.After forming ring-type hard mask layer 211, the annular bottom portion anti-reflecting layer 221 is removed.
The present invention also provides a kind of forming method of semiconductor devices, with reference to Figure 16, using above method shape Into ring-type hard mask layer 211 be material layer to be etched 200 (referring to Figure 13) described in mask etching, formed Ring target layer 201.
Preferably, the technique for etching material layer 200 to be etched is anisotropy dry carving technology, is conducive to making The ring target layer 201 that must be formed has the side wall perpendicular to material layer to be etched 200.
Figure 17 is the corresponding ring target layer 201 of semiconductor devices that the present invention is formed, in the present embodiment, The pattern of the ring target layer 201 of formation is circular loop pattern, in other embodiments, ring target layer 201 pattern can be straight-flanked ring pattern or irregular circular pattern.
It should be noted that work as there is no shape between material layer to be etched 200 and positive photoresist layer 230 During into bottom anti-reflection layer 220, with the target photoresist layer 231 for mask etching hard mask layer 210, Ring-type hard mask layer 211 is formed, is then mask to the material layer to be etched with ring-type hard mask layer 211 200 (referring to Figure 13) perform etching, and form ring target layer 201;Or, when in material layer to be etched When not forming bottom anti-reflection layer 220 and hard mask layer 210 between 200 and positive photoresist layer 230, With target photoresist layer 231 for mask etching material layer 200 to be etched, ring target layer 201 is formed.
Specifically, the ring target layer 201 can be annular MTJ (MTJ) memory knot The prototype of structure unit.
Although present disclosure is as above, the present invention is not limited to this.Any those skilled in the art, Without departing from the spirit and scope of the present invention, can make various changes or modifications, therefore guarantor of the invention Shield scope should be defined by claim limited range.

Claims (9)

1. a kind of patterning method of semiconductor devices, it is characterised in that including:
Material layer to be etched is provided;
Positive photoresist layer is formed in the material layer to be etched;
First exposure is carried out to the positive photoresist layer using mask plate, the shape in the positive photoresist layer Into the first exposure region;
Positivity development is carried out to the positive photoresist layer, the positive photoresist layer of first exposure region is removed; After carrying out positivity development, the second exposure is carried out to the positive photoresist layer using the mask plate, The second exposure region is formed in the positive photoresist layer, mask plate is relative to positivity described in the second exposure Position phase of the mask plate relative to positive photoresist layer described in the position of photoresist layer and the first exposure Together, and under the exposure energy effect of the second exposure corresponding exposure size is more than the exposure of the first exposure Corresponding exposure size under energy effect;
Negativity development is carried out to the positive photoresist layer, the positive-tone photo beyond second exposure region is removed Glue-line, forms the target photoresist layer with circular pattern.
2. the patterning method of semiconductor devices according to claim 1, it is characterised in that the mask The figure of version is pass pattern.
3. the patterning method of semiconductor devices according to claim 1, it is characterised in that the positivity There is light acid producing agent and resin in photoresist layer.
4. the patterning method of semiconductor devices according to claim 1, it is characterised in that the positivity The developer that development is used is tetramethyl ammonium hydroxide solution or tetraethyl ammonium hydroxide solution.
5. the patterning method of semiconductor devices according to claim 1, it is characterised in that the negativity The developer that development is used is n-butanol, positive fourth of the twelve Earthly Branches alcohol, hexamethylene, cyclohexanone, methyl methacrylate Or EMA.
6. the patterning method of semiconductor devices according to claim 1, it is characterised in that exposed first After light and before positivity development, the first baking is also carried out to the positive photoresist layer;Exposed second After light and before negativity development, the second baking is also carried out to the positive photoresist layer.
7. the patterning method of semiconductor devices according to claim 1, it is characterised in that forming institute Also include following technique before stating positive photoresist layer:
Hard mask layer is formed in the material layer to be etched;
It is mask to the hard mask layer with the target photoresist layer after the target photoresist layer is formed Perform etching, form ring-type hard mask layer.
8. a kind of forming method of semiconductor devices, it is characterised in that the ring-type formed using claim 7 is hard Mask layer is treated etachable material layer and is performed etching for mask, forms ring target layer.
9. a kind of forming method of semiconductor devices, it is characterised in that use claim 1 to 6 any one The target photoresist layer of formation is treated etachable material layer and is performed etching for mask, forms ring target layer.
CN201510881916.7A 2015-12-03 2015-12-03 The patterning method and forming method of semiconductor devices Pending CN106847676A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201510881916.7A CN106847676A (en) 2015-12-03 2015-12-03 The patterning method and forming method of semiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201510881916.7A CN106847676A (en) 2015-12-03 2015-12-03 The patterning method and forming method of semiconductor devices

Publications (1)

Publication Number Publication Date
CN106847676A true CN106847676A (en) 2017-06-13

Family

ID=59149843

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201510881916.7A Pending CN106847676A (en) 2015-12-03 2015-12-03 The patterning method and forming method of semiconductor devices

Country Status (1)

Country Link
CN (1) CN106847676A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113495430A (en) * 2020-04-07 2021-10-12 芯恩(青岛)集成电路有限公司 Photoresist patterning method and photoresist stripping method
CN114068419A (en) * 2020-08-05 2022-02-18 长鑫存储技术有限公司 Manufacturing method of semiconductor structure and semiconductor structure
CN117555205A (en) * 2022-08-05 2024-02-13 上海光电科技创新中心 Photoetching method and photoetching system

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0817703A (en) * 1994-06-27 1996-01-19 Nec Corp Pattern formation method
US20100167201A1 (en) * 2007-06-12 2010-07-01 Fujifilm Corporation Resist composition for negative tone development and pattern forming method using the same
CN101989046A (en) * 2009-08-06 2011-03-23 中芯国际集成电路制造(上海)有限公司 Pattern transfer method and mask manufacturing method
CN103365092A (en) * 2012-03-31 2013-10-23 中芯国际集成电路制造(上海)有限公司 Dual-photoresist and processing method thereof
CN103365094A (en) * 2012-04-09 2013-10-23 中芯国际集成电路制造(上海)有限公司 Dual tone photoresist structure and processing method thereof
US20140273511A1 (en) * 2013-03-15 2014-09-18 GlobalFoundries, Inc. Methods for fabricating integrated circuits including formation of chemical guide patterns for directed self-assembly lithography

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0817703A (en) * 1994-06-27 1996-01-19 Nec Corp Pattern formation method
US20100167201A1 (en) * 2007-06-12 2010-07-01 Fujifilm Corporation Resist composition for negative tone development and pattern forming method using the same
CN101989046A (en) * 2009-08-06 2011-03-23 中芯国际集成电路制造(上海)有限公司 Pattern transfer method and mask manufacturing method
CN103365092A (en) * 2012-03-31 2013-10-23 中芯国际集成电路制造(上海)有限公司 Dual-photoresist and processing method thereof
CN103365094A (en) * 2012-04-09 2013-10-23 中芯国际集成电路制造(上海)有限公司 Dual tone photoresist structure and processing method thereof
US20140273511A1 (en) * 2013-03-15 2014-09-18 GlobalFoundries, Inc. Methods for fabricating integrated circuits including formation of chemical guide patterns for directed self-assembly lithography

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113495430A (en) * 2020-04-07 2021-10-12 芯恩(青岛)集成电路有限公司 Photoresist patterning method and photoresist stripping method
CN113495430B (en) * 2020-04-07 2023-09-26 芯恩(青岛)集成电路有限公司 Photoresist patterning method and photoresist stripping method
CN114068419A (en) * 2020-08-05 2022-02-18 长鑫存储技术有限公司 Manufacturing method of semiconductor structure and semiconductor structure
CN117555205A (en) * 2022-08-05 2024-02-13 上海光电科技创新中心 Photoetching method and photoetching system

Similar Documents

Publication Publication Date Title
US9070557B2 (en) Method of forming double pattern in a structure
US8853093B2 (en) Method for forming double patterned structure
US8822347B2 (en) Wet soluble lithography
JP2014143415A5 (en)
CN102122113A (en) Photoetching method
US8835100B2 (en) Double patterning by PTD and NTD process
KR20080039006A (en) How to form a mask pattern
US20150294878A1 (en) Method for patterning contact openings on a substrate
JP2013511153A (en) Semiconductor device manufacturing using multiple exposure and blocking mask techniques to reduce design rule violations
JP2011102968A5 (en)
CN106847676A (en) The patterning method and forming method of semiconductor devices
US20130129991A1 (en) Multiple exposure with image reversal in a single photoresist layer
CN104465337A (en) Method for manufacturing metal nanometer slit through PMMA/NEB double-layer glue
US20080160770A1 (en) Method for manufacturing semiconductor device
KR100919366B1 (en) Pattern formation method of semiconductor device
JPH0210362A (en) Fine pattern forming method
JP2017016069A (en) Method for forming resist pattern and method for manufacturing mold
TWI471925B (en) Method of forming an etch mask
CN108962726A (en) The forming method of semiconductor devices
JP6357753B2 (en) Manufacturing method of nanoimprint mold
KR20030077302A (en) method for manufacturing fine pattern
TW201505071A (en) Method for semiconductor self-aligned patterning
CN106154773B (en) The method of correction pattern
JP2008091824A5 (en)
KR20110001693A (en) Contact hole forming mask and contact hole forming method of a semiconductor device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20170613