CN106681075B - Display panel, array substrate and its manufacturing method, detection circuit - Google Patents
Display panel, array substrate and its manufacturing method, detection circuit Download PDFInfo
- Publication number
- CN106681075B CN106681075B CN201710178899.XA CN201710178899A CN106681075B CN 106681075 B CN106681075 B CN 106681075B CN 201710178899 A CN201710178899 A CN 201710178899A CN 106681075 B CN106681075 B CN 106681075B
- Authority
- CN
- China
- Prior art keywords
- detection
- line
- array substrate
- test
- detection circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000001514 detection method Methods 0.000 title claims abstract description 121
- 239000000758 substrate Substances 0.000 title claims abstract description 91
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 25
- 238000012360 testing method Methods 0.000 claims abstract description 89
- 239000010410 layer Substances 0.000 claims description 77
- 239000011241 protective layer Substances 0.000 claims description 22
- 238000000034 method Methods 0.000 claims description 17
- 239000000463 material Substances 0.000 claims description 14
- 239000002184 metal Substances 0.000 claims description 12
- 238000005452 bending Methods 0.000 description 9
- 238000000059 patterning Methods 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 5
- 239000004973 liquid crystal related substance Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000005611 electricity Effects 0.000 description 3
- 239000007769 metal material Substances 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- FGRBYDKOBBBPOI-UHFFFAOYSA-N 10,10-dioxo-2-[4-(N-phenylanilino)phenyl]thioxanthen-9-one Chemical compound O=C1c2ccccc2S(=O)(=O)c2ccc(cc12)-c1ccc(cc1)N(c1ccccc1)c1ccccc1 FGRBYDKOBBBPOI-UHFFFAOYSA-N 0.000 description 1
- 208000037656 Respiratory Sounds Diseases 0.000 description 1
- 230000006978 adaptation Effects 0.000 description 1
- 230000003044 adaptive effect Effects 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003014 reinforcing effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/1306—Details
- G02F1/1309—Repairing; Testing
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/021—Manufacture or treatment of multiple TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/441—Interconnections, e.g. scanning lines
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136254—Checking; Testing
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
- G02F1/136295—Materials; Compositions; Manufacture processes
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mathematical Physics (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
本公开提供一种显示面板、阵列基板及阵列基板的制造方法、检测电路。该检测电路包括检测线、第一连接线、绝缘层和第二连接线，检测线沿阵列基板的边缘设置并形成具有一开口的环路，检测线的第一端和第二端位于环路开口的位置；第一连接线第一端与检测线第一端连接且第一连接线第二端向阵列基板的显示区延伸形成第一测试端；绝缘层至少覆盖检测线以及第一连接线；第二连接线设于绝缘层上且具有一弯折部，第二连接线第一端与检测线第二端连接且至弯折部的部分跨过开口，第二连接线第二端向显示区延伸形成第二测试端。
The present disclosure provides a display panel, an array substrate, a manufacturing method of the array substrate, and a detection circuit. The detection circuit includes a detection line, a first connection line, an insulating layer and a second connection line, the detection line is arranged along the edge of the array substrate and forms a loop with an opening, and the first end and the second end of the detection line are located in the loop the position of the opening; the first end of the first connection line is connected to the first end of the detection line and the second end of the first connection line extends to the display area of the array substrate to form the first test end; the insulating layer covers at least the detection line and the first connection line The second connecting line is arranged on the insulating layer and has a bent portion, the first end of the second connecting line is connected with the second end of the detection line and the part to the bent portion spans the opening, and the second end of the second connecting line faces the The display area extends to form a second test terminal.
Description
Technical field
This disclosure relates to field of display technology, in particular to a kind of display panel, array substrate and array substrate
Manufacturing method, detection circuit.
Background technique
With the extensive use of liquid crystal display, requirement of the people for its quality is also higher and higher.However, manufacture or
In handling process, liquid crystal display inevitably will appear brokenly the breakages such as angle or crackle, these breakages generally occur within liquid crystal display
Marginal position will lead to display effect variation, or even cause not showing.Therefore, there is damaged product flow direction in order to prevent
Market avoids losing, and needs before liquid crystal display dispatches from the factory, and detects to it with the presence or absence of breakage, to sieve in advance
Damaged product is selected, to improve the quality of factory product.
In the prior art, detection breakage is carried out generally by the mode of eye-observation, needs a large amount of staff couple
Product is observed, and human cost is higher, and working efficiency and accuracy are lower；Especially for larger-size product
Speech, to find subtle breakage, difficulty is larger.In addition, breakage may be wrapped up or be blocked for the product after encapsulation, from
And it is more difficult to find by naked eyes.
It should be noted that information is only used for reinforcing the reason to the background of the disclosure disclosed in above-mentioned background technology part
Solution, therefore may include the information not constituted to the prior art known to persons of ordinary skill in the art.
Summary of the invention
A kind of manufacturing method for being designed to provide display panel, array substrate and array substrate of the disclosure, detection electricity
Road, and then one or more is overcome the problems, such as caused by the limitation and defect due to the relevant technologies at least to a certain extent.
According to one aspect of the disclosure, a kind of detection circuit is provided, comprising:
Detection line is arranged along the edge of array substrate and forms the loop with an opening, the first end of the detection line
It is located at the position of loop opening with second end；
First connecting line, the first connecting line first end is connect with the detection line first end and first connecting line
Second end extends to form the first test lead to the viewing area of the array substrate；
Insulating layer at least covers the detection line and first connecting line；
Second connecting line, be set to the insulating layer on and have a bending part, the second connecting line first end with it is described
The part of the connection of detection line second end and the extremely bending part is shown across the opening, the second connecting line second end to described
Show that area extends to form the second test lead.
In a kind of exemplary embodiment of the disclosure, the detection circuit further include:
Protective layer at least covers the insulating layer and second connecting line；
Wiring layers, be set to the protective layer on position corresponding with first test lead and the second test lead and respectively with
First test lead and the connection of the second test lead.
In a kind of exemplary embodiment of the disclosure, the detection circuit further include:
First via hole connects the second connecting line first end and the detection line second end across the insulating layer；
Second via hole connects first test lead across the protective layer and corresponding with first test lead connects
The region of line layer；
Third via hole connects second test lead across the protective layer and corresponding with second test lead connects
The region of line layer.
In a kind of exemplary embodiment of the disclosure, the detection line and first connecting line with the array base
The material of the gate metal layer of plate is identical and same layer is arranged.
In a kind of exemplary embodiment of the disclosure, the Source and drain metal level of second connecting line and the array substrate
Material is identical and same layer is arranged.
In a kind of exemplary embodiment of the disclosure, the transparent electrode layer material of the wiring layers and the array substrate
Identical and same layer is arranged.
According to one aspect of the disclosure, a kind of array substrate is provided, comprising:
Underlay substrate；
Detection circuit described in above-mentioned any one, the detection circuit are formed on the underlay substrate.
According to one aspect of the disclosure, a kind of display panel is provided, comprising:
Array substrate described in above-mentioned any one；
Flexible circuit board, is connected to the array substrate periphery, and the flexible circuit board be equipped with the first test point and
Second test point, first test point are connect with first test lead, with second test point and second test
End connection.
In a kind of exemplary embodiment of the disclosure, the flexible circuit board is equipped with ground terminal, first test
Point can be connected or disconnected with the ground terminal.
According to one aspect of the disclosure, a kind of manufacturing method of array substrate is provided, comprising:
One underlay substrate is provided；
Detection line is formed on the underlay substrate, the detection line is the ring that an opening is formed and had along edges of substrate
Road, and the first end and second end of the detection line is located at the position of loop opening；
The first connecting line, the first connecting line first end and the detection line first end are formed on the underlay substrate
Connection and the first connecting line second end to the viewing area of the array substrate extends to form the first test lead；
At least insulating layer is formed in the detection line and first connecting line；
It is formed on the insulating layer the second connecting line, second connecting line has a bending part, second connection
Line first end connect with the detection line second end and to the part of the bending part across the opening, second connecting line
Second end extends to form the second test lead to the viewing area.
The display panel of the disclosure, the manufacturing method of array substrate and array substrate, detection circuit, since detection line is along lining
The edge of substrate is arranged, and the second connecting line is across the opening of detection line, so as to form a complete loop line；Array
The breakage of substrate edges can make detection line or the second connection thread breakage；So as to pass through the first test lead of detection and the second test lead
Between resistance value judge whether detection circuit is truncated or there are notches, if the resistance value detected tends to be infinitely great or is greater than pre-
If when value, illustrating that detection line or the second connecting line at least have the position being broken at one, causing resistance value excessive, this illustrates the battle array
The edge of column substrate exists damaged.Breakage can be judged whether there is according to the resistance value detected as a result, from manually being examined
It looks into, to improve working efficiency and accuracy, saves human cost.
It should be understood that above general description and following detailed description be only it is exemplary and explanatory, not
The disclosure can be limited.
Detailed description of the invention
The drawings herein are incorporated into the specification and forms part of this specification, and shows the implementation for meeting the disclosure
Example, and together with specification for explaining the principles of this disclosure.It should be evident that the accompanying drawings in the following description is only the disclosure
Some embodiments for those of ordinary skill in the art without creative efforts, can also basis
These attached drawings obtain other attached drawings.
Fig. 1 is the schematic diagram of the array substrate of disclosure example embodiment.
Fig. 2 is the schematic diagram when array substrate in Fig. 1 occurs damaged.
Fig. 3 is the partial sectional view one of the detection circuit of disclosure example embodiment.
Fig. 4 is partial sectional view of the detection circuit after setting detection line and the first connecting line in Fig. 3.
Fig. 5 is partial sectional view of the detection circuit after setting insulating layer and the first via hole in Fig. 3.
Fig. 6 is partial sectional view of the detection circuit after the second connecting line is arranged in Fig. 3.
Fig. 7 is partial sectional view of the detection circuit after setting protective layer, the second via hole and third via hole in Fig. 3.
Fig. 8 is the partial sectional view two of the detection circuit of disclosure example embodiment.
Fig. 9 is the schematic diagram of the display panel of disclosure example embodiment.
Specific embodiment
Example embodiment is described more fully with reference to the drawings.However, example embodiment can be with a variety of shapes
Formula is implemented, and is not understood as limited to embodiment set forth herein；On the contrary, thesing embodiments are provided so that the present invention will
Fully and completely, and by the design of example embodiment comprehensively it is communicated to those skilled in the art.Identical attached drawing in figure
Label indicates same or similar structure, thus the detailed description that will omit them.
Although the term of relativity, such as "upper" "lower" is used to describe a component of icon for another in this specification
The relativeness of one component, but these terms are in this manual merely for convenient, for example, with reference to the accompanying drawings described in show
The direction of example.It is appreciated that, if making it turn upside down the device overturning of icon, the component described in "upper" will
As the component in "lower".When certain structure is at other structures "upper", it is possible to refer to that certain structural integrity is formed in other structures
On, or refer to that certain structure is " direct " and be arranged in other structures, or refer to that certain structure is arranged by the way that another structure is " indirect " in other knots
On structure.
Term "one", " one ", "the" and " described " to indicate there are one or more elements/component part/etc.；With
Language " comprising " and " having " is to indicate the open meaning being included and refer to element/composition portion in addition to listing
Also may be present except divide/waiting other element/component part/etc.；Term " first ", " second " and " third " etc. is only as label
It uses, is not the quantity limitation to its object.
This example embodiment provides a kind of detection circuit, be used for array substrate, the array substrate have viewing area and
Non-display area, non-display area are located at the periphery of viewing area.Such as FIG. 1 to FIG. 8, which may include that detection line 1, first connects
Wiring 2, insulating layer 3 and the second connecting line 4.
In this example embodiment, such as Fig. 4, detection line 1 can be arranged along the edge of array substrate, and be formed with a ring
Road, the loop have opening 101；Wherein, which is arranged in the upper surface of the underlay substrate 10 of the array substrate and can be located at
In non-display area, which can be underlay substrate 10 for the surface of thin film transistor (TFT) to be arranged；The detection line 1 is opened above-mentioned
It is disconnected at mouth 101, so that detection line 1 can have a first end and a second end, 1 first end of detection line and 1 second end of detection line difference
Positioned at two side positions of above-mentioned opening 101；Detection line 1 can be metal material, can guarantee conduction, herein not to detection line 1
Material do particular determination.
In this example embodiment, the first connecting line 2 can be had a first end and a second end；Wherein, the first connecting line 2
One end can be connect with 1 first end of detection line, and 2 second end of the first connecting line can extend to the viewing area of above-mentioned array substrate, with
The first test lead is formed, first test lead with a test pencil of multimeter for connecting；Metal material can be used in first connecting line 2
Matter, material can be identical or different with detection line 1, do not do particular determination herein, can guarantee conduction；Such as Fig. 4, if first connects
Wiring 2 is identical with the material of detection line 1, then the first connecting line 2 and detection line 1 can also be an integral structure, to simplify structure,
It avoids connecting the first connecting line 2 and detection line 1 using special Joining Technology.
In the present embodiment, such as Fig. 4, detection line 1 and the first connecting line 2 can be with the gate metal layers of array substrate
Material is identical and same layer is arranged, and connects so as to be formed simultaneously gate metal layer and detection line 1 and first by a patterning processes
Wiring 2 avoids manufacturing respectively and making complex process, advantageously reduces manufacture difficulty and cost.
In this example embodiment, such as Fig. 5, insulating layer 3 can move towards setting along detection line 1 and the first connecting line 2
In in detection line 1 and the first connecting line 2, while covering detection line 1 and the first connecting line 2 and filling opening 101；But it insulate
The coverage area of layer 3 is not limited to detection line 1 and the first connecting line 2, can also cover not set detection on underlay substrate 10
The region of line 1 and the first connecting line 2.
In the present embodiment, insulating layer 3 can and same layer identical as the material of the gate insulating layer of array substrate be arranged, from
And gate insulating layer and the insulating layer 3 can be formed simultaneously by a coating process, it avoids manufacturing respectively and making complex process, have
Conducive to reduction manufacture difficulty and cost.
In this example embodiment, such as Fig. 6, the second connecting line 4 be may be disposed on insulating layer 3, and second connecting line 4
There can be the first end and second end of a bending part He the bending part both ends；Second connecting line, 4 first end and 1 second end of detection line
Connection, and 4 first end of the second connecting line is to the part of the bending part across above-mentioned opening 101,4 second end of the second connecting line to
Above-mentioned viewing area extends, to form the second test lead；Second test lead is used to connect with another test pencil of above-mentioned multimeter,
To the resistance for the route that detectable detection line 1, the first connecting line 2 and the second connecting line 4 are constituted；Due to the second connecting line 4 across
Opening 101 is crossed, so as to cooperatively form the complete loop line along the setting of 10 edge of underlay substrate with detection line 1, so that working as
When array substrate edge occurs damaged, detection line 1 or the second connecting line 4 will appear fracture, avoid going out in above-mentioned 101 position of opening
When existing damaged, there is undetectable problem.
In the present embodiment, such as Fig. 5, position corresponding with 4 second end of the second connecting line can also quilt on underlay substrate 10
Above-mentioned insulating layer 3 covers, and to provide support to 4 second end of the second connecting line, prevents it hanging.
It should be noted that detection resistance value is not limited to using multimeter, can also can be used for detecting electricity using other
The device of resistance, does not do particular determination herein.
In the present embodiment, the second connecting line 4 can and same layer identical as the material of the Source and drain metal level of array substrate set
It sets, so as to be formed simultaneously Source and drain metal level and the second connecting line 4 by a patterning processes, avoids manufacturing respectively and making technique
Complexity advantageously reduces manufacture difficulty and cost.
In this example embodiment, such as Fig. 7, above-mentioned detection circuit can also include protective layer 5 and wiring layers 6,
In:
Protective layer 5 can use isolation material；And protective layer 5 may be disposed on insulating layer 3 and the second connecting line 4, and can
Cover the region that the second connecting line 4 and insulating layer 3 are not covered by the second connecting line 4；The protective layer 5 can also cover underlay substrate
Other regions on 10, are not described in detail herein.
Wiring layers 6 can be metal material；Wiring layers 6 may include first area 61 and second area 62, the first area
61 and second area 62 can same layer setting；Wherein, first area 61 can be set to position corresponding with the first test lead on protective layer 5
And connect with the first test lead, second area can be set to position corresponding with the second test lead on protective layer 5 and test with second
End connection.When detecting, the test pencil of above-mentioned multimeter can be contacted with the first area 61 of wiring layers 6 and second area 62, is kept away
Exempt from the first test lead and the second test lead is directly contacted with test pencil, prevents the first test lead and the second test lead from wearing.
In this example embodiment, wiring layers 6 can and same layer identical as the transparent electrode layer material of array substrate be arranged,
So as to be formed simultaneously transparent electrode layer and wiring layers 6 by a patterning processes, avoids manufacturing respectively and making complex process, have
Conducive to reduction manufacture difficulty and cost.
In this example embodiment, such as Fig. 5 and Fig. 7, above-mentioned detection circuit can also include the first via hole 7, second
Via hole 8 and third via hole 9, in which:
Such as Fig. 5, the first via hole 7 can be arranged through insulating layer 3, and one end of the first via hole 7 and 4 first end of the second connecting line
Connection, the other end connect with 1 second end of detection line, to pass through the via hole 7 for 4 first end of the second connecting line and detection line 1 the
Two ends connect；Meanwhile the quantity of first via hole 7 can be one, two or more, not make herein to its quantity special
Different to limit, each first via hole 7 can connect 4 first end of the second connecting line and 1 second end of detection line.First via hole 7 opens up
It can be carried out before forming the second connecting line 4 after having formed insulating layer 3.
Such as Fig. 7, the second via hole 8 may pass through the setting of protective layer 5, and 8 one end of the second via hole can be connect with the first test lead, separately
One end can be connect with the first area 61 of wiring layers 6；The quantity of second via hole 8 can be one, two or more, herein not
Particular determination is made to its quantity, each second via hole 8 can connect the first area 61 of the first test lead and wiring layers 6.
Such as Fig. 7, third via hole 9 can also penetrate through the setting of protective layer 5, and 9 one end of third via hole can be connect with the second test lead,
The other end can be connect with the second area 62 of wiring layers 6；The quantity of third via hole 9 can be one, two or more, herein
Particular determination is not made to its quantity, each third via hole 9 can connect the first area 62 of the first test lead and wiring layers 6.
Second via hole 8 and opening up for third via hole 9 can carry out before forming wiring layers 6 after having formed protective layer 5.
Disclosure example embodiment also provides a kind of array substrate, such as Fig. 1, which may include underlay substrate
10 and any of the above-described example embodiment in detection circuit, the detection circuit can be set to underlay substrate 10 upper surface and be located at
In non-display area, which can be underlay substrate 10 for the surface of thin film transistor (TFT) to be arranged.
The detection circuit and array substrate of disclosure example embodiment can pass through the first test lead of detection and the second test
Resistance value between end judges whether detection circuit is truncated or there are notches；If the resistance value detected tends to be infinitely great or is greater than
When preset value, such as Fig. 2 illustrates that detection line 1 or the second connecting line 4 at least have the position being broken at one, causes resistance value excessive,
It is damaged that this illustrates that the edge of the array substrate exists.Breakage can be judged whether there is according to the resistance value detected as a result, from
It is manually checked, to improve working efficiency and accuracy, saves human cost.
Disclosure example embodiment also provides a kind of display panel, such as Fig. 9, which may include flexible circuit
Array substrate in plate 11 and any of the above-described example embodiment；
In this example embodiment, flexible circuit board 11 is bent, and may connect to the periphery of array substrate, this is soft
Property circuit board 11 can have the first test point 111 and the second test point 112；First test point 111 can be with above-mentioned detection circuit
The connection of first test lead, the second test point 112 can be connect with the second test lead of above-mentioned detection circuit.It is needing to detect display surface
When plate is with the presence or absence of breakage, the test pencil of multimeter can be contacted with the first test point 111 and the second test point 112 respectively,
So as to judge whether detection circuit is truncated or there are notches according to the resistance value detected, to judge whether there is brokenly
Damage, it is ensured that can still provide for detecting when the test lead of the first test lead sum is blocked.
In this example embodiment, settable ground terminal 113 on flexible circuit board 11, the first test point 111 can with connect
Ground terminal 113 connects or disconnects；For example, when needing to detect damaged, the first test point 111 can be made to disconnect with ground terminal 113,
The resistance value between multimeter detection the first test point 111 and the second test point 112 can be used；It, can be by first in routine use
Test point 111 is connect with ground terminal 113, so that above-mentioned detection circuit be made to be grounded, convenient for export electrostatic, ensures display panel
It works normally.
The display panel of disclosure example embodiment, can be by between the first test point 111 of detection and the second test point 112
Resistance value judge whether detection circuit is truncated or there are notches, if the resistance value region detected tends to be infinitely great or is greater than
When preset value, illustrates that detection line 1 or the second connecting line 4 at least have the position being broken at one, cause resistance value excessive, this explanation
The edge of the array substrate exists damaged.Breakage can be judged whether there is according to the resistance value detected as a result, from carrying out people
Work inspection saves human cost to improve working efficiency and accuracy.
It should be noted that the display panel of this example embodiment can also include color membrane substrates 12, driving such as Fig. 9
Chip 13 and other components for having been known technology, are not described in detail herein.
Disclosure example embodiment also provides a kind of manufacturing method of array substrate, and the manufacturing method of the array substrate can
To include:
Step S110, a underlay substrate 10 is provided；
Step S120, detection line 1 is formed on underlay substrate 10, detection line 1 is to be formed and had out along edges of substrate
The loop of mouth 101, and the first end and second end of detection line 1 is located at the position of loop opening 101；
Step S130, the first connecting line 2,2 first end of the first connecting line and detection line 1 first are formed on underlay substrate 10
It holds connection and 2 second end of the first connecting line extends to form the first test lead, such as Fig. 4 to the viewing area of array substrate；
Step S140, insulating layer 3 is formed at least in detection line 1 and the first connecting line 2, such as Fig. 5；
Step S150, the second connecting line 4 is formed on the insulating layer 3, and the second connecting line 4 has a bending part, the second connection
4 first end of line connect with 1 second end of detection line and to the part of bending part across opening 101, and 4 second end of the second connecting line is to aobvious
Show that area extends to form the second test lead, such as Fig. 6.
In this example embodiment, the embodiment of step S120 and step S130 can refer to the grid to form array substrate
The patterning processes of pole metal layer；And detection line 1 and the first connecting line 2 can be formed with gate metal layer by a patterning processes,
Details are not described herein for its detailed process.
In this example embodiment, the embodiment of step S140 can refer to the shape to form the gate insulation layer of array substrate
At mode；And insulating layer 3 can be with gate insulation layer by being formed simultaneously, details are not described herein for detailed process.
In this example embodiment, the Source and drain metal level to form array substrate can refer in the embodiment of step S150
Patterning processes, and the second connecting line 4 can be formed with Source and drain metal level by a patterning processes, and detailed process is herein no longer
It repeats.
In this example embodiment, the manufacturing method of the array substrate can also include:
Step S160, protective layer, such as Fig. 7 at least are formed on insulating layer 3 and the second connecting line 4；
Step S170, position corresponding with the first test lead and the second test lead forms wiring layers 6 and divides on the protective layer 5
It is not connect with first test lead and the second test lead, such as Fig. 3.
In this example embodiment, the manufacturing method of the array substrate can also include:
After having formed insulating layer 3, is formed before the second connecting line 4, the first via hole 7 is formed on the insulating layer 3, such as Fig. 5；
After having formed protective layer 5, is formed before wiring layers 6, form the second via hole 8 and third via hole on the protective layer 5
9, such as Fig. 7.
The details of each step can refer to above-mentioned detection electricity in the manufacturing method of the array substrate of disclosure example embodiment
Description in the example embodiment of road and array substrate.The manufacturing method can be used for manufacturing any of the above-described example embodiment
Array substrate.The beneficial effect of the manufacturing method can refer to the beneficial effect of the array substrate of above-mentioned example embodiment, herein
It repeats no more.
Those skilled in the art after considering the specification and implementing the invention disclosed here, will readily occur to its of the disclosure
Its embodiment.This application is intended to cover any variations, uses, or adaptations of the disclosure, these modifications, purposes or
Person's adaptive change follows the general principles of this disclosure and including the undocumented common knowledge in the art of the disclosure
Or conventional techniques.The description and examples are only to be considered as illustrative, and the true scope and spirit of the disclosure are by appended
Claim is pointed out.
Claims (10)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710178899.XA CN106681075B (en) | 2017-03-23 | 2017-03-23 | Display panel, array substrate and its manufacturing method, detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710178899.XA CN106681075B (en) | 2017-03-23 | 2017-03-23 | Display panel, array substrate and its manufacturing method, detection circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106681075A CN106681075A (en) | 2017-05-17 |
| CN106681075B true CN106681075B (en) | 2019-05-28 |
Family
ID=58829198
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710178899.XA Active CN106681075B (en) | 2017-03-23 | 2017-03-23 | Display panel, array substrate and its manufacturing method, detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106681075B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109390286B (en) * | 2017-08-09 | 2022-04-15 | 昆山国显光电有限公司 | Array substrate and its manufacturing method, display panel and its manufacturing method |
| CN109991489A (en) * | 2017-12-30 | 2019-07-09 | 深圳市泰瑞达科技有限公司 | A kind of the safety detection circuit and its system of heating coating component |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7098987B1 (en) * | 2005-08-24 | 2006-08-29 | Chunghwa Picture Tubes, Ltd. | Array of active devices and method for testing an array of active devices |
| CN102338943A (en) * | 2010-07-27 | 2012-02-01 | 北京京东方光电科技有限公司 | Array substrate, liquid crystal display panel, liquid crystal display and manufacturing and detecting method |
| CN105182640A (en) * | 2015-09-06 | 2015-12-23 | 京东方科技集团股份有限公司 | Array substrate and display device |
| CN105393165A (en) * | 2014-07-15 | 2016-03-09 | 华为技术有限公司 | Method for detecting substrate crack, substrate and detection circuit |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3001182B2 (en) * | 1995-08-29 | 2000-01-24 | 信越ポリマー株式会社 | Liquid crystal panel inspection apparatus and method of manufacturing the same |
| CN201298124Y (en) * | 2008-12-12 | 2009-08-26 | 北京京东方光电科技有限公司 | Motherboard |
| CN202693933U (en) * | 2012-05-16 | 2013-01-23 | 天马微电子股份有限公司 | Liquid crystal module |
-
2017
- 2017-03-23 CN CN201710178899.XA patent/CN106681075B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7098987B1 (en) * | 2005-08-24 | 2006-08-29 | Chunghwa Picture Tubes, Ltd. | Array of active devices and method for testing an array of active devices |
| CN102338943A (en) * | 2010-07-27 | 2012-02-01 | 北京京东方光电科技有限公司 | Array substrate, liquid crystal display panel, liquid crystal display and manufacturing and detecting method |
| CN105393165A (en) * | 2014-07-15 | 2016-03-09 | 华为技术有限公司 | Method for detecting substrate crack, substrate and detection circuit |
| CN105182640A (en) * | 2015-09-06 | 2015-12-23 | 京东方科技集团股份有限公司 | Array substrate and display device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106681075A (en) | 2017-05-17 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7889308B2 (en) | Liquid crystal display device | |
| CN101266373B (en) | Liquid crystal display device and method for fabricating the same | |
| KR102710745B1 (en) | Flexible organic light emitting diode display device | |
| CN105122125B (en) | Liquid crystal display and liquid crystal display detection method and electronic installation | |
| CN101770122B (en) | Thin film transistor liquid crystal display (TFT-LCD) array substrate as well as manufacturing method and test method thereof | |
| US9252164B2 (en) | Display device and method for manufacturing the same | |
| CN108008850A (en) | Electronic device | |
| CN208284480U (en) | Display base plate, display device | |
| CN108984012A (en) | Display device | |
| CN107422551A (en) | Display device | |
| US20180146578A1 (en) | Display apparatus and manufacturing method thereof | |
| CN106681075B (en) | Display panel, array substrate and its manufacturing method, detection circuit | |
| WO2019227964A1 (en) | Array substrate, display device, and method for forming array substrate | |
| CN103926770B (en) | Thin film transistor array panel and manufacturing method thereof | |
| CN109192072A (en) | Display panel and display device | |
| CN109991769A (en) | The inspection method of display device, the manufacturing method of display device and display device | |
| CN107179639A (en) | Array base palte and preparation method thereof and display panel | |
| CN109142453A (en) | Display panel and display panel testing method | |
| CN104485337B (en) | The preparation method of thin-film transistor array base-plate and thin-film transistor array base-plate | |
| CN105867697B (en) | The production method of display panel, display device and display panel | |
| CN106935600B (en) | A display panel and display device | |
| CN106338867B (en) | VCOM Wiring structure, display panel and VCOM Wiring structure production method | |
| CN110993659A (en) | Touch panel and display device | |
| CN115621253A (en) | Display panel, array substrate and test method | |
| CN208737124U (en) | Display panel |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |