CN106652935B - Display control circuit and operation method thereof - Google Patents

Abstract

The invention discloses a display control circuit and an operation method thereof. The liquid crystal capacitor is coupled to the common voltage terminal for displaying according to the data voltage. The charging unit is coupled to the liquid crystal capacitor and used for controlling charging of the liquid crystal capacitor. The write unit is used for receiving a data voltage. The maintaining unit is coupled to the writing unit and the liquid crystal capacitor. The first capacitor is coupled to the charging unit and the writing unit.

Description

Display control circuit and its operation method

technical field

The present invention relates to a display control circuit, especially a display control circuit comprising a charging unit, a writing unit, and a maintaining unit, so as to control the charging state of the liquid crystal capacitor.

Background technique

In the field of liquid crystal display, in a display control circuit (such as a pixel control circuit of a liquid crystal display), a driving transistor as a source follower can control whether a data voltage is written into a liquid crystal capacitor. However, the driving transistor is prone to aging with long-term use, which affects the gray scale accuracy of the liquid crystal display.

Currently, a six-transistor-two-capacitor (also known as 6T2C) structure display control circuit can be seen in the field, which can detect and compensate the threshold voltage drift of the transistor of the source follower, thereby alleviating the influence of transistor aging. The display control circuit of the 6T2C structure includes six transistors and two capacitors, four control lines and three reference power lines, a total of seven signal lines.

In addition, a six-transistor-three-capacitor (also known as 6T3C) structure display control circuit can be seen in the art, which can also be used to compensate the threshold voltage shift of the driving transistor. The display control circuit of the 6T3C structure includes six transistors and three capacitors, three control lines and two reference power lines, a total of five signal lines.

As mentioned above, the current display control circuit usually includes at least six transistors and five to seven signal lines. The display control circuits of the above 6T2C architecture and 6T3C architecture have complex structures, too many components and signal lines, resulting in low aperture ratio and poor light transmission effect. Therefore, a better solution is still needed in the field of liquid crystal display to increase the aperture ratio, simplify the circuit structure, reduce the number of components and signal lines, and avoid poor display grayscale accuracy caused by transistor aging.

Contents of the invention

An embodiment of the present invention provides a display control circuit, which includes a liquid crystal capacitor, a charging unit, a writing unit, a maintaining unit and a first capacitor. The liquid crystal capacitor includes a first terminal and a second terminal, and the second terminal of the liquid crystal capacitor is coupled to a common voltage terminal for displaying according to a data voltage. The charging unit includes a first terminal, a control terminal and a second terminal, and the second terminal of the charging unit is coupled to the first terminal of the liquid crystal capacitor. The writing unit includes a first terminal, a second terminal and a control terminal, and the first terminal of the writing unit is used for receiving data voltage. The sustain unit includes a first terminal, a second terminal and a control terminal. The first terminal of the sustain unit is coupled to the second terminal of the writing unit, and the second terminal of the sustain unit is coupled to the first terminal of the liquid crystal capacitor. The first capacitor includes a first terminal and a second terminal, the first terminal of the first capacitor is coupled to the control terminal of the charging unit, and the second terminal of the first capacitor is coupled to the second terminal of the writing unit.

Another embodiment of the present invention provides an operation method of a display control circuit. The display control circuit includes a liquid crystal capacitor, a charging unit, a writing unit, a maintaining unit, a switch, and a first capacitor. The first end of the charging unit is used to receive an operating voltage, and the first end of the liquid crystal capacitor is coupled to the second end of the charging unit. , the second terminal of the liquid crystal capacitor is coupled to the common voltage terminal, the switch has a first off and a second terminal, the control terminal of the charging unit is coupled to the second terminal of the switch, and the first terminal of the first capacitor is coupled to the charging unit The control terminal of the first capacitor, the second terminal of the first capacitor is coupled to the second terminal of the writing unit, and the first terminal of the writing unit is used to receive the data voltage. The operation method includes: in the reset phase, keeping the writing unit closed state, open the switch and maintain the unit, adjust the level of the first end of the switch to open the charging unit, and adjust the operating voltage to reset the level of the first end of the liquid crystal capacitor; in the compensation phase after the reset phase, adjust the operation The voltage is used to charge the first end of the liquid crystal capacitor through the charging unit, so that the first end of the liquid crystal capacitor is charged to a predetermined level; in the writing phase after the compensation phase, the maintenance unit and the switch are turned off, and the writing unit is turned on, so that the first end of the first capacitor is raised to the sum of the data voltage and the threshold voltage; in the sustain phase after the write phase, the write unit is turned off, so that the level of the first end of the liquid crystal capacitor substantially corresponds to the data voltage voltage; and adjusting the level of the first end of the switch to turn off the charging unit in the display phase after the maintenance phase.

Another embodiment of the present invention provides a method for operating a display control circuit. The display control circuit includes a charging unit, a writing unit, a maintaining unit, a first capacitor, a third switch, and a liquid crystal capacitor. The charging unit includes A first switch and a second switch, a first end of the second switch is used to receive an operating voltage, a second end of the second switch is coupled to a first end of the first switch and a first end of the third switch First terminal, a control terminal of the first switch is coupled to a second terminal of the third switch and a first terminal of the first capacitor, a second terminal of the first switch is coupled to a first terminal of the liquid crystal capacitor and a second terminal of the sustain unit, a second terminal of the liquid crystal capacitor is coupled to a common voltage terminal, a first terminal of the sustain unit is coupled to a second terminal of the first capacitor, and a second terminal of the write unit end, a first end of the write unit is used to receive a data voltage, the operation method includes: in a reset phase, turn on the second and third switches, the write unit and the sustain unit, so that the second of the first capacitor Terminal and the second terminal of the first switch are reset to a predetermined level, so that the level difference between the control terminal and the second terminal of the first switch is greater than a threshold value, and then the first switch is turned on; after the reset phase, a In the compensation phase, the writing unit is closed to charge the first end of the first capacitor to a first potential, and the second end of the first capacitor is charged to the difference between the first potential and the threshold value; after the compensation phase In a writing stage, the third switch and the sustaining unit are closed, and the writing unit is turned on, so that the data voltage is written into the second terminal of the first capacitor, and the level of the first terminal of the first capacitor is raised to the data voltage and the sum of the threshold value; in a sustain phase after the write phase, turn off the writing unit so that the level of the second end of the first switch corresponds to the data voltage; and in a display phase after the sustain phase, turn off the second switch.

The display control circuit provided by the embodiment of the present invention can have a simpler structure, fewer components and fewer signals, so the aperture ratio can be increased and the display effect can be improved. In addition, the display control circuit provided by the embodiment of the present invention can still compensate Transistor threshold voltage drift.

Description of drawings

FIG. 1 is a schematic diagram of a display control circuit according to an embodiment of the present invention.

FIG. 2 is a schematic diagram of a display control circuit according to another embodiment of the present invention.

FIG. 3 is a schematic diagram of a display control circuit according to an embodiment of the invention.

FIG. 4 is an operation waveform diagram of the display control circuit of the embodiment of FIG. 3 .

5-9 are diagrams illustrating the operation of the display control circuit of the embodiment shown in FIG. 3 .

FIG. 10 is a diagram of the measurement results of the embodiments of FIGS. 3 to 9 .

FIG. 11 is a flowchart of the operation steps of the display control circuit according to the embodiment of the present invention.

FIG. 12 is a schematic diagram of a display control circuit according to another embodiment of the present invention.

FIG. 13 is an operation waveform diagram of the display control circuit of the embodiment in FIG. 12 .

14-18 are diagrams illustrating the operation of the display control circuit of the embodiment of FIG. 12 .

FIG. 19 is a diagram of the measurement results of the embodiment shown in FIGS. 11 to 17 .

FIG. 20 is a flowchart of the operation method of the display control circuit shown in FIGS. 12 to 18 .

Among them, reference signs:

100, 100a, 300, 1100 display control circuit

110 LCD capacitor

120 charging unit

130 write units

140 maintenance units

150 first capacitor

160 second capacitor

170 hold capacitor

Vd data voltage

V _COM common voltage terminal

V _DD operating voltage

V _DDH , V _{REF_H} high level

V _DDL , V _{REF_L} low level

S1, S2, S3 control signals

V _REF reference potential

VA0, VA3, VA3’, VC0, VC3, curve

VC3', VB0, VB3

V _TH Threshold Voltage

V _TH1 Threshold

A, B, C nodes

P1 reset phase

P2 compensation stage

P3 write stage

P4 maintenance phase

P5 display stage

T1 first switch

T2 second switch

T3 third switch

T4 fourth switch

T5 fifth switch

1110 to 1150, 2010 to 2050 steps

Detailed ways

FIG. 1 is a schematic diagram of a display control circuit 100 according to an embodiment of the present invention. The control circuit 100 includes a liquid crystal capacitor 110 , a charging unit 120 , a writing unit 130 , a maintaining unit 140 , a first capacitor 150 and a second capacitor 160 . The liquid crystal capacitor 110 includes a first terminal and a second terminal, and the second terminal is coupled to the common voltage terminal V _COM for displaying according to the data voltage Vd. The charging unit 120 may include a first terminal, a control terminal, and a second terminal coupled to the first terminal of the liquid crystal capacitor 110 . The writing unit 130 may include a first terminal, a second terminal, and a control terminal, and the first terminal may be used to receive the data voltage Vd. The sustain unit 140 may include a first terminal, a second terminal and a control terminal. The first terminal of the sustain unit 140 is coupled to the second terminal of the writing unit 130 , and the second terminal is coupled to the first terminal of the liquid crystal capacitor 110 . The first capacitor 150 may include a first terminal and a second terminal, the first terminal is coupled to the control terminal of the charging unit 120 , and the second terminal is coupled to the second terminal of the writing unit 130 . The second capacitor 160 may include a first terminal and a second terminal, and the first terminal is coupled to the second terminal of the first capacitor 150 .

FIG. 2 is a schematic diagram of a display control circuit 100a according to another embodiment of the present invention. The structure of the display control circuit 100 a is similar to that of the display control circuit 100 , but may further include a holding capacitor 170 . The holding capacitor 170 may include a first terminal and a second terminal, the first terminal is coupled to the first terminal of the liquid crystal capacitor 110 , and the second terminal is coupled to the common voltage terminal V _COM . The holding capacitor 170 can help the liquid crystal capacitor 110 maintain the level, and can be used according to requirements. The liquid crystal capacitor 110 is used to represent the corresponding capacitor of the liquid crystal element, and the liquid crystal element is used for light display.

FIG. 3 is a schematic diagram of a display control circuit 300 according to an embodiment of the present invention. The display control circuit 300 can be composed of a plurality of switches, capacitors and signal lines based on the structures shown in FIGS. 1 and 2 . In the display control circuit 300 , the charging unit 120 may include a first switch T1 , which may include a first terminal for receiving the operating voltage V _DD , and a second terminal coupled to the first terminal of the liquid crystal capacitor 110 . The writing unit 130 may include a second switch T2, the second switch T2 may include a first terminal, a control terminal and a second terminal, the first terminal is used to receive the data voltage Vd, the control terminal is controlled by the control signal S2, and the second terminal is coupled to connected to the first end of the second capacitor 160 . The holding unit 140 may include a third switch T3, the holding unit 140 may include a first end, a second end and a control end, the first end is coupled to the second end of the second switch T2, the control end is used to receive the control signal S1, The second end is coupled to the second end of the first switch T1. The display control circuit 300 may further include a fourth switch T4. The fourth switch T4 may include a first terminal, a second terminal and a control terminal, the first terminal is coupled to the second terminal of the second capacitor 160, the control terminal is coupled to the control terminal of the third switch T3 and is also controlled by the control signal S1 control, the second terminal is coupled to the control terminal of the first switch T1. In this embodiment, the first terminal of the fourth switch T4 and the second terminal of the second capacitor 160 can be coupled to the reference potential V _REF .

FIG. 4 is an operation waveform diagram of the display control circuit 300 in the embodiment of FIG. 3 . 5 to 9 are diagrams illustrating the operation of the display control circuit 300 of the embodiment of FIG. 3 . In FIG. 4 , the waveforms of the control signals S1 and S2 , the operating voltage V _DD and the reference potential V _REF correspond to the reset phase P1 , the compensation phase P2 , the write phase P3 , the sustain phase P4 and the display phase P5 . These five stages can be carried out cyclically.

Figure 5 may correspond to a reset phase P1 following a display phase P5. Among them, the components marked with a cross (symbol ×) represent off (off), and the components without a cross represent open (on). The same applies to the following figures. In the reset phase P1, the control signal S2 can be used to turn off the second switch T2, and the control signal S1 can be used to turn on the third switch T3 and the fourth switch T4, so that the reference potential V _REF of the high level V _{REF_H} at this time turns on the first switch T1, To reset the level of the first terminal (node C) of the liquid crystal capacitor 110 . At this time, the operating voltage V _DD can be adjusted to the low level V _DDL , so the level of the first terminal (node C) of the liquid crystal capacitor 110 can be reset to the low level V _DDL through the first switch T1 being turned on. , the first terminal (node B) of the third switch T3 can also be reset to the low level V _DDL through the turned-on third switch T3 .

Figure 6 may correspond to a compensation phase P2 following a reset phase P1. In the compensation stage, the operating voltage V _DD can be adjusted to the high level V _DDH , and the second switch T2 can be continuously turned off by the control signal S2, and the third switch T3 and the fourth switch T4 can be continuously turned on by the control signal S1, thereby enabling At this time, the reference potential V _REF of the high level V _{REF_H} continues to turn on the first switch T1, so as to charge the first end (node C) of the liquid crystal capacitor 110 through the first switch T1, so that the first end (node C) of the liquid crystal capacitor 110 C) and the first terminal (node B) of the third switch T3 are charged to a predetermined level for turning off the first switch T1. The predetermined level can be the difference between the reference potential V _REF and the threshold voltage V _TH of the first switch T1 , ie (V _REF −V _TH ). The reference potential V _REF at this stage can be a high level V _{REF_H} , so the first terminal (node C) of the liquid crystal capacitor 110 and the first terminal (node B) of the third switch T3 can be charged to (V _{REF_H} −V _TH ), the potential difference between the first end (node A) of the first capacitor 150 and the first end (node B) of the third switch T3 is the threshold voltage V _TH .

FIG. 7 may correspond to the writing phase P3 following the compensation phase P2. In the writing phase P3, the control signals S1 and S2 can be adjusted to turn off the third switch T3 and the fourth switch T4 and turn on the second switch T2. Since the potential difference of the threshold voltage _VTH already exists in the first capacitor 150, the first terminal (node A) of the first capacitor 150 can be raised to the sum of the data voltage Vd and the threshold voltage _VTH , that is, (Vd+V _TH ).

FIG. 8 may correspond to a sustain phase P4 following the write phase P3. In the maintenance phase P4, the control signal S2 can be adjusted to turn off the second switch T2, and the third switch T3 and the fourth switch T4 can be continuously turned off by the control signal S1. At this time, the control terminal and the second terminal of the first switch T1 may have a voltage difference of the threshold voltage V _TH , so the level of the second terminal (node C) of the first switch T1 may be the level of node A minus the threshold voltage. voltage V _TH . The operating voltage V _DD can be maintained at the high level V _DDH to continuously charge the node C through the first switch T1, so that the level of the node C can be charged to [(Vd+V _TH )-V _TH in the maintenance phase P4 ], that is, the data voltage Vd. Therefore, according to the embodiment of the present invention, the level of the first terminal (node C) of the liquid crystal capacitor 110 can substantially correspond to the data voltage Vd in the sustain phase P4, so that the liquid crystal capacitor 110 displays according to the data voltage Vd.

FIG. 9 may correspond to the display phase P5 after the sustain phase P4. In the display stage P5, the reference level V _REF can be adjusted to the low level V _{REF_L} , and the second switch T2, the third switch T3 and the fourth switch T4 can be continuously turned off by the control signal S1 and the control signal S2, so that the node B It is coupled to the low level through the second capacitor 160 . Since the nodes A and B are floatingly connected to each other through the first capacitor 150 at this time, the nodes A and B are essentially connected in series. Therefore, the node A can also be coupled to a low level through the first capacitor 150 , so that the first switch T1 can be turned off. As shown in FIG. 9 , in the display stage P5, the liquid crystal capacitor 110 can control the liquid crystal molecules sandwiched therebetween according to the data voltage Vd, and then control the polarization of light passing through the liquid crystal molecules, thereby achieving the effect of controlling the gray scale of the pixel. And the first switch T1 to the fourth switch T4 are all closed, so the aging of the transistors in the switches can be slowed down, and the leakage of the node C can be suppressed.

FIG. 10 is a diagram of the measurement results of the embodiments of FIGS. 3 to 9 . The horizontal axis of FIG. 10 may be time, and its unit may be microseconds (μsec), and the vertical axis may be voltage, and its unit may be Volt. Curves VA0 , VA3 , and VA3' can be the voltage changes of node A in FIGS. 3 , 5-9 respectively. Curves VC0 , VC3 , and VC3 ′ can represent voltage changes at node C in FIGS. 3 , 5-9 respectively. Among them, the curves VA0 and VC0 can be the difference between the critical voltage V _TH of the transistor and the predetermined level is 0 volts, that is, the measurement results when the critical voltage does not shift, and the curves VA3 and VC3 can be the critical voltage V _TH of the transistor. The difference from the predetermined level is +3 volts, that is, the measurement results when the threshold voltage shifts by +3 volts, the curves VA3' and VC3' can be the difference between the threshold voltage V _TH of the transistor and the predetermined level is - 3 volts, that is, the measurement result when the threshold voltage is shifted by -3 volts. In addition, the control signal S2 can also be seen in the waveform diagram of FIG. 10 . When the control signal S2 is in a high state, it can correspond to the writing phase P3. It can be seen from FIG. 10 that when the threshold voltage _VTH varies in the range of -3 to +3 volts, the levels of the curves VC0, VC3, and VC3' are almost the same at the end of the sustain phase P4 and the display phase P5. In other words, according to the embodiments of FIGS. 3 to 9 of the present invention, the level of the first terminal (node C) of the liquid crystal capacitor 110 can emit light corresponding to the data voltage Vd, and the drift variation of the threshold voltage V _TH can be reduced. influences.

3 to 9, it can be seen that in this embodiment, if the first switch T1 to the fourth switch T4 are all transistors, the display control circuit 300 has four transistors in total. Since the holding capacitor 170 can be selectively used or omitted, the display control circuit 300 includes three capacitors including the liquid crystal capacitor 110 , the first capacitor 150 , and the second capacitor 160 . Therefore, the embodiments in FIGS. 3 to 9 can provide a display control circuit with a four-transistor-three-capacitor (referred to as 4T3C) structure. The signal lines share four signal lines corresponding to the operating voltage V _DD , the reference potential V _REF , the control signal S1 and the control signal S2 . Therefore, compared with the aforementioned 6T2C structure (which requires at least seven signal lines) or 6T3C structure (which requires at least five signal lines), the number of components and the number of signal lines of the display control circuit provided by the embodiments of the present invention are less, which can improve Aperture ratio, and still have the effect of compensating the drift of the threshold voltage V _TH , so as to maintain the accuracy of the displayed gray scale.

FIG. 11 is a flowchart of the operation steps of the display control circuit 300 according to the embodiment of the present invention. Steps 1110 to 1150 may correspond to the stages in Figures 5 to 9 respectively:

Step 1110: In the reset phase P1 after the display phase P5, keep the second switch T2 closed, turn on the third switch T3 and the fourth switch T4, adjust the reference level V _REF to the high level V _{REF_H} to turn on the first switch T1, and adjusting the operating voltage V _DD to the low level V _DDL to reset the level of the first terminal of the liquid crystal capacitor 110 ;

Step 1120: In the compensation phase P2 after the reset phase P1, adjust the operating voltage V _DD to the high level V _DDH to charge the first end of the liquid crystal capacitor 110 through the first switch T1, so that the first end of the liquid crystal capacitor 110 is charged to a predetermined level;

Step 1130: In the writing phase P3 after the compensation phase P2, turn off the third switch T3 and the fourth switch T4, and turn on the second switch T2, so that the first end of the first capacitor 110 is raised to approximately the data voltage Vd And the sum of critical voltage V _TH ;

Step 1140: In the sustaining phase P4 after the writing phase P3, close the second switch T2, so that the level of the first terminal of the liquid crystal capacitor 110 substantially corresponds to the data voltage Vd; and

Step 1150 : In the display phase P5 after the sustain phase P4 , adjust the reference level V _REF to the low level V _{REF_L} to turn off the charging unit 120 to prevent leakage.

FIG. 12 is a schematic diagram of a display control circuit 1100 according to another embodiment of the present invention. The display control circuit 1100 can be composed of a plurality of switches, capacitors and signal lines based on the structures shown in FIGS. 1 and 2 . As shown in FIGS. 1 , 2 and 11 , in the display control circuit 1100 , the charging unit 120 may include a first switch T1 and a second switch T2 . The first switch T1 may include a first terminal, a second terminal and a control terminal, the second terminal of the first switch T1 may be the second terminal of the charging unit 120, and the control terminal of the first switch T1 may be the control terminal of the charging unit 120 . The second switch T2 may include a first terminal, a second terminal and a control terminal, the first terminal of the second switch T2 may be the first terminal of the charging unit 120, and the second terminal of the second switch T2 may be coupled to the first switch. The first terminal of T1 and the control terminal of the second switch T2 can be controlled by the control signal S1. The writing unit 130 includes a fifth switch T5. The fifth switch T5 may include a first terminal, a second terminal and a control terminal, the first terminal of the fifth switch T5 may be used to receive the data voltage Vd, the control terminal of the fifth switch T5 may be controlled by the control signal S3, the fifth switch T5 The second terminal can be coupled to the second terminal of the first capacitor 150 . The sustain unit 140 may include a fourth switch T4, and the control terminal of the fourth switch T4 may be controlled by the control signal S2. The display control circuit 1100 may further include a third switch T3, the third switch T3 may include a first terminal, a second terminal and a control terminal, the first terminal of the third switch T3 may be coupled to the first terminal of the first transistor T1, The control terminal of the third switch T3 can be coupled to the control terminal of the sustain unit 140 and is also controlled by the control signal S2 . The second terminal of the third switch T3 can be coupled to the first terminal of the first capacitor 150 . According to an embodiment of the present invention, the second terminal of the second capacitor 160 of the display control circuit 1100 may be (but not limited to) coupled to the common voltage terminal V _COM .

FIG. 13 is an operation waveform diagram of the display control circuit 1100 of the embodiment shown in FIG. 12 . 14 to 18 are diagrams illustrating the operation of the display control circuit 1100 of the embodiment of FIG. 12 . In FIG. 13 , the waveforms of the control signals S1 , S2 and S3 and the operating voltage V _DD can be adjusted to correspond to the reset phase P1 , the reset phase P1 , the compensation phase P2 , the write phase P3 , the sustain phase P4 and the display phase P5 . These five stages can be carried out cyclically.

Figure 14 may correspond to the reset phase P1 following the display phase P5. In the reset phase P1, the second to fifth switches T2-T5 can be turned on, and the data voltage Vd can reset the first terminal (node C) of the second capacitor 160 and the second terminal (node B) of the first switch T1 to a predetermined level, such as a sufficiently low level. When the potential difference between the node A and the node B reaches the threshold voltage V _TH of the first switch T1 , the first switch T1 can be turned on.

Figure 15 may correspond to the compensation phase P2 following the reset phase P1. In the compensation phase P2, the control signal S3 can be adjusted to close the fifth switch T5, so that the operating voltage V _DD charges the first terminal (node A) of the first capacitor 150 to a first potential (such as the high level of the operating voltage V _DD ). level V _DDH ), and charge the second terminal (node C) of the first capacitor 150 to the difference between the first potential and the threshold value V _TH1 . Therefore, the operating voltage V _DD can charge the potentials of the nodes B and C to the level of (V _DDH -V _TH1 ) through the first switch T1 and the second switch T2, so that the first capacitor 150 stores the threshold value V _TH1 potential difference. The threshold V _TH1 can be a threshold voltage V _TH of the first switch T1 .

FIG. 16 may correspond to the writing phase P3 following the compensation phase P2. In the writing phase P3, the control signals S2 and S3 can be controlled to turn off the second switch T2 and the third switch T3, and turn on the fifth switch T5, so that the data voltage Vd is written into the second end (node C), and raise the level of the first terminal (node A) of the first capacitor 150 to the sum of the data voltage Vd and the threshold value V _TH1 . At this time, the operating voltage V _DD can be adjusted to the low level V _DDL , so the node B can be pulled to the low level V _DDL through the first switch T1 and the second switch T2, so that the control terminal of the first switch T1 and the second switch T1 The voltage difference between the two terminals is sufficient to ensure that the first switch T1 is turned on.

FIG. 17 may correspond to a sustain phase P4 following the write phase P3. In this stage, the control signal S3 can be adjusted to close the fifth switch T5. The operating voltage V _DD can be adjusted to a high level V _DDH to charge the first terminal (node B) of the liquid crystal capacitor 110 through the first switch T1 and the second switch T2 . At this time, the first switch T1 and the second switch T2 can be source followers, and the node B can be charged to the level of the node A and the threshold value V _TH1 by the low level V _DDL of the writing phase P3 The difference, namely {(Vd+V _TH1 )−V _TH1 }, is the data voltage Vd. Therefore, the sustain phase P4 can control the charging time of the node B, and can make the level of the second terminal of the first switch T1 correspond to the data voltage Vd.

FIG. 18 may correspond to the display phase P5 following the sustain phase P4. In the display phase P5, the control signal S1 can be adjusted to close the second switch T2 to prevent the leakage of the node B. So as to achieve the effect of suppressing the aging of the transistor.

FIG. 19 is a diagram of the measurement results of the embodiment shown in FIGS. 11 to 17 . Similarly to FIG. 10 , the horizontal axis can be time (in microseconds), and the vertical axis can be voltage (in volts). Curves VA0, VB0, and VCO are the level changes of nodes A, B, and C in FIG. 12, respectively, which may correspond to the difference between the threshold voltage _VTH of the switch and the predetermined level being 0 volts (that is, there is no shift in the threshold voltage). circuit of transistors. Curves _VA3 , VB3, and VC3 respectively represent the level changes of nodes A, B, and C in FIG. 3 volts) transistor circuit. According to FIG. 18, the curves VB0 and VB3 are almost superimposed from the latter part of the maintenance phase P4 to the display phase P5, so the level of the node B is not affected by the drift of the threshold voltage V _TH , thereby maintaining the gray scale accuracy of the liquid crystal capacitor 110. . The display control circuit 1100 of the embodiment shown in FIGS. 12 to 19 includes five transistors (T1 to T5) and three capacitors (110, 150, 160). It can be referred to as a 5T3C structure, and its signal lines must be at least four (corresponding to the control signal S1-S4 and operating voltage V _DD ), therefore, compared with the existing 6T2C structure (requires at least seven signal lines), or 6T3C structure (requires at least five signal lines), the elements of the display control circuit provided by the embodiment of the present invention The number of pieces and the number of signal lines are both small, which can increase the aperture ratio, and still have the effect of compensating the drift of the threshold voltage V _TH , so as to maintain the gray scale accuracy of the display.

FIG. 20 is a flowchart of the operation method of the display control circuit 1100 shown in FIGS. 12 to 18 . Steps 2010 to 2050 may correspond to FIGS. 14 to 18:

Step 2010: In the reset phase P1 after the display phase P5, turn on the second to fifth switches T2-T5 to reset the first end of the second capacitor 160 and the second end of the first switch T1 to a predetermined level so that the level difference between the control terminal and the second terminal of the first switch T1 is greater than the threshold value V _TH1 , and then the first switch T1 is turned on;

Step 2020: In the compensation phase P2 after the reset phase P1, close the fifth switch T5 to charge the first end of the first capacitor 150 to a first potential (such as a high level V _DDH ), and charge the first capacitor 150 The second terminal of is charged to the difference between the first potential and the threshold value V _TH1 , such as (V _DDH -V _TH1 );

Step 2030: In the writing phase P3 after the compensation phase P2, close the third switch T3 and the fourth switch T4, and open the fifth switch T5, so that the data voltage Vd is written into the second end of the first capacitor 150, and the The level of the first end of the first capacitor 150 is raised to approximately the sum of the data voltage Vd and the threshold value V _TH1 ;

Step 2040: In the sustaining phase P4 after the writing phase P3, close the fifth switch T5, so that the level of the second end of the first switch T1 corresponds to the data voltage Vd; and

Step 2050: Turn off the second switch T2 in the display phase P5 following the sustain phase P4 to prevent leakage.

The above-mentioned switches can use normally-off (normally-OFF) or normally-on (normally-ON) transistors, and N-type metal-oxide-semiconductor field-effect transistors and P-type metal-oxide-semiconductor field-effect transistors can be selected according to the needs of developers. , bicarrier junction transistors or other switching elements with similar principles. The display control circuit provided by the embodiment of the present invention can be applied to general liquid crystal display, and can also be applied to blue phase liquid crystal.

To sum up, the display control circuit provided by the embodiment of the present invention can have a simpler structure, fewer components and fewer signals, so the aperture ratio can be increased and the display effect can be improved. In addition, the display control circuit provided by the embodiment of the present invention The threshold voltage drift of the transistor can still be compensated, so the grayscale accuracy of the liquid crystal display can be maintained, which is really helpful for improving the deficiency of the existing display control circuit in the field.

The above descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made according to the scope of the patent application of the present invention shall fall within the scope of the present invention.

Claims (8)

1. A display control circuit, characterized in that, comprising: A liquid crystal capacitor, including a first terminal and a second terminal, coupled to a common voltage terminal for displaying according to a data voltage; a charging unit, including a first terminal, a control terminal, and a second terminal, coupled to the first terminal of the liquid crystal capacitor; A writing unit, including a first terminal for receiving the data voltage, a second terminal, and a control terminal; A sustain unit, including a first terminal coupled to the second terminal of the writing unit, a second terminal coupled to the first terminal of the liquid crystal capacitor, and a control terminal; and a first capacitor, including a first terminal coupled to the control terminal of the charging unit, and a second terminal coupled to the second terminal of the writing unit; The charging unit includes a first switch, the first switch has a first end for receiving an operating voltage, a second end coupled to the first end of the liquid crystal capacitor, and a control end; The writing unit includes a second switch, and the second switch has a first end for receiving the data voltage and a second end; The holding unit includes a third switch, the third switch has a first end coupled to the second end of the second switch, and a second end coupled to the second end of the first switch, and a control terminal; and The display control circuit further includes a fourth switch, the fourth switch has a first end for receiving a reference potential, a control end coupled to the control end of the third switch, and a second end, coupled to the control end of the first switch; The second switch is used to be closed during a reset phase, a compensation phase, a maintenance phase and a display phase, and to be opened during a write phase; the third switch is turned on for the reset phase and the compensation phase, and is closed during the write phase, the sustain phase and the display phase; and The fourth switch is used for being turned on during the reset phase and the compensation phase, and closed during the write phase, the sustain phase and the display phase. 2. The display control circuit according to claim 1, further comprising a holding capacitor, the holding capacitor includes a first end coupled to the first end of the liquid crystal capacitor, and a second end, coupled to the common voltage terminal. 3. The display control circuit as claimed in claim 1, wherein the liquid crystal capacitor comprises a liquid crystal display medium. 4. A display control circuit, characterized in that, comprising: A liquid crystal capacitor, including a first terminal and a second terminal, coupled to a common voltage terminal for displaying according to a data voltage; a charging unit, including a first terminal, a control terminal, and a second terminal, coupled to the first terminal of the liquid crystal capacitor; A writing unit, including a first terminal for receiving the data voltage, a second terminal, and a control terminal; A sustain unit, including a first terminal coupled to the second terminal of the writing unit, a second terminal coupled to the first terminal of the liquid crystal capacitor, and a control terminal; and a first capacitor, including a first terminal coupled to the control terminal of the charging unit, and a second terminal coupled to the second terminal of the writing unit; The charging unit contains: A first switch, including a first terminal, a second terminal and a control terminal, the second terminal of the first switch is used as the second terminal of the charging unit, the control terminal of the first switch is the charging unit the control terminal of the unit; and A second switch, including a first terminal, a second terminal and a control terminal, the first terminal of the second switch is used as the first terminal of the charging unit, the second terminal of the second switch coupled to the first end of the first switch; The write unit includes a fifth switch, the fifth switch includes a first end and a second end, the first end of the fifth switch is used to receive the data voltage, the second end of the fifth switch coupled to the second end of the first capacitor; the sustain unit includes a fourth switch; and The display control circuit further includes a third switch, the third switch includes a first end, a control end and a second end, the first end of the third switch is coupled to the first end of the first switch terminal, the control terminal of the third switch is coupled to the control terminal of the sustain unit, and the second terminal of the third switch is coupled to the first terminal of the first capacitor; The second switch is used to be turned on during a reset phase, a compensation phase, a write phase and a maintenance phase, and to be closed during a display phase; The third switch is used to be turned on during the reset phase and the compensation phase, and to be closed during the writing phase, the maintaining phase and the display phase; the fourth switch is configured to be turned on during the reset phase and the compensation phase, and to be closed during the write phase, the sustain phase and the display phase; and The fifth switch is used to be turned on during the reset phase and the write phase, and to be closed during the compensation phase, the maintenance phase and the display phase. 5. The display control circuit according to claim 4, characterized in that, the display control circuit further comprises a second capacitor, the second capacitor comprises a first terminal coupled to the second terminal of the first capacitor , and a second terminal coupled to the common voltage terminal. 6. The display control circuit as claimed in claim 4, wherein the liquid crystal capacitor comprises a liquid crystal display medium. 7. A method for operating a display control circuit, the display control circuit comprising a liquid crystal capacitor, a charging unit, a writing unit, a maintaining unit, a switch and a first capacitor, a first end of the charging unit is used To receive an operating voltage, a first end of the liquid crystal capacitor is coupled to a second end of the charging unit, a second end of the liquid crystal capacitor is coupled to a common voltage end, the switch has a first end and a The second terminal, a control terminal of the charging unit is coupled to the second terminal of the switch, a first terminal of the first capacitor is coupled to the control terminal of the charging unit, a second terminal of the first capacitor The end is coupled to a second end of the writing unit, a first end of the writing unit is used to receive a data voltage, and the operation method includes: In a reset phase, maintain the off state of the writing unit, turn on the switch and the maintaining unit, adjust the level of the first end of the switch to turn on the charging unit, and adjust the operating voltage to reset the liquid crystal the level of the first terminal of the capacitor; In a compensation phase after the reset phase, the operating voltage is adjusted to charge the first end of the liquid crystal capacitor through the charging unit, so that the first end of the liquid crystal capacitor is charged to a predetermined level; In a writing phase after the compensation phase, closing the sustain unit and the switch, and turning on the writing unit, so that the first terminal of the first capacitor is raised to the sum of the data voltage and a threshold voltage; In a sustain phase after the write phase, turn off the write unit so that the level of the first end of the liquid crystal capacitor substantially corresponds to the data voltage; and In a display stage after the maintaining stage, the level of the first end of the switch is adjusted to turn off the charging unit. 8. A method for operating a display control circuit, the display control circuit comprising a charging unit, a writing unit, a maintaining unit, a first capacitor, a third switch and a liquid crystal capacitor, the charging unit comprising a first A switch and a second switch, a first end of the second switch is used to receive an operating voltage, a second end of the second switch is coupled to a first end of the first switch and a third switch A first terminal, a control terminal of the first switch is coupled to a second terminal of the third switch and a first terminal of the first capacitor, a second terminal of the first switch is coupled to the liquid crystal A first end of the capacitor and a second end of the holding unit, a second end of the liquid crystal capacitor is coupled to a common voltage end, a first end of the holding unit is coupled to a second end of the first capacitor terminal, and a second terminal of the writing unit, a first terminal of the writing unit is used to receive a data voltage, and the operation method includes: In a reset phase, turn on the second and third switches, the write unit and the sustain unit to reset the second end of the first capacitor and the second end of the first switch to a predetermined level, so that the level difference between the control terminal and the second terminal of the first switch is greater than a threshold value, and then the first switch is turned on; In a compensation phase after the reset phase, the writing unit is turned off to charge the first terminal of the first capacitor to a first potential, and charge the second terminal of the first capacitor to the the difference between the first potential and the threshold; In a write-in phase after the compensation phase, close the third switch and the sustain unit, and open the write-in unit, so that the data voltage is written into the second terminal of the first capacitor, and the first raising the level of the first end of the capacitor to the sum of the data voltage and the threshold; In a sustain phase after the write phase, turn off the write unit so that the level of the second terminal of the first switch corresponds to the data voltage; and In a display period after the maintenance period, the second switch is turned off.