CN106505948A - High FM resolution numerically controlled oscillator based on tail capacitor tuning structure - Google Patents

Abstract

The invention discloses a kind of lofty tone frequency division resolution digital controlled oscillator based on tail capacitance tuning structure, it is achieved that the performance of high frequency modulation precision and low phase noise.Primary structure has：LC arrays, negative resistance differential pair, tail electric capacity fine tuning array, tail current source.Negative resistance differential pair provides negative resistance, it is ensured that agitator starting of oscillation, and LC arrays determine frequency of oscillation substantially, including the coarse adjustment capacitor array that six groups of capacitances press binary weighting arrangement, reaches enough tuning ranges.Fine tuning capacitor array is introduced at tail electric capacity, equivalent capacity difference is substantially reduced at the LC arrays, produce the frequency departure of very little, realize lofty tone frequency division resolution；Suitable tail capacitance forms ground path to the noise current of tail current source and differential pair tube simultaneously, reduces the phase noise of digital controlled oscillator, so as to realize the performance of digital controlled oscillator low phase noise.

Description

High FM resolution numerically controlled oscillator based on tail capacitor tuning structure

technical field

The invention relates to a wireless communication electronic system, in particular to a numerically controlled oscillator with high frequency modulation resolution based on a tail capacitance tuning structure.

Background technique

The phase-locked loop is one of the important modules in the radio frequency integrated circuit of the wireless communication system. With the progress of the technology, the trend and demand of the digitalization of the radio frequency circuit are becoming more and more obvious. The traditional phase-locked loop is gradually being replaced by the all-digital phase-locked loop. Since the digitally controlled oscillator has an important influence on the phase noise and resolution of the all-digital phase-locked loop, the numerically-controlled oscillator is the most important in the design of the all-digital phase-locked loop. Designing a digitally controlled oscillator with high frequency modulation resolution is still a challenge despite continuous technological advances.

To design a 2.4GHz frequency band numerically controlled oscillator, take the traditional structure as an example, as shown in Figure 1, assuming that a 3nH inductor is used in the LC array, it can be known through calculation that changing the capacitance value by 1fF will produce an output frequency shift of about 800KHz. If a digitally controlled oscillator with high frequency modulation resolution (on the order of 10KHz) is to be realized, a capacitor difference on the order of aF is required. Capacitance of this magnitude is very sensitive to parasitic capacitance, and layout matching is also difficult. However, in the CMOS process, the capacitance difference of the varactor is generally at the fF level, which is far from meeting the design requirements. A common way to achieve high FM resolution is to introduce a ΣΔ modulator, but this method requires more area and power consumption.

In reference [1] (Fanori L, Liscidini A, Castello R, "Capacitive degradation in LC-tank oscillator for DCO fine-frequency tuning," IEEEJ.Solid-State Circuits, vol.45, pp.2737-2745, Dec. 2010.), a high-resolution numerically controlled oscillator with a frequency modulation resolution of 150Hz was designed, as shown in Figure 2. In this structure, the fine-tuning capacitor array is placed under the differential pair tube that provides negative resistance, and the equivalent capacitance difference is reduced. This results in a higher FM resolution. However, when the digitally controlled oscillator works at different frequencies, the same capacitance will have different equivalent capacitances, and thus will have different frequency offsets, that is, the fine-tuning range is uncertain. Since the fine-tuning range needs to cover the coarse-tuning resolution, this increases the difficulty of fine-tuning design. The design in the article adds additional circuit blocks to realize and stabilize the performance.

Therefore, it is necessary to design a numerically controlled oscillator that does not require additional modules, while achieving low phase noise and high frequency modulation resolution performance.

Contents of the invention

The purpose of the present invention is to provide a high frequency modulation resolution numerically controlled oscillator based on the tail capacitance tuning structure, which can realize the performance of high frequency modulation resolution and low phase noise at the same time

The purpose of the present invention is achieved through the following technical solutions:

A digitally controlled oscillator with high frequency modulation resolution based on tail capacitance tuning structure, including: LC array, negative resistance differential pair, tail capacitance fine-tuning array and tail current source;

The LC array is connected to the negative resistance differential pair, and the negative resistance differential pair is respectively connected to the tail capacitor fine-tuning array and the tail current source; the negative resistance differential pair provides negative resistance to ensure that the oscillator starts to vibrate; the LC array is used to determine the approximate oscillation frequency; the tail current source is used to provide bias current for the LC numerically controlled oscillator;

The tail capacitor fine-tuning array includes: a fixed capacitor C _fixed , a fine-tuning capacitor array C _fine , and a parasitic capacitor C _par of the tail current source tube M3; the value of the fixed capacitor C _fixed is set to a predetermined value, so that the tail current source and negative The noise current of the resistance differential pair forms a path to the ground through the tail capacitance, the fine-tuning capacitor array is connected in parallel with the tail current source, and the reduction of the actual capacitance difference in the fine-tuning capacitor array at the equivalent capacitance difference at the LC array exceeds the threshold value, thus Achieve high FM resolution.

The LC array includes: an inductor L, a capacitor C _tank , and a parasitic equivalent parallel resistance of the inductor L connected in parallel sequentially is Rp;

Among them, the capacitor C _tank includes: a fixed capacitor connected in parallel and a coarse adjustment capacitor array, both of which are connected in parallel with the inductance L to determine the oscillation frequency; the coarse adjustment capacitor array contains six sets of capacitor pairs whose capacitance values are distributed according to binary weights, controlled by six bits The switch is controlled by the inverter to control whether the capacitor is connected or not to roughly adjust the oscillation frequency.

The negative resistance differential pair is an NMOS differential mutual coupling pair, including: two NMOS transistors M1 and M2, which are respectively connected in parallel at both ends of the LC array.

The coarse-tuning capacitor array in the LC array and the fine-tuning capacitor array in the tail capacitor fine-tuning array both use the same frequency-tuning capacitor unit structure;

The frequency modulation capacitor unit includes a capacitor pair, a switch and an inverter; wherein, the capacitor pair adopts the method of connecting two equivalent capacitors Ca and Cb in series, and the equivalent capacitor is half of a single capacitor value; the switch includes NMOS tubes M5, M6 and M7, M5 is connected in series between the capacitor pair Ca and Cb, the drain terminals of M6 and M7 are respectively connected to the source and drain terminals of M5, the source terminals of M6 and M7 are grounded, and the gate terminals of M5, M6 and M7 are short-circuited together and connected to the reverse phase control signal; when the control signal is high level, M5, M6 and M7 grid terminals are low level, the switch is off, and the capacitor pair is not connected to the array; when the control signal is low level, M5, M6, M7 grid terminals The terminal is a high potential, the MOS transistors work in the linear region, the switch is turned on, the capacitor pair is connected to the array, and the frequency is lowered.

When the negative-resistance differential pairs are all working in the saturation region, the noise current of the tail current source tube M3 is injected into the LC array through the differential pair tubes M1 and M2 respectively, and can cancel each other at the differential output end, so at this stage the tail current source tube The noise contribution is less than the threshold value, but the noise current of the negative resistance differential pair will be injected into the LC array to generate phase noise, so near the balance point, the existence of the tail capacitance fine-tuning array does not affect the noise performance;

When one MOS transistor in the negative resistance differential pair is turned on and the other MOS transistor is turned off, assuming that the M2 transistor is turned on, then M2 and M3 form a cascode structure, and the noise contribution of the M2 transistor is less than the threshold value, and the tail capacitor C _tail is introduced , C _tail forms a low-impedance path to the ground for the noise currents of M2 and M3, which will increase the noise contribution of M2 to a certain extent, but reduce the noise contribution of M3.

It can be seen from the above-mentioned technical solution provided by the present invention that no additional customized modules are needed, and the frequency modulation resolution can be improved while the phase noise can be reduced. And in the design process, the selection of the tail capacitor needs to consider the resolution and phase noise to make a compromise, just choose the corresponding optimal point.

Description of drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the accompanying drawings that need to be used in the description of the embodiments. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For Those of ordinary skill in the art can also obtain other drawings based on these drawings on the premise of not paying creative work.

Fig. 1 is the traditional numerical control oscillator circuit diagram that background technology of the present invention provides;

Fig. 2 is the circuit diagram of numerical control oscillator in the reference [1] that background technology of the present invention provides;

FIG. 3 is a circuit diagram of a digitally controlled oscillator with high frequency modulation resolution based on a tail capacitance tuning structure provided by an embodiment of the present invention;

FIG. 4 is a circuit diagram of a frequency modulation capacitor unit provided by an embodiment of the present invention;

Fig. 5 is a schematic diagram of tail capacitance equivalent analysis provided by an embodiment of the present invention.

detailed description

The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

An embodiment of the present invention provides a high frequency modulation resolution digitally controlled oscillator based on a tail capacitor tuning structure, as shown in Figure 3, which mainly includes: LC array 1, negative resistance differential pair 2, tail capacitor fine tuning array 3 and source 4;

The LC array 1 is connected to the negative resistance differential pair 2, and the negative resistance differential pair 2 is respectively connected to the tail capacitance fine-tuning array 3 and the tail current source 4; the negative resistance differential pair 2 provides negative resistance to ensure that the oscillator starts to vibrate; the LC array 1 is used to determine the approximate oscillation frequency; the tail current source 4 is used to provide bias current for the LC numerical control oscillator;

The tail capacitor fine-tuning array 3 includes: a fixed capacitor C _fixed , a fine-tuning capacitor array C _fine , and a parasitic capacitor C _par of the tail current source tube M3; the value of the fixed capacitor C _fixed is set to a predetermined value, so that the tail current source tube And the noise current of the negative-resistance differential pair forms a path to the ground through the tail capacitor to reduce phase noise. The selection of the fixed capacitor Cfixed needs to consider the influence of parasitic capacitance. The fine-tuning capacitor array is connected in parallel with the tail current source, and the actual capacitance difference in the fine-tuning capacitor array is greatly reduced by the equivalent capacitance difference at the LC array (that is, the reduction exceeds the threshold), thereby achieving high frequency modulation resolution.

Exemplarily, the fine-tuning capacitor array may include 8*16 switch-controlled equivalent capacitor pairs, and the switches are controlled by 24 binary control signals through inverters, so as to control whether the capacitors are connected or not to fine-tune the oscillation frequency. The fine-tuning frequency range is 2MHz, which can completely cover the coarse-tuning resolution of 1.5MHz with a certain margin, and the fine-tuning resolution reaches 15KHz. Tail current source 4 provides bias current for the numerically controlled oscillator, including current mirrors M3, M4 and filter network RC. Since the size of M4 in the current mirror is small, the flicker noise is relatively large, so an RC filter network is added to filter out certain flicker noise .

In the embodiment of the present invention, the LC array includes: an inductor L, a capacitor C _tank , and a parasitic equivalent parallel resistance Rp of the inductor L connected in parallel in sequence; wherein, the capacitor C _tank includes: a fixed capacitor and a coarse adjustment capacitor array connected in parallel , the two are connected in parallel with the inductance L to determine the oscillation frequency; the coarse adjustment capacitor array contains six sets of capacitor pairs whose capacitance values are distributed according to binary weights, and the six-bit control signal controls the switch through the inverter to control whether the capacitor is connected or not and then coarse Adjust the oscillation frequency. Exemplarily, the coarse adjustment range is 0.54 GHz, and the coarse adjustment resolution is 1.5 MHz.

In the embodiment of the present invention, the negative resistance differential pair is an NMOS differential mutual coupling pair, which includes: two NMOS transistors M1 and M2, which are respectively connected in parallel at both ends of the LC array. Exemplarily, the NMOS differential mutual coupling pair provides a negative resistance of -2/g _m , and the size selection of the differential negative resistance pair M1 and M2 considers their transconductance to satisfy The condition that the value is about 2.5-3 ensures that the numerical control oscillator can start to vibrate without consuming too much power consumption.

In the embodiment of the present invention, the coarse-tuning capacitor array in the LC array and the fine-tuning capacitor array in the tail capacitor fine-tuning array both use the same frequency modulation capacitor unit structure;

As shown in Figure 4, the FM capacitor unit includes a capacitor pair, a switch, and an inverter; among them, the capacitor pair adopts the method of connecting two equivalent capacitors Ca and Cb in series, and the equivalent capacitor is half of a single capacitor value; the switch includes an NMOS transistor M5, M6 and M7, M5 are connected in series between the capacitor pair Ca and Cb, the drain terminals of M6 and M7 are respectively connected to the source and drain terminals of M5, the source terminals of M6 and M7 are grounded, and the gate terminals of M5, M6 and M7 are short-circuited Connect the control signal after inversion together; when the control signal is high level, the gate terminals of M5, M6 and M7 are low level, the switch is turned off, and the capacitor pair is not connected to the array; when the control signal is low level, The gate terminals of M5, M6, and M7 are at high potential, the MOS transistors all work in the linear region, the switch is turned on, the capacitor pair is connected to the array, and the frequency is lowered.

For ease of understanding, the technical principles of the above solutions of the present invention are introduced below.

Firstly, the effect of the tail capacitance-based fine-tuning structure on the frequency modulation resolution is analyzed. The tail capacitor C _tail is:

C _tail ＝C _par +C _fixed +C _fine

The equivalent capacitance of the tail capacitance C _tail at the LC array is _Ceq . The change value ΔC _tail of the tail capacitance C _tail is equivalent to ΔC _eq in the LC array, as shown in FIG. 5 . According to the working state of the negative resistance differential pair, it is divided into three stages of analysis:

(1) Near the equilibrium point, the differential negative resistance pairs M1 and M2 are all turned on, and the equivalent capacitance C _eq obtained from the LC array is

Among them, C _gs is the gate-source parasitic capacitance of the negative resistance differential pair NMOS transistor. The change value of the tail capacitance ΔC _tail basically has no contribution to ΔC _eq , that is, in the period when M1 and M2 are all turned on, ΔCeq1 is about zero.

(2) When the output voltage amplitude increases, one MOS transistor in the negative resistance differential pair is cut off and the other MOS transistor works in the saturation region, and the equivalent capacitance is

ΔC _eq2 ≈-ΔC _tail /2

(3) When the output voltage range continues to increase, the MOS tube working in the saturation zone enters the linear zone, and the other tube is still cut off. The equivalent capacitance difference is

ΔC _eq3 ≈ΔC _tail /2

ΔC _eq is the period average value of ΔC _eq1 , ΔC _eq2 , ΔC _eq3 , obviously ΔC _eq << ΔC _tail , the frequency shift caused by capacitance change can be expressed as:

Therefore, the fine-tuning structure based on the tail capacitor can obtain a small equivalent capacitance difference with a capacitor array with a conventional capacitance value, thereby achieving high frequency modulation resolution.

The effect of tail capacitance on reducing phase noise is analyzed below.

When the negative resistance differential pairs are all working in the saturation region, the noise current of the tail current source tube M3 is injected into the LC array through the differential pair tubes M1 and M2 respectively, and can cancel each other at the differential output end, so the noise of the tail current source at this stage The contribution is less than the threshold value, but the noise current of the negative resistance differential pair will be injected into the LC array to generate phase noise, so near the balance point, the existence of the tail capacitance fine-tuning array does not affect the noise performance;

When one MOS transistor in the negative resistance differential pair is turned on and the other MOS transistor is turned off, assuming that the M2 transistor is turned on, then M2 and the tail current source transistor M3 form a cascode structure, and the noise contribution of the M2 transistor is less than the threshold value. The _tail capacitor C _tail forms a low-impedance path to the ground for the noise currents of M2 and M3, which will increase the noise contribution of M2 to a certain extent, but reduce the noise contribution of M3.

At the same time, the tail capacitor can increase the output amplitude of the numerically controlled oscillator to a certain extent without consuming additional power consumption, which will also reduce the phase noise.

The above is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person familiar with the technical field can easily conceive of changes or changes within the technical scope disclosed in the present invention. Replacement should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be determined by the protection scope of the claims.

Claims (5)

1. a kind of lofty tone frequency division resolution digital controlled oscillator based on tail capacitance tuning structure, it is characterised in that include：LC arrays, Negative resistance differential pair, tail electric capacity fine tuning array and tail current source；

The LC arrays are connected with negative resistance differential pair, and negative resistance differential pair is connected with tail electric capacity fine tuning array and tail current source respectively； Negative resistance differential pair provides negative resistance, it is ensured that agitator starting of oscillation；LC arrays are used for determining frequency of oscillation substantially；Tail current source is used for LC digital controlled oscillators provide bias current；

The tail electric capacity fine tuning array includes：Fixed capacity C_fixed, fine tuning capacitor array C_fine, and tail current source capsule M3 posts Raw electric capacity C_par；By fixed capacity C_fixedValue is set to predetermined value, makes tail current source and the noise current of negative resistance differential pair pass through tail Electric capacity forms ground path, and fine tuning capacitor array is in parallel with tail current source, and the actual capacitance difference in fine tuning capacitor array is in LC The reduction of the equivalent electric tolerance at array exceeds threshold value, so as to realize lofty tone frequency division resolution.

2. a kind of lofty tone frequency division resolution digital controlled oscillator based on tail capacitance tuning structure according to claim 1, its are special Levy and be, the LC arrays include：Inductance L, the electric capacity C being connected in parallel successively_tankAnd the parasitic equivalent parallel resistance of inductance L is Rp；

Wherein, electric capacity C_tankIncluding：The fixed capacity being connected in parallel and coarse adjustment capacitor array, the two determination vibration in parallel with inductance L Frequency；Coarse adjustment capacitor array presses the electric capacity pair of binary weight redistribution containing six groups of capacitances, by six control signals by anti-phase Whether device controlling switch, so that control the access of electric capacity and then coarse adjustment frequency of oscillation.

3. a kind of lofty tone frequency division resolution digital controlled oscillator based on tail capacitance tuning structure according to claim 1, its are special Levy and be, the negative resistance differential pair is that nmos differential is mutually symplectic, including：Two NMOS tubes M1 and M2, which is connected in parallel on LC battle arrays respectively Row two ends.

4. a kind of lofty tone frequency division resolution digital controlled oscillator based on tail capacitance tuning structure according to claim 1, its are special Levy and be, the coarse adjustment capacitor array in LC arrays adopts identical frequency modulation with the fine tuning capacitor array in tail electric capacity fine tuning array Capacitor cell structure；

Frequency modulation capacitor cell include electric capacity to, switch and phase inverter；Wherein, electric capacity is to being connected with Cb using two equivalent capacitance Ca Mode, equivalent capacity is the half of single capacitance；Switch include NMOS tube M5, M6 and M7, M5 be connected in series to electric capacity to Ca and Between Cb, the drain terminal of M6, M7 connects the source and drain of M5 respectively, the source ground connection of M6, M7, together with M5, M6 are shorted to the grid end of M7 Control signal after reversed phase；When control signal is high level, M5, M6 and M7 grid end is low level, switches off, electric capacity pair Do not access in array；When control signal is low level, M5, M6, M7 grid end is high potential, and metal-oxide-semiconductor is all operated in linear zone, opens Conducting is closed, electric capacity is lowered to accessing array, frequency.

5. a kind of lofty tone frequency division resolution digital controlled oscillator based on tail capacitance tuning structure according to claim 1, its are special Levy and be, when negative resistance differential pair is all operated in saturation region, the noise current of tail current source capsule M3 respectively through differential pair tube M1, M2 is injected in LC arrays, can be cancelled out each other in difference output end, therefore in the noise contribution of this stage tail current source capsule Threshold value is less than, but the noise current of negative resistance differential pair can inject generation phase noise in LC arrays, therefore near equilibrium point, The presence of tail electric capacity fine tuning array can not affect noiseproof feature；

When another metal-oxide-semiconductor cut-off of a metal-oxide-semiconductor conducting in negative resistance differential pair, it is assumed that M2 pipes are turned on, then M2 and M3 is formed altogether Source common gate structure, the noise contribution of M2 pipes introduce tail electric capacity C less than threshold value_tail, C_tailNoise current shape to M2 and M3 Into the low impedance path to ground, this can increase the noise contribution of M2 to a certain extent, but reduce the noise contribution of M3.