CN106483450A - A kind of chip detecting system for digital circuit practical teaching - Google Patents

Abstract

The invention discloses a chip testing system used for digital circuit practice teaching, which relates to the technical field of chip testing devices. It includes a mode selection module, a chip detection module and a result display module. The mode selection module includes a dial switch, and the chip detection module includes a 51 single-chip microcomputer, a chip socket, a first relay, and a second relay; the result display module includes LED lights and Buzzer, the detection result of described chip detection module is shown by LED lamp, buzzer; 51 single-chip microcomputers are connected with dial switch, chip socket, first relay, second relay, LED lamp, buzzer respectively, The chip socket is respectively connected to the first relay and the second relay, and the first relay and the second relay are grounded. The invention is easy to operate, does not need to manually connect complex circuits, can conveniently and accurately judge whether the chip is damaged, and gives the detection result, the result is reliable, and effectively improves the teaching and learning efficiency.

Description

A Chip Testing System Used in the Practical Teaching of Digital Circuits

technical field

The invention relates to the technical field of chip testing devices, in particular to a chip testing system used for practical teaching of digital circuits.

Background technique

The practical courses related to digital circuits are an extension of the theoretical teaching of digital electronic technology, and the integrity of the chips used in the practice process is a prerequisite for the success of the experiment. When the experiment fails due to circuit design or connection errors, the circuit or wiring can be checked for modification, but chip damage often requires testing each pin. The most commonly used method is manual detection, that is, through manual wiring, building circuits, providing input levels to corresponding pins according to the function table or truth table of the chip, observing the level output of the corresponding function pins, and judging whether the chip is intact. However, this method is not efficient, it needs to connect complex lines, switch the input switch constantly, and the reliability of the detection results is not high.

Therefore, those skilled in the art are devoting themselves to developing a chip testing system for practical teaching of digital circuits.

Contents of the invention

In view of the above-mentioned defects in the prior art, the technical problem to be solved by the present invention is to provide a chip detection system for practical teaching of digital circuits, which has simple structure, reasonable design, convenient operation, no need for manual connection of complex circuits, and can be convenient and accurate. It can accurately judge whether the chip is damaged, and give the detection result. The result is reliable, which can effectively improve the efficiency of teaching and learning. It has strong practicability and is easy to promote and use.

In order to achieve the above object, the present invention provides a chip detection system for practical teaching of digital circuits, including a mode selection module, a chip detection module and a result display module, the mode selection module includes a dial switch, and the mode selection module is passed through the dial switch. The switch provides 6 detection modes. According to the chip to be detected, select the corresponding mode to run the corresponding program and give the final judgment result; the chip detection module includes 51 single-chip microcomputers, chip sockets, the first relay, and the second relay; The result display module includes an LED lamp and a buzzer, and the detection result of the chip detection module is displayed by the LED lamp and the buzzer; 51 single-chip microcomputers are respectively connected with a dial switch, a chip socket, the first relay, the second relay, The LED light and the buzzer are connected, the chip socket is respectively connected with the first relay and the second relay, and the first relay and the second relay are grounded.

As preferably, the chip detection module runs a corresponding program according to the mode selected by the mode selection module, detects whether the chip is burned, outputs different level combinations through the IO port of the 51 single-chip microcomputer, provides the detected chip, and The detection result is output through the IO port, and provided to the result display module; the result display module is connected with the IO port of the 51 single-chip microcomputer through the LED light and the buzzer, and the output level of the IO port is reflected in the form of light and sound, and is displayed intuitively Judging the result, the user judges whether the chip is burnt or not through different phenomena.

Preferably, the chip socket is a 16-pin chip base, and the chip socket is plugged with a chip to be tested, and the chip to be tested includes 74HC/LS00, 74HC/LS20, 74HC/LS153, 74HC/LS161, 74HC/LS138 , 7448/9 six commonly used chips for digital circuit experiments.

As preferably, when the chip to be detected is a chip with 14 pins, the No. 7 pin is the GND pin, and the normally closed end of the first relay is connected to the P0.6 port of the 51 single-chip microcomputer and the No. 7 chip socket respectively. pin connection.

As preferably, when the chip to be detected is a chip with 16 pins, the No. 8 pin is the GND pin, and the normally closed end of the second relay is connected to the P0.7 port of the 51 single-chip microcomputer and No. 8 of the chip socket respectively. pin connection.

The beneficial effects of the present invention are: simple circuit, convenient operation, reliable results, convenient and accurate judgment of whether the chip is damaged, direct detection results, no need for manual connection of complex circuits, and improvement of teaching and learning in digital circuit practice courses Efficiency, convenient for teachers and students to devote time and energy to deeper experimental teaching and learning.

The idea, specific structure and technical effects of the present invention will be further described below in conjunction with the accompanying drawings, so as to fully understand the purpose, features and effects of the present invention.

Description of drawings

Fig. 1 is a structural representation of the present invention;

Fig. 2 is the connection schematic diagram of chip socket of the present invention;

Fig. 3 is a test flow chart of the present invention.

detailed description

Referring to Figures 1-3, the present embodiment adopts the following technical solutions: a chip detection system for practical teaching of digital circuits, including a mode selection module, a chip detection module and a result display module, and the mode selection module includes a dial switch 1 , the chip detection module includes 51 single-chip microcomputers 2, chip sockets 3, first relays 4, and second relays 5; the result display module includes LED lights 6 and buzzers 7, and the detection results of the chip detection modules are passed through the LED lights 6. The buzzer 7 is displayed; 51 MCU 2 is respectively connected to the dial switch 1, the chip socket 3, the first relay 4, the second relay 5, the LED light 6, and the buzzer 7, and the chip socket 3 is respectively connected to the first The relay 4 and the second relay 5 are connected, and the first relay 4 and the second relay 5 are grounded.

It is worth noting that the mode selection module provides 6 detection modes through the dial switch 1, selects the corresponding mode according to the chip to be detected, thereby runs the corresponding program, and gives the final judgment result; the chip detection module according to the mode Select the mode selected by the module, run the corresponding program, detect whether the chip is burnt, output different level combinations through the IO port of the 51 single-chip microcomputer 2, and provide it to the detected chip, and output the detection result through the IO port, and provide it to the Described result display module; The result display module is connected with the IO port of 51 single-chip microcomputers 2 by LED lamp 6, buzzer 7, and the output level of IO port is reflected with the form of light and sound, visually shows judgment result, and the user passes through Different phenomena to judge whether the chip is burned.

This specific implementation mode is composed of three modules: mode selection, chip detection, and result display. The three modules are interconnected and work together to perform functional tests on the chip to be tested. The chip to be tested includes 74HC/LS00, 74HC/LS20, and 74HC/LS153 , 74HC/LS161, 74HC/LS138, 7448/9 six commonly used chips for digital circuit experiments; these six chips have the following things in common: the VCC pin is the first pin on the right side of the chip, and the GND pin is the first pin on the right side of the chip. It is the last pin on the left side of the chip; if a certain input is provided to the chip, its output will have definite and known results. Above-mentioned six commonly used chip pin numbers have 14 and 16, so described chip socket 3 selects 16 pin chip bases, and the chip to be tested is inserted on the chip socket 3, and connection mode sees Fig. 2; When chip is damaged, may There are the following two manifestations: if the VCC pin of the chip is connected to the GND pin, the chip must be damaged; the input and output of the chip do not match its truth table.

The detection process of this specific embodiment is shown in Figure 3, and its detection results show that there are two situations: one is that the chip is normal, and the LED light 6 is on; the other is that the chip is damaged, and the buzzer 7 sounds.

The steps of chip detection are: (1) Detect whether the VCC and GND pins of the chip are connected, and adopt the scheme of connecting the GND pin of the chip to a relay:

① For a chip with 14 pins, pin No. 7 is the GND pin, and the normally closed end of the first relay 4 is respectively connected to the P0.6 port of the 51 single-chip microcomputer 2 and the No. 7 pin of the chip to be tested, wherein, The P0.6 port of the 51 microcontroller 2 is connected to the pull-down resistor; the VCC pin is always connected to the 5V power supply. When the device starts to work, first detect the input level of P0.6 port of 51 single-chip microcomputer 2. If it is high level, it means that the VCC pin of the chip is connected with the GND pin, indicating that the chip is damaged. At this time, 51 single-chip microcomputer 2 Control the buzzer 7 to ring and the LED light 6 to go out; if it is low level, it means that the two pins are not connected, and the first relay 4 works to connect the pin 7 to GND for the next step of detection.

②For a chip with 16 pins, 8 pins are GND pins. It is also necessary to first check whether the VCC pin of the chip is connected to the GND pin. The normally closed end of the second relay 5 is connected to the P0. Port 7 is connected to pin 8 of the chip to be tested, and port P0.7 of 51 MCU 2 is connected to a pull-down resistor; pin VCC is always connected to a 5V power supply. When the device starts to work, first detect the input level of the P0.7 port of the 51 single-chip microcomputer 2. If it is high level, it means that the two pins are connected, indicating that the chip is damaged. At this time, the control buzzer 7 of the 51 single-chip microcomputer 2 sound and the LED light 6 is off; if it is low level, the second relay 5 works to connect the No. 8 pin to GND for the next step of detection.

(2) To detect the output level of the logic output function pin of the chip under test, it is necessary to output different level combinations through the 51 single-chip microcomputer 2 according to the type of the chip under test; The working mode of the above-mentioned chip detection device corresponds to different chips, and the function tables of these chips have been stored in advance in the 51 single-chip microcomputer 2.

This specific implementation method can conveniently and quickly detect whether the chip is burned, changes the traditional manual detection method, improves the efficiency of chip detection, is suitable for digital circuit practice teaching, and the detection results are stable and reliable, which can improve teaching and learning in digital circuit practice courses. Learning efficiency makes it convenient for teachers and students to invest in deeper experimental teaching and learning, and has broad market application prospects.

Embodiment 1: For the 74HC/LS00 two-input NAND gate chip, the number of pins is 14, wherein, pins 1 and 2, pins 4 and 5, pins 9 and 10, and pins 12 and pin 13 are two input pins of 4 NAND gates, which are respectively connected to P0.0 and P0.1, P0.3 and P0.4, P1.2 and P1.3, P1.5 of 51 microcontroller 2 and P1.6 port; No. 3, No. 6, No. 8 and No. 11 pins are the corresponding logic result output pins, connected to P0.2, P0.5, P1.1, P1.4 ports of 51 microcontroller 2; According to the function table of the chip, the IO port connected to the input terminal of the NAND gate sequentially outputs all level combinations as the input of the chip. Before each output level combination of 51 single-chip microcomputer 2 changes, delay 1ms, and detect the output of the NAND gate Whether the input level of the IO port connected to the port corresponds to the chip function table; if it corresponds, continue to change the level; otherwise, it means that the chip is damaged, stop the detection, and the result display part shows that the chip is damaged; until the function table of the chip is traversed and When the output results match the input signal, it indicates that the chip is not damaged, and the part of the result display shows that the chip is normal.

Embodiment 2: For the 74HC/LS20 four-input NAND gate chip, its pin number is 14, wherein No. 1, No. 2, No. 4, No. 5 and No. 9, No. 10, No. 12 and No. 13 pins are two Four input pins of a NAND gate are respectively connected to P0.0, P0.1, P0.3, P0.4, P1.2, P1.3, P1.5 and P1.6 ports of 51 microcontroller 2; 6 Pins No. 8 and No. 8 are the corresponding two logic result output pins, which are respectively connected to the P0.5 and P1.1 ports of the 51 single-chip microcomputer 2; according to the function table of the chip, the IO ports connected to the input port of the NAND gate are sequentially connected. Output all level combinations as the input of the chip. Before each output level combination of 51 MCU 2 changes, delay 1ms, and detect whether the output level of the IO port connected to the output port of the NAND gate corresponds to the function table of the chip; If it corresponds, continue to change the level; otherwise, it means that the chip is damaged, stop the detection, and the result shows that the chip is damaged; until the function table of the chip is traversed and the output results match the input signal, it indicates that the chip is not damaged. The display part shows that the chip is normal.

Embodiment 3: For the 74HC/LS153 double 4 to 1 data selector chip, its pin number is 16, comprises two data selectors, and these two data selectors share two address input ends, for two data selectors Test separately; No. 2 and No. 14 pins are common address input terminals, connected to P0.1 and P1.5 ports of 51 microcontroller 2; No. 3, 4, 5, and 6 pins and 10, 11, 12, 13 The No. pins are the data input terminals of data selector 1 and data selector 2 respectively, and are connected with P0.2-P0.5, P1.1-P1.4 ports of 51 single-chip microcomputer 2 in turn; No. 7 and No. 9 pins respectively It is the result output terminal of data selector 1 and data selector 2, connected to P0.6 and P1.0 ports of 51 microcontroller 2; pins 1 and 15 are the enabling terminals of data selector 1 and data selector 2 respectively , Connect the P0.0 and P1.6 ports of 51 microcontroller 2.

For the two data selectors, the method of detecting one by one is adopted to detect the chips. Take the quality of the data selector 1 as an example: first, make the P0.0 port of the 51 microcontroller 2 output the corresponding level to enable the data selector 1, and the P1.6 port outputs the opposite level; P0.1 and P1.5 The level combination of 00-11 is sequentially input as the address input terminal of data selector 1. After changing the level combination of address input terminal every time, the level of the corresponding data input terminal changes, and the output terminal P0.6 of data selector 1 is detected. Whether the level is the same as the data input level. If they are the same, continue to test until all the tests are completed, indicating that the data selector 1 is intact; otherwise, it means that the chip is damaged, stop the test, and the result prompt part shows that the chip is damaged. Similarly, it can be detected whether the data selector 2 is damaged; only when the data selector 1 and the data selector 2 are both intact, it indicates that the chip is not damaged.

Embodiment 4: For the 74HC/LS161 hexadecimal counting chip, the number of pins is 16, and the function pins 1 and 9 are respectively the clearing end and the number setting end, both of which are active at low level, and are respectively connected with 51 single-chip microcomputer 2 The P0.0 and P1.0 ports of the P0.0 and P1.0 ports are connected to detect whether the chip has a counting function. It is not necessary to use the counter’s clearing and setting terminals, so make the P0.0 and P1.0 ports output high level; the function pin 7 , 10 is the counter enable terminal and is active at high level, respectively connected to P0.6 and P1.1 ports of 51 microcontroller 2 and outputs high level input; pins 3, 4, 5, and 6 are preset digital terminals , without processing; pin 2 is the pulse input terminal, connected to the P0.1 port of 51 single-chip microcomputer 2, and 51 single-chip microcomputer 2 outputs a certain frequency PWM wave at the P0.1 port through the timer to provide clock pulses for the chip; 11. Pins 12, 13, and 14 are the output terminals of the counter, which are connected to the P1.2-P1.5 ports of the 51 single-chip microcomputer 2. The 51 single-chip microcomputer 2 judges whether the chip is damaged by checking whether the level combination of the counter output terminal is consistent with its function table; if If the output result is consistent with the function table, it means that the chip is not damaged; otherwise, it means that the chip is damaged.

Embodiment 5: For the 74HC/LS138 decoder, the number of pins is 16, wherein, No. 4, 5, and 6 pins are decoder enabling terminals, which are respectively connected to P0.3 and P0.4 of 51 single-chip microcomputer 2 and P0.5, when its input level combination is 001, the decoder starts to work; pins 1, 2, and 3 are the address input terminals of the decoder, connected to P0.0-P0.2 of 51 microcontroller 2 The address input terminal of the decoder can determine the level of the decoder output pins 7 and 9-15, which are respectively connected to the P0.6, P1.0-P1.6 ports of the 51 single-chip microcomputer 2; the 51 single-chip microcomputer The P0.0-P0.2 ports of 2 output the level combination of 000-111 in turn. Before the output level of the IO port changes, the delay is 1ms to detect the level of the output terminal of the decoder. If the output result is consistent with the address input signal If it fails to match, it means that the chip is damaged, so stop the detection; otherwise, continue the detection until all input combinations are completed and the result function table is consistent, indicating that the chip is not damaged, and the corresponding result is displayed in the result display part.

Embodiment 6: For the 7448/9 seven-segment display decoder, 7448 is a common cathode seven-segment display decoder, and 7449 is a common anode seven-segment display decoder, and the number of pins is 16; wherein, No. 3 The pin is the light test terminal, which is connected to the P0.2 port of the 51 single-chip microcomputer 2, and maintains a high-level output; the 4th pin is the dynamic zero-off input terminal, which is connected to the P0.3 port of the 51 single-chip microcomputer 2, and maintains a high-level output; Pin No. 5 is the blanking input/dynamic zero-off output port, which is connected to the P0.4 port of 51 MCU 2 and keeps high-level output; pins 1, 2, 6, and 7 are input ports B, C, and D respectively. , A, respectively connected to P0.0, P0.1, P0.5, P0.6 ports of 51 single-chip microcomputer 2; pins 9-15 are respectively display decoder output terminals e, d, c, b, a, g, f, connect the P1.0-P1.6 ports of 51 single-chip microcomputer 2, for 7448 and 7449 two chips, input the same signal, the output result is just opposite; according to the chip function table, add different input level, and check whether the output result of the output terminal is consistent with the function table. If it is not consistent, stop the detection, indicating that the chip is damaged, and the result display part will display the corresponding result; until all the data in the function table are detected and the output results are consistent with the Corresponding to the function table, it means that the chip is intact, and the corresponding result is displayed in the result display part.

The preferred specific embodiments of the present invention have been described in detail above. It should be understood that those skilled in the art can make many modifications and changes according to the concept of the present invention without creative effort. Therefore, all technical solutions that can be obtained by those skilled in the art based on the concept of the present invention through logical analysis, reasoning or limited experiments on the basis of the prior art shall be within the scope of protection defined by the claims.

Claims (4)

1. A chip detection system for digital circuit practice teaching, characterized in that: comprise a mode selection module, a chip detection module and a result display module, the mode selection module includes a dial switch (1), and the chip detection module includes 51 Single-chip microcomputer (2), chip socket (3), first relay (4), second relay (5), result display module includes LED light (6) and buzzer (7), 51 single-chip microcomputers (2) and The dial switch (1), the chip socket (3), the first relay (4), the second relay (5), the LED light (6), and the buzzer (7) are connected, and the chip socket (3) is respectively connected to the first The relay (4) and the second relay (5) are connected, and the first relay (4) and the second relay (5) are grounded. 2. a kind of chip detection system that is used for digital circuit practice teaching as claimed in claim 1, is characterized in that: described chip socket (3) is 16 pin chip bases, plugs on the chip socket (3) and waits for Detection chip, the chip to be detected includes six commonly used chips for digital circuit experiments: 74HC/LS00, 74HC/LS20, 74HC/LS153, 74HC/LS161, 74HC/LS138, and 7448/9. 3. A kind of chip detection system that is used for digital circuit practice teaching as claimed in claim 1, is characterized in that: the normally closed end of described first relay (4) is connected with the P0.6 port of 51 single-chip microcomputers (2) respectively. , No. 7 pins of the chip socket (3) are connected. 4. A kind of chip detection system that is used for digital circuit practice teaching as claimed in claim 1, is characterized in that: the normally closed end of described second relay (5) is connected with the P0.7 port of 51 single-chip microcomputers (2) respectively. , No. 8 pins of the chip socket (3) are connected.