CN106449419A - U-shaped gate MOSFET based on Ga2O3 material and its preparation method - Google Patents

Abstract

The invention relates to a Ga2O3-material-based U-shaped grating type MOSFET and a preparation method thereof. The method comprises steps: selecting a beta-Ga2O3 substrate; growing a homogeneous epitaxial layer on the surface of the beta-Ga2O3 substrate and carrying out ion implantation on the surface of the homogeneous epitaxial layer to form an N type doped region; carrying out treatment on the surface of the N type doped region by using an ion implantation process to form a P type well region; carrying out treatment on the surface of the P type well region by using an etching process to form a U-shaped groove in the beta-Ga2O3 substrate; preparing a gate dielectric layer and a gate electrode in the U-shaped groove; and preparing a source electrode on the upper surface, different from the P type well region, of the beta-Ga2O3 substrate and manufacturing a drain electrode on the lower surface of the beta-Ga2O3 substrate, thereby forming a U-shaped grating type MOSFET. According to the Ga2O3-material-based U-shaped grating type MOSFET provided by the invention, with the U-shaped grate electrode structure, a high on-resistance defect of the MOSFET power device is overcome; and the Ga2O3 material is applied to the substrate and the homogeneous epitaxial layer of the U-shaped grating structure, so that the voltage-withstanding capability and the reverse breakdown voltage of the MOSFET power device are improved; and the on resistance is reduced and the performance and device reliability of the power device are improved substantially.

Description

U-shaped gate MOSFET based on Ga2O3 material and its preparation method

technical field

The invention belongs to the technical field of integrated circuits, and in particular relates to a _{Ga2O3 -} based U-shaped gate MOSFET and a preparation method thereof.

Background technique

With the rapid development of electronic technology, power electronics technology, as an important part of energy conversion, has gradually been widely used in industrial production, power system, transportation, national defense and military, new energy system and daily life. As the foundation and core of power electronics technology, the performance of power devices plays an important role in improving the overall system efficiency, and is mainly used in main circuits such as frequency conversion, buck-boost, rectifier and inverter, and power correction. Among them, power devices suitable for extreme environments such as high temperature, high frequency and high voltage, and high radiation have attracted more attention and research. Wide bandgap materials such as SiC and GaN have been researched and concerned by many scientists, and the application of wide bandgap materials has received great attention. fully developed. At present, power devices based on wide-bandgap materials have been gradually applied, gradually beginning to replace power devices based on Si. With the application requirements in extreme environments such as deep space exploration, deep oil and gas exploration, ultra-high voltage power conversion, high-speed locomotive drive, and nuclear energy development, Si-based power devices can no longer meet the requirements of high power, high frequency, and high temperature. In addition, Si-based power devices The large on-resistance of the device also greatly reduces the energy conversion efficiency of the system, and the demand for high-performance and high-power devices is becoming more and more urgent.

At present, it is more common to apply wide bandgap materials 4H-SiC and 6H-SiC to MOS power devices, and some of them have been put into commercial application, which greatly improves the withstand voltage and reverse breakdown electric field of the device, and is more suitable for high temperature and high voltage. And extreme environments such as high frequency and high radiation, the device reliability is improved, but due to the complicated preparation process of 4H-SiC and 6H-SiC single crystal, the high cost limits the application of this material.

Contents of the invention

In order to solve the above-mentioned problems in the prior art, the present invention provides a U-shaped gate MOSFET based on Ga ₂ O ₃ material and a preparation method thereof.

One embodiment of the present invention provides a method for preparing a U-shaped gate MOSFET based _{on Ga2O3} material, including:

Select β-Ga ₂ O ₃ substrate;

growing a homoepitaxial layer on the surface of the β-Ga ₂ O ₃ substrate and performing ion implantation on the surface of the homoepitaxial layer to form an N-type doped region;

Forming a P well region on the surface of the N-type doped region by ion implantation;

Forming a U-shaped groove in the β-Ga ₂ O ₃ substrate by using an etching process at the surface position of the P well region;

preparing a gate dielectric layer and a gate electrode in the U-shaped groove;

Prepare a source electrode on the upper surface of the β-Ga ₂ O ₃ substrate at a position different from that of the P well region, and prepare a drain electrode on the lower surface of the β-Ga ₂ O ₃ substrate, and finally form the U-gate MOSFET.

In one embodiment of the present invention, growing a homoepitaxial layer on the surface of the β _{- Ga2O3} substrate and performing ion implantation on the surface of the homoepitaxial layer to form an N-type doped region includes:

growing a β-Ga ₂ O ₃ material on the surface of the β-Ga ₂ O ₃ substrate by using a molecular beam epitaxy process to form the homoepitaxial layer;

Implanting Sn, Si or Al ions on the surface of the homoepitaxial layer by using an ion implantation process to form the N-type doped region with a certain thickness on the upper surface of the homoepitaxial layer.

In one embodiment of the present invention, an ion implantation process is used to form a P well region on the surface of the N-type doped region, including:

The P well region is formed by implanting Cu ions or N and Zn co-doped ions at the center of the surface of the N-type doped region using an ion implantation process using the first mask.

In one embodiment of the present invention, an etching process is used to form a U-shaped groove in the β _{- Ga2O3} substrate at the surface position of the P well region, including:

Using a second mask plate and using Cl ₂ or BCl ₃ as an etching gas, the surface of the P well region is etched using a plasma etching process or a reactive ion etching process to form the U-shaped groove.

In one embodiment of the present invention, preparing a gate dielectric layer and a gate electrode in the U-shaped groove includes:

Using a second mask plate, using a magnetron sputtering process to sputter _Al2O3 material _on the surface of the U-shaped groove to form the gate dielectric layer;

The gate electrode is formed by sputtering a Ti/Au laminated bimetallic material in the U-shaped groove by using a third mask plate using a magnetron sputtering process.

In one embodiment of the present invention, the _Al2O3 material is sputtered _on the surface of the U-shaped groove using a magnetron sputtering process, including:

Al material is used as the target material, argon and oxygen are used as the sputtering gas to pass into the sputtering chamber, and the Al ₂ O is sputtered on the surface of the U-shaped groove under the condition of the working frequency of 250-350W. ₃ materials.

In one embodiment of the present invention, a Ti/Au laminated bimetal material is sputtered in the U-shaped groove by using a magnetron sputtering process, including:

Using the magnetron sputtering process, using Ti material as the target material, and argon gas as the sputtering gas into the sputtering chamber, under the condition of working power of 100W, sputtering on the surface of the gate dielectric layer of the U-shaped groove Shot forming the Ti material;

Using the magnetron sputtering process, using Au material as the target material, and argon gas as the sputtering gas into the sputtering chamber, under the condition of working power of 20W-100W, the Ti in the U-shaped groove The surface of the material is sputtered to form the Au material, and finally the Ti/Au laminated bimetallic material is formed.

In one embodiment of the present invention, a source electrode is prepared at a position on the upper surface of the β-Ga ₂ O ₃ substrate different from that of the P-well region, and a source electrode is prepared under the β-Ga ₂ O ₃ substrate Fabricate the drain electrode on the surface, including:

Using the fourth mask plate, using the magnetron sputtering process, using Ti material as the target material, using argon as the sputtering gas to pass into the sputtering chamber, under the condition of working power of 100W, different from the above sputtering Ti material on the surface of the β-Ga ₂ O ₃ substrate in the P well region;

Using the fourth mask plate, using the magnetron sputtering process, using Au material as the target material, using argon as the sputtering gas to pass into the sputtering chamber, under the condition of the working power of 20W-100W, the Au material is sputtered on the surface of the Ti material different from the P well region;

performing annealing in a nitrogen or argon atmosphere by using a rapid thermal annealing process to form the source electrode;

Using the magnetron sputtering process, using Ti material as the target material and argon gas as the sputtering gas into the sputtering chamber, under the condition of working power of 100W, on the lower surface of the β _{- Ga2O3} substrate Sputtering Ti material;

Utilize the magnetron sputtering process, use Au material as the target material, use argon as the sputtering gas to pass into the sputtering chamber, and under the condition of working power of 20W-100W, sputter the Au material on the surface of the Ti material ;

Under a nitrogen or argon atmosphere, annealing is performed using a rapid thermal annealing process to form the drain electrode.

In one embodiment of the present invention, a source electrode is prepared at a position on the upper surface of the β-Ga ₂ O ₃ substrate different from that of the P-well region, and a source electrode is prepared under the β-Ga ₂ O ₃ substrate Fabricate the drain electrode on the surface, including:

Using the fourth mask plate, using the magnetron sputtering process, using Ti material as the target material, using argon as the sputtering gas to pass into the sputtering chamber, under the condition of working power of 100W, different from the above sputtering Ti material on the surface of the β-Ga ₂ O ₃ substrate in the P well region;

Using the fourth mask plate, using the magnetron sputtering process, using Au material as the target material, using argon as the sputtering gas to pass into the sputtering chamber, under the condition of the working power of 20W-100W, the Au material is sputtered on the surface of the Ti material different from the P well region;

Using the magnetron sputtering process, using Ti material as the target material and argon gas as the sputtering gas into the sputtering chamber, under the condition of working power of 100W, on the lower surface of the β _{- Ga2O3} substrate Sputtering Ti material;

Utilize the magnetron sputtering process, use Au material as the target material, use argon as the sputtering gas to pass into the sputtering chamber, and under the condition of working power of 20W-100W, sputter the Au material on the surface of the Ti material ;

Under a nitrogen or argon atmosphere, annealing is performed using a rapid thermal annealing process to form the source electrode and the drain electrode.

Another embodiment of the present invention provides a U-shaped gate MOSFET based on a Ga ₂ O ₃ material, wherein the U-shaped gate MOSFET is prepared by the method described in any one of the above-mentioned embodiments.

The MOSFET of the embodiment of the present invention adopts a novel U-shaped gate electrode structure, which can effectively overcome the disadvantage of high on-resistance of conventional MOSFET power devices and effectively reduce its on-resistance; in addition, the present invention uses Ga ₂ O ₃ material in The substrate and homoepitaxial layer of the U-shaped gate structure can greatly improve the withstand voltage and reverse breakdown voltage of the MOSFET power device by exerting its excellent material characteristics, and greatly improve the power device's performance while reducing the on-resistance. performance and device reliability.

Description of drawings

FIG. 1 is a schematic cross-sectional view of a U-shaped gate MOSFET based _on a _Ga2O3 material provided by an embodiment of the present invention;

FIG. 2 is a schematic top view of a U-shaped gate MOSFET based _on a _Ga2O3 material provided by an embodiment of the present invention;

₃ is a schematic flowchart of a method for preparing a U-shaped gate MOSFET based on a _Ga2O3 material provided by an embodiment of the present invention;

4a-4i are schematic diagrams of a method for preparing a U-shaped gate MOSFET based on a Ga ₂ O ₃ material provided by an embodiment of the present invention;

FIG. 5 is a schematic structural diagram of a first mask provided by an embodiment of the present invention;

FIG. 6 is a schematic structural diagram of a second mask provided by an embodiment of the present invention;

FIG. 7 is a schematic structural diagram of a third mask provided by an embodiment of the present invention; and

FIG. 8 is a schematic structural diagram of a fourth mask provided by an embodiment of the present invention.

detailed description

The present invention will be described in further detail below in conjunction with specific examples, but the embodiments of the present invention are not limited thereto.

Embodiment one

Please refer to Figures 1 and 2. Figure 1 is a schematic cross-sectional view of a U-shaped gate MOSFET based on Ga ₂ O ₃ material provided by an embodiment of the present invention, and Figure 2 is a schematic cross-sectional view of a Ga ₂ O ₃ -based MOSFET provided by an embodiment of the present invention. A schematic top view of a U-gate MOSFET made of materials. The U-shaped gate MOSFET of the present invention comprises: a substrate 1 , a homoepitaxial layer 2 , an N-type doped region 3 , a P well region 4 , a drain electrode 5 , a source electrode 6 , a gate oxide layer 7 and a gate electrode 8 .

The substrate is N-type β-Ga ² O ³ ₍ ^-201 ), N-type β _{-Ga 2 O 3} (010) or N-type β-Ga ₂ O ₃ (001) material; the homoepitaxial layer is β-Ga ₂ O ₃ with the same doping element as the substrate material, and the doping concentration is 10 ¹⁵ cm ^-3 The doping elements in the N-type doping region can be Sn, Si, Al and other elements, and the doping concentration is on the order of 10 ¹⁸ cm ^-3 ; the doping elements in the P well region are Cu or N, Zn co-doped impurity, the doping concentration is on the order of 10 ¹⁹ cm ^-3 ; the gate oxide layer is made of high dielectric constant materials such as HfO ₂ , Al ₂ O ₃ , TiO ₂ , La ₂ O ₃ ; the source and drain electrodes are made of Au, Al, Metal materials such as Ti, Sn, Ge, In, Ni, Co, Pt, W, Mo, Cr, Cu, Pb, alloys containing two or more of these metals, or conductive compounds such as ITO. In addition, it may have a two-layer structure composed of two or more different metals, such as Al/Ti. The U-shaped gate electrode is made of metal materials such as Au, Al, Ti, Sn, Ge, In, Ni, Co, Pt, W, Mo, Cr, Cu, Pb, etc., including two or more alloys of these metals or ITO and other conductive materials. Sexual compounds are formed. In addition, it may have a two-layer structure composed of two or more different metals, for example, Al/Ti.

Ga ₂ O ₃ , a wide bandgap material, far exceeds the bandgap of SiC (4.7-4.9eV), and its theoretical breakdown electric field is as high as 8MV/cm. It has great potential for application in power devices and can effectively increase the breakdown voltage. The preparation process of large-sized Ga ₂ O ₃ single crystals is mature, and the preparation cost of single crystal substrates is lower than that of wide bandgap materials SiC and GaN. Therefore, applying Ga ₂ O ₃ materials to power MOSFET devices can improve device performance, such as endurance Voltage, reverse breakdown voltage, and reduce the cost of device fabrication.

Please refer to FIG. 3 . FIG. 3 is a schematic flowchart of a method for manufacturing a U-shaped gate MOSFET based on Ga ₂ O ₃ material according to an embodiment of the present invention. The method comprises the steps of:

Step 1, selecting a β-Ga ₂ O ₃ substrate;

Step 2, growing a homoepitaxial layer on the surface of the β _{- Ga2O3} substrate and performing ion implantation on the surface of the homoepitaxial layer to form an N-type doped region;

Step 3, forming a P well region on the surface of the N-type doped region by ion implantation;

Step 4, forming a U-shaped groove in the β-Ga ₂ O ₃ substrate at the surface position of the P well region by an etching process;

Step 5, preparing a gate dielectric layer and a gate electrode in the U-shaped groove;

Step 6, preparing a source electrode at a position on the upper surface of the β _{- Ga2O3} substrate different from that of the P well region, and preparing a drain electrode on the lower surface of the β _{- Ga2O3} substrate, and finally forming the U-shaped gate MOSFET.

For step 2, you can include:

Step 21, using molecular beam epitaxy to grow β-Ga ₂ O ₃ material on the surface of the β-Ga ₂ O ₃ substrate to form the homoepitaxial layer;

Step 22, using an ion implantation process to implant Sn, Si or Al ions on the surface of the homoepitaxial layer to form the N-type doped region with a certain thickness on the upper surface of the homoepitaxial layer.

For step 3, you can include:

The P well region is formed by implanting Cu ions or N and Zn co-doped ions at the center of the surface of the N-type doped region using an ion implantation process using the first mask.

For step 4, you can include:

Using a second mask plate and using Cl ₂ or BCl ₃ as an etching gas, the surface of the P well region is etched using a plasma etching process or a reactive ion etching process to form the U-shaped groove.

For step 5, you can include:

Step 51, using a second mask plate, sputtering Al ₂ O ₃ material on the surface of the U-shaped groove by a magnetron sputtering process to form the gate dielectric layer;

Step 52 , using a third mask, sputtering a Ti/Au stacked bimetallic material in the U-shaped groove by using a magnetron sputtering process to form the gate electrode.

For step 51, may include:

Al material is used as the target material, argon and oxygen are used as the sputtering gas to pass into the sputtering chamber, and the Al ₂ O is sputtered on the surface of the U-shaped groove under the condition of the working frequency of 250-350W. ₃ materials.

For step 52, may include:

Using the magnetron sputtering process, using Ti material as the target material, and argon gas as the sputtering gas into the sputtering chamber, under the condition of working power of 100W, sputtering on the surface of the gate dielectric layer of the U-shaped groove The Ti material is formed by sputtering; using the magnetron sputtering process, the Au material is used as the target material, and the argon gas is used as the sputtering gas to pass into the sputtering cavity. Under the condition of the working power of 20W-100W, the The surface of the Ti material in the U-shaped groove is sputtered to form the Au material, and finally the Ti/Au laminated bimetallic material is formed.

For step 6, one of the ways may include:

Step 61, using the fourth mask plate, using the magnetron sputtering process, using Ti material as the target material, and using argon as the sputtering gas to pass into the sputtering chamber, under the condition of working power of 100W, in different Sputtering Ti material on the surface of the β _{- Ga2O3} substrate in the P well region;

Step 62, using the fourth mask, using the magnetron sputtering process, using Au material as the target material, using argon as the sputtering gas to pass into the sputtering cavity, under the condition that the working power is 20W-100W , sputtering Au material on the surface of the Ti material different from the P well region;

Step 63, performing annealing in a nitrogen or argon atmosphere by using a rapid thermal annealing process to form the source electrode;

Step 64: Utilize the magnetron sputtering process, use Ti material as the target material, and argon gas as the sputtering gas to pass into the sputtering chamber, and under the condition of working power of 100W, the β-Ga ₂ O ₃ Ti material is sputtered on the lower surface of the substrate;

Step 65. Using the magnetron sputtering process, using Au material as the target material, and argon gas as the sputtering gas into the sputtering chamber, under the condition of working power of 20W-100W, sputter on the surface of the Ti material Shoot Au material;

Under a nitrogen or argon atmosphere, annealing is performed using a rapid thermal annealing process to form the drain electrode.

Optionally, for step six, another method may include:

Using the fourth mask plate, using the magnetron sputtering process, using Ti material as the target material, using argon as the sputtering gas to pass into the sputtering chamber, under the condition of working power of 100W, different from the above sputtering Ti material on the surface of the β-Ga ₂ O ₃ substrate in the P well region;

Using the fourth mask plate, using the magnetron sputtering process, using Au material as the target material, using argon as the sputtering gas to pass into the sputtering chamber, under the condition of the working power of 20W-100W, the Au material is sputtered on the surface of the Ti material different from the P well region;

Using the magnetron sputtering process, using Ti material as the target material and argon gas as the sputtering gas into the sputtering chamber, under the condition of working power of 100W, on the lower surface of the β _{- Ga2O3} substrate Sputtering Ti material;

Utilize the magnetron sputtering process, use Au material as the target material, use argon as the sputtering gas to pass into the sputtering chamber, and under the condition of working power of 20W-100W, sputter the Au material on the surface of the Ti material ;

Under a nitrogen or argon atmosphere, annealing is performed using a rapid thermal annealing process to form the source electrode and the drain electrode.

In the embodiment of the present invention, a method for preparing a novel U-shaped gate MOSFET power device based on Ga ₂ O ₃ material is proposed for the first time. By preparing a U-shaped gate structure, it can effectively overcome the shortcomings of high on-resistance of conventional MOSFET power devices and effectively reduce its on-resistance; in addition, the Ga ₂ O ₃ material is applied to the substrate of the U-shaped gate structure And the homoepitaxial layer, exerting its excellent material characteristics, can greatly improve the withstand voltage and reverse breakdown voltage of the MOSFET power device, and greatly improve the performance and reliability of the power device while reducing the on-resistance.

Embodiment two

Please refer to Fig. 4a-Fig. 4i and _Fig . ₅ -Fig. 8 together, Fig. 4a-Fig. A schematic structural diagram of a first mask provided by an embodiment of the invention; FIG. 6 is a schematic structural diagram of a second mask provided by an embodiment of the present invention; FIG. 7 is a third mask provided by an embodiment of the present invention Schematic diagram of the structure of the stencil; and FIG. 8 is a schematic diagram of the structure of a fourth mask provided by an embodiment of the present invention. In this embodiment, on the basis of the above-mentioned embodiments, the preparation method of the U-shaped gate MOSFET of the present invention is described in detail as follows:

Step 1: Referring to Fig. 4a, prepare a β-Ga ₂ O ₃ substrate 1 with a substrate doping concentration of 10 ¹⁸ -10 ¹⁹ cm ^-3 and a thickness of 200 μm - 600 μm, and perform pretreatment and cleaning on the substrate.

The reason for choosing β-Ga ₂ O ₃ as the substrate: the emerging wide bandgap semiconductor material, because it far exceeds the bandgap width of SiC and GaN (4.7-4.9eV), the theoretical breakdown electric field (8MV/cm) and the relative SiC and GaN The substrate is cheap and effectively improves the device performance of the power device.

The substrate is firstly cleaned organically, the first step is to soak in methanol for 3 minutes, the second step is to soak in acetone for 3 minutes, the third step is to soak in methanol for 3 minutes, the fourth step is to rinse with deionized water for 3 minutes, and the fifth step is to wash with flowing deionized water for 5 minutes;

Clean the substrate with acid, the first step is soaking in deionized water and heating to 90°C, the second step is to prepare SPM solution with deionized water: 30% hydrogen peroxide: 96% concentrated sulfuric acid = 1:1:4 ratio, SPM Soak in the solution for 5 minutes, the second step or use 30% hydrogen peroxide: 98% concentrated sulfuric acid = 1:3 ratio to prepare Piranha solution, soak in Piranha solution for 1 min, the third step is to soak in deionized water and heat to 90°C, then cool to room temperature .

Step 2: Please refer to FIG. 4b. Molecular beam epitaxy and ion implantation are performed on the upper surface of the β-Ga ₂ O ₃ substrate 1 prepared in step 1 to form a homoepitaxial layer 2. The thickness of the epitaxial layer is 5-10um, and the implanted ions can be It is Sn, Si, Al, and the doping concentration is on the order of 10 ¹⁵ cm ^-3 .

Step 3: Please refer to Figure 4c, perform molecular beam epitaxy and ion implantation on the upper part of the homoepitaxial layer prepared in step 2 to form N ⁺ heavily doped region 3 (ie N-type doped region), N ⁺ heavily doped The thickness of the region is 0.3-0.5um, the implanted ions can be Sn, Si, Al, etc., and the doping concentration is on the order of 10 ¹⁸ cm ^-3 .

Step 4: Please refer to Figure 4d and Figure 5, use the first photolithography mask to perform ion implantation in the central part of the N ⁺ heavily doped region prepared in step 3 to form a P well region 4, and the depth of the P well region is between 0.7 and 1um, the implanted ions can be Cu or N, Zn co-doped, the doping concentration is 1×10 ¹⁹ ~ 1×10 ²⁰ cm ^-3 .

Step 5: Please refer to Fig. 4e and Fig. 6, use the second photolithography mask to perform plasma etching or reactive ion etching in the middle of the P well region prepared in step 4 to form a U-shaped region, the etching gas used is Cl ₂ or _BCl3 ;

Step 6: Please refer to FIG. 4f and FIG. 6, use the second photolithography mask on the U-shaped region prepared in step 5, and grow the Al ₂ O ₃ gate oxide layer 7 by magnetron sputtering;

The sputtering target is made of aluminum target with a mass ratio of purity >99.99%, and _O2 and Ar with a mass percentage purity of 99.999% are used as the sputtering gas to pass into the sputtering chamber. Clean the cavity of the injection equipment for 5 minutes, and then evacuate. Under the conditions of vacuum degree of 6×10 ^-4 ~ 1.3×10 ^-3 Pa, argon gas flow rate of 20 ~ 30cm ³ /sec, target base distance of 10cm and working power of 250W ~ 350W, the grid near the source end is prepared. The oxide layer is Al ₂ O ₃ , and the thickness of the gate oxide layer is 40nm-100nm.

The gate oxide layer can be replaced by HfO ₂ or La ₂ O ₃ or TiO ₂ materials. However, after the replacement, the magnetron sputtering needs to replace the process parameters such as the target material and the sputtering power.

Step 7: Please refer to FIG. 4g and FIG. 6, use the third photolithography mask on the U-shaped region prepared in step 5, and grow the Ti/Au stacked double metal gate electrode 8 by magnetron sputtering;

The sputtering target is titanium with a mass ratio of purity >99.99%, and Ar with a mass percentage purity of 99.999% is used as the sputtering gas to pass into the sputtering chamber. Rinse for 5 minutes, then vacuum. Under the conditions of vacuum degree of 6×10 ^-4 ~ 1.3×10 ^-3 Pa, argon gas flow rate of 20 ~ 30cm ³ /sec, base distance of target material of 10cm and working power of 100W, the titanium material is prepared, and the electrode thickness is 20nm ~ 30nm.

The sputtering target is made of gold with a mass ratio of purity >99.99%, and Ar with a mass percentage purity of 99.999% is used as the sputtering gas to pass into the sputtering chamber. Rinse for 5 minutes, then vacuum. Under the conditions of vacuum degree of 6×10 ^-4 ~ 1.3×10 ^-3 Pa, argon gas flow rate of 20 ~ 30cm ³ /sec, target base distance of 10cm and working power of 20W ~ 100W, gold materials, electrodes The thickness is 200nm-300nm.

The metal of the gate electrode can be selected from different elements such as Au, Al, Ti and the two-layer structure composed of them, and the source and drain electrodes can be replaced by metals such as Al\Ti\Ni\Ag\Pt. Among them, Au\Ag\Pt has stable chemical properties; Al\Ti\Ni has low cost.

Step 8: Referring to FIG. 4h , use a third photolithography mask on the upper surface of the N ⁺ heavily doped region prepared in step 3, and grow a Ti/Au stacked double metal source electrode 6 by magnetron sputtering.

The sputtering target is titanium with a mass ratio of purity >99.99%, and Ar with a mass percentage purity of 99.999% is used as the sputtering gas to pass into the sputtering chamber. Rinse for 5 minutes, then vacuum. Under the conditions of vacuum degree of 6×10 ^-4 ~ 1.3×10 ^-3 Pa, argon gas flow rate of 20 ~ 30cm ³ /sec, target base distance of 10cm and working power of 100W, the titanium grid electrode is prepared, and the thickness of the electrode is 20nm to 30nm.

The sputtering target is made of gold with a mass ratio of purity >99.99%, and Ar with a mass percentage purity of 99.999% is used as the sputtering gas to pass into the sputtering chamber. Rinse for 5 minutes, then vacuum. Under the conditions of vacuum degree of 6×10 ^-4 ~ 1.3×10 ^-3 Pa, argon gas flow rate of 20 ~ 30cm ³ /sec, target base distance of 10cm and working power of 20W ~ 100W, the gold source electrode was prepared. The electrode thickness is 200nm-300nm. After the sputtering is completed, perform rapid thermal annealing to form an ohmic contact, and anneal at 500° C. for 3 minutes in a nitrogen or argon environment.

The metal of the gate electrode can be selected from different elements such as Au, Al, Ti and the two-layer structure composed of them, and the source and drain electrodes can be replaced by Al, Ti, Ni, Ag, Pt and other metals. Among them, Au, Ag, and Pt have stable chemical properties; Al, Ti, and Ni have low costs.

Step 9: Referring to FIG. 4i , the Ti/Au stacked double metal drain electrode 5 is grown on the lower surface of the β-Ga ₂ O ₃ substrate prepared in Step 1 by magnetron sputtering.

The sputtering target is titanium with a mass ratio of purity >99.99%, and Ar with a mass percentage purity of 99.999% is used as the sputtering gas to pass into the sputtering chamber. Rinse for 5 minutes, then vacuum. Under the conditions of a vacuum of 6×10 ^-4 to 1.3×10 ^-3 Pa, an argon gas flow of 20 to 30 cm ³ /sec, a target base distance of 10 cm and a working power of 100 W, a titanium drain electrode is prepared, and the thickness of the electrode is 20nm to 30nm.

The sputtering target is made of gold with a mass ratio of purity >99.99%, and Ar with a mass percentage purity of 99.999% is used as the sputtering gas to pass into the sputtering chamber. Rinse for 5 minutes, then vacuum. Under the conditions of vacuum degree of 6×10 ^-4 ~ 1.3×10 ^-3 Pa, argon gas flow rate of 20 ~ 30cm ³ /sec, target base distance of 10cm and working power of 20W ~ 100W, the gold drain electrode was prepared. The electrode thickness is 200nm-300nm. After the sputtering is completed, perform rapid thermal annealing to form an ohmic contact, and anneal at 500° C. for 3 minutes in a nitrogen or argon environment.

The metal of the drain electrode can be selected from different elements such as Au, Al, Ti and the two-layer structure composed of them, and the source and drain electrodes can be replaced by metals such as Al\Ti\Ni\Ag\Pt. Among them, Au\Ag\Pt has stable chemical properties; Al\Ti\Ni has low cost.

The above content is a further detailed description of the present invention in conjunction with specific preferred embodiments, and it cannot be assumed that the specific implementation of the present invention is limited to these descriptions. For those of ordinary skill in the technical field of the present invention, without departing from the concept of the present invention, some simple deduction or replacement can be made, which should be regarded as belonging to the protection scope of the present invention.

Claims (10)

1. A method for preparing a U-shaped gate MOSFET based on Ga ₂ O ₃ materials, characterized in that, comprising: Select β-Ga ₂ O ₃ substrate; growing a homoepitaxial layer on the surface of the β-Ga ₂ O ₃ substrate and performing ion implantation on the surface of the homoepitaxial layer to form an N-type doped region; Forming a P well region on the surface of the N-type doped region by ion implantation; Forming a U-shaped groove in the β-Ga ₂ O ₃ substrate by using an etching process at the surface position of the P well region; preparing a gate dielectric layer and a gate electrode in the U-shaped groove; Prepare a source electrode on the upper surface of the β-Ga ₂ O ₃ substrate at a position different from that of the P well region, and prepare a drain electrode on the lower surface of the β-Ga ₂ O ₃ substrate, and finally form the U-gate MOSFET. 2. The method according to claim 1, characterized in that, growing a homoepitaxial layer on the surface of the β _{- Ga2O3} substrate and performing ion implantation on the surface of the homoepitaxial layer to form an N-type doped region ,include: growing a β-Ga ₂ O ₃ material on the surface of the β-Ga ₂ O ₃ substrate by using a molecular beam epitaxy process to form the homoepitaxial layer; Implanting Sn, Si or Al ions on the surface of the homoepitaxial layer by using an ion implantation process to form the N-type doped region with a certain thickness on the upper surface of the homoepitaxial layer. 3. The method according to claim 1, characterized in that, forming a P well region on the surface of the N-type doped region using an ion implantation process, comprising: The P well region is formed by implanting Cu ions or N and Zn co-doped ions at the center of the surface of the N-type doped region using an ion implantation process using the first mask. 4. The method according to claim 1, wherein an etching process is used to form a U-shaped groove in the β-Ga ₂ O ₃ substrate at the surface position of the P well region, comprising: Using a second mask plate and using Cl ₂ or BCl ₃ as an etching gas, the surface of the P well region is etched using a plasma etching process or a reactive ion etching process to form the U-shaped groove. 5. The method according to claim 1, wherein preparing a gate dielectric layer and a gate electrode in the U-shaped groove comprises: Using a second mask plate, using a magnetron sputtering process to sputter _Al2O3 material _on the surface of the U-shaped groove to form the gate dielectric layer; The gate electrode is formed by sputtering a Ti/Au laminated bimetallic material in the U-shaped groove by using a third mask plate using a magnetron sputtering process. 6. method according to claim 5, is characterized in that, utilizes magnetron sputtering process to sputter Al _on the surface of the U _- shaped groove O material, comprising: Al material is used as the target material, argon and oxygen are used as the sputtering gas to pass into the sputtering chamber, and the Al ₂ O is sputtered on the surface of the U-shaped groove under the condition of the working frequency of 250-350W. ₃ materials. 7. The method according to claim 5, characterized in that, utilizing a magnetron sputtering process to sputter a Ti/Au stacked bimetallic material in the U-shaped groove, comprising: Using the magnetron sputtering process, using Ti material as the target material, and argon gas as the sputtering gas into the sputtering chamber, under the condition of working power of 100W, sputtering on the surface of the gate dielectric layer of the U-shaped groove Shot forming the Ti material; Using the magnetron sputtering process, using Au material as the target material, and argon gas as the sputtering gas into the sputtering chamber, under the condition of working power of 20W-100W, the The Au material is formed by sputtering on the surface of the Ti material, and finally the Ti/Au laminated bimetallic material is formed. 8. The method according to claim 1, characterized in that a source electrode is prepared at a position on the upper surface of the β-Ga ₂ O ₃ substrate different from that of the P-well region, and a source electrode is formed on the β-Ga ₂ O 3 substrate O _The lower surface of the substrate is used to make the drain electrode, including: Using the fourth mask plate, using the magnetron sputtering process, using Ti material as the target material, using argon as the sputtering gas to pass into the sputtering chamber, under the condition of working power of 100W, different from the above Sputtering Ti material on the surface of the β-Ga ₂ O ₃ substrate in the P well region adopts the fourth mask plate, utilizes a magnetron sputtering process, uses Au material as a target material, and uses argon gas as a sputtering gas to pass through Entering the sputtering chamber, under the condition of working power of 20W-100W, sputtering Au material on the surface of the Ti material different from the P well region; performing annealing in a nitrogen or argon atmosphere by using a rapid thermal annealing process to form the source electrode; Using the magnetron sputtering process, using Ti material as the target material and argon gas as the sputtering gas into the sputtering chamber, under the condition of working power of 100W, on the lower surface of the β _{- Ga2O3} substrate Sputtering Ti material; Using the fourth mask plate, using the magnetron sputtering process, using Au material as the target material, using argon as the sputtering gas to pass into the sputtering chamber, under the condition of the working power of 20W-100W, the Au material is sputtered on the surface of the Ti material; Under a nitrogen or argon atmosphere, annealing is performed using a rapid thermal annealing process to form the drain electrode. 9. The method according to claim 1, characterized in that a source electrode is prepared at a position on the upper surface of the β-Ga ₂ O ₃ substrate different from that of the P-well region, and a source electrode is prepared on the β-Ga ₂ O 3 substrate O _The lower surface of the substrate is used to make the drain electrode, including: Using the fourth mask plate, using the magnetron sputtering process, using Ti material as the target material, using argon as the sputtering gas to pass into the sputtering chamber, under the condition of working power of 100W, different from the above sputtering Ti material on the surface of the β-Ga ₂ O ₃ substrate in the P well region; Using the fourth mask plate, using the magnetron sputtering process, using Au material as the target material, using argon as the sputtering gas to pass into the sputtering chamber, under the condition of the working power of 20W-100W, the Au material is sputtered on the surface of the Ti material different from the P well region; Using the magnetron sputtering process, using Ti material as the target material and argon gas as the sputtering gas into the sputtering chamber, under the condition of working power of 100W, on the lower surface of the β _{- Ga2O3} substrate Sputtering Ti material; Utilize the magnetron sputtering process, use Au material as the target material, use argon as the sputtering gas to pass into the sputtering chamber, and under the condition of working power of 20W-100W, sputter the Au material on the surface of the Ti material ; Under a nitrogen or argon atmosphere, annealing is performed using a rapid thermal annealing process to form the source electrode and the drain electrode. 10. A U-shaped gate MOSFET based on Ga ₂ O ₃ material, characterized in that the U-shaped gate MOSFET is prepared by the method according to any one of claims 1-9.