CN106383545B - A Spark Discharge Constant Power Arc Extinguishing Method for Intrinsically Safe Buck Circuit - Google Patents

Abstract

The invention discloses a spark discharge constant-power arc extinguishing method of an intrinsically safe Buck circuit, and belongs to the technical field of explosion-proof electrical safety. The intrinsic safety Buck circuit comprises a control circuit, a Buck circuit, a spark discharge constant power circuit, an arc starting trigger circuit and a blocking circuit, wherein the blocking circuit comprises an output blocking circuit and a control blocking circuit; the output blocking circuit is electrically connected with the Buck circuit, and the control blocking circuit is electrically connected with the control circuit and the Buck circuit respectively; the arcing trigger circuit is respectively and electrically connected with the spark discharge constant power circuit, the output locking circuit and the control locking circuit; the spark discharge constant power circuit is electrically connected with the Buck circuit. The invention realizes the spark discharge constant power control at the open circuit of the inductor, so that the electric spark discharge power is smaller than the minimum ignition power, and the electric spark discharge energy is smaller than the minimum ignition energy, thereby realizing the requirement that the electric arc power and the electric arc energy are both smaller than the minimum ignition value.

Description

A Spark Discharge Constant Power Arc Extinguishing Method for Intrinsically Safe Buck Circuit

technical field

The invention relates to the technical field of explosion-proof electrical safety, in particular to a spark discharge constant power arc extinguishing method for an intrinsically safe Buck circuit.

Background technique

Intrinsically safe circuits used in explosive gas environments are defined according to the GB3836.4-2000 standard as: any electric spark or any thermal effect generated under the conditions specified in this standard (including normal operation and specified fault conditions) cannot ignite the specified explosive gas. The circuit in the gas environment, its specific performance is: the detection test under the specified conditions is carried out on the IEC (International Electrotechnical Commission, International Electrotechnical Commission) spark test device, and any part of the circuit cannot be ignited under the three conditions of short circuit, open circuit and grounding. of explosive gases.

For intrinsically safe buck circuits, one of the most dangerous forms of electrical discharge is sparking (also known as arcing) at an open circuit in an inductor. The spark discharge energy at the open circuit of the inductor comes from two places: one is the power supply, and the other is the inductance and capacitance of the energy storage element. At present, arc extinguishing methods such as dynamic monitoring and shutdown of electric sparks and short circuit protection circuits are often used to reduce the energy of electric sparks. However, the principles of the above-mentioned methods all aim at reducing the spark energy, and do not involve the spark power. As we all know, energy is the integral of power and time. The same discharge energy may correspond to larger discharge power and shorter discharge time, or may correspond to smaller discharge power and longer discharge time. In actual testing, there has been a "contradictory" phenomenon that "small" sparks can detonate gas, but "big" sparks cannot detonate gas. This shows that to prevent spark detonation, the power limit condition must be met first, and then the energy limit condition must be satisfied. Therefore, there is a need for an arc extinguishing method that first limits the spark power and then limits the spark energy.

Contents of the invention

In order to solve the problem that the existing intrinsically safe Buck circuit does not use reduced spark power to extinguish the arc, the present invention provides a spark discharge constant power arc-extinguishing method for the intrinsically safe Buck circuit. The intrinsically safe Buck circuit includes a control circuit and The Buck circuit also includes a spark discharge constant power circuit, an arc trigger circuit and a blocking circuit, and the blocking circuit includes an output blocking circuit and a control blocking circuit; the output blocking circuit is electrically connected to the Buck circuit, and the control blocking circuit respectively electrically connected to the control circuit and the Buck circuit; the arcing trigger circuit is electrically connected to the spark discharge constant power circuit, the output blocking circuit, and the control blocking circuit respectively; the spark discharge constant power circuit is connected to the The Buck circuit is electrically connected; the spark discharge constant power circuit collects the voltage and current of the spark at the open circuit of the inductance, obtains the power of the spark through signal shaping and calculation, compares it with the given power, and compares the result through PWM modulation. Control the duty ratio of the switching transistor to realize the constant power control of the open-circuit spark discharge; when the spark discharge constant power circuit detects that the spark voltage reaches half of the minimum arc-building voltage, the arc triggering circuit is used to synchronously trigger the The output blocking circuit and the control blocking circuit ensure that the spark discharge constant power circuit controls the switching transistor.

The Buck circuit includes a power supply, a switching transistor, a diode, an inductor, a capacitor, and a resistor; the positive end of the power supply is electrically connected to the drain of the switching transistor, and the source of the switching transistor is electrically connected to the cathode of the diode. One end of the inductance is electrically connected to the cathode of the diode, the other end of the inductance is electrically connected to one end of the capacitor through a shunt, and the other end of the capacitor is electrically connected to the anode of the diode, so The anode of the diode is electrically connected to the negative terminal of the power supply, and the resistor is connected in parallel with the capacitor.

The control blocking circuit includes a second thyristor, a third thyristor and an inverter; the output terminals of the inverter are respectively electrically connected to the gate of the second thyristor and the gate of the third thyristor; the The anode of the second thyristor is electrically connected to one end of the resistor; the cathode of the third thyristor is electrically connected to the gate of the switching transistor.

The control circuit includes a first resistor, a second resistor, a third resistor, a fourth resistor, a second capacitor, a third capacitor, a first operational amplifier, a first limiter, a first triangle carrier and a first comparator; One end of the first resistor is electrically connected to the cathode of the second thyristor, the other end of the first resistor is electrically connected to one end of the second resistor; the other end of the second resistor is electrically connected to the first thyristor The inverting input end of the operational amplifier is electrically connected; one end of the third resistor is electrically connected to the inverting input end of the first operational amplifier, and the other end of the third resistor is grounded; the same end of the first operational amplifier A given voltage is connected to the input terminal, the output terminal of the first operational amplifier is electrically connected to one end of the fourth resistor, and the other end of the fourth resistor is electrically connected to one end of the third capacitor; the first operational amplifier is electrically connected to one end of the third capacitor; The other end of the three capacitors is electrically connected to the inverting input terminal of the first operational amplifier; the second capacitor is connected in parallel with the second resistor; the output terminal of the first operational amplifier is connected to the first limiter The input end of the first amplitude limiter is electrically connected to the input end of the first comparator; the output end of the first triangular carrier wave is electrically connected to the other input end of the first comparator Terminals are electrically connected; the output terminal of the first comparator is electrically connected to the anode of the third thyristor.

The spark discharge constant power circuit includes a second operational amplifier, a third operational amplifier, a fourth operational amplifier, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor resistance, the twelfth resistance, the second comparator, the second triangle carrier, the second limiter, the multiplier and the fourth thyristor; one end of the fifth resistance is electrically connected to the same input end of the second operational amplifier connected, the other end of the fifth resistor is electrically connected to the inductor; one end of the sixth resistor is electrically connected to the same input end of the second operational amplifier, and the other end of the sixth resistor is grounded; One end of the seventh resistor is electrically connected to the inverting input end of the second operational amplifier, and the other end of the seventh resistor is electrically connected to the capacitor and the resistor respectively; one end of the eighth resistor is electrically connected to the The inverting input terminal of the second operational amplifier is electrically connected, the other end of the eighth resistor is electrically connected to the output terminal of the second operational amplifier; one end of the ninth resistor is connected to the same terminal of the third operational amplifier Electrically connected to the input end, the other end of the ninth resistor is electrically connected to the inductor through one end of the shunt; one end of the tenth resistor is electrically connected to the same input end of the third operational amplifier, The other end of the tenth resistor is grounded; one end of the eleventh resistor is electrically connected to the inverting input end of the third operational amplifier, and the other end of the eleventh resistor passes through the other end of the shunt Electrically connected to the inductor; one end of the twelfth resistor is electrically connected to the inverting input end of the third operational amplifier, and the other end of the twelfth resistor is electrically connected to the output end of the third operational amplifier connected; the output of the second operational amplifier is electrically connected to an input of the multiplier, and the output of the third operational amplifier is electrically connected to the other input of the multiplier; the multiplier The output terminal is electrically connected to the inverting input terminal of the fourth operational amplifier, and the same direction input terminal of the fourth operational amplifier is connected to a given power; the output terminal of the fourth operational amplifier is connected to the second limiter The input end of the second limiter is electrically connected to the input end of the second limiter, and the output end of the second comparator is electrically connected; the output end of the second triangular carrier wave is electrically connected to the other input end of the second comparator. The terminals are electrically connected; the output terminal of the second comparator is electrically connected to the anode of the fourth thyristor, and the cathode of the fourth thyristor is electrically connected to the gate of the switching transistor.

The output blocking circuit includes a thirteenth resistor, a fourteenth resistor, a first thyristor and a first capacitor; after the fourteenth resistor is connected in series with the first thyristor, it is then connected in parallel with the resistor; the first One end of the capacitor is electrically connected to the gate of the first thyristor, and the other end of the first capacitor is electrically connected to the cathode of the first thyristor; one end of the thirteenth resistor is electrically connected to the gate of the first thyristor. Pole electrical connection.

The arcing trigger circuit is a basic RS trigger; the input terminal S of the basic RS trigger is electrically connected to the output terminal of the second operational amplifier, and the input terminal R of the basic RS trigger is connected to a high level; The output terminal Q of the basic RS flip-flop is respectively electrically connected to the gate of the fourth thyristor, the other end of the thirteenth resistor and the input terminal of the inverter.

The second thyristor, the third thyristor and the fourth thyristor are all bidirectional thyristors.

The switching transistor is an NMOS transistor or a PMOS transistor.

The spark discharge constant power arc extinguishing method of the intrinsically safe Buck circuit provided by the present invention realizes the spark discharge constant power control at the inductance open circuit by adding a spark discharge constant power circuit, an arc trigger circuit and a blocking circuit, so that the spark discharge power is less than The minimum ignition power and spark discharge energy are less than the minimum ignition energy, thus realizing the requirement that both the arc power and arc energy are less than the minimum ignition value, and the circuit structure is complete, while taking into account normal operation and open circuit faults, ensuring the intrinsic safety performance of the inductance circuit .

Description of drawings

Fig. 1 is a schematic diagram of the principle of an existing intrinsically safe Buck circuit with a control circuit;

Fig. 2 is a schematic block diagram of spark discharge constant power arc extinguishing of an intrinsically safe Buck circuit according to an embodiment of the present invention;

Fig. 3 is a schematic diagram of the principle of a spark discharge constant power arc extinguishing circuit of an intrinsically safe Buck circuit according to an embodiment of the present invention.

detailed description

The technical solutions of the present invention will be further described below in conjunction with the accompanying drawings and embodiments.

FIG. 1 is a schematic diagram of the principle of an existing intrinsically safe Buck circuit with a control circuit. The Buck circuit includes a power supply E, a switching transistor M1, a diode D, an inductor L, a capacitor C and a resistor R; One end of the inductor L is electrically connected to the cathode of the diode D, the other end of the inductor L is electrically connected to one end of the capacitor C, the other end of the capacitor C is electrically connected to the anode of the diode D, and the anode of the diode D is electrically connected to the negative side of the power supply E The terminals are electrically connected, and the resistor R is connected in parallel with the capacitor C. The control circuit includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, a capacitor C2, a capacitor C3, an operational amplifier A1, a limiter U3, a triangle carrier U2 and a comparator U1; one end of the resistor R1 is electrically connected to one end of the resistor R, The other end of the resistor R1 is electrically connected to one end of the resistor R2; the other end of the resistor R2 is electrically connected to the inverting input end of the operational amplifier A1; one end of the resistor R3 is electrically connected to the inverting input end of the operational amplifier A1, and the other end of the resistor R3 One end is grounded; the same input terminal of the operational amplifier A1 is connected to a given voltage, the output terminal of the operational amplifier A1 is electrically connected to one end of the resistor R4, the other end of the resistor R4 is electrically connected to one end of the capacitor C3; the other end of the capacitor C3 is connected to the operational The inverting input terminal of the amplifier A1 is electrically connected; the capacitor C2 is connected in parallel with the resistor R2; the output terminal of the operational amplifier A1 is electrically connected with the input terminal of the limiter U3, and the output terminal of the limiter U3 is electrically connected with an input terminal of the comparator U1 connection; the output end of the triangular carrier wave U2 is electrically connected to the other input end of the comparator U1; the output end of the comparator U1 is electrically connected to the gate of the switching transistor M1. R1, R2, R4, C2, and C3 form a PID regulator. During normal operation, the output voltage U ₀ is divided by the resistors R1, R2, and R3 to obtain the collected voltage U _R3 , and the comparison between U _R3 and the given voltage V _ref is output through the operational amplifier A1, and the output result of the operational amplifier A1 is passed through After the signal of the limiter U3 is limited, it is modulated into a PWM wave with the triangular carrier wave U2 through the comparator U1, and controls the duty ratio of the switching transistor M1 to realize a stable voltage output U ₀ . In practical applications, the switch transistor M1 may be an NMOS transistor or a PMOS transistor.

Fig. 2 is a schematic block diagram of spark discharge constant power arc extinguishing of an intrinsically safe Buck circuit according to an embodiment of the present invention. The embodiment of the present invention is based on the intrinsically safe Buck circuit energy limiting method with the control circuit shown in Figure 1, by adding a spark discharge constant power circuit, an arc trigger circuit and a blocking circuit to realize the spark discharge constant power at the open inductor Control, so that the spark discharge first meets the discharge power less than the minimum ignition power, then cuts off the power supply, and then meets the discharge energy less than the minimum ignition energy, that is, first limits the spark discharge power, and then limits the spark discharge energy. Among them: the other end of the inductance L is electrically connected to one end of the capacitor C through the shunt FL; the blocking circuit includes an output blocking circuit and a control blocking circuit, the output blocking circuit is electrically connected to the Buck circuit, and the control blocking circuit is electrically connected to the control circuit and the Buck circuit respectively connection; the arcing trigger circuit is electrically connected with the spark discharge constant power circuit, the output blocking circuit and the control blocking circuit respectively; the spark discharge constant power circuit is electrically connected with the Buck circuit.

Referring to Fig. 3, the spark discharge constant power circuit includes operational amplifier A2, operational amplifier A3, operational amplifier A4, resistor R5, resistor R6, resistor R7, resistor R8, resistor R9, resistor R10, resistor R11, resistor R12, comparator U4, Triangular carrier U5, limiter U6, multiplier U8 and thyristor S4. One end of the resistor R5 is electrically connected to the same-direction input terminal of the operational amplifier A2, and the other end of the resistor R5 is electrically connected to the inductor L (the connection point is N1); one end of the resistor R6 is electrically connected to the same-direction input terminal of the operational amplifier A2, and the resistor The other end of R6 is grounded; one end of resistor R7 is electrically connected to the inverting input terminal of operational amplifier A2, and the other end of resistor R7 is electrically connected to capacitor C and resistor R respectively (the connection points are respectively N2 and N3); one end of resistor R8 It is electrically connected to the inverting input terminal of the operational amplifier A2, and the other end of the resistor R8 is electrically connected to the output terminal of the operational amplifier A2; one end of the resistor R9 is electrically connected to the same input terminal of the operational amplifier A3, and the other end of the resistor R9 passes through a shunt One end of the resistor FL is electrically connected to the inductance L; one end of the resistor R10 is electrically connected to the same input end of the operational amplifier A3, and the other end of the resistor R10 is grounded; one end of the resistor R11 is electrically connected to the inverting input end of the operational amplifier A3, and the resistor The other end of R11 is electrically connected to the inductance L through the other end of the shunt FL; one end of the resistor R12 is electrically connected to the inverting input end of the operational amplifier A3, and the other end of the resistor R12 is electrically connected to the output end of the operational amplifier A3; the operational amplifier The output end of A2 is electrically connected with an input end of multiplier U8, and the output end of operational amplifier A3 is electrically connected with the other input end of multiplier U8; The output end of multiplier U8 is electrically connected with the reverse input end of operational amplifier A4 , the same input terminal of the operational amplifier A4 is connected to a given power; the output terminal of the operational amplifier A4 is electrically connected to the input terminal of the limiter U6, and the output terminal of the limiter U6 is electrically connected to an input terminal of the comparator U4; The output end of the carrier U5 is electrically connected to the other input end of the comparator U4; the output end of the comparator U4 is electrically connected to the anode of the thyristor S4, and the cathode of the thyristor S4 is electrically connected to the gate of the switching transistor M1. In practical applications, the thyristor S4 is a bidirectional thyristor.

Referring to Fig. 3, the output blocking circuit includes a resistor R13, a resistor R14, a thyristor S1 and a capacitor C1; after the resistor R14 is connected in series with the thyristor S1, it is then connected in parallel with the resistor R; one end of the capacitor C1 is electrically connected to the gate of the thyristor S1, and the capacitor C1 The other end is electrically connected to the cathode of the thyristor S1; one end of the resistor R13 is electrically connected to the gate of the thyristor S1. The control blocking circuit includes a thyristor S2, a thyristor S3 and an inverter U7; the output terminals of the inverter U7 are respectively electrically connected to the gate of the thyristor S2 and the gate of the thyristor S3; the anode of the thyristor S2 is electrically connected to one end of the resistor R, The cathode of the thyristor S2 is connected in series with the resistor R1; the anode of the thyristor S3 is electrically connected to the output terminal of the comparator U1; the cathode of the thyristor S3 is electrically connected to the gate of the switching tube M1. The arcing trigger circuit is a basic RS flip-flop U9; the input terminal S of the basic RS flip-flop U9 is electrically connected to the output terminal of the operational amplifier A2, the input terminal R of the basic RS flip-flop U9 is connected to a high level, and the The output terminal Q is electrically connected to the gate of the thyristor S4, the other terminal of the resistor R13 and the input terminal of the inverter U7, respectively. In practical applications, both the thyristor S2 and the thyristor S3 are bidirectional thyristors.

Referring to Figure 2 and Figure 3, when the inductance L is disconnected, an open-circuit spark G will be generated. At the right end of the inductance L, the upper end of the capacitor C and the resistor R, the terminals N1, N2 (N3) are drawn out respectively, and a shunt FL is added next to the right side of N1. The arc voltage, that is, the voltage across the terminals N1 and N2 (N3), is measured through the terminals N1, N2 and N3, and it passes through the shaping circuit formed by the resistors R5, R6, R7, R8 and the operational amplifier A2. The arc current, which corresponds to the voltage at both ends of the shunt FL, is measured by the shunt FL, and passes through the shaping circuit formed by the resistors R9, R10, R11, R12 and the operational amplifier A3. The arc voltage and arc current enter the spark discharge constant power circuit as input signals. The output of operational amplifier A2 and operational amplifier A3 passes through multiplier U8 to obtain arc power. The arc power and the given power Pref are compared and output through the operational amplifier A4. The output result of the operational amplifier A4 is limited by the signal of the limiter U6, and the triangular carrier wave U5 is modulated into a PWM wave by the comparator U4. After the thyristor S4 is triggered, the duty cycle of the switching transistor M1 can be controlled to realize the constant power control of the spark discharge. In the arcing trigger circuit, the output of the operational amplifier A2 corresponding to the arc voltage, when the value of the arc voltage reaches half of the minimum arc voltage, triggers the basic RS flip-flop U9 and outputs a high level. The high-level output of the trigger U9 is divided into three routes: 1) the first route enters the output blocking circuit to block the voltage output; the first route passes through the thyristor trigger circuit formed by the resistor R13 and the capacitor C1, and triggers the thyristor S1; the output of the Buck circuit It is short-circuited by the thyristor S1 and the resistor R14. The function of the resistor R14 is to prevent the influence of the capacitor discharge when short-circuited. The resistance value of the resistor R14 is 0.1Ω. 2) The second channel enters the control block circuit and blocks the control circuit; the second channel passes through the inverter U7 and becomes low level; in order to realize the isolation of spark discharge constant power control and normal control, the thyristor S2 is connected in series in the normal control circuit and S3; at this time, the thyristors S2 and S3 are turned off due to the low level output of the inverter U7, so that the control circuit and the switching transistor M1 are disconnected. 3) The third circuit enters the spark discharge constant power circuit, triggers the thyristor S4, and the comparator U4 outputs a PWM wave to control the duty ratio of the switching transistor M1 to realize the constant power control of the spark discharge. It should be noted that when the intrinsically safe Buck circuit is in normal operation, the spark G does not form, the terminals N1 and N2 (N3) are short-circuited, the voltage entering the spark discharge constant power circuit is zero, and the basic RS flip-flop U9 The output is low level, so that both the thyristor S1 and the thyristor S4 are turned off, while the thyristor S2 and the thyristor S3 are turned on, and the circuit works normally.

The spark discharge constant power circuit of the embodiment of the present invention collects the voltage and current of the spark at the open circuit of the inductance, obtains the power of the spark through signal shaping and calculation, compares it with the given power, and controls the switch through the PWM modulation mode of the comparison result The duty cycle of the transistor realizes the constant power control of the open circuit spark discharge. When the spark discharge constant power circuit detects that the spark voltage reaches half of the minimum arc building voltage, the arc trigger circuit synchronously triggers the output blocking circuit and the control blocking circuit to ensure that the spark discharge constant power circuit controls the switching transistor. After the electric spark power stabilizes, cut off the power supply immediately. During the entire discharge process, it is guaranteed that the discharge power is less than the minimum ignition power, and at the same time the discharge energy is less than the minimum ignition energy, which realizes the requirement that both the spark power and the spark energy are less than the minimum ignition value, thus ensuring the intrinsic safety performance of the circuit. During normal operation, the control blocking circuit is straight-through, which does not affect the normal operation of the control circuit; the output blocking circuit is equivalent to an open circuit for voltage output; the spark discharge constant power circuit is an open circuit for switching transistors; this synchronous blocking method makes The circuit structure is complete, and both normal operation and open-circuit faults are taken into account.

It should be noted that: the spark discharge constant power in the embodiment of the present invention means that when an open circuit occurs at the inductance of the Buck circuit, the generated arc discharge spark power is controlled to be constant power, compared with the load output constant power of the Buck circuit, both are different concepts. The former aims at security, while the latter aims at performance.

The spark discharge constant power arc extinguishing method of the intrinsically safe Buck circuit provided by the embodiment of the present invention realizes the spark discharge constant power control at the inductance open circuit by adding a spark discharge constant power circuit, an arc trigger circuit and a blockade circuit, so that the spark discharge The power is less than the minimum ignition power, and the spark discharge energy is less than the minimum ignition energy, thus realizing the requirement that both the arc power and arc energy are less than the minimum ignition value, and the circuit structure is complete, while taking into account normal operation and open circuit faults, ensuring the essence of the inductive circuit safety performance.

The specific embodiments described above have further described the purpose, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above descriptions are only specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

Claims (9)

1. An intrinsically safe Buck circuit, comprising a control circuit and a Buck circuit, is characterized in that it also includes a spark discharge constant power circuit, an arcing trigger circuit and a blocking circuit, and the blocking circuit includes an output blocking circuit and a control blocking circuit; The output blocking circuit is electrically connected to the Buck circuit, and the control blocking circuit is electrically connected to the control circuit and the Buck circuit respectively; the arcing trigger circuit is connected to the spark discharge constant power circuit and the output blocking circuit respectively. 1. The control blockade circuit is electrically connected; the spark discharge constant power circuit is electrically connected to the Buck circuit; the spark discharge constant power circuit obtains the electric voltage through signal shaping and calculation by collecting the voltage and current of the electric spark at the open circuit of the inductor. The power of the spark is compared with the given power, and the comparison result controls the duty cycle of the switching transistor through the PWM modulation mode to realize the constant power control of the open circuit spark discharge; when the spark discharge constant power circuit detects that the spark voltage reaches the minimum arc establishment When the voltage is half, through the arcing trigger circuit, the output blocking circuit and the control blocking circuit are synchronously triggered to ensure that the spark discharge constant power circuit controls the switching transistor. 2. intrinsically safe Buck circuit as claimed in claim 1, is characterized in that, described Buck circuit comprises power supply, switching transistor, diode, inductance, electric capacity and resistance; The forward terminal of described power supply and the drain of described switching transistor The source of the switching transistor is electrically connected to the cathode of the diode, one end of the inductor is electrically connected to the cathode of the diode, and the other end of the inductor is electrically connected to one end of the capacitor through a shunt. The other end of the capacitor is electrically connected to the anode of the diode, the anode of the diode is electrically connected to the negative end of the power supply, and the resistor is connected in parallel with the capacitor. 3. The intrinsically safe Buck circuit as claimed in claim 2, wherein the control blocking circuit comprises a second thyristor, a third thyristor and an inverter; the output terminals of the inverter are connected to the second thyristor respectively. The gate of the thyristor is electrically connected to the gate of the third thyristor; the anode of the second thyristor is electrically connected to one end of the resistor; the cathode of the third thyristor is electrically connected to the gate of the switching transistor. 4. The intrinsically safe Buck circuit as claimed in claim 3, wherein the control circuit comprises a first resistor, a second resistor, a third resistor, a fourth resistor, a second capacitor, a third capacitor, a first computing Amplifier, first limiter, first triangle carrier and first comparator; one end of the first resistor is electrically connected to the cathode of the second thyristor, and the other end of the first resistor is connected to the second resistor one end of the second resistor is electrically connected to the inverting input end of the first operational amplifier; one end of the third resistor is electrically connected to the inverting input end of the first operational amplifier, The other end of the third resistor is grounded; the non-inverting input terminal of the first operational amplifier is connected to a given voltage, the output terminal of the first operational amplifier is electrically connected to one end of the fourth resistor, and the fourth The other end of the resistor is electrically connected to one end of the third capacitor; the other end of the third capacitor is electrically connected to the inverting input end of the first operational amplifier; the second capacitor is connected in parallel with the second resistor The output end of the first operational amplifier is electrically connected to the input end of the first limiter, and the output end of the first limiter is electrically connected to an input end of the first comparator; The output end of the first triangular carrier wave is electrically connected to the other input end of the first comparator; the output end of the first comparator is electrically connected to the anode of the third thyristor. 5. intrinsically safe Buck circuit as claimed in claim 4, is characterized in that, described spark discharge constant power circuit comprises second operational amplifier, the 3rd operational amplifier, the 4th operational amplifier, the 5th resistor, the 6th resistor, the 6th operational amplifier seven resistors, eighth resistors, ninth resistors, tenth resistors, eleventh resistors, twelfth resistors, a second comparator, a second triangle carrier, a second limiter, a multiplier and a fourth thyristor; One end of the fifth resistor is electrically connected to the same-inverting input end of the second operational amplifier, and the other end of the fifth resistor is electrically connected to the inductor; one end of the sixth resistor is electrically connected to the second operational amplifier. The same input end is electrically connected, and the other end of the sixth resistor is grounded; one end of the seventh resistor is electrically connected to the inverting input end of the second operational amplifier, and the other end of the seventh resistor is respectively connected to the The capacitor is electrically connected to the resistor; one end of the eighth resistor is electrically connected to the inverting input of the second operational amplifier, and the other end of the eighth resistor is electrically connected to the output of the second operational amplifier. connected; one end of the ninth resistor is electrically connected to the same-inverting input end of the third operational amplifier, and the other end of the ninth resistor is electrically connected to the inductor through one end of the shunt; the tenth One end of the resistor is electrically connected to the same input end of the third operational amplifier, the other end of the tenth resistor is grounded; one end of the eleventh resistor is electrically connected to the inverting input end of the third operational amplifier , the other end of the eleventh resistor is electrically connected to the inductor through the other end of the shunt; one end of the twelfth resistor is electrically connected to the inverting input end of the third operational amplifier, the The other end of the twelfth resistor is electrically connected to the output end of the third operational amplifier; the output end of the second operational amplifier is electrically connected to an input end of the multiplier, and the output end of the third operational amplifier It is electrically connected to the other input terminal of the multiplier; the output terminal of the multiplier is electrically connected to the inverting input terminal of the fourth operational amplifier, and the non-inverting input terminal of the fourth operational amplifier is connected to a given power ; The output end of the fourth operational amplifier is electrically connected to the input end of the second limiter, and the output end of the second limiter is electrically connected to an input end of the second comparator; The output end of the second triangular carrier wave is electrically connected to the other input end of the second comparator; the output end of the second comparator is electrically connected to the anode of the fourth thyristor, and the cathode of the fourth thyristor is electrically connected to the fourth thyristor. The gates of the switching transistors are electrically connected. 6. The intrinsically safe Buck circuit as claimed in claim 5, wherein the output blocking circuit comprises a thirteenth resistor, a fourteenth resistor, a first thyristor and a first capacitor; the fourteenth resistor and the After the first thyristor is connected in series, it is connected in parallel with the resistor; one end of the first capacitor is electrically connected to the gate of the first thyristor, and the other end of the first capacitor is electrically connected to the cathode electrode of the first thyristor. connected; one end of the thirteenth resistor is electrically connected to the gate of the first thyristor. 7. The intrinsically safe Buck circuit as claimed in claim 6, wherein the arcing trigger circuit is a basic RS flip-flop; the input terminal S of the basic RS flip-flop is connected to the output terminal of the second operational amplifier Electrically connected, the input terminal R of the basic RS flip-flop is connected to a high level; the output terminal Q of the basic RS flip-flop is respectively connected to the gate of the fourth thyristor, the other end of the thirteenth resistor and the The input end of the inverter is electrically connected. 8. The intrinsically safe Buck circuit according to claim 7, wherein the second thyristor, the third thyristor and the fourth thyristor are all bidirectional thyristors. 9. The intrinsically safe Buck circuit according to claim 8, wherein the switching transistor is an NMOS transistor or a PMOS transistor.